WO2008052850A2 - Procédé et système pour transmettre des trames de données - Google Patents
Procédé et système pour transmettre des trames de données Download PDFInfo
- Publication number
- WO2008052850A2 WO2008052850A2 PCT/EP2007/060145 EP2007060145W WO2008052850A2 WO 2008052850 A2 WO2008052850 A2 WO 2008052850A2 EP 2007060145 W EP2007060145 W EP 2007060145W WO 2008052850 A2 WO2008052850 A2 WO 2008052850A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- data
- frames
- segment
- predetermined
- data unit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0052—Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0072—Error control for data other than payload data, e.g. control data
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L2001/0092—Error control systems characterised by the topology of the transmission link
- H04L2001/0094—Bus
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L2001/0092—Error control systems characterised by the topology of the transmission link
- H04L2001/0096—Channel splitting in point-to-point links
Definitions
- the present invention relates to a method and a system for transmitting data frames, in particular by means of a Flexray bus.
- the flexray bus and the associated flexray protocol are described, for example, in the document EP 1 355 456 A1.
- data frames or frames are transmitted in a communication cycle or cycle with a static segment and / or a dynamic segment.
- a data frame contains a header segment (header), a data segment (payload) and a checksum segment (CRC Data).
- a data segment includes one or more data units, which may also have a different size.
- the frame or data frame is transmitted from a first transceiver or node coupled to the flexray bus to at least one second transceiver or node which is also coupled to the flexray bus.
- the transmitted frames are protected by the CRC checksum (CRC, Cyclic Redundancy Check).
- CRC checksums are used for error detection, theoretically they could also be used for error correction, but the Hamming distance in the Flexray protocol is not sufficient and the computational effort would be very high for that.
- the respective CRC checksum of a transmitted data frame can thus indicate whether the transmitted data frame has been correctly or incorrectly received by the respective second transceiver.
- the inventive method for transmitting data frames with the features of claim 1 and the inventive system for transmitting data frames with the features of claim 12 has the advantage that each transceiver, a predetermined number of data frames from another, predetermined receive / receive device via the coupling bus system should receive or correct exactly one of the number of data frames or can restore if it does not arrive or not correctly to the respective transmitting / receiving device.
- the incorrect arrival can preferably - as shown above - be determined by means of the respective CRC checksum.
- a system for transmitting data frames which comprise at least one header segment and one data segment with at least one additional data unit having a predetermined data segment position in the data segment and a predetermined number N of data unit bits Have checksum segment, wherein the inventive system comprises:
- At least one transmitting / receiving device comprises:
- a first means providing a predetermined number M of data frames to be transmitted
- a second means which is suitable for a predetermined number X, with X e [1, ..., M], each a bitwise XOR operation of the data unit bits each at a predetermined data unit position of a predetermined amount M ', with M ' ⁇
- a third means storing the provided N check bits at the corresponding data unit positions of a further data frame for providing the test frame to the data frame to be transmitted provided to the respective set M ';
- a data frame is transmitted in each case in a slot or time slot predetermined by the time-division multiplexing method.
- the bus system is a flexray bus system with a flexray protocol, which has a predetermined number of transmission times.
- one cycle or communication cycle of the time division multiplexing method used has at least one static region, in which at least one predetermined part of the transceiver devices at least one slot of identical length for transmitting data frames is assigned, and optionally one or more dynamic ranges in which the respective slots, each having a determinable length, can be dynamically assigned to at least a part of the transceiver devices.
- the M data frames are transmitted in the static area.
- the receiving transceivers can thus determine whether a respective data frame which is to arrive at a predetermined time has also arrived. If exactly one of these data frames does not arrive at a particular time, the respective receiving transceiver can replace or restore it in accordance with the invention.
- a display bit is provided in the header segment, wherein a positive logical value of the display bit, for example 1, indicates that the data segment has at least one data unit to be backed up, and a negative logical value of the display bit, for example 0, indicates that the data segment has no data unit to be backed up.
- the display bit is a payload preamble indicator, which is provided according to the Flexray protocol in the header segment of a data frame.
- the number X determines a number of subnetworks of the bus system.
- a subnet has a predetermined number of transmitting / receiving devices coupled by means of the bus system, each of which contains the respective subnet M 'quantity of the transmitted M data frames and the corresponding to the respective subnet test frame from a respective predetermined transmitting / receiving device receive.
- secure subnets can be established within the network formed by the bus system and the transceivers coupled by the bus system. Safe in this context means that a data frame that has not been transferred correctly or not can be restored or generated. This only requires the overhead of an additional audit framework per subnet.
- test frame of the other subnet can be reused. This results in the additional advantage that a time slot is saved, resulting in a better utilization of the bandwidth of the bus system.
- the redundant data frame or test frame with the parity is used to reduce the residual error probability, ie as additional security.
- a checksum is calculated over at least one predetermined part of the data segment and / or the header segment and the calculated checksum is stored in the checksum segment of the data frame.
- the calculated checksum can indicate whether a transmitted data frame has been transmitted correctly or incorrectly. Only from the determination of an incorrect transmission of a data frame can then be advantageously initialized the recovery of the invention.
- the bus system is designed as a Flexray bus system and the transmitting / receiving devices each have one
- the at least one data unit to be protected is contained in a network management vector which is defined by the flexray protocol 2.1.
- the X test frames are each before
- FIG. 1 shows a schematic flowchart of an exemplary embodiment of the method according to the invention
- Figure 2 is a schematic block diagram of an embodiment of the format of the data frame according to the present invention.
- Figure 3 is a schematic representation of the generation of a test frame according to the present invention.
- Figure 4 is a schematic block diagram of an embodiment of the system for
- Figure 5 is a schematic flow diagram of one embodiment of a communication cycle in accordance with the present invention.
- FIG. 6 shows a schematic, detailed representation of the data frames transmitted according to FIG.
- FIG. 1 shows a schematic flow diagram of an embodiment of the inventive method for transmitting data frames DRl-DRIl is shown.
- the data frame DR1-DRI1 to be transmitted in each case has at least one head segment KS, a data segment DS and a checksum segment PS.
- the data segment DS has at least one data unit DEl-DEn to be protected.
- a data unit DEl-DEn to be saved has a predetermined data segment position Pl-Pn in the data segment DS and a predetermined number N of data unit bits B1-B96 (see FIG. 3).
- FIG. 2 shows only a single data frame DR1.
- the following data frames DR2-DR11 described are analogous.
- the method according to the invention is described below with reference to the block diagram in FIG. 1 with reference to the schematic block diagram of the format of the data frame DR1 as described above according to FIG. 2 and with reference to the schematic block diagram according to FIG.
- the exemplary embodiment of the method according to FIG. 1 has the following method steps S1-S4:
- a predetermined number M of data frames DR1-DR7 to be sent are provided.
- the data frames DR1-DR7 to be transmitted are provided by a predetermined transceiver DR1.
- FIG. 3 shows an exemplary schematic representation of the generation of the test frame DR8.
- M 7 means that seven data frames DR1-DR7, which are to be transmitted via the bus system BS, are provided by a predetermined transceiver, for example the first transceiver SEI (see FIG. 4).
- N 96 means that the respective data unit DEI-DEn has 96 data unit bits B1-B96.
- X 4 means that the net, which by the Bus system BS and the coupled via the bus system BS transceiver SE1 SE5 is formed (see Figure 4), four subnets includes.
- N check bits are stored at the corresponding data unit locations DP1-DP96 of another data frame DR8-DR11 for providing the check frame DR8-DR11 to the respective set M 'of data frames DR1-DR7 to be transmitted.
- a single XOR operation is XOR for all data unit bits, e.g. Bl, at the respective data unit bit position, e.g. DPI performed.
- the data frame DR8 forms the test frame
- DR8 for a first subnet, characterized in that the transceiver devices of this first subnet are to receive all provided data frames DR1 to DR7.
- the associated test frame DR8 must be formed over all data frames DR1-DR7. Consequently, all the data unit bits D1-D96 of the respective data unit to be protected, for example the data unit DE1 according to FIG. 3, are XOR-linked at a predetermined data unit position DP1-DP96 to provide 96 check bits for the test frame DR8.
- the data unit bits Bl are logically XORed at the data unit position DPI of all seven data frames DR1-DR7 to provide the first data unit bit Bl at the data unit bit position DPI of the test frame DR8.
- the following data unit bits B2-B96 are analogous.
- the M data frames DR1-DR7 and the X test frames DR8-DR11 are transmitted via the bus system BS by means of a time-division multiplexing method.
- a data frame DRI-DRIl is sent in a slot SL1-SLI1 (see FIG. 5) which is predetermined by the time-division multiplexing method.
- the bus system BS is configured as a flexray bus system with a flexray
- Protocol is formed which couples a predetermined number of transceivers SE1 SE5 (see Figure 4), wherein each one cycle or Communication cycle of the time division multiplexing used at least one static area in which at least one predetermined portion of the transceivers SE1 SE5 each at least one slot SL1-SL8 identical length for transmitting data frames DR1-DR8 is assigned, and at least one dynamic range has, in which the respective slots SL9-SL11, each having a determinable length, can be dynamically assigned to at least a part of the transceivers SE1-SE5.
- the X test frames DR8-DR11 are each initialized with a predetermined value, for example 0, before the beginning of a cycle of the time-division multiplexing process.
- FIG. 4 shows a schematic block diagram of an exemplary embodiment of the system for transmitting data frames DR8-DR11, which each have at least one head segment KS and a data segment DS with at least one data unit DE1-DEn to be protected, which has a predetermined data segment position DE1-DEn in the data segment DS and a predetermined number N of data unit bits Bl-B96, and having a checksum segment PS (see Figure 2).
- the system according to the invention has a bus system BS which couples a predetermined number of transceivers SE1-SE5.
- at least one transceiver SE1-SE5 has a first means, a second means, a third means and a fourth means.
- the first means is adapted to provide a predetermined number N of data frames DR1-DR7 to be transmitted.
- the second means is suitable for a predetermined number X, with X e [1, ..., N], one bitwise XOR operation XOR of the data unit bits B1-B96 each at a predetermined data unit position DP1-DP96 of a predetermined amount M ', with M' ⁇ M, provided to send data frames DR1-DR7 to provide N check bits for a test frame DR8-DR11 to the respective set M 'perform.
- the third means is adapted to store the provided N check bits respectively at the respective data unit positions DP1-DP96 of another data frame DR8-DR11 for providing the test frame DR8-DR11 to the respective set M 'provided data frames DR1-DR7 to be transmitted.
- the fourth means is adapted to transmit the M data frames DR1-DR7 and the X test frames DR8-DR11 via the bus system BS by means of time division multiplexing.
- the bus system BS is preferably embodied as a flexray bus system, and the transceivers SE1-SE5 each have a flexray communication control device.
- the number X defines a number of subnetworks, wherein in each case one subnetwork has a predetermined number of transceivers SE1-SE5 coupled by means of the bus system BS, each of which contains the subset M of the transmitted M data frames DR1-DR7 and receive the corresponding test frame DR8-DR11 associated with the respective subnet from the respective predetermined transceiver SE1-SE5.
- FIG. 5 shows a schematic flow diagram of an embodiment of a communication cycle or cycle according to the present invention.
- the first line of FIG. 5 shows a sequence of eleven slots SLL-SLIl.
- the first transceiver SEI transmits a data frame DRI-DRIl in each of the eleven slots SLL-SLIl.
- the data frames DR1-DR7 are conventional data frames and the data frames DR8-DR11 are test frames. Since the number X of secure subnets is four, four test frames, namely the data frames DR8-DR11, are also necessary.
- Those data frames DRI-DRIl received by the respective receiving transceiver SE2-SE5 are indicated by hatching for the purpose of illustration in FIG.
- the second transceiver SE2 receives the data frames DRI-DR7 and the test frame DR8 associated with the first subnet.
- the third transceiver SE2 receives the data frames DR2, DR3, DR5 and DR6 and the test frame DR9 associated with the second subnet.
- the fourth transceiver SE4 receives the data frames DR1, DR2 and DR5 to DR7 and the test frame DR10 belonging to the third subnet.
- the fifth transceiver SE5 receives the data frame DR2 and the test frame DRI1 associated with the fourth subnet.
- M ' is seven for the first subnet, four for the second subnet, five for the third subnet, and one for the fourth subnet.
- FIG. 6 shows a schematic, detailed representation of the data frames DR1-DR1 transmitted according to FIG.
- a data frame DR1-DRI1 consists of the data unit bits B1-B96, which are preferably imaged by the network management vector NMV defined in the flexray protocol 2.1, and the bits B97-B128 which are not to be protected.
- the eighth data frame DR8 which is the test frame for the first subnet, the data unit bits B1-B96 of the seven data frames DR1-DR7 are bit-wise XORed, respectively.
- the ninth data frame DR8 representing the test frame for the second subnet, the data unit bits B1-B96 become the data frames
- DR2, DR3 and DR5, DR6 each XOR linked.
- the data unit bits B1-B96 of the data frames DR1, DR2, and DR5-DR7 are each XORed.
- the eleventh data frame DRI1 which is the fourth subnet test frame
- the data frame DR2, which is the only data frame to be transmitted for the fourth subnet is retransmitted to provide redundancy.
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Time-Division Multiplex Systems (AREA)
- Error Detection And Correction (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
- Communication Control (AREA)
- Small-Scale Networks (AREA)
Abstract
La présente invention concerne un procédé pour transmettre des trames de données présentant chacune au moins un segment d'en-tête et un segment de données comprenant au moins une unité de données à sauvegarder, laquelle présente une position prédéterminée dans le segment de données et un nombre N prédéterminé de bits d'unité de données, ainsi qu'un segment de total de contrôle. Ce procédé comprend les étapes suivantes : préparation d'un nombre M prédéterminé de trames de données à envoyer; pour un nombre X prédéterminé, X appartenant à l'ensemble [1,...,M], application d'une opération OU exclusif bit par bit aux bits de l'unité de données à une position respective prédéterminée de l'unité de données d'une quantité M` prédéterminée de trames de données préparées devant être envoyées pour préparer N bits de contrôle pour une trame de contrôle relativement à la quantité M` respective, M` étant inférieure ou égale à M; enregistrement des N bits de contrôle aux positions correspondantes de l'unité de données d'une autre trame de données pour préparer la trame de contrôle relativement à la quantité M` respective de trames de données préparées devant être envoyées; et envoi des M trames de données et des X trames de contrôle par l'intermédiaire d'un système de bus par multiplexage par répartition dans le temps; réception et contrôle/remplacement de la trame de données manquante.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP07820548A EP2084817A2 (fr) | 2006-11-03 | 2007-09-25 | Procede et systeme pour transmettre des trames de donnees |
JP2009535046A JP2010508741A (ja) | 2006-11-03 | 2007-09-25 | データフレームの伝送方法、および、データフレームを伝送するためのシステム |
CN200780041078.6A CN101589554B (zh) | 2006-11-03 | 2007-09-25 | 传输数据帧的方法和系统 |
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102006052268 | 2006-11-03 | ||
DE102006052268.0 | 2006-11-03 | ||
DE102006055551.1 | 2006-11-24 | ||
DE102006055551 | 2006-11-24 | ||
DE102006059627.7 | 2006-12-14 | ||
DE102006059627A DE102006059627A1 (de) | 2006-11-03 | 2006-12-14 | Verfahren und System zur Übertragung von Datenrahmen |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2008052850A2 true WO2008052850A2 (fr) | 2008-05-08 |
WO2008052850A3 WO2008052850A3 (fr) | 2008-10-16 |
Family
ID=39265015
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2007/060145 WO2008052850A2 (fr) | 2006-11-03 | 2007-09-25 | Procédé et système pour transmettre des trames de données |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP2084817A2 (fr) |
JP (1) | JP2010508741A (fr) |
CN (1) | CN101589554B (fr) |
DE (1) | DE102006059627A1 (fr) |
WO (1) | WO2008052850A2 (fr) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1355456A1 (fr) * | 2002-04-16 | 2003-10-22 | Robert Bosch Gmbh | Protocole de communication FlexRay |
ATE367700T1 (de) * | 2002-04-16 | 2007-08-15 | Bosch Gmbh Robert | Verfahren und einheit zur bitstromdekodierung |
KR100578080B1 (ko) * | 2003-11-14 | 2006-05-10 | 엘지전자 주식회사 | 시리얼 통신 프로토콜 중 명령 및 데이터 전송 및 수신 방법 |
-
2006
- 2006-12-14 DE DE102006059627A patent/DE102006059627A1/de not_active Withdrawn
-
2007
- 2007-09-25 JP JP2009535046A patent/JP2010508741A/ja not_active Withdrawn
- 2007-09-25 EP EP07820548A patent/EP2084817A2/fr not_active Ceased
- 2007-09-25 WO PCT/EP2007/060145 patent/WO2008052850A2/fr active Application Filing
- 2007-09-25 CN CN200780041078.6A patent/CN101589554B/zh not_active Expired - Fee Related
Non-Patent Citations (1)
Title |
---|
G.C. CLARK; J. BIBB CAIN: "Error-Correction Coding for Digital Communications", 1981, PLENUM PRESS |
Also Published As
Publication number | Publication date |
---|---|
JP2010508741A (ja) | 2010-03-18 |
EP2084817A2 (fr) | 2009-08-05 |
DE102006059627A1 (de) | 2008-05-08 |
WO2008052850A3 (fr) | 2008-10-16 |
CN101589554A (zh) | 2009-11-25 |
CN101589554B (zh) | 2013-10-30 |
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