WO2008016420A3 - Multi-use memory cell and memory array and method for use therewith - Google Patents

Multi-use memory cell and memory array and method for use therewith Download PDF

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Publication number
WO2008016420A3
WO2008016420A3 PCT/US2007/013770 US2007013770W WO2008016420A3 WO 2008016420 A3 WO2008016420 A3 WO 2008016420A3 US 2007013770 W US2007013770 W US 2007013770W WO 2008016420 A3 WO2008016420 A3 WO 2008016420A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory cell
memory
array
memory array
programmed
Prior art date
Application number
PCT/US2007/013770
Other languages
French (fr)
Other versions
WO2008016420A2 (en
Inventor
Roy E Scheuerlein
Tanmay Kumar
Original Assignee
Sandisk 3D Llc
Roy E Scheuerlein
Tanmay Kumar
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/496,985 external-priority patent/US20070069276A1/en
Application filed by Sandisk 3D Llc, Roy E Scheuerlein, Tanmay Kumar filed Critical Sandisk 3D Llc
Publication of WO2008016420A2 publication Critical patent/WO2008016420A2/en
Publication of WO2008016420A3 publication Critical patent/WO2008016420A3/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/06Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using diode elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • G11C17/165Memory cells which are electrically programmed to cause a change in resistance, e.g. to permit multiple resistance steps to be programmed rather than conduct to or from non-conduct change of fuses and antifuses
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18Auxiliary circuits, e.g. for writing into memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/027Detection or location of defective auxiliary circuits, e.g. defective refresh counters in fuses
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564Miscellaneous aspects
    • G11C2211/5641Multilevel memory having cells with different number of storage levels

Abstract

A multi-use memory cell and memory array and a method for use therewith are disclosed. In one preferred embodiment, a memory cell is operable as a one-time programmable memory cell or a rewritable memory cell. The memory cell comprises a memory element comprising a semiconductor material configurable to one of at least three resistivity states, wherein a first resistivity state is used to represent a data state of the memory cell when the memory cell operates as a one-time programmable memory cell but not when the memory cell operates as a rewritable memory cell. A memory array with such memory cells is also disclosed. In another preferred embodiment, a memory cell is provided comprising a switchable resistance material, wherein the memory cell is operable in a first mode in which the memory cell is programmed with a forward bias and a second mode in which the memory cell is programmed with a reverse bias.
PCT/US2007/013770 2006-07-31 2007-06-12 Multi-use memory cell and memory array and method for use therewith WO2008016420A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/496,985 US20070069276A1 (en) 2005-09-28 2006-07-31 Multi-use memory cell and memory array
US11/496,984 2006-07-31
US11/496,984 US7447056B2 (en) 2005-09-28 2006-07-31 Method for using a multi-use memory cell and memory array
US11/496,985 2006-07-31

Publications (2)

Publication Number Publication Date
WO2008016420A2 WO2008016420A2 (en) 2008-02-07
WO2008016420A3 true WO2008016420A3 (en) 2008-03-27

Family

ID=38617251

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/013770 WO2008016420A2 (en) 2006-07-31 2007-06-12 Multi-use memory cell and memory array and method for use therewith

Country Status (2)

Country Link
TW (1) TWI441182B (en)
WO (1) WO2008016420A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8154005B2 (en) * 2008-06-13 2012-04-10 Sandisk 3D Llc Non-volatile memory arrays comprising rail stacks with a shared diode component portion for diodes of electrically isolated pillars
US20100059729A1 (en) * 2008-09-09 2010-03-11 Ovonyx, Inc. Apparatus and method for memory

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6483734B1 (en) * 2001-11-26 2002-11-19 Hewlett Packard Company Memory device having memory cells capable of four states
WO2005066969A1 (en) * 2003-12-26 2005-07-21 Matsushita Electric Industrial Co., Ltd. Memory device, memory circuit and semiconductor integrated circuit having variable resistance
WO2006121837A2 (en) * 2005-05-09 2006-11-16 Sandisk 3D Llc Nonvolatile memory cell comprising a diode and a resistance-switching material
WO2007126669A1 (en) * 2006-03-31 2007-11-08 Sandisk 3D Llc Multilevel nonvolatile memory cell comprising a resistivity- switching oxide or nitride and an antifuse

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6483734B1 (en) * 2001-11-26 2002-11-19 Hewlett Packard Company Memory device having memory cells capable of four states
WO2005066969A1 (en) * 2003-12-26 2005-07-21 Matsushita Electric Industrial Co., Ltd. Memory device, memory circuit and semiconductor integrated circuit having variable resistance
WO2006121837A2 (en) * 2005-05-09 2006-11-16 Sandisk 3D Llc Nonvolatile memory cell comprising a diode and a resistance-switching material
WO2007126669A1 (en) * 2006-03-31 2007-11-08 Sandisk 3D Llc Multilevel nonvolatile memory cell comprising a resistivity- switching oxide or nitride and an antifuse

Also Published As

Publication number Publication date
TW200811864A (en) 2008-03-01
WO2008016420A2 (en) 2008-02-07
TWI441182B (en) 2014-06-11

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