WO2008006024A2 - Amorçage et régulation en lampe allumée pour un dispositif de commande de lampe fluorescente à cathode froide (ccfl) - Google Patents

Amorçage et régulation en lampe allumée pour un dispositif de commande de lampe fluorescente à cathode froide (ccfl) Download PDF

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Publication number
WO2008006024A2
WO2008006024A2 PCT/US2007/072862 US2007072862W WO2008006024A2 WO 2008006024 A2 WO2008006024 A2 WO 2008006024A2 US 2007072862 W US2007072862 W US 2007072862W WO 2008006024 A2 WO2008006024 A2 WO 2008006024A2
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WO
WIPO (PCT)
Prior art keywords
voltage
inverter
lamp
duty cycle
sweep
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Application number
PCT/US2007/072862
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English (en)
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WO2008006024A3 (fr
Inventor
George C. Henry
David K. Lacombe
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Microsemi Corporation
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Publication date
Application filed by Microsemi Corporation filed Critical Microsemi Corporation
Publication of WO2008006024A2 publication Critical patent/WO2008006024A2/fr
Publication of WO2008006024A3 publication Critical patent/WO2008006024A3/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14—Circuit arrangements
    • H05B41/26—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc
    • H05B41/28—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters
    • H05B41/282—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices
    • H05B41/285—Arrangements for protecting lamps or circuits against abnormal operating conditions
    • H05B41/2851—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the circuit against abnormal operating conditions
    • H05B41/2855—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the circuit against abnormal operating conditions against abnormal lamp operating conditions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps

Definitions

  • This invention relates to inverter controllers for controlling power to fluorescent lamps and more particularly to an inverter controller with reliable lamp ignition and open lamp voltage regulation.
  • Fluorescent lamps are used in a number of applications where light is required but the power required to generate the light is limited.
  • One particular type of fluorescent lamp is a cold cathode fluorescent lamp (CCFL).
  • CCFLs are used for back lighting or edge lighting of liquid crystal displays (LCDs), which are typically used in notebook computers, web browsers, automotive and industrial instrumentations, and entertainment systems.
  • LCDs liquid crystal displays
  • Such fluorescent lamps require a high starting voltage (on the order of 700-1,600 volts) for a short period of time to ionize the gas contained within the lamp tubes for ignition. After the gas in the CCFL is ionized and the CCFL is fired, less voltage is needed to keep the CCFL on.
  • a CCFL tube typically contains a gas, such as Argon, Xenon, or the like, along with a small amount of Mercury. After an initial ignition stage and the formation of plasma, current flows through the tube, which results in the generation of ultraviolet light. The ultraviolet light in turn strikes a phosphorescent material coated in the inner wall of the tube, resulting in visible light.
  • a gas such as Argon, Xenon, or the like
  • a power conversion circuit known as an inverter, is generally used for driving the CCFL.
  • the inverter accepts a direct current (DC) input voltage and provides an alternating current (AC) output voltage to the CCFL.
  • the brightness (or the light intensity) of the CCFL is controlled by controlling the current (i.e., the lamp current) through the CCFL.
  • the lamp current can be amplitude modulated or pulse width modulated to control the brightness of the CCFL.
  • One type of inverter includes a resonant circuit.
  • the inverter includes switching transistors in a half bridge topology or a full bridge topology using power metal-oxide- semiconductor-field-effect-transistors (MOSFETs) to provide the DC to AC conversion.
  • MOSFETs power metal-oxide- semiconductor-field-effect-transistors
  • Maximum power is provided at the output of the inverter by switching the MOSFETs with driving signals at a resonant frequency.
  • the inverter can change the frequency of the driving signals either towards the resonant frequency or away from the resonant frequency.
  • One aspect of the present invention is an inverter with a closed feedback loop that sequentially controls a duty cycle sweep and a frequency sweep of at least one driving signal for igniting a lamp and regulating an open lamp voltage.
  • the closed feedback loop includes a detector circuit, a control voltage generator and two voltage converters.
  • the detector circuit monitors an output voltage of the inverter and indicates when the output voltage of the inverter is greater than a predetermined threshold.
  • the control voltage generator generates a control voltage signal that can vary from a first level to a second level at a predefined rate when the inverter enters a strike mode to ignite the lamp.
  • the control voltage generator is coupled to an output of the detector circuit and the control voltage signal stops varying at the predefined rate when the output of the detector circuit indicates that the output voltage of the inverter is greater than the predetermined threshold.
  • One voltage converter generates a first control output in response to a first range of values for the control voltage signal and another voltage converter generates a second control output in response to a second range of values in the control voltage signal.
  • the first range of values do not overlap with the second range of values for the control voltage signal so that the duty cycle sweep and the frequency sweep of the driving signal do not occur at the same time during an ignition attempt, hi another embodiment, the duty cycle sweep and the frequency sweep partially overlap.
  • the duty cycle sweep or the frequency sweep may be terminated to regulate the output voltage of the inverter at a desired open lamp voltage level, hi addition, the strike mode ends when the lamp ignites (e.g., when the lamp conducts a current above a predetermined level) or when a time out condition occurs without ignition of the lamp.
  • a method of igniting a lamp includes sequentially controlling a duty cycle sweep and a frequency sweep in a pulse width modulation (PWM) controller to provide an increasing output voltage to the lamp.
  • PWM pulse width modulation
  • the method controls both parameters (duty cycle and frequency) in a novel manner for lamp ignition and open lamp voltage regulation.
  • the method allows for seamless operation of ignition and open lamp voltage regulation schemes during a strike mode of the PWM controller.
  • a lamp is coupled to a secondary winding of a transformer.
  • the lamp strikes when a voltage across the secondary winding (e.g., secondary voltage or lamp voltage) is sufficiently high.
  • the secondary voltage is dependent on three parameters: duty cycle of signals (e.g., switching signals) coupled to a primary winding of the transformer, frequency of the switching signals, and battery voltage applied to the primary winding.
  • the method also provides accurate (or improved) regulation of open lamp voltage (e.g., when lamp is missing during the strike mode).
  • the ignition scheme works in conjunction with the open lamp voltage regulation scheme. For example, if the lamp is not present or defective during the strike mode, the PWM controller regulates the secondary voltage to prevent damage to the secondary winding.
  • the open lamp voltage regulation scheme advantageously controls (or limits) the secondary voltage to a window (or range) of secondary voltages that are sufficient to ignite a lamp without causing damage to the secondary winding.
  • the open lamp voltage regulation scheme reduces overshoot in the secondary voltage and regulates the secondary voltage over a wide range of variables. For example, the open lamp peak voltage regulation is specified to be within five percent in one embodiment.
  • the invention is used in notebook or laptop computer backlighting applications in which duty cycle and frequency vary over a wide range for lamp ignition and open lamp voltage regulation.
  • the invention also applies to television, automotive and other applications that use backlighting for visual displays.
  • the invention advantageously controls both duty cycle and frequency in a stable closed feedback loop (e.g., with minimal overshoot in the secondary voltage).
  • a combination of duty cycle control and frequency control provides flexibility to generate a secondary voltage sufficient to strike the lamp without exceeding a maximum rating of the secondary winding in applications with different lamps, transformers, printed circuit board layouts, battery voltages, etc.
  • the invention ensures that a striking frequency is not too low or too high, a duty cycle is not too low for relatively lower battery voltages or too high for relatively higher battery voltages, or open lamp voltage does not exceed secondary voltage ratings.
  • a cold cathode fluorescent lamp (CCFL) controller is interfaced to a primary winding of a transformer to control power to a CCFL coupled to a secondary winding of the transformer.
  • the CCFL controller controls a set of switches (e.g., by alternately turning on and off semiconductor switches) to generate an alternating current (AC) signal in the primary winding with a frequency and duty cycle determined by the CCFL controller.
  • a transformer primary to secondary turns ratio is chosen to increase a voltage across the secondary winding.
  • the secondary winding is part of a high Q, resonant circuit comprising the secondary winding's parasitic inductance along with resistors, capacitors, and other parasitics coupled to the secondary winding.
  • the secondary peak voltage is a parameter of interest for lamp ignition and open lamp voltage regulation.
  • the secondary voltage is relatively high (e.g., 1.5 Kilo-volts) to ignite the CCFL.
  • the secondary voltage is dependent on applied battery voltage, duty cycle and frequency. Since the secondary winding is part of the high Q, resonant circuit (or secondary tank circuit) that has steep skirts, the secondary voltage may change rapidly in response to frequency or duty cycle changes near the resonant frequency.
  • the resonant frequency may vary considerably due to different lamp characteristics and printed circuit board parasitics.
  • a square wave switching signal (or driving signal) is used to generate the AC signal in the primary winding.
  • the square wave switching signal is comprised of odd harmonic frequencies with magnitude ratios determined by the square wave switching signal's duty cycle. Energy in each pulse of the square wave switching signal is distributed to the harmonic frequencies.
  • a square wave switching signal with narrow pulses results in a secondary voltage with relatively narrow peaks of high voltage.
  • a square wave switching signal with wider pulses results in a secondary voltage that has a wider, more sinusoidal shape with relatively lower peak amplitudes. There is a diminishing increase in the peak amplitudes of the secondary voltage as the duty cycle (or pulse width) of the square wave switching signal increases further.
  • a controller changes the duty cycle of a driving signal during a first stage of a strike mode and changes the frequency of the driving signal during a second stage of the strike mode to ignite a CCFL.
  • the adjustment of the duty cycle e.g., from a minimum to a maximum duty cycle
  • the frequency e.g., from a lower frequency to a higher frequency
  • closed loop regulation e.g., open lamp voltage regulation
  • loop stability improves by maximizing the secondary voltage at the lower frequency which is achieved by sweeping the duty cycle to a maximum duty cycle before sweeping the frequency.
  • a controller changes the frequency of a driving signal during a first stage of a strike mode and changes the duty cycle of the driving signal during a second stage of the strike mode to ignite a CCFL.
  • the sequence of sweeping the frequency first and then sweeping the duty cycle also has advantages.
  • a transformer is capable of more power transfer at relatively higher frequencies.
  • the transformer may saturate when operating at a relatively low frequency and a high duty cycle.
  • one striking sequence sweeps the driving signal from a relatively low frequency to a relatively high frequency at a relatively low duty cycle first and then, as needed, sweeps the driving signal from the relatively low duty cycle to a relatively high duty cycle at the relatively high frequency.
  • Figure 1 is a block diagram of an inverter for powering a fluorescent lamp according to one embodiment of the present invention.
  • Figure 2 is a circuit diagram of one embodiment of a voltage converter shown in Figure 1.
  • Figure 3 illustrates various waveforms from a circuit simulation of the inverter.
  • Figure 4 illustrates various waveforms showing open lamp voltage regulation.
  • Figure 5 provides an expanded view of the waveforms shown in Figure 4.
  • FIG. 1 illustrates a circuit block diagram of one embodiment of an inverter for powering a lamp (e.g., a CCFL) 100.
  • the inverter comprises a closed feedback loop that seamlessly controls ignition of the lamp 100 and provides open lamp voltage regulation during a strike mode of the inverter, hi one embodiment, the closed feedback loop comprises a voltage detector circuit 102, a control voltage generator 104, a first voltage converter 106, and a second voltage converter 108.
  • the voltage detector circuit 102 receives a first feedback signal (VSNS) indicative of an output voltage (or a voltage across the lamp 100) and generates an output indicating when the output voltage is greater than a predetermined voltage level corresponding to a first reference voltage (VREFl).
  • the control voltage generator 104 generates a control voltage (VC) that can vary at a first predefined rate (e.g., from a first level to a second level) until an output of the voltage detector circuit 102 indicates that the voltage across the lamp is greater than the predetermined voltage level (e.g, when VSNS is greater than VREFl).
  • the voltage detector circuit 102 stops the control voltage generator 104 from varying at the first predefined rate and adjusts the control voltage in response to the first feedback signal so as to regulate the output voltage of the inverter at approximately the predetermined voltage level.
  • the control voltage can be adjusted by being reduced at a second predefined rate when the first feedback signal exceeds the first reference voltage (e.g., a partial discharge of capacitor 120 through resistor 144).
  • the output voltage is regulated at approximately the predetermined voltage level to prevent damage to inverter components (e.g., a high voltage transformer).
  • the control voltage is provided to the first voltage converter 106 and the second voltage converter 108.
  • the first voltage converter 106 responds to a first range of the control voltage to generate a first control output that determines duty cycles of driving signals during the strike mode.
  • the second voltage converter 108 responds to a second range of the control voltage to generate a second control output that determines frequency of the driving signals during the strike mode.
  • the first control output and the second control output are selectively provided to a PWM circuit 110 during the strike mode to generate a PWM signal for controlling power to the lamp 100.
  • the PWM circuit 110 is implemented in a common controller integrated circuit 154 with the voltage detector circuit 102, the control voltage generator 104, the first voltage converter 106, and the second voltage converter 108
  • the PWM signal is provided to a bridge driver 112 to generate a plurality of driving signals for controlling respective semiconductor switches in a switching network 114.
  • the switching network 114 couples a supply voltage (e.g., a substantially DC source voltage or VBAT) in alternating polarity across a primary winding of a transformer 116 to generate a substantially AC voltage across a secondary winding of the transformer 116.
  • the lamp 100 is coupled to the secondary winding of the transformer 116.
  • the switching network 114 is shown as a full-bridge switching networking comprising four transistors Ml, M2, M3, M5. Other switching network topologies (e.g., half-bridge, push-pull, etc.) are also possible.
  • the secondary winding of the transformer 116 is coupled to the lamp 100 through a resonant inductor 150 and a DC blocking capacitor 152.
  • the resonant inductor 150 can be a leakage inductance associated with the secondary winding and not a separate component.
  • the resonant inductor 150 is part of a secondary resonant circuit that also comprises resistors, capacitors, and other parasitics (not shown) coupled to the secondary winding to establish a resonant frequency.
  • the control voltage (VC) has an initial state of zero volts at the beginning of a strike mode and increases at a predefined rate to a preset value (e.g., VDD or a supply voltage).
  • the control voltage can be generated by many methods using different circuit topologies, and Figure 1 shows one method of generating the control voltage. For example, a peak detector transistor (or NMOS transistor MO) 118 is initially off and a capacitor (CO) 120 is charged through a pull-up resistor 122 to produce the control voltage across the capacitor 120 at an exponential RC rate of change.
  • the control voltage is provided to input terminals (or input ports) of the first and second voltage converters 106, 108.
  • the voltage converters 106, 108 have limited and non-overlapping input ranges.
  • the first voltage converter (or voltage converter #1) 106 has a first limited input range (e.g., from 0-1 volt) while the second voltage converter (or voltage converter #2) 108 has a second limited input range (e.g., from 1-2 volts).
  • the output of each voltage converter changes when the control voltage is within the respective limited input range.
  • FIG. 2 is a schematic diagram of one embodiment of a voltage converter.
  • a reference voltage is generated across a first resistor (Rl) 200.
  • the reference voltage is approximately 0.5 volt for the first voltage converter 106.
  • the value of this reference voltage and a second resistor (R2) 202 can be chosen to determine (or limit) the input range of the voltage converter.
  • the control voltage (VC) from Figure 1 is provided to an input port (VIN).
  • the reference voltage and the control voltage are level shifted by respective PMOS source followers (M6 and M7) 215, 212.
  • a differential voltage (VDIFF) between an input voltage at the input port (VIN) and the reference voltage is seen across the second resistor (R2) 202.
  • a current conducted by the second resistor (R2) 202 is added to or subtracted from a current conducted by a transistor M2 204.
  • the transistor M2 204 conducts a current reference derived from a bandgap circuit comprising transistor M4 214.
  • a sum of the current reference and the current conducted by the second resistor (R2) 202 is mirrored by a current-mirror circuit 208 comprising transistors M9, M8, M5 and MO to produce an output voltage (VOUT) across an output resistor (RO) 206.
  • the current mirror gain and the output resistor (RO) 206 can be used to scale and offset the differential voltage between the input voltage and the reference voltage across the first resistor 200. Specific details for the output portion of the voltage converter are dependent on circuits that will be coupled to the output voltage.
  • the outputs from the first voltage converter 106 and the second voltage converter 108 are selectively provided to first and second input terminals of the PWM circuit 110 during the strike mode.
  • the PWM circuit 110 comprises an oscillator 124, a PWM comparator 126 and an optional feed-forward circuit 128.
  • the optional feed-forward circuit 128, if present, is coupled between the first input terminal of the PWM circuit 110 and a first input terminal of the PWM comparator 126.
  • the voltage at the first input terminal of the PWM circuit 110 determines the pulse width (or duty cycle) of a PWM signal at an output terminal of the PWM comparator 126, which is also the output terminal of the PWM circuit 110.
  • the oscillator 124 generates a sawtooth waveform for a second input terminal of the PWM comparator 126. The frequency of the sawtooth waveform is determined by the voltage at the second input terminal of the PWM circuit 110.
  • a substantially fixed reference voltage (VREF3) is selectively provided to the second input terminal of the PWM circuit 110 to establish a substantially constant operating frequency for the inverter.
  • the first input terminal of the PWM circuit 110 is selectively coupled to a current feedback loop comprising an error amplifier 130.
  • the current feedback loop senses current conducted by the lamp 100 and generates a current feedback signal (ISNS) indicative of the lamp current level.
  • ISNS current feedback signal
  • the current feedback signal is a voltage generated across a sensing resistor 132 coupled in series with the lamp 100.
  • a capacitor 134 is optionally coupled in parallel with the sensing resistor 132 for filtering.
  • the current feedback signal is provided to a full wave rectifier 136 to generate a substantially DC signal for a first input terminal of the error amplifier 130.
  • a voltage (VREF2) indicative of desired lamp current amplitude is provided to a second input terminal of the error amplifier 130.
  • the error amplifier 130 is a transconductance amplifier and a capacitor (Cl) 138 is coupled to an output terminal of the error amplifier 130 to generate an error voltage for the first input terminal of the PWM circuit 110 during the run mode.
  • the error voltage is used to adjust the pulse width (or duty cycle) of the PWM signal at the output of the PWM circuit 110 to achieve the desired lamp current amplitude during the run mode.
  • the first voltage converter 106 is configured to transfer a 0-1 volt input voltage into an output voltage that is within a trough and peak of the sawtooth waveform generated by the oscillator 124.
  • the sawtooth waveform may have a peak-to-peak voltage of 3 volts with a 1 volt trough (or offset) voltage.
  • the output voltage of the first voltage converter 106 is provided as a reference voltage to the first input terminal of the PWM comparator 126.
  • an optional feed-forward circuit 128 is shown between the output of the first voltage converter 106 and the first input terminal of PWM comparator 126.
  • the optional feed-forward circuit 128 may make additional adjustments to the duty cycle of the signal at the output terminal of the PWM comparator 126 in response to supply voltage variations, as described further below.
  • the second voltage converter 108 is configured to transfer a 1-2 volts input voltage from the control voltage (VC) into an output voltage that is used to sweep the frequency of the oscillator 124 from a starting frequency (e.g., a normal lamp running frequency) to several times (e.g., two times) the starting frequency. Other frequency sweeping ranges are also possible. Since the control voltage ramps starting from zero volt and the input range of the first voltage converter 106 is less than the input range of the second voltage converter 108, the output voltage of the first voltage converter 106 will vary (or sweep) before the output voltage of the second voltage converter 108.
  • a starting frequency e.g., a normal lamp running frequency
  • Other frequency sweeping ranges are also possible. Since the control voltage ramps starting from zero volt and the input range of the first voltage converter 106 is less than the input range of the second voltage converter 108, the output voltage of the first voltage converter 106 will vary (or sweep) before the output voltage of the second voltage converter 108.
  • the input ranges for the voltage converters 106, 108 are chosen such that the output of the PWM comparator 126 sweeps in duty cycle first at a starting frequency and then sweeps in frequency at a predetermined (or maximum) duty cycle.
  • the duty cycle and the frequency sweep independently and do not interact simultaneously.
  • the predetermined duty cycle is limited by a feed-forward circuit that correlates duty cycle with applied battery voltage.
  • the feed-forward circuit adjusts the duty cycle to compensate for variations in the applied battery voltage. Details of some feed-forward circuits are disclosed in co-owned U.S. Provisional Application No.
  • the input ranges of the voltage converters 106, 108 are chosen (or limited) such that the frequency sweep occurs before the duty cycle sweep.
  • the input voltage ranges for the voltage converters 106, 108 can be altered as described above with reference to Figure 2 and the input voltage ranges discussed above can be reversed between the voltage converters 106, 108 such that the frequency sweep occurs first.
  • the frequency sweep is more effective in striking the lamp 100 with relatively low battery voltages (e.g., about 7 volts) while the duty cycle sweep is more effective at striking the lamp 100 with relatively high battery voltages (e.g., about 20 volts).
  • the input voltage ranges of the voltage converters 106, 108 overlap to provide an overlap between the duty cycle sweep and the frequency sweep.
  • Figure 3 illustrates a simulation showing a control voltage 300, a secondary or lamp voltage 302 and a switching signal 304 with respect to time in an application with a 10 volts battery voltage.
  • the control voltage 300 is ramping from approximately zero volt to approximately two volts
  • the duty cycles of the lamp voltage 302 and the switching signal 304 sweep first and then their frequencies sweep at a maximum duty cycle.
  • the change from duty cycle sweep to frequency sweep is marked with a lined denoted "A.”
  • the control voltage 300 stops ramping and the sweeping stops when the lamp voltage 302 is sufficiently high to strike a lamp or exceeds a predetermined open lamp voltage corresponding to VREFl in Figure 1.
  • the control voltage is allowed to continue ramping to show how continued sweeping affects the lamp voltage 302.
  • the lamp voltage 302 increases with time initially due to increasing duty cycle of the switching signal 304 until a time marked by line A. Thereafter, the lamp voltage 302 continues to increase with time due to increasing frequency of the switching signal 304 until the frequency exceeds a resonant frequency associated with a secondary resonant tank circuit.
  • the lamp voltage 302 begins to decrease when the frequency increases beyond the resonant frequency because the voltage gain of the secondary resonant tank circuit decreases as the frequency moves away from the resonant frequency.
  • one embodiment of the voltage detector circuit 102 used to regulate open lamp voltage during the strike mode comprises a full wave rectifier 140, a comparator 142, the transistor MO (e.g., NMOS) 118 and a resistor RO 144.
  • a capacitor divider circuit comprising a capacitor C6 146 and a capacitor CI l 148 is used to monitor a transformer secondary voltage and to generate a sensed voltage (e.g., the first feedback signal or VSNS) that is provided to an input terminal of the full wave rectifier 140.
  • the comparator 142 compares an output of the full wave rectifier 140 with a reference VREFl.
  • the comparator will turn on the transistor MO 118 to adjust the control voltage such that the transformer secondary voltage is maintained (or regulated) at a predetermined open lamp voltage level (or amplitude).
  • a combination of the transistor MO 118, the capacitor CO 120, the resistor RO 144 and the pull-up resistor 122 forms a peak detector circuit, hi one embodiment, a ratio between the resistor RO 144 and the pull-up resistor 122 is chosen such that the capacitor CO 120 has a faster discharging rate and a slower charging rate.
  • a closed feedback loop is formed since an output of the voltage detector circuit 102 is coupled to the control voltage that regulates ignition.
  • the closed feedback loop regulates the transformer secondary voltage by adjusting the control voltage until the output of the full wave rectifier 140 is approximately equal to the reference voltage VREFl.
  • Figure 4 illustrates one example of the transformer secondary voltage (or open lamp voltage, e.g., voltage across the secondary winding of the transformer 116) as a function of time shown as waveform 502 in relationship to the control voltage as a function of time shown as waveform 504 and one of the driving signals applied to a semiconductor switch in the switching network 114 as a function of time shown as waveform 500.
  • Figure 5 illustrates in more detail a portion of Figure 4 that confirms excellent regulation of the open lamp voltage. For example, at approximately time Tl, the transformer secondary voltage reaches a predete ⁇ nined level and the control voltage levels off (or stops increasing) to maintain the transformer secondary voltage at approximately the predetermined level.
  • two single-pole-double-throw (SPDT) switches are used to toggle (or select) between strike and run modes in Figure 1.
  • ignition of the lamp 100 can be detected to toggle from the strike mode to the run mode.
  • ignition is determined by monitoring when the current feedback signal (ISNS) exceeds a threshold, hi the embodiment shown in Figure 1, the output of the full wave rectifier 136 can be compared to the threshold voltage VREF2 or a separate voltage reference to determine ignition of the lamp 100.
  • ISNS current feedback signal
  • the SPDT switches toggle and latch to run mode positions, hi the run mode positions, the oscillator 124 is coupled to a reference voltage VREF3 that sets the oscillator's frequency to a run mode frequency (e.g., the starting or the lowest strike mode frequency).
  • An input of an optional feed forward circuit 128 is coupled to the output of the error amplifier 130 that regulates the lamp current amplitude once the lamp 100 is lit.

Abstract

L'invention concerne un appareil et un procédé pour allumer une lampe pendant un mode d'amorçage d'un inverseur comprenant : la commande séquentielle d'un balayage de rapports cycliques et d'un balayage de fréquences de signaux de commande dans l'inverseur pour fournir une tension de sortie qui augmente à la lampe. Un mode de réalisation comprend de manière avantageuse une boucle de rétroaction fermée pour mettre en œuvre le balayage de rapports cycliques et le balayage de fréquences, de telle sorte qu'une tension de lampe ouverte est régulée de manière fiable pendant le mode d'amorçage. Par exemple, la boucle de rétroaction fermée arrête le balayage de rapports cycliques ou le balayage de fréquences lorsque la tension de sortie vers la lampe atteint un seuil prédéterminé et fait des ajustements au rapport cyclique ou à la fréquence des signaux de commande selon le besoin pour maintenir la tension de sortie approximativement au seuil prédéterminé si la lampe ne s'est pas allumée.
PCT/US2007/072862 2006-07-06 2007-07-05 Amorçage et régulation en lampe allumée pour un dispositif de commande de lampe fluorescente à cathode froide (ccfl) WO2008006024A2 (fr)

Applications Claiming Priority (2)

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US80671406P 2006-07-06 2006-07-06
US60/806,714 2006-07-06

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TW (1) TW200810605A (fr)
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US9118239B2 (en) * 2012-03-29 2015-08-25 Texas Instruments Incorporated Power supply control method for constant current constant power control
CN116073642B (zh) * 2023-01-28 2023-06-16 艾科微电子(深圳)有限公司 电源转换电路的控制电路、方法和电源转换系统

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