WO2008001545A1

WO2008001545A1 - Data error detecting apparatus

Info

Publication number: WO2008001545A1
Application number: PCT/JP2007/059167
Authority: WO
Inventors: Masayasu Mukai
Original assignee: Panasonic Corporation
Priority date: 2006-06-29
Filing date: 2007-04-27
Publication date: 2008-01-03
Also published as: TW200822611A

Abstract

A data error detecting apparatus comprises a modulating circuit (11) that modulates data (S101); an error addition position calculating circuit (12) that calculates the position and length of an error to be added to the modulated data (S102) based on error setting information (S105) including information of the position and length of the error externally set; an error adding circuit (13) that adds the error to the modulated data (S102) based on the calculation result of the error addition position calculating circuit (12); and an error detecting circuit (14) that demodulates the modulated data (S103), to which the error has been added, to detect the error of the demodulated data. In this way, an error can be added to data, which has been modulated by the variable length code system, at a random position, and the occurrence of demodulation error can be precisely detected for the data to which the error has been added.

Description

Specification

Data error detection system

[0001] The present invention adds an error at a random position to data modulated by a variable-length code method, demodulates the data with an error, and detects an error occurrence state in the demodulated data. The present invention relates to a data error detection device.

Background art

[0002] Conventionally, in order to test the operation when an error-added signal is transmitted to a transmission line or communication device, an error is added to generate a signal with an error corresponding to the error rate set by the user. An apparatus has been proposed (Patent Document 1). In this device, first, an operation is performed on a set value of an error rate indicating the number of errors included in a predetermined number of bits set by a user, and data to which an error is added based on the operation result. On the other hand, the number of clocks for adding an error at a fixed clock interval is calculated. Next, an error is added to the data for each calculated number of clocks.

Patent Document 1: Japanese Patent Laid-Open No. 2003-46491

Disclosure of the invention

Problems to be solved by the invention

[0003] However, since the conventional error adding device simply adds an error to the data at a constant clock interval, the variable length modulated by the variable length coding method using the conventional error adding device. If an error is added to the data at a random position, the data constraint length b at the time of demodulation changes due to the addition of the error, and errors continuously occur in the demodulated data after the error addition position. . For example, as shown in FIG. 6, when an error corresponding to the demodulated data “ZYX” is added to the position of the modulation data d4 that is variable-length encoded by a conventional error addition device, the constraint length b5 of the immediately following data d5 is As a result, the constraint lengths b6 to b8 of the modulation data d6 to d8 change, and an error occurs in the data after the demodulation data “ZYX”, that is, the demodulation data “NOPQRSTUVW”.

[0004] From the above, in the conventional error addition apparatus, random position is determined for variable length data. When an error is added to a device, an error more than necessary is generated, so that a problem that a demodulation error occurrence state cannot be accurately detected using a signal generated by the device occurs.

[0005] Therefore, in the present invention, data that can add an error at a random position to data modulated by the variable-length code method and accurately detect the state of occurrence of a demodulation error for the data with the error added. An object of the present invention is to provide an error detection device.

Means for solving the problem

[0006] In order to solve the above-described problem, the data error detection device of the present invention modulates data by a predetermined modulation coding scheme, and outputs the modulated data and constraint length information indicating the constraint length of the data at the time of modulation. An error including a modulation circuit, an error addition circuit for adding an error to the modulation data, the constraint length information input from the modulation circuit, and an error input position and error length information input from the outside Based on the setting information, the error addition circuit calculates the position and length of the error added to the modulation data by the error addition circuit, and the modulation data to which the error is added is demodulated to determine the error occurrence state. An error detection circuit for detecting, and when the modulation code method is a variable length code method, the error position calculation circuit is configured to generate an error based on the constraint length information and the error setting information. The constraint length of the modulation data after the error addition planned position before the error addition is equal to the constraint length of the modulation data after the error addition position after the error addition. Error length is calculated, error additional information including the calculated error additional position and error length information is generated and output, and the error adding circuit outputs the error position information from the error position calculating circuit. An error is added to the modulation data based on error addition position information.

[0007] Further, the data error detection apparatus of the present invention modulates data by a predetermined modulation code method, outputs modulation data and constraint length information indicating a constraint length at the time of data modulation, and the modulation data An error addition circuit for adding an error to the modulation data, and an error position and length to be added to the modulation data are set at random, and error setting information including information on the set error addition position and error length is generated. Based on the random error generator, the constraint length information and the error setting information, the error adding circuit converts the modulation data. An error position calculation circuit for calculating the position and length of an error to be added to the data, and an error detection circuit for demodulating the modulation data to which the error is added to detect an error occurrence state, When the variable length code method is used, the error position calculation circuit calculates the position to add an error based on the constraint length information and the error setting information, and the error addition planned position before adding the error. The error length is calculated so that the subsequent constraint length of the modulation data is equal to the constraint length of the modulation data after the error addition position after the error is added, and the calculated error addition position and error The error addition information including length information is generated and output, and the error addition circuit generates the modulation data based on the error addition position information of the error position calculation circuit force. It is characterized by adding an error.

Further, the data error detection device of the present invention modulates data by a predetermined modulation code method, outputs modulation data and constraint length information indicating the constraint length of data at the time of modulation, and an error in the modulation data. The error addition circuit is based on the error addition circuit for adding the error, the constraint length information input from the modulation circuit, and the error setting information including the error addition position and error length information input from the outside. An error position calculation circuit that calculates the position and length of an error added to modulation data by the circuit, an error detection circuit that demodulates the modulation data to which the error is added, and detects an error occurrence state, and the modulation circuit Data modulation processing performed by the error position calculation circuit, calculation processing for calculating the position and length of the error attached to the data performed by the error position calculation circuit, and the error addition circuit. And a program operation circuit for executing an error addition process for adding an error to the data using the stored program, and when the modulation code method is a variable length code method, the error position calculation circuit is configured to store the constraint length information. On the basis of the error setting information and the error setting information, the constraint length of the modulation data after the error addition planned position before the error addition and the error addition position after the error addition are calculated. The error length is calculated so that the constraint length of the modulation data becomes equal, and error addition information including the calculated error addition position and error length information is generated and output, and the error The additional circuit adds an error to the modulation data based on the error addition position information from the error position calculation circuit, and the program calculation circuit stores Program To modulate the data, calculate the position to add the error based on the constraint length of the data at the time of modulation and the error setting information input from the outside, and after the error addition planned position before adding the error The length of the error is calculated such that the constraint length of the modulation data is equal to the constraint length of the modulation data after the error addition position after the error is added, and the calculated error addition position and error length are calculated. Based on this, an error is added to the modulation data, and the error detection circuit demodulates the data that is also output by the error-added circuit power to detect an error occurrence state and output from the error addition circuit. The detected data and the data output from the arithmetic circuit are compared to detect whether the error patterns of the data match.

Further, the data error detection device of the present invention modulates data by a predetermined modulation code method, outputs modulation data and constraint length information indicating the constraint length of data at the time of modulation, and an error in the modulation data. Random error that generates error setting information that includes information on the error addition position and error length that are set at random, and an error addition circuit that adds error information to the modulation data. An error is added to the generator, an error position calculation circuit that calculates the position and length of the error added to the modulation data by the error addition circuit based on the constraint length information and the error setting information. An error detection circuit that demodulates the modulation data and detects an error occurrence state, data modulation processing performed by the modulation circuit, and data performed by the error position calculation circuit A program calculation circuit for executing a calculation process for calculating the position and length of the error to be generated and an error addition process for adding an error to the data performed by the error addition circuit using a stored program, and When the coding method is a variable-length coding method, the error position calculation circuit calculates a position to add an error based on the constraint length information and the error setting information, and an error addition planned position before adding the error. After that, the error length is calculated such that the constraint length of the modulation data is equal to the constraint length of the modulation data after the error addition position after adding the error, and the calculated error addition position and error are calculated. The error addition information including the length information is generated and output, and the error-attached error circuit outputs the error addition position information from the error position calculation circuit. An error is added to the modulation data based on the information, and the program calculation circuit stores the stored program. To modulate the data, calculate the position to add the error based on the data constraint length at the time of modulation and the error setting information, and the constraint length of the modulation data after the error addition planned position before the error addition. Then, the error length is calculated such that the constraint length of the modulation data after the error addition position after the error addition is equal, and the modulation data is calculated based on the calculated error addition position and error length. The error detection circuit demodulates the data output from the error addition circuit power to detect an error occurrence state, and outputs the error output power and the data output from the error detection circuit. It is characterized by comparing the data output from the circuit and detecting whether the error patterns of each data match.

The invention's effect

The data error detection device of the present invention modulates data by a predetermined modulation code method.

A modulation circuit that outputs modulation data and constraint length information indicating a constraint length at the time of data modulation, an error addition circuit that adds an error to the modulation data, the constraint length information that is input from the modulation circuit, and externally An error position calculation circuit for calculating the position and length of the error added to the modulation data by the error-added circuit based on the error setting information including the error adding position and the error length information to be input; And an error detection circuit that demodulates the modulation data to which an error is added and detects an error occurrence state. When the modulation code method is a variable length code method, the error position calculation circuit is Based on the length information and the error setting information, the position where the error is added is calculated, the constraint length of the modulation data after the error addition planned position before the error addition, After calculating the error, the error length is calculated so that the constraint length of the modulation data after the error addition position becomes equal, and the error addition information including the calculated error addition position and error length information is calculated. The error-added circuit is configured to add an error to the modulation data based on the error addition position information from the error position calculation circuit.

Thus, according to the data error detection device of the present invention, an error is added to a random position with respect to variable-length data modulated by the variable-length coding method, and demodulation for the data with the error added is performed. It is possible to accurately detect the error occurrence state. As a result, the data It is possible to easily inspect the performance of a modulation / demodulation function for various errors specified from the outside in a communication system or an optical disc apparatus that performs modulation / demodulation processing.

[0012] Further, according to the data error detection device of the present invention, since the random error generator for generating the error setting information of the position and length of the error to be added to the modulation data is provided, the error setting information is Since it can be generated in this device, it is not necessary to input error added position information from outside. As a result, the performance of the modulation / demodulation function for various errors can be measured by this device alone in a communication system that performs data modulation / demodulation processing.

[0013] Further, according to the data error detection device of the present invention, the data modulation processing, the error addition processing for adding an error to the modulation data, and the calculation processing for calculating the position and length of the error added to the modulation data are performed. A program calculation circuit to be executed by a stored program, wherein the program calculation circuit modulates data, calculates a position to add an error based on the constraint length of the data at the time of modulation and the error setting information, Calculate the length of the error so that the constraint length of the modulation data after the error addition planned position before the error addition is equal to the constraint length of the modulation data after the error addition position after the error addition, and Based on the calculated error addition position and error length, an error is added to the modulation data, and the error detection circuit detects the error-added error. Since the road force output data and the arithmetic circuit force output data are compared to detect whether the error pattern of each data matches, an error is added to the modulation data. You can check whether the circuit is operating properly.

Brief Description of Drawings

FIG. 1 is a block diagram showing a configuration example of a data error detection apparatus according to Embodiment 1 of the present invention.

FIG. 2 is a conceptual diagram showing data demodulation results before and after adding an error when the data error detecting apparatus according to Embodiment 1 of the present invention adds an error to the data.

FIG. 3 is a block diagram showing a configuration example of a data error detection apparatus according to Embodiment 2 of the present invention. FIG. 4 is a block diagram showing a configuration example of a data error detection apparatus according to Embodiment 3 of the present invention.

FIG. 5 is a block diagram showing a configuration example of a data error detection device according to Embodiment 4 of the present invention.

[FIG. 6] FIG. 6 is a conceptual diagram showing data demodulation results before and after adding an error when adding an error to a random position with respect to variable-length data by a conventional error adding device.

Explanation of symbols

[0015] 11 Modulation circuit

12 Error addition position calculation circuit

13 Error addition circuit

14 Error detection circuit

21, 41 Random error generator

31 Program calculation circuit

32 Error detection 'error pattern comparison circuit

S101 Data before modulation

S102 Modulation data

S103, S301 Modulation data with error added

S104 Restraint length information

S105 Error setting information

S106 Error additional position information

S107, S303 Error detection result signal

S302 Comparison result signal

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)

A data error detection apparatus according to the first embodiment will be described with reference to FIGS. FIG. 1 is a diagram illustrating a configuration example of the data error detection device according to the first embodiment. FIG. 2 is a conceptual diagram of data demodulation results before and after adding an error when an error is added to the data by the data error detection apparatus according to the first embodiment.

In FIG. 1, a data error detection device includes a modulation circuit 11 that modulates data S101, an error addition position calculation circuit 12 that calculates the position and length of an error to be added to modulation data S102, and an error addition position. Based on the calculation result of the calculation circuit 12, an error detection circuit 13 for adding an error to the modulation data S102 and an error detection circuit for detecting an error in the demodulation data by demodulating the modulation data S103 to which the error has been added. Circuit 14 is provided.

The operation of the data error detection apparatus configured as described above will be described.

The modulation circuit 11 modulates the data S101 with a predetermined modulation code method and outputs modulated data S102. Further, the modulation circuit 11 outputs constraint length information S104 indicating the constraint length of data at the time of modulation to the error addition position calculation circuit 12 when modulating the data S101 by the variable length code method.

The error addition position calculation circuit 12 receives the constraint length information S104 from the modulation circuit 11 when the data S101 is modulated by the modulation circuit 11 by the variable length code method, and the error addition circuit 13 Input error setting information S105 including position and length information from outside. Then, based on the constraint length information S104 and the error setting information 105, the position and length of the error added to the modulation data S102 are calculated to generate error addition position information S106. Here, the error addition position calculation circuit 12 calculates whether or not the constraint length of the modulation data after the error addition position changes by adding an error to the position indicated by the error setting information S105, and the error addition position is calculated. The error length is calculated so that the constraint length of the subsequent modulation data does not change. That is, the length of the error is calculated such that the constraint length of the modulation data after the error addition planned position before the error addition is equal to the constraint length of the modulation data after the error addition position after the error addition. The error addition position information S106 is a signal that becomes High at the position where an error is added and remains High only for a section corresponding to the calculated error length. It is also possible to use a signal that becomes Low at the position where an error is added as the error addition position information S 106 and remains Low only for a section corresponding to the calculated error length.

[0020] The error addition position calculation circuit 12 is configured, for example, as shown in FIG. If an error with the error length al is added to the position of the modulation data d4 corresponding to the demodulated data “KLM”, an error is added based on the error setting information S105 and the constraint length information S104 regarding the modulation data d4. Calculate position and error length. In the case of Fig. 2, if an error with the error length al is inserted at the position of the modulation data d4, the constraint length b5 of the data d5 immediately after the error addition position changes, and accordingly, the constraint length b6 to the data d5 to d8 Since b8 changes, based on the constraint length b4 of the modulation data d4 indicated by the constraint length information S104, an error length a2 is calculated so that the constraint length b5 of the data d5 becomes equal before and after the error addition position. Then, the error addition position information S106 is output, which becomes High at the error addition position, and is maintained only for the section t corresponding to the error length a2.

The error-added circuit 13 adds an error to the modulation data S102 based on the error addition position information S106. That is, the modulation data is changed while the error addition position information S106 is High. For example, an error is added by inverting “0” and “1” of data.

[0022] By the operation as described above, the demodulated data is different from the demodulated data shown in FIG. 6 and the constraint length b5 to b8 of the data d5 to d8 after adding the error remains unchanged before the error is inserted. Therefore, the error detection circuit 14 can accurately specify the error addition position of the demodulated data.

[0023] The error detection circuit 14 demodulates the data S103 to which an error is added, detects an error in the demodulated data, and then corrects the detected error. Then, an error detection result signal S107 indicating the generation state of the demodulation error is generated. The error detection result signal S10 7 includes information on the error that has been detected and corrected, and information on the error that has been detected but cannot be corrected. By observing this error detection result signal S107, it is possible to accurately recognize the state of occurrence of a demodulation error for the added error. The error detection result signal S107 can be observed by an external device.

[0024] As described above, according to the data error detection device of the first embodiment, when adding an error to variable-length data, information on the position and length of the error set externally is included. Based on the error setting information S105 and the constraint length information S104 indicating the constraint length of the data at the time of modulation V, the error length is calculated so that the constraint length of the data after the error addition position does not change. Therefore, even when errors are added at random positions to variable-length data, it is possible to accurately detect the occurrence of demodulation errors for data with errors added. wear. As a result, in a communication system or optical disk apparatus that performs data modulation / demodulation processing, the performance of the modulation / demodulation function for various errors specified by external force can be easily checked.

In the first embodiment, the case where the error detection circuit performs the demodulation process and the error detection process has been described. However, an existing demodulation circuit is provided, and the demodulation data is demodulated by the demodulation circuit. The error detection state of the data demodulated by the circuit may be detected by the error detection circuit.

(Embodiment 2)

A data error detection apparatus according to the second embodiment will be described with reference to FIG. FIG. 3 is a diagram illustrating a configuration example of the data error detection apparatus according to the second embodiment. The same components as those in the data error detection apparatus according to the first embodiment shown in FIG.

[0027] The data error detection apparatus according to the second embodiment randomly sets the position and length of the error that the error-added circuit 13 adds to the modulation data S102, and sets the position and length of the set error. A random error generator 21 for generating error setting information S201 including information is provided. In other words, error setting information is generated within the device rather than inputting error setting information from outside.

[0028] The operation of the data error detection apparatus according to the second embodiment configured as described above will be described.

[0029] The random error generator 21 randomly sets the error position and length that the error-added circuit 13 adds to the modulation data S102, and includes information on the set error position and length. Setting information S201 is generated.

The modulation circuit 11 modulates the data S101 with a predetermined modulation code method, and outputs modulated data S102. Further, the modulation circuit 11 outputs constraint length information S104 indicating the constraint length of data at the time of modulation to the error addition position calculation circuit 12 when modulating the data S101 by the variable length code method.

The error addition position calculation circuit 12 receives the constraint length information S104 from the modulation circuit 11 when the data S101 is modulated by the modulation circuit 11 using the variable length code method. The error setting information S201 including information on the position and length of the error to be added is input from the random error generator 21. Then, based on the constraint length information S104 and the error setting information 201, the position and length of the error added to the modulation data S102 are calculated to generate error addition position information S106. The method for calculating the error position and length is the same as in the first embodiment described above, and a description thereof will be omitted.

[0032] The error-added circuit 13 adds an error to the modulation data S102 based on the error addition position information S106.

[0033] The error detection circuit 14 demodulates the data S103 to which an error is added, detects an error in the demodulated data, and then corrects the detected error. Then, an error detection result signal S107 indicating the generation state of the demodulation error is generated. The error detection result signal S10 7 includes information on the error that has been detected and corrected, and information on the error that has been detected but cannot be corrected. By observing this error detection result signal S107, it is possible to accurately recognize the state of occurrence of a demodulation error for the added error.

[0034] As described above, the data error detection apparatus according to the second embodiment includes the random error generator 21 that randomly sets the position and length of the error to be added to the modulation data S102, and includes the error Since the setting information is generated in this device, the performance of the modulation / demodulation function for various errors of the communication system and optical disk device that performs data modulation / demodulation processing can be measured by this device alone.

[Embodiment 3]

A data error detection apparatus according to the third embodiment will be described with reference to FIG. FIG. 4 is a diagram illustrating a configuration example of the data error detection device according to the third embodiment. The same components as those in the data error detection apparatus according to the first embodiment shown in FIG.

[0036] The data error detection apparatus according to the third embodiment includes a program that describes the contents of the modulation processing of the modulation circuit 11, the calculation processing of the error addition position calculation circuit 12, and the error addition processing of the error addition circuit 13. Using the stored program, the data S101 is modulated and the program operation circuit 31 for adding an error and the data S103 to which an error is added are demodulated to detect an error in the demodulated data, and the error Data from attached circuit 13 And an error detection / error pattern comparison circuit 32 that inputs data S301 from the program operation circuit 31 and compares error patterns of the input data.

The operation of the data error detection device according to the third embodiment configured as described above will be described.

[0039] The error addition position calculation circuit 12 receives the constraint length information S104 from the modulation circuit 11 when the data S101 is modulated by the modulation circuit 11 by the variable length code method, and the error addition circuit 13 Input error setting information S105 including position and length information from outside. Then, based on the constraint length information S104 and the error setting information 105, the position and length of the error added to the modulation data S102 are calculated to generate error addition position information S106. The method for calculating the error position and length is the same as that in the first embodiment, and a description thereof will be omitted.

The error-added circuit 13 adds an error to the modulation data S102 based on the error addition position information S106.

[0041] The program calculation circuit 31 operates when an error is added to a random position with respect to modulation data modulated by the variable-length code method. First, data S 101 is modulated using a modulation processing program. Next, calculate whether the constraint length of the modulation data after the error position with error changes by adding an error to the position indicated by error setting information S105 input from the outside using a calculation processing program. Calculate the error length so that the constraint length of the modulation data after the error addition position does not change. That is, the error length is calculated such that the constraint length of the modulation data after the error addition planned position before error addition is equal to the constraint length of the modulation data after the error addition position after error-added calorie. Next, using an error addition processing program, an error is added to the modulation data based on the calculated error location and error length, and the error-added data S301 is output to the error detection / error pattern comparison circuit 32. To do. [0042] The error detection / error pattern comparison circuit 32 compares the data S103 output from the error-added circuit 13 with the data S301 output from the program operation circuit 31, and the error pattern of each data matches. To detect. If the error patterns do not match, the comparison result signal S302 of “1” is output, and if the error patterns match, the comparison result signal S302 of “0” is output. By observing the comparison result signal S302, it can be confirmed whether the error-added circuit 13 is operating normally. Note that the error detection / error pattern comparison circuit 32 may demodulate the data S 103 and the data S 301 and then compare error patterns of the demodulated data. The comparison result signal S302 is observed by the error detection / error pattern comparison circuit 32 or an external device.

The error detection / error pattern comparison circuit 32 demodulates the data S 103 with the error added thereto, detects an error in the demodulated data, and then corrects the detected error. Then, an error detection result signal S303 indicating the occurrence state of the demodulation error is generated. This error detection result signal S303 includes information on the error that has been detected and corrected, and information on the error that has been detected but cannot be corrected. By observing such an error detection result signal S303, it is possible to recognize the state of occurrence of a demodulation error for the added error. Note that the error detection result signal S303 is observed by an external device.

As described above, according to the data error detection device of the third embodiment, when adding an error to variable-length data, information on the position and length of the error set externally is included. Based on the error setting information S105 and the constraint length information S104 indicating the constraint length of the data at the time of modulation V, the error length is calculated so that the constraint length of the data after the error addition position does not change. As a result of calculation, even when an error is added at random to variable-length data, it is possible to accurately detect the state of occurrence of a demodulation error for the data with the error added. As a result, in a communication system or optical disk apparatus that performs data modulation / demodulation processing, the performance of the modulation / demodulation function for various errors specified by external force can be easily checked.

[0045] Furthermore, according to the data error detection device of the third embodiment, a program describing the processing of the modulation circuit 11, the error addition position calculation circuit 12, and the error-added circuit 13 is stored. Using the stored and stored program, the data S101 is modulated, based on the error setting information S105 including information on the position and length of the error set externally, and the constraint length of the data at the time of modulation. From the program operation circuit 31 that adds the error to the modulation data by calculating the error position and error length, and the error-added circuit 13 An error detection error pattern comparison circuit 32 that compares the error pattern of the output data S103 and the error pattern of the data S301 output from the program calculation circuit 31 is provided. You can check if is operating normally.

[0046] Although the case where the error detection circuit performs demodulation processing and error detection processing has been described in the third embodiment, an existing demodulation circuit is provided, and the demodulation data is demodulated by the demodulation circuit. The error detection state of the data demodulated by the circuit may be detected by the error detection circuit.

[0047] (Embodiment 4)

A data error detection apparatus according to the fourth embodiment will be described with reference to FIG. FIG. 5 is a diagram illustrating a configuration example of the data error detection device according to the fourth embodiment. The same components as those of the data error detecting apparatus according to the third embodiment shown in FIG.

[0048] The data error detection apparatus according to the fourth embodiment randomly sets the position and length of the error that the error-added circuit 13 adds to the modulation data S102, and sets the position and length of the set error. Random error generator 41 that generates error setting information S401 including information is provided, and error setting information is generated in the device rather than inputting external force error setting information.

The operation of the data error detection device according to the fourth embodiment configured as described above will be described.

[0050] The random error generator 41 randomly sets the position and length of the error that the error-added circuit 13 adds to the modulation data S102, and includes information on the set error position and length. Setting information S401 is generated.

[0051] The modulation circuit 11 modulates the data S101 by a predetermined modulation code method, 2 is output. Further, the modulation circuit 11 outputs constraint length information S104 indicating the constraint length of data at the time of modulation to the error addition position calculation circuit 12 when modulating the data S101 by the variable length code method.

The error addition position calculation circuit 12 inputs the constraint length information S104 from the modulation circuit 11 when the data S101 is modulated by the modulation circuit 11 by the variable length code method, and the error addition circuit 13 The error setting information S401 containing the position and length information is input from the random error generator 41. Then, based on the constraint length information S104 and the error setting information S401, the position and length of the error added to the modulation data S102 are calculated to generate error addition position information S106. The method for calculating the position and length of the error is the same as in the first embodiment described above, and a description thereof will be omitted.

The program calculation circuit 31 first modulates the data S 101 using a modulation processing program. Next, whether or not the constraint length of the modulation data after the error addition position changes by adding an error to the position indicated by the error setting information S401 input from the random error generator 41 using a calculation processing program. Calculate the error length so that the constraint length of the modulation data after the error addition position does not change. That is, the length of the error is calculated such that the constraint length of the modulation data after the error addition planned position before the error-added calorie is equal to the constraint length of the modulation data after the error addition position after the error addition. Next, an error addition processing program is used to add an error to the modulation data based on the calculated error addition position and error length, and output the error-added data S301 to the error detection / error pattern comparison circuit 32. To do.

[0055] The error detection 'error pattern comparison circuit 32 compares the data S103 output from the error addition circuit 13 with the data S301 output from the program operation circuit 31, and determines whether the error pattern of each data matches. To detect. If the error patterns do not match, the comparison result signal S302 of “1” is output, and if the error patterns match, the comparison result signal S302 of “0” is output.

[0056] Further, the error detection 'error pattern comparison circuit 32 generates data S 10 to which an error is added. 3 is demodulated to detect an error in the demodulated data, and then the detected error is corrected. Then, an error detection result signal S303 indicating the occurrence state of the demodulation error is generated. This error detection result signal S303 includes information on the error that has been detected and corrected, and information on the error that has been detected but cannot be corrected. By observing such an error detection result signal S303, it is possible to recognize the state of occurrence of a demodulation error for the added error.

As described above, the data error detection apparatus according to the fourth embodiment includes the random error generator 41 that randomly sets the position and length of the error to be added to the modulation data, and adds an error. Since the position calculation circuit 12 and the program calculation circuit 31 generate error setting information used in calculating the error addition position and error length in this device, communication systems and optical disk devices that perform data modulation / demodulation processing are used. Therefore, it is possible to measure the performance of the modulation / demodulation function for various errors and to check whether the error error circuit 13 is operating normally.

Industrial applicability

The data error detection device according to the present invention is useful as a device for inspecting the performance of a modulation / demodulation function for various errors in a communication system or an optical disc apparatus that performs data modulation / demodulation processing.

Claims

The scope of the claims

[1] A modulation circuit that modulates data by a predetermined modulation code method and outputs modulation data and constraint length information indicating a constraint length of data at the time of modulation;

An error adding circuit for adding an error to the modulated data;

The error adding circuit adds to the modulation data based on the constraint length information inputted from the modulation circuit and error setting information inputted from the outside and including error location information and error length information. An error position calculation circuit for calculating the position and length of the error to be performed;

An error detection circuit that demodulates the modulation data to which the error is added and detects the error occurrence state,

When the modulation code system is a variable length code system,

The error position calculation circuit calculates a position to add an error based on the constraint length information and the error setting information, and also includes a constraint length of the modulation data after the error addition planned position before the error addition, and an error Calculates the error length so that the constraint length of the modulation data after the error addition position after addition is equal, and generates error addition information including information on the calculated error addition position and error length Then output

The error-added circuit adds an error to the modulation data based on the error addition position information of the error position calculation circuit power.

A data error detection device characterized by the above.

[2] a modulation circuit that modulates data by a predetermined modulation code method and outputs modulation data and constraint length information indicating a constraint length of data at the time of modulation;

An error adding circuit for adding an error to the modulated data;

A random error generator for randomly setting an error position and length to be added to the modulation data, and generating error setting information including information on the set error addition position and error length;

Based on the constraint length information and the error setting information, an error position calculation circuit that calculates the position and length of the error added to the modulation data by the error addition circuit; An error detection circuit that demodulates the modulation data to which the error is added and detects the error occurrence state,

When the modulation code system is a variable length code system,

A data error detection device characterized by the above.

A modulation circuit that modulates data by a predetermined modulation code method and outputs modulation data and constraint length information indicating a constraint length of data at the time of modulation;

An error adding circuit for adding an error to the modulated data;

An error detection circuit that demodulates the modulation data to which the error is added and detects the error occurrence state;

Data modulation processing performed by the modulation circuit, calculation processing for calculating the position and length of an error added to the data performed by the error position calculation circuit, and error addition processing for adding an error to the data performed by the error addition circuit And a program operation circuit that executes the stored program.

When the modulation code system is a variable length code system,

The error position calculation circuit calculates a position to add an error based on the constraint length information and the error setting information, and plans to add an error before adding the error. An error length is calculated such that the constraint length of the modulation data after the position is equal to the constraint length of the modulation data after the error addition position after the error is added, and the calculated error addition position and the error are calculated. Generate and output additional error information including length information.

The error-added circuit adds an error to the modulation data based on the error addition position information of the error position calculation circuit power,

The program calculation circuit modulates data according to a stored program, calculates a position to add an error based on the constraint length of the data at the time of modulation and the error setting information input from an external force, and adds an error. Calculate the length of the error so that the constraint length of the modulation data after the previous error addition position is equal to the constraint length of the modulation data after the error addition position after adding the error, and calculate the error An error is added to the modulation data based on the addition position and the length of the error,

The error detection circuit demodulates the data output from the error addition circuit force to detect an error occurrence state, and outputs the error output circuit force output data and the arithmetic circuit. Compare the data and detect if the error pattern of each data matches,

A data error detection device characterized by the above.

An error adding circuit for adding an error to the modulated data;

Based on the constraint length information and the error setting information, an error position calculation circuit that calculates the position and length of the error added to the modulation data by the error addition circuit;

Data modulation processing performed by the modulation circuit, data performed by the error position calculation circuit A calculation processing for calculating a position and a length of an error to be added, and a program operation circuit for executing an error addition processing for adding an error to data performed by the error addition circuit by a stored program,

When the modulation code system is a variable length code system,

The program calculation circuit modulates data by a stored program, calculates a position to add an error based on the data constraint length at the time of modulation and the error setting information, and plans to add an error before adding the error. The length of the error is calculated such that the constraint length of the modulation data after the position is equal to the constraint length of the modulation data after the error addition position after the error is added, and the calculated error addition position and the error are calculated. An error is added to the modulated data based on the length of

A data error detection device characterized by the above.