WO2007137221A2

WO2007137221A2 - Dual side cooling integrated transistor module and methods of manufacture

Info

Publication number: WO2007137221A2
Application number: PCT/US2007/069362
Authority: WO
Inventors: Jonathan A. Noquil; Ruben P. Madrid
Original assignee: Fairchild Semiconductor Corp
Current assignee: Fairchild Semiconductor Corp
Priority date: 2006-05-19
Filing date: 2007-05-21
Publication date: 2007-11-29
Anticipated expiration: 2008-11-19
Also published as: WO2007137221A3; CN101473423A; TW200810069A; KR101157305B1; TWI452662B; JP2009545862A; DE112007001240T5; KR20090009882A; CN101473423B

Abstract

An integrated transistor module including a lead frame having first and second spaced pads, one or more common source-drain leads located between the first and second pads, and one or more drain leads located on the outside of the second pad. First and second transistors are flip chip attached respectively to the first and second pads, wherein the source of the second transistor is electrically connected to the one or more common source-drain leads. A first clip is attached to the drain of the first transistor and electrically connected to the one or more common source-drain leads. A second clip is attached to the drain of the second transistor and electrically connected to the one or more drain leads located on the outside of the second pad. Molding material encapsulates the lead frame, the transistors, and the clips to form the module. By leaving the lead frame pads and clips exposed and free of molding material, dual cooling of the module is effected.

Description

DUAL SIDE COOLING INTEGRATED TRANSISTOR

MODULE AND METHODS OF MANUFACTURE

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional Patent Application Serial No, 60/802,181, filed on May 19, 2006, which application is hereby incorporated by reference and also claims the benefit of U.S. Provisional Patent Application Serial No. 60/916,994, filed on May 9, 2007, which application is hereby incorporated by referenced. Reference is also made to a related application entitled "Flip Chip MLP Folded Heat Sink," attorney docket no. 302171 1 (17732.62860.00).

FIELD OF THE INVENTION

This invention relates in genera! to semiconductor devices and more particularly to a dual side cooling integrated transistor module and methods of making same that is suitable for use as a building block for other devices, such as synchronous buck converters.

BACKGROUND OF THE INVENTION

Synchronous buck converters are used as power supplies for cell phones, portable computers, digital cameras, routers, and other portable electronic devices. Synchronous buck converters shift DC voltage levels in order to provide power to programmable grid array integrated circuits, microprocessors, digital signal processing integrated circuits, and other circuits, while stabilizing battery outputs, filtering noise, and reducing ripple. These devices are also used to provide high current multiphase power in a wide range of data communications, telecommunications, point-of-!oad and computing applications.

Fig. 1 shows a block diagram of a typical synchronous buck converter. The converter has a high side FET Ql and a low side FET Q2 which are controlled by a controller on PWM IC. The Ql and Q2 devices can be configured as discrete devices which require optimal layout to reduce parasitic inductances caused by the high side FET drain being connected to the low side FET source on the PCB substrate. US Patent Application Publication 2005/0285238 Al , published Dec. 29, 2005, inventors Joshi et al. discloses an integrated transistor module including a lead frame that defines a low side !and and a high side land. A low side transistor is mounted on the low side land with its drain electrically connected to the low side land. A high-side transistor is mounted on the high -side land with its source electrically connected to the high side land. A stepped portion of the lead frame electrically connects the low and high side lands and thus also the drain of the low-side transistor with the source of the high-side transistor.

Although the integrated transistor module of the latter published patent publication is useful for the applications for which it was intended, certain features thereof can be improved upon. Package alignment in terms of pin-outs is critical in the disclosed design because two different packages are attached to a lead frame connector. Because two different packages need to be assembled with different assembly processes for the two packages, a more costly investment is required. Moreover, multiple reflow processes (thermal excursions) may affect lead free packaging solder joint reliability. Other drawbacks include, undue package thickness, commercial acceptance of the module footprint, and inability to connect common drains on the package since one of the transistors is flip chip mounted on the lead frame, while me other is noi.

There is thus a need for an improved integrated transistor module that can be used in circuits such as bucky converter circuits that offer a solution to these problems.

SUMMARY OF THE INVENTION

According to the present invention there is provided a solution to these problems.

According to a feature of the present invention, there is provided an integrated transistor module comprising: a lead frame having first and second spaced pads and one or more common source-drain leads located between said first and second pads; first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; and a first clip attached to the drain of said first transistor and electrically connected to said one or more common source-drain leads.

According to another feature of the present invention there is provided an integrated transistor module comprising: a lead frame having first and second spaced pads, one or more common source-drain leads located between said first and second pads, and one or more drain leads located on the outside of said second pad; first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; a first clip attached to the drain of said first transistor and electrically connected to said one or more common source-drain leads; a second clip attached to the drain of said second transistor and electrically connected to said one or more drain leads located on the outside of said second pad; and molding material encapsulating said lead frame, said transistors, and said cups to form said module.

According to a further feature of the present invention there is provided a meihod of making an iniegraied transistor module comprising: providing a lead frame having first and second spaced pads, one or more common source-drain leads located between said pads and one or more drain leads located on the outside of said second pad; flip chip attaching first and second transistors respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; attaching a first clip to the drain of said first transistor and electrically connecting said first clip to said one or more common source-drain leads; attaching a second clip to the drain of said second transistor and electrically connecting said second clip to said one or more drain leads located on the outside of said second pad; and encapsulating said lead frame, said transistors, and said clips with molding material to form said module. BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1 is a schematic diagram of a typical buck converter citcuit.

Figs. 2 and 3 are top plan and sectional, elevational, views of an embodiment of the present invention.

Figs. 4 - 7 are diagrammatic views of the embodiment of Figs. 1 and 2, useful in explaining the embodiment.

Figs. 8-10 are respective top plan, sectional elevational, and sectional elevational diagrammatic views of another embodiment of the present invention.

Figs. 11 and 12 are respective sectional, elevational, diagrammatic views of a further embodiment of the present invention.

Figs. 13 and 14 are respective sectional, elevational diagrammatic views of yet another embodiment of the present invention.

Figs. 15 - 17 are respective plan, diagrammatic views of still another embodiment of the present invention.

Figs. 18 - 19 are respective plan and elevational views of a clip used in the present invention.

Figs. 20 - 24 are diagrammatic views useful in illustrating a method embodiment of the piesent invention.

Fig. 25 is a diagrammatic view illustrating a modification of the method of Figs. 20 - 24.

DESCRIPTION OF THE INVENTION

The present invention relates to the integration of transistors in a module, such as the integration of the low side and high side power MOSFETs of a bucky converter into a single molded leadless package (MLP). By using multi-flipping of power devices, by using a folded clip for electrical connection of the drain of the low side MOSFET with the source of the high side MOSFET, and by connecting the two MOSFETs closer in an MLP, source resistances are substantially reduced and inductance parasitics are minimized. Cooling is improved by exposing the drains of both devices through the use of special drain clips. The cooling is further improved by dual side cooling since the sources of the two devices are exposed via the lead frame to which they are attached. The ciip design also results in improved solder joint reliability. An embodiment of the invention provides isolation of the two power devices to convert it to a package with common drain application by using an attached heat sink to connect the two drains. In another embodiment of the invention, an application specific module is provided in which an IC (integrated circuit), such as a driver IC is integrated with two power MOSFETs in a single MLP with dual cooling. The dual side cooling improves overall package thermal performance, including that of the IC since the latter is totally isolated and the power devices have dual side heat dissipation.

The present invention has the following advantages over prior techniques.

(1). A simplified integrated transistor module is provided that can use the same molding tool with current MLP block molding, resulting in no significant investment.

(2). The transistor module pin-outs arc not variable.

(3). The process is simplified since there is no multiple reflow and thermal exposure. The two transistors can be flipped together and attached with solderable paste and the two drain clips are gang placed and reflowed at the same time. The drain and source connection are incorporaied during assembly resulting in process reduction.

(4). Process flexibility is maintained with options to singulate individual transistors into functional individual packages.

(5). Known industry footprints are used without the necessity of obtaining commercial acceptance of a new footprint, resulting in easy market penetration.

(6) Improved package cooling on the topside is provided as well as dual sided cooling,

(7). A common drain can be connected on the package itself.

Referring now to Figs. 2 and 3 there is shown an embodiment of the present invention. As shown, integrated transistor module 10 includes an etched lead frame 1 1, low side transistor 12 and high side transistor 14, clips 16 andlS; all encapsulated in a single mold by mold material 20. As shown in Fig. 4, lead frame 1 1 is half etched and includes spaced source pads 22 and 24, !ow side gate lead 26 and low side source leads 28 located on the outside of source pad 22, high side gate lead 30 and common source-drain leads 32 located between pads 22 and 24, and high side drain leads 34 located on the outside of source pad 24.Transistors 12 and 14 in one embodiment are power MOSFETs having a source and a drain on respective opposite sides of the transistor die. According to the invention, both transistors 12 and 14 are flip chip attached to lead frame 1 1 by solder balls 36. Thus, the source of transistor 12 is attached to source pad 22, the gate of transistor 14 is attached to low side gate lead 26, and the source of transistor 14 is attached to source pad 24, the gate of transistor 14 is attached to high side gate lead 30.

As shown in Figs. 3 - 5, clip 16 has a planar member 40 and downwardly extending leads 42. Clip 18 is similar in construction and includes planar member 44 and downwardly extending leads 46. Clips 16 and 18 are made of conductive material such as copper, aluminum, or conductive polymer. Clip 16 has one less lead than clip 18 since no connection is made by clip 16 with high side gate lead 30. Clip leads 42 are electrically connected to common source-drain leads 32 and clip leads 46 are electrically connected with high-side drain leads 34.

Fig. 6 shows the top side of module 10 and exposed clips 16 and 18. Fig. 7 shows the bottom side of module 10 and exposed source pads 22 and 24. The dual exposure provides for increased cooling and better thermal management of module 10.

Referring now to Figs. 8 - 10, there is shown another embodiment of the present invention. The design is similar to the previous embodiment but provides the option to separate the module into two individual transistor packages by cutting the module at a line 60 beyond the electrical connection of the low side clip 16 to the common source-drain lead 32. As shown in Fig. 8, the common source-drain leads are separated into low side drain leads 62 and high side source leads 64.

Figs. 1 1 and 12 show another embodiment of the present invention in which integrated transistor module 10' has a leaded frame 11 ' with leads 70 extending from either side to accommodate a leaded package footprint. The leaded package of Fig 11 can be converted to a leadless package by cutting the lead portions of the module at lines 72 and 74.

The embodiment shown in Figs 13 and 14 show an integrated transistor module which can connect a common drain to the two transistors of the module. As shown module 1 1" is partially sawn at region 80 to disconnect the drain of one transistor from the source of the other transistor. A heat sink 90 is attached to the top side of the module to connect the drain clips. Referring now to Figs. 15 - 17 there is shown an embodiment of the invention for a specific application design in which an IC is integrated into the module with two transistors. As shown, module 100 inciudes a driver 1C 102 integrated with low side FET 104 and high side FET 106. The FET configuration is the same as the embodiment of Figs. 1 and 2 with the source-drain connection 108 the same and with the dual cooling provided by both topside exposure of the FETs 104 and 106 through the drain clips and bottom side exposure of all three devices through the lead frame the same.

Figs. 18 and 19 show the package clip design. As shown, clips 16 and 18 are arrayed together with tie bars to hold the clips together. The clips can then be cut in gang for assembly with the other components of the module. As shown in Fig. 19, clips 16, 18 have grooves to improve solder attachment.

Figs. 20 - 24 show an embodiment of the method of the present invention, Fig.

20 shows providing the half-etched lead frame as the initial step in the process. Fig.

21 shows the next step of flip chip attaching transistors 12 and 14 to lead frame 11 by reflowing the solder paste. Fig. 22 shows attachment of clips 16 and 18 in gang to transistors 12 and 14, respectively, and reflow. Fig 23 shows block molding in case the module is nonleaded and singulated molding where the modules are leaded. Fig. 24 shows singulation and testing of individual modules 10.

Fig. 25 shows a modification of the method where individual transistor modules 200 are singulated from dual transistor module 10.

The invention has been described in detail with particular reference to certain preferred embodiments thereof, but it will be understood that variations and modifications can be effected within the spirit and scope of the invention.

Claims

1. An integrated transistor module comprising: a lead frame having first and second spaced pads and one or more common source-drain leads located between said first and second pads; first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; and a first ciip attached to the drain of said first transistor and electrically connected to said one or more common source-drain leads.

2. The module of claim 1 wherein said first and second transistors are metal oxide semiconductor field effect transistors (MOSFET).

3. The module of claim I wherein said first and second transistors are respectively high side and low side power transistors that are components of a bucky converter.

4. The module of claim 1 wherein said lead frame includes one or more drain leads located on the outside of said second pad, and including a second clip attached to the drain of said second transistor and electrically connected to said one or more drain leads located on the outside of said second pad.

5. The module of claim 1 wherein said lead frame, said transistors and said clip are encapsulated in molding material, with the pads of the lead frame and the clip being exposed to provide dual cooling of said module.

6. An integrated transistor module comprising: a lead frame having first and second spaced pads, one or more common source-drain leads located between said first and second pads, and one or more drain leads located on the outside of said second pad; first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; a first clip attached to the drain of said first transistor and electrically connected to said one or more common source-drain leads; a second clip attached to the drain of said second transistor and electrically connected to said one or more drain leads located on the outside of said second pad; and molding material encapsulating said lead frame, said transistors, and said clips to form said module.

7. The module of claim 6 wherein said pads of the lead frame and the clips are exposed and free from molding materia! to provide dual cooling of said module.

8. The module of claim 6 wherein said first and second transistors are metal oxide semiconductor field effect transistors (MOSFET).

9. The module of claim 6 wherein said first and second transistors are respectively high side and low side power transistors that are components of a bucky converter.

10 The module of claim 6 wherein said one or more common source-drain leads arc configured to be cut so that two individual single transistor packages can be formed.

1 1. The module of claim 6 wherein said lead frame has a gate lead between said first and second pads and wherein said first clip is not electrically attached to said gate lead.

12. The module of claim 6 wherein said first clip has a planar member and downwardly extending leads that are electrically connected to said common source- drain leads of said lead frame; and wherein said second clip has a planar member and downwardly extending leads that are electrically connected to said one or more drain leads of said lead frame located on the outside of said second pad.

13. The module of claim 12 wherein said lead frame has a gate lead between said first and second pads and wherein said first clip has no downwardly extending lead to be electrically connected to said gate lead.

14. The module of claim 6 wherein said lead frame is configured to have a leaded footprint which can be converted to a leadless module by cutting off the lead portion of the module.

15. The module of claim 6 wherein said common source drain leads are partially severed to disconnect the connection, and wherein a common heat sink is attached to and connects said first and second clips.

!6. The module of claim 6 including an integrated circuit attached to said lead frame and electrically connected to said first and second transistors, said integrated circuit being encapsulated by said molding material to form a single module.

17. A method of making an integrated transistor module comprising: providing a lead frame having first and second spaced pads, one or more common source-drain leads located between said pads and one or more drain leads located on the outside of said second pad; flip chip attaching first and second transistors respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; attaching a first clip to the drain of said first transistor and electrically connecting said first clip to said one or more common source-drain leads; attaching a second clip to the drain of said second transistor and electrically connecting said second clip to said one or more drain leads located on the outside of said second pad; and encapsulating said lead frame, said transistors, and said clips with molding material to form said module.

18 The method of claim 17 wherein said pads of the lead frame and said clips are exposed and free from molding material to provide dual cooling of said module.

19. The method of claim 17 wherein said first and second transistors are metal oxide semiconductor field effect transistors (MOSFET).

20. The method of claim 17 wherein said first and second transistors are respectively high side and low side power transistors that are components of a biicky converter.

21. A power quad flat no-lead package having an exposed top thermal drain clip with a folded stud and an exposed thermal source pad.