WO2007120769A2 - Low inductance bond-wireless co-package for high power density devices, especially for igbts and diodes - Google Patents
Low inductance bond-wireless co-package for high power density devices, especially for igbts and diodes Download PDFInfo
- Publication number
- WO2007120769A2 WO2007120769A2 PCT/US2007/009037 US2007009037W WO2007120769A2 WO 2007120769 A2 WO2007120769 A2 WO 2007120769A2 US 2007009037 W US2007009037 W US 2007009037W WO 2007120769 A2 WO2007120769 A2 WO 2007120769A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- package
- semiconductor package
- power semiconductor
- igbt
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/25—Arrangements for cooling characterised by their materials
- H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/501—Inductive arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/20—Conductive package substrates serving as an interconnection, e.g. metal plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
- H10W72/01308—Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07311—Treating the bonding area before connecting, e.g. by applying flux or cleaning
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
- H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/853—On the same surface
- H10W72/856—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
Definitions
- 11/641,270 solves the main problems regarding thermal mismatch, bond wire inductance, high current carrying capability and package inductance.
- the inductance of the packaged device is an important contributor to the final performance of the power device.
- State-of-the-art power modules normally try to reduce package resistance by minimizing Cu-leads and distances between various devices. It is especially important in applications which use IGBT devices as power switches that the so called free wheeling diode is connected to the corresponding
- the diode is a "partner device" for the
- IGBT and diode is shown in Fig. 1.
- a power semiconductor package includes a metallic body having a web portion configured for electrical and mechanical coupling using a conductive (e.g. solder or a conductive epoxy) adhesive to active electrodes of at least two semiconductor devices, and a connector portion extending from an edge of the web portion to connect electrically the active electrodes of the semiconductor devices, a first semiconductor die and a second semiconductor die electrically and mechanically coupled to said web portion, a ceramic insulation body directly bonded at one surface thereof to a surface of said metallic body, and another metallic body directly bonded to another opposing surface of said ceramic insulation body.
- a conductive e.g. solder or a conductive epoxy
- a package according to the present invention offers the following advantages: [0014] a) improved mechanical properties: [0015] i) stress-reduced two-sided cooling of power devices; - A -
- pre-assembled co-packaged components is suitable for easy handling and integration into power modules
- pre-assembled discrete component co-package is matching the thermal expansion coefficient of the state-of-the-art power substrates and therefore attractive for a large variety of applications;
- the main application field for a package according to the present invention will be in high power circuits and modules switching high currents or high voltages and requiring low inductance and EMI-screening.
- a package according to the present invention is also well-suited for high voltage applications using a combination of IGBTs and diodes, and applications under harsh environmental conditions or tough temperature cycling requirements like automotive or safety critical functions with high reliability demand.
- Fig. 1 illustrates a circuit diagram for an IGBT and anti-parallel diode according to the prior art.
- Fig. 2 illustrates a package according to the first embodiment of the present invention.
- Fig. 3 illustrates a package according to the second embodiment of the present invention.
- Fig. 4 illustrates a package according to the third embodiment of the present invention.
- Fig. 5 illustrates a package according to the fourth embodiment of the present invention.
- Fig. 6 illustrates a package according to the fifth embodiment of the present invention.
- Fig. 7 illustrates a package according to the sixth embodiment of the present invention.
- Fig. 8 illustrates a package according to the seventh embodiment of the present invention.
- Fig. 9 illustrates a package according to the eighth embodiment of the present invention.
- Fig. 10 illustrates DBC card used in the fabrication of packages according to the present invention. DETAILED DESCRIPTION OF THE FIGURES
- a package according to the present invention includes a basic building block 10, which has been described in co-pending U.S. Application Serial No. 11/641,270, entitled Package for High Power Density Devices, assigned to the assignee of the present application, the entire disclosure of which incorporated by reference.
- Basic building block 10 (sometimes referred to herein as DBC-can) includes a dielectric ceramic body 12 (e.g. Al 2 O 3 ), a metallic body 14 directly bonded to one surface of ceramic body 12, and a metallic connector 16 directly bonded to another, opposite surface of ceramic body 12.
- Metallic body 14 may be a flat metallic web that is formed from copper, aluminum or the like material.
- Metallic connector 16 may also be formed from copper, aluminum, or the like and includes a rectangular or square web portion 18, and a lead portion 20 that extends from (preferably in a vertical direction) web portion 18.
- lead portion 20 is horseshoe-shaped, and extends from three edges of web portion 18, leaving one edge open.
- web portion 18 includes a die connection area 22 for electrical connection to an electrode of a semiconductor die, and a plurality of spaced circular dimples 24 surrounding the die connection area 22. Each dimple 24 is a depression formed (by etching or the like method) in web ⁇ portion 18.
- an IGBT die 26 and diode 28 are assembled onto die connection area 22 of web portion 18.
- the collector electrode (not shown) of IGBT 26 and the cathode electrode (not shown) of diode 28 are electrically and mechanically connected to connection area 22 using a conductive adhesive body 30 such as solder or a conductive epoxy.
- a conductive adhesive body 30 is disposed between the collector electrode of IGBT die 26 and the cathode electrode of diode 28 and connection area 22, whereby the collector electrode and the cathode electrode are electrically and mechanically connected to web portion 18 and electrically connected to one another whereby low inductance is achieved.
- dimples 24 serve as a barrier against conductive adhesive 30 (e.g. during reflow where solder is used) whereby IGBT die 26 and diode 28 can be kept spaced from lead 20 and the combination of IGBT 26, and diode 28 can be preserved. Dimples 24 can also be located between diode 28 and IGBT 26 to keep space between the two dice (not shown in the figures).
- Emitter electrode 32 and gate electrode 34 of IGBT 26 which are disposed on a surface opposite to the collector electrode, and anode electrode 36 of diode 28, which is disposed on a surface opposite the cathode electrode, are preferably readied for flip-mounting onto a conductive pad of a circuit board or the like.
- Flip-mounting or flip-mounted refers to electrical and mechanical mounting using a conductive adhesive body (e.g. solder, conductive epoxy or the like) in which a conductive adhesive body is disposed between an electrode of the die and a conductive pad on a circuit board, or a die receiving area of a leadframe or the like.
- lead 20 includes an external connection surface 60 which is preferably coplanar with the free surfaces of the-electrodes of die 26, 28, and serves to connect the collector electrode of IGBT 26 and the cathode electrode of diode 28 to a conductive pad of a circuit board through flip-mounting.
- a package according to the second embodiment has two open sides which advantageously allows for filling the space underneath the DBC-can with an under filler or an isolating gel after soldering the DBC-can on a substrate.
- a package according to the second embodiment of the present invention in a package according to the second embodiment of the present invention, the horseshoe- shaped lead 20 is replaced with two spaced and oppositely disposed leads 20 each extending vertically from a respective edge of web 18 of connector 16.
- a package according to the second embodiment is identical to a package according to the first embodiment.
- a package according to the third embodiment includes two spaced and electrically isolated connectors 40, 42.
- Connector 40 includes a die connection area 22 for electrical connection (using a conductive adhesive such as solder or conductive epoxy) to the gate electrode (not shown) of an IGBT die 26, while connector 42 includes a die connection area 22 for electrical connection (using a conductive adhesive such as solder or conductive epoxy) to the emitter electrode (not shown) of IGBT die 26.
- the electrodes of the die may be bumped for connection to surfaces 22.
- collector electrode 44 of IGBT die 26 is preferably coplanar with the connection surface 46 of lead 42 and readied for flip-mounting onto a conductive pad of a circuit board or the like substrate.
- connector 42 includes a horseshoe-shaped lead 20 similar to the lead 20 in the first embodiment, while connector 40 includes two opposing leads 20 extending from opposite edges of a web, similar to leads 20 of the second embodiment.
- diode 28 although not shown, may be electrically mounted on metallic body 14, and then connected to form the circuit shown in Fig. 1 during the assembly of the package in a module or the like integrated device. A clip, or wirebonds (not preferred can be used to accomplish such a connection.
- the anode electrode of a diode 28 may be coupled to connection area 22 of connector 42, whereby the anode electrode and the emitter electrode of IGBT 26 can be electrically coupled through connector 42.
- web 18 is electrically connected to metallic body 14 through a conductive filled via 48 that extends through ceramic body 12; for example, a copper filled via which connects web 18 to metallic body 14.
- the cathode electrode of diode 28 is then electrically and mechanically connected to metallic body 14 using a conductive adhesive 30, and the collector electrode of IGBT die 26 is electrically and mechanically coupled to web 18 through a conductive adhesive body 30.
- the emitter electrode of IGBT die 26 can then be connected to the anode electrode of diode 28 when the package is assembled on a circuit board or the like substrate in a module or an integrated device.
- the emitter electrode and the gate electrode each includes a respective solder bump 50 to facilitate flip-mounting of the package.
- the anode electrode of diode 28 is electrically connected to a web 18' using a conductive adhesive body 30.
- Web 30 includes leads 20', and is bonded to a ceramic body 12, which is bonded to metallic body 14. Copper, aluminum or the like material can be used to form web 18' and leads 20'.
- Leads 20' are electrically and mechanically connected to pads 49 using a conductive adhesive body 30.
- Each pad 49 is electrically connected through a conductive filled via 48 to a respective conductive (e.g. copper) lead 52.
- Each conductive lead 52 preferably includes a surface for external connection 60 through flip-mounting which is coplanar with connection surfaces of leads 20, whereby the entire assembly is rendered flip-mountable. Note that in a package according to the fifth embodiment only one lead 52 is required, and the second lead is optional and provided for symmetry.
- the anode electrode of diode 28 is electrically and mechanically coupled to the interior surface of a metallic clip 54 using a conductive adhesive 30.
- Metallic clip 54 is formed from copper or the like material and includes legs 56 each extending from an edge or a side of a web portion 58. Each leg includes a surface 60 for external connection which is coplanar with external connection surfaces 60 of leads 20.
- clip 54 can be copper, an example of which can be found in U.S. Patent No. 6,624,522, assigned to the assignee of the present application. If the application does not have severe temperature requirements it might be a cost-effective solution to use an outer metal-can as an outer package and as an electric contact from the diode to the front side of the co-package.
- the anode electrode of diode 28 is electrically and mechanically connected to web portion 18, while the cathode electrode thereof is electrically and mechanically connected to the back surface of a copper clip 54.
- Copper clip 54 includes web portion 58, and two legs extending from opposite edges of web 58.
- the collector electrode of IGBT die 26 is electrically and mechanically coupled to the interior surface of web 58, and connection surfaces 60 of leads 20 and legs 56 are coplanar, whereby the entire package is rendered fiip- mountable. If the application does not have severe temperature requirements it might be a cost-effective solution to use a metal-can similar to a can disclosed in U.S. Patent No. 6,624,522 as an inner package and as an electric contact from the IGBT to the diode soldered to the backside of the metal -can.
- a DBC-can 10 is used as outer package covering the stack.
- First connector 62 includes a web portion 66 which is bonded to ceramic body 12, and at least one lead 20 extending from an edge thereof. Web portion 30 is electrically and mechanically connected to the anode electrodes of diode 28, while the cathode electrode of diode 28 is electrically and mechanically coupled to a portion of the ⁇ collector electrode of IGBT die 26.
- Second connector 64 also includes a web portion 68 that is bonded to ceramic body 12 and is electrically and mechanically connected to another portion of the collector electrode of IGBT die 26.
- Connector 64 also includes a lead 20 that extends from an edge of web 68, and includes an external connection surface that is coplanar with external connection surface 60 of lead 20 of connector 62.
- the packages according to the present invention can be formed simultaneously on a DBC card and then singulated from the card.
- a DBC card 90 is shown in Figure 10.
- Such cards are produced in sizes such as 5" x 7" or 4" x 6" and have a continuous central ceramic layer 41 with top and bottom copper layers. These layers can be simultaneously masked and etched to define the individual building blocks (DBC-cans) 10. Specifically, the copper layers are patterned to obtain connectors 16 and metallic bodies 14 spaced by streets 95 and thereafter the die can be loaded onto connections surfaces 22 of each DBC-can 10. Note that connectors 16 can be tested before singulation.
- DBC-cans 10 can be singulated by sawing, dicing or physically breaking at the streets 95.
- cards 90 can be protected by a suitable foil for shipment and can be pre-scribed for easy break-off or singulation of packages by the end user.
- the whole DBC card can be used to perform the Si- die attach. That way placing the die, the soldering and also the end test/parameter testing of the packaged dice can be done more cost-effectively on the DBC card which is faster, easier and more precise, than handling discrete devices.
- solder is preferred as high current carrying and low thermal resistance conductive adhesive.
- soldering of the devices into the cans is an important step for the reliability of the packages device.
- a flat and homogeneous solder layer of exactly defined thickness would be important for the reliability of the solder joint.
- the solder thickness is the main parameter determining the solder wear out and the occurrence of fatigue, wear out and delamination. Further the solder thickness needs to be controlled in order to level the die surface with the Cu-frame.
- the die can move and make contact with connector 16. Such a contact can be avoided.
- AU dice in DBC-cans 10 on DBC card 90 can be tested very efficiently in parallel since the cans are electrically isolated from each other.
- a special probe-card of a parametric tester can test all dice on the DBC-card 90 at the same time reducing test time enormously and establishing a high production rate to reduce manufacturing costs.
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Inverter Devices (AREA)
- Junction Field-Effect Transistors (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009505480A JP4950280B2 (en) | 2006-04-13 | 2007-04-13 | Low inductance bond wireless joint package for high power density devices, especially for IGBTs and diodes |
| DE112007000919.5T DE112007000919B4 (en) | 2006-04-13 | 2007-04-13 | Common housing for components with a high power density, in particular for IGBTs and diodes, with low inductance and wire-free bond connections |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US79186006P | 2006-04-13 | 2006-04-13 | |
| US60/791,860 | 2006-04-13 | ||
| US11/786,388 | 2007-04-11 | ||
| US11/786,388 US7554188B2 (en) | 2006-04-13 | 2007-04-11 | Low inductance bond-wireless co-package for high power density devices, especially for IGBTs and diodes |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| WO2007120769A2 true WO2007120769A2 (en) | 2007-10-25 |
| WO2007120769A3 WO2007120769A3 (en) | 2008-07-31 |
| WO2007120769B1 WO2007120769B1 (en) | 2008-09-12 |
Family
ID=38604039
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2007/009037 Ceased WO2007120769A2 (en) | 2006-04-13 | 2007-04-13 | Low inductance bond-wireless co-package for high power density devices, especially for igbts and diodes |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7554188B2 (en) |
| JP (1) | JP4950280B2 (en) |
| DE (1) | DE112007000919B4 (en) |
| WO (1) | WO2007120769A2 (en) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1814611A4 (en) | 2004-11-22 | 2010-06-02 | Intelliject Inc | Devices, systems, and methods for medicament delivery |
| US7648483B2 (en) | 2004-11-22 | 2010-01-19 | Intelliject, Inc. | Devices, systems and methods for medicament delivery |
| US7648482B2 (en) | 2004-11-22 | 2010-01-19 | Intelliject, Inc. | Devices, systems, and methods for medicament delivery |
| US20080054496A1 (en) | 2006-08-30 | 2008-03-06 | Neill Thornton | High temperature operating package and circuit design |
| US8525334B2 (en) * | 2010-04-27 | 2013-09-03 | International Rectifier Corporation | Semiconductor on semiconductor substrate multi-chip-scale package |
| JP5756911B2 (en) * | 2010-06-03 | 2015-07-29 | パナソニックIpマネジメント株式会社 | Semiconductor device and semiconductor relay using the same |
| US9088226B2 (en) | 2010-10-19 | 2015-07-21 | Electronics Motion Systems Holding Limited | Power module for converting DC to AC |
| US8350376B2 (en) * | 2011-04-18 | 2013-01-08 | International Rectifier Corporation | Bondwireless power module with three-dimensional current routing |
| US9001518B2 (en) | 2011-04-26 | 2015-04-07 | International Rectifier Corporation | Power module with press-fit clamps |
| US8804340B2 (en) | 2011-06-08 | 2014-08-12 | International Rectifier Corporation | Power semiconductor package with double-sided cooling |
| US8987777B2 (en) | 2011-07-11 | 2015-03-24 | International Rectifier Corporation | Stacked half-bridge power module |
| RU2497319C1 (en) * | 2012-02-28 | 2013-10-27 | Федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский университет "Высшая школа экономики" | Printed-circuit board for spacecraft on-board radio-electronic equipment |
| JP5357315B1 (en) * | 2012-09-19 | 2013-12-04 | マイクロモジュールテクノロジー株式会社 | Semiconductor device |
| CN103022022A (en) * | 2012-12-25 | 2013-04-03 | 浙江大学 | Low-parasitic-inductance IGBT (insulated gate bipolar translator) power module |
| US9536800B2 (en) | 2013-12-07 | 2017-01-03 | Fairchild Semiconductor Corporation | Packaged semiconductor devices and methods of manufacturing |
| US10128625B2 (en) | 2014-11-18 | 2018-11-13 | General Electric Company | Bus bar and power electronic device with current shaping terminal connector and method of making a terminal connector |
| FR3054929A1 (en) * | 2016-08-05 | 2018-02-09 | Commissariat Energie Atomique | METHOD OF ENCAPSULATING AN INTEGRATED CIRCUIT WITH A HORIZONTAL HETEROJUNCTION TRANSISTOR CHIP |
| US9972607B2 (en) | 2016-08-08 | 2018-05-15 | Semiconductor Components Industries, Llc | Semiconductor device and method of integrating power module with interposer and opposing substrates |
| US12074160B2 (en) | 2020-07-17 | 2024-08-27 | Semiconductor Components Industries, Llc | Isolated 3D semiconductor device package with transistors attached to opposing sides of leadframe sharing leads |
| CN119300452B (en) * | 2024-12-09 | 2025-03-18 | 青岛中微创芯电子有限公司 | Trench gate RC-IGBT device structure |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE59713027D1 (en) * | 1996-09-30 | 2010-03-25 | Infineon Technologies Ag | MICROELECTRONIC COMPONENT IN SANDWICH CONSTRUCTION |
| JP2000164800A (en) * | 1998-11-30 | 2000-06-16 | Mitsubishi Electric Corp | Semiconductor module |
| DE19950026B4 (en) * | 1999-10-09 | 2010-11-11 | Robert Bosch Gmbh | The power semiconductor module |
| US6624522B2 (en) | 2000-04-04 | 2003-09-23 | International Rectifier Corporation | Chip scale surface mounted device and process of manufacture |
| JP3923258B2 (en) * | 2001-01-17 | 2007-05-30 | 松下電器産業株式会社 | Power control system electronic circuit device and manufacturing method thereof |
| JP4016384B2 (en) * | 2002-06-17 | 2007-12-05 | 株式会社安川電機 | Power module and motor control device using the same |
| JP3847676B2 (en) * | 2002-07-15 | 2006-11-22 | 三菱電機株式会社 | Power semiconductor device |
-
2007
- 2007-04-11 US US11/786,388 patent/US7554188B2/en not_active Expired - Fee Related
- 2007-04-13 DE DE112007000919.5T patent/DE112007000919B4/en not_active Expired - Fee Related
- 2007-04-13 WO PCT/US2007/009037 patent/WO2007120769A2/en not_active Ceased
- 2007-04-13 JP JP2009505480A patent/JP4950280B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE112007000919T5 (en) | 2009-04-23 |
| WO2007120769A3 (en) | 2008-07-31 |
| JP4950280B2 (en) | 2012-06-13 |
| JP2009533871A (en) | 2009-09-17 |
| US20070241393A1 (en) | 2007-10-18 |
| US7554188B2 (en) | 2009-06-30 |
| DE112007000919B4 (en) | 2021-01-28 |
| WO2007120769B1 (en) | 2008-09-12 |
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