WO2007118034A3 - System and method for write failure recovery - Google Patents

System and method for write failure recovery Download PDF

Info

Publication number
WO2007118034A3
WO2007118034A3 PCT/US2007/065679 US2007065679W WO2007118034A3 WO 2007118034 A3 WO2007118034 A3 WO 2007118034A3 US 2007065679 W US2007065679 W US 2007065679W WO 2007118034 A3 WO2007118034 A3 WO 2007118034A3
Authority
WO
WIPO (PCT)
Prior art keywords
cipher block
block chaining
write failure
failure recovery
data
Prior art date
Application number
PCT/US2007/065679
Other languages
French (fr)
Other versions
WO2007118034A2 (en
Inventor
Reuven Elhamias
Vivek Venkatramen Mani
Niv Cohen
Original Assignee
Sandisk Corp
Reuven Elhamias
Vivek Venkatramen Mani
Niv Cohen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/397,416 external-priority patent/US7835518B2/en
Priority claimed from US11/397,101 external-priority patent/US20070230690A1/en
Application filed by Sandisk Corp, Reuven Elhamias, Vivek Venkatramen Mani, Niv Cohen filed Critical Sandisk Corp
Priority to JP2009504395A priority Critical patent/JP2009537026A/en
Publication of WO2007118034A2 publication Critical patent/WO2007118034A2/en
Publication of WO2007118034A3 publication Critical patent/WO2007118034A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0637—Modes of operation, e.g. cipher block chaining [CBC], electronic codebook [ECB] or Galois/counter mode [GCM]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/16—Protection against loss of memory contents
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0643—Hash functions, e.g. MD5, SHA, HMAC or f9 MAC
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • Power Engineering (AREA)
  • Storage Device Security (AREA)

Abstract

When cipher block chaining encryption/decryption is employed, write fault recovery is accomplished by storing information useful for the writing of cipher block chaining processed data before it is written to storage cells. Hence when write failure is discovered, this information stored can be retrieved for rewriting the data to the cells. Preferably, the information stored includes security configuration information for cipher block chaining processing a unit of data.
PCT/US2007/065679 2006-04-03 2007-03-30 System and method for write failure recovery WO2007118034A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009504395A JP2009537026A (en) 2006-04-03 2007-03-30 System and method for write failure recovery

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/397,416 US7835518B2 (en) 2006-04-03 2006-04-03 System and method for write failure recovery
US11/397,416 2006-04-03
US11/397,101 2006-04-03
US11/397,101 US20070230690A1 (en) 2006-04-03 2006-04-03 System for write failure recovery

Publications (2)

Publication Number Publication Date
WO2007118034A2 WO2007118034A2 (en) 2007-10-18
WO2007118034A3 true WO2007118034A3 (en) 2009-08-13

Family

ID=38581765

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/065679 WO2007118034A2 (en) 2006-04-03 2007-03-30 System and method for write failure recovery

Country Status (4)

Country Link
JP (1) JP2009537026A (en)
KR (1) KR20080108119A (en)
TW (1) TW200817993A (en)
WO (1) WO2007118034A2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020071553A1 (en) * 2000-10-20 2002-06-13 Taizo Shirai Data storage device, data recording method, data playback method, and program providing medium
WO2002101976A1 (en) * 2001-06-13 2002-12-19 Corrent Corporation Security association data cache
US20060015754A1 (en) * 2004-07-15 2006-01-19 International Business Machines Corporation E-fuses for storing security version data
US20060050564A1 (en) * 2004-09-08 2006-03-09 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020071553A1 (en) * 2000-10-20 2002-06-13 Taizo Shirai Data storage device, data recording method, data playback method, and program providing medium
WO2002101976A1 (en) * 2001-06-13 2002-12-19 Corrent Corporation Security association data cache
US20060015754A1 (en) * 2004-07-15 2006-01-19 International Business Machines Corporation E-fuses for storing security version data
US20060050564A1 (en) * 2004-09-08 2006-03-09 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device

Also Published As

Publication number Publication date
WO2007118034A2 (en) 2007-10-18
TW200817993A (en) 2008-04-16
KR20080108119A (en) 2008-12-11
JP2009537026A (en) 2009-10-22

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