TW200817993A - System and method for write failure recovery - Google Patents

Abstract

When cipher block chaining encryption/decryption is employed, write fault recovery is accomplished by storing information useful for the writing of cipher block chaining processed data before it is written to storage cells. Hence when write failure is discovered, this information stored can be retrieved for rewriting the data to the cells. Preferably, the information stored includes security configuration information for cipher block chaining processing a unit of data.

Description

200817993 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a memory system or method relating to resources and, in particular, to the ability to write secondary: decrypted memory systems. Shell material has nest failure failure [Prior Art] Portable storage device has been used for commercial purposes One computing device is carried to another. The eve of the year. It will move the equipment from the device market to include the content storage: more information exchange to increase the average income... Seven exhibitions must be subject to the hunter when generating storage to a mobile device, $Cui a M/ ”濩In order to protect the content stored in the inter-receivable storage device, the information stored in the encrypted storage device is encrypted and only authorized users are allowed to decrypt the data.

U cipher block chaining (CBC) is an encryption method in which the domain of the former-plain block (in the form of a ciphertext block) is fed back to the encryption of the next plaintext block. Therefore, each ciphertext block depends not only on the plaintext block but also on the previous plaintext block. In the CBC process, the initial vector (Iv), which is a randomized material, is encrypted into a first block to provide a unique input to the encryption engine for the secret to which the specified plaintext key is used for the encryption. The CBC process is still implemented by an encryption engine that performs encryption and/or decryption. The context of the engine refers to the current state of the engine at a given time. For a given encryption/decryption cycle, the context generated and used is only 1199I0.doc 200817993 § When using cbc for data encryption during a write operation, the stylization of the device may fail. In this case, it will be necessary to reprogram to the storage step. This action will require the data that failed in the write operation to be transferred again to the value of μ$μs. However, once the data has been transmitted using an encryption or encryption/decryption engine, the same data cannot be passed again without reconfiguring the engine in the appropriate context. The engine. Therefore, it is desirable to provide a solution to the above problem [invention] (4) to be processed by cipher block link processing (4) to write to the storage device and to copy the data processed by the cipher block link The information is such that, in the event of a write failure, the data is rewritten to the storage device during at least one of the stylized cycles - to the storage device. In one embodiment, the information stored in (4) Lagrangian is the data unit processed by the cipher block. In each case, the example, the storage 5 hole includes the information for the cipher block link processing.早早-的安全Configuration or upper [Embodiment] The block diagram shown in Figure 1 shows a shell-like brother-remember system in which you can implement the "... 4 & As shown in the figure!, the recorder 10 includes a central processing unit (CPUN2, a buffer tube ylang (ΒΜϋ) 14, a 119910.doc 200817993 host interface module (HIM) 16 and a flash interface. A module (FIM) 18, a flash memory 20 and a peripheral access module (PAM) 22. The memory system 10 communicates with a host device 24 via a host interface bus 26 and port 26a. The body 20 (which may be of the NAND type) provides data storage to the host device 24. The software code of the CPU 12 can also be stored in the flash memory 20. The FIM 18 is connected to the flash memory bus 28 and port 28a via a flash interface bus 28 Flash memory 20. HIM 1 6 is suitable for connection to a host system such as a digital camera, personal computer, personal (PDA), digital media player, MP-3 player, and cellular phone or other digital Device. Peripheral access module 22 selects appropriate controller modules (eg, FIM, HIM, and BMU) In communication with the CPU 12. In one embodiment, all of the components of the in-line system 10 can be packaged in a single unit (e.g., a memory card or memory stick 1) and preferably encapsulated in the card or The buffer management unit 14 includes a host direct memory access (HDMA) 32, a flash direct memory access (FDMA) controller 34, an (arbiter 36, a buffer random access). A memory (BRAM) 38 and an encryption engine 40. The arbiter 36 is a shared bus arbiter so that only one master or initiator (which may be HDMA 32, FDMA 34 or CPU 12) can be used at any time. And the slave or target system BRAM 38. The arbiter is responsible for directing the appropriate initiator request to BRAM 38. HDMA 32 and FDMA 34 are responsible for HIM 16, FIM 18 and BRAM 38 or CPU random access memory (CPU RAM) 12a The data transfer between HDMA 32 and FDMA 3 4 is conventional and need not be described in detail herein. BRAM 38 is used to transfer 119910 between host device 24, flash memory 20 and CPU RAM 12a. Doc 200817993 Handling buffer data. HDMA 32 and FDMA 34 are responsible for Data is transferred between the HIM 16/FIM 18 and the BRAM 38 or the CPU RAM 12a, and is responsible for indicating the completion of the sector transfer. When the original encrypted data is written to the flash memory 20 by the host device 24, 'send from the host The encrypted data is decoded by the bus 26, HIM 16, HDMA 32, encryption engine 40, at the encryption engine 4, and stored in the BRAM 38. Then, the decoded data is sent via f Ο ?〇]\4八34? 1] \4 18, bus 28 from 311 8] \ 4 3 8 sent to the flash memory 2 〇. Before the data taken from Bram 38 is passed to %, the data can be re-encrypted by means of encryption engine 40 to re-encrypt the data shipped to flash memory 20, but decrypt the data from host device 24 with them. This is done by means of a different key and/or algorithm compared to the key and/or algorithm. This illustration illustrates the flow of data during a write process. The unencrypted material is stored in the BRAM 38 when the unencrypted material is transmitted to the encryption source via the bus unit %, job 16, and HDMA 32 by the host device. The data is then encrypted prior to sending the data to Cong A 34 on the way to memory 20. In the case where the data 婉 == is written, it is preferably 'engine 4'. This process is completed before the 枓 枓 枓 迗 迗 § § § 。 。 。. In many applications, when data is written to storage 20), it may be desirable to implement data encryption in a timely manner, which is referred to as instant ~ secret. This operation is more effective, because the ',,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, Encrypted or encrypted; ... greedy. Since Beko is sent from the host 24 to the memory 119910.doc 200817993 20, the encryption is preferably completed on the fly. In the above process, the door of the capital. The alpha and the downtime are located in the host device 24 and the memory 20 port 1, and the data source is the host. In addition, the write operation is set to 24 and the destination is the memory 20. The ground # 1 Ρ ^ can also be the CPU 12, and the corresponding destination is the memory. Helmets are widely stored in the flash ° ° ° 'Double system host set 2 4 or cpu 12, by the engine 40 good ° heart 2 〇 information before being placed in the memory 20 by the engine 40 - Encryption processing. Although FIG. 1 remembers that #金可m" contains a flash memory, the system LL 3 another type of non-volatile memory, such as disk, light: down' and all other types of rewritable non- Volatile memory systems, various advantages will apply equally to such alternative embodiments. In one instance of the soil, the c memory is also preferably associated with the remaining L of the memory system (encapsulated in the same carcass) (for example, _memory card or stick) Ο Although the data stored in BRAM 38 (from host device 24 or coffee 12) is written to flash memory 20, it can be programmed as a meta page. The unit writes a low-level material, wherein the --page is written to the flash memory 2 during each stylization cycle of the CPU 12. The page can include many sectors, and the size of the sector is determined by the host system. An example is a sector having 512 groups of bits: user data (following the criteria established by a pair of disk drives) plus a certain number of bytes of user data and/or as part of it. The unlocking information of the metapage. The burglary engine 40 implements encryption using a cryptographic algorithm and a cryptographic key. Many shared cryptographic algorithms treat 128-bit data as a cryptographic processing unit. This cryptographic processing unit is typically smaller than the data page of 119910.doc -10- 200817993 to flash memory 20 during each stylized cycle. § When a cryptographic engine 40 implements the CBC process for the data, the cryptographic engine 40 implements the CBc process for each plaintext block of the 4 data stream (in this case, consisting of a cryptographic processing unit) and obtains a corresponding The ciphertext block. Therefore, each synthesized ciphertext block in the code processing unit is not only dependent on the corresponding cryptographic processing unit, but also on the previous cryptographic processing unit. Fig. 2 is a diagram for illustrating the cbc process of the present invention. Block diagram. As shown in Figure 2, when processing the first metapage, the CBC process begins with a random number called the initial vector (IV). The engine 4 encrypts the number using a key to obtain a secret. The block 。1 and the first plaintext block Pi of the metapage are provided as inputs to a singular sluice gate, and then the key is used to encrypt the output of the gate again to obtain the ciphertext 4. Then, Right This operation is repeated until the block and the plaintext block, where the output of the gate is encrypted by a key to obtain ciphertext 4. The process continues in the same manner until all plaintext blocks in the metapage are Encrypted. Then, the same process is started by using the last ciphertext block of the previous metapage instead of the initial vector (IV) for the second metapage and all subsequent metapages. The ciphertext block is also called the message of the speech data stream. The authentication code (MAC). Therefore, the encryption and decryption cbc function of the first element page of the type in Figure 2 can be expressed as follows: Encryption-bit plain text blocks Input: m -bit key A ; / -bit IV; P\,- _ _ pr · Output: C〇, , Cr such that /Kand qeq (Ci i ten still) 119910.doc -11 - 200817993 for 1 < i < r. Decrypt input · · m -bit key moxibustion; Bit IV; / -bit cipher text blocks q, ---cr. Output .Po, - _ such that po f and a — ten ek\〇\ ) for 1 < i < r.

Ο The above values c〇,···, Cr is the ciphertext block or message authentication code (MAC) of the meta page in the data stream, which includes the plaintext blocks ρι,..., pr. Iv is the initial vector, and k is a key. Therefore, when encryption is desired and a page containing the data blocks ρι, . . . , is written to the memory 20, the encryption engine 4 in the system 〇 uses the same (for example, the CBC function described above) according to the The data block is calculated to calculate the MAc value (eg, cG, . . . , Cr), and the MAC values are written to the memory 2〇. In the above formula, ~(X) means that "χ" refers to the process of encrypting by means of the key k and q"(X) means that x is decrypted using the key k. In the above encryption process, it can be observed that to encrypt each meta page (except for the first metapage), the engine 40 will need to use the last message authentication code or ciphertext ^ of the pre-meta page instead of IV. To encrypt the _ meta page, the engine needs to use the initial vector IV. Intrusion failure recovery: According to the above content, it can be observed that after using CBC encryption, the encrypted cipher machine or MAC value of each page in the data stream is as follows, ... after 'writing the ciphertext block to Fast 'r... volts and flashes. If there is a problem when writing the first metapage ^ Λ, you will need to write the order of the mac values of the encrypted metapage to 〖, ό ό 脰 fe脰20. Because of the encryption index 119910.doc •12- 200817993 擎 4 〇堂 τ 士 does not store the encrypted data, so this encrypted data no longer exists. ' ^ This retrying the first page of the writing process, the entire encrypted working unit, Cr can be stored somewhere in the system 1 (such as memory 20 or RAM 12a in one of the data buffers), In order to find a problem during the writing process of the .f flash, the ::=, / kg stored encrypted page and re-written to the flash memory. "': In this way, the encrypted first meta page is not broken during the stylized sequence" so that if a write failure occurs, it can be retrieved later. In addition, the program code of the CPU 12 includes a program command, which does not have a self-timer 3g^ data. The program command will use a data buffer in the flash memory 20 or the RAM 12a as a data source and The data is written to the flash memory 20 again. Then, the mode can be used when a write failure is found. The encrypted meta-page is stored in flash memory 2 (which will be C in V4ram i2a). The flash memory 20 or RAM (2) includes a buffer sufficient to store the full size of the encrypted page. Thus, preferably and as an alternative, only the information necessary to restore the engine 40 to the correct state is stored so that the engine 4 can continue to process the writes again after the process of discovering the write-on-child page has failed. The plaintext block in the failed metapage. The unencrypted meta page can be retrieved from BRAM 38 again and processed by engine 40, and the processed meta page is rewritten to memory 20. Therefore, in the month of processing the current metapage by the engine 4", the information or security configuration information is stored in a buffer (for example, in the RAM 12a of Fig. 1). The good information includes the last message authentication code of the previous H99l0.doc -13- 200817993 meta-page or the value of the 1^1 person 0 value cr, the temporary crying of the engine 40, the cryptographic algorithm used for the processing, and the identification needs. The optional information of the rewritten meta page (or its location) is explained below. In the case where the first metapage is to be written, the stored information preferably includes the initial vector IV instead of the previous one. The last message authentication code or MAC value of the page. After storing this information, the CPU 12 returns control to FIM and FDMA, FIM and FDMA processing.

The current metapage i' is caused to be encrypted by the engine 40, and then the encrypted current metapage is written to the flash memory 20. In some embodiments, it may be desirable to use a buffer (not shown) between the FIM 18 and the memory 2' to cache the encrypted element page before writing it to the flash memory 20. Encrypt the meta page (for example, one sector of the meta page being processed). This buffer can also be picked up by 18 or part of the memory (9). Although only some portions of the meta-page are cached, the data of both the currently processed page and the cached meta-page can be simultaneously written to the flash memory 20. In this case, when a write failure is found, people will need to be able to determine that the system is in the data stream (ie, the processed meta-page or the tightest decision) The fare in the metapage) should be returned as sinus 4 IM only to be encrypted and rewritten to the brotherly body 20. For this purpose, the squad or the contextual information of the squadrons of the squadrons and the contextual information preferably also include the start of the logical block address (LBA) of the page that can be simultaneously written to #U ΓΓΠΛ, 2〇, So that when one of the metapages is found, the system can be returned to this _yuan w", the start address of the A process failure page to rewrite it to the flash memory 2". In the first technique for solving the problem of writing failure, H9910.doc 200817993 stores all of the large number of ciphertext blocks in the flash memory 2〇 or ram... 'Also' requires a large amount of memory space in the flash memory or RAM 12a. This is because it is impossible to know in advance that the write failure occurred in the beta knife of the title page. For this reason, 'storage' All of the ciphertext blocks can be rewritten to the flash memory. Conversely, in the second technique of storing only the security configuration information or context information of the metapage, there is no need to store all of the metapages. Ciphertext block. Conversely, except for the purpose of restoring the engine 40 to the appropriate state In addition, you will only need to store the last ciphertext block or initial vector of the previous page. However, ^ ^ ^ ^ ..., the last ciphertext block or initial vector of the page can be + and 70 pages The first plaintext block is used together as an output input to an X〇Rp bow/- ♦ bucket--, where the output of the gate is input to the engine 4〇 to implement encryption. It is no longer necessary to provide the capacity of all the ciphertext blocks for any page of the flash memory or the RAM 12a for capturing any page of the page. Claws from two 70 pages of data and write them to the flash S 忆 2 〇. 屮·^ μμ includes m Ο 〇 For this reason, use two buffers in RAM 12a to store two positive Virtual treading; The security configuration information of the processing page. Obviously, in the case of two or more hundred, ... to memory 20, use two or more embroidery broadcast ^ In the case of #, ... buffer benefits instead, this and other changes are within the scope of the present invention. It is assumed that the same can be written to the flash memory 2 〇, use one% as the buffer index of the six, y singer 5 has recorded two sets of security configuration resources stored in the two buffers, !v you; W ^, σ in the case of write failure Make Zhenglizhong full configuration information recovery to re-tune the correct pin-in... Newly process the corresponding meta-page. Therefore, the two pesos, 、, Γ, which are used to store the female group’s sad information, can be marked as UaCO) and I2a(l), and the buffer number will be switched between 〇 and 指向 to point to one of the two buffers used to store the security group 119910.doc 200817993 . The process of recovering the write failure of the borrowing grief §fL is illustrated in FIG.

First, the CPU 12 clears the context or security configuration information stored in the two buffers i2a(9) and 仏(1) and sets the buffer index value to G. (Block 102·) The settings or context are loaded by the CPU 12 to the buffer management unit u and FIM i 8. This sets FDMA 3 4 and makes FIM! 8 ready to handle poor materials. The encryption engine is also configured. After this load, cpu U waits until the flash memory 20 is ready to receive data (block 1〇4). Then, the system is ready for write operation 1〇6. The CPU 12 causes the FIM write program to start and transfers control of various bus bars to the FIM 18. (block 108). The FIM 18 interrupts the CPU 12 when the data is transferred from the bram 38 to the shovel of the flash memory 20 (i.e., before the DMA write operation code (block 110) is issued). The Back End (BE) Flash Ware and Suspend/Restart Module (SRM) APIs are read from a memory (such as flash memory 2) to the software of the CPU ram 12a. The Flash Ware is executed by the CPU 12 to call the SRM API for saving the encrypted page or the security configuration information of the metapage and the engine 40 to the buffer pointed to by the buffer index value. Therefore, once started, since the buffer index has been set to 〇, this information is stored in the buffer 12a(0). The start logical block address of the meta page written in this write operation is also stored in the buffer 12a(0). (Block 112) Then BE Flash Ware executed by CPU 12 then returns control of device 1 to FIM 18. The CPU 12 also causes the FDMA 34 to begin so as to start encrypting the data of the BRAM 38 of the meta page by the encryption engine 40 and writing it to the redundant body 20. (block 114). Then, the FIM 18 checks to see if the flashing of the complete meta page of the memory 20 is completed, indicating that the programming of the meta page is passed. (Rhombus 116). If the metapage is successfully written to the flash memory 20 without accident, the buffer index is incremented by one and then divided by two (or modulo 2) to obtain the remainder. (Block 122) In the example where the buffer index is set to 〇, in block 122 this operation causes the buffer index to be 1, and in block 1 〇 4 ρ ΐΜ 18 returns control to the CPU 12 to cause the next meta page to repeat. process. Instead of writing the context or security configuration information to the buffer 12a(1) in the next cycle of writing to the next metapage, the buffer index has been set to j. However, if the stylization fails, FIM 18 interrupts processor 12 (block 118) and retry the write operation using a retry mechanism 12 。. This retry mechanism is illustrated in Figure 4. Referring to Figure 4, when FIM 18 finds that a write operation has failed, FIM 18 knows where the write failed and which meta page the write failure occurred. The FIM 18 is therefore aware of the starting logical block address (LBA) of the metapage where the write failure occurred. Then, the address is matched or compared with the starting LBA address in the two buffers 12a(0) and I2a(1), and the LB A address containing the meta page where the write failure occurred is identified. A buffer that matches the LB A address. (Block 152) The status of the encryption engine is then restored using the context or security configuration information stored in the identified buffer. (box 154). Then, the CPU 12 activates the FIM 18, the FDMA 34, and the engine 40 to re-encrypt the BRAM 38 meta-page starting at the beginning logical block address of the meta-page where the write failure occurred and writes the encrypted meta-page as before. Into the flash memory 20. (blocks 156, 158). FIM 18 also deletes any meta-pages that have been written to memory 20 that have not been fully encrypted or marked for deletion. After this is done, the CPU 12 returns this operation to the block 119910.doc -17-200817993 104 of FIG. 3. As described above, the name _^ ^ ^ will be from more than one yuan in the first cycle. Write or program to the record (4) η Therefore, if a write error occurs when the material from the - meta page is written to the memory 2, then: the page is not only rewritten or reprocessed. ^, „月匕要要或期,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ° Therefore, when the writing failure occurs, the coffee 12=ς 疋 料 re-write or re-determine how far should be returned. + CPU 12 will determine whether only Cao 靳宦 斗 bucket, $ narrow a '^> A new writer or reprogramming occurs where the writer fails (1)-100 new" or reprograms the (4)-page before this metapage. Preferably, even if the write failure does not occur in the (or) previous metapage, if t is overified

The (or other) previous metapage is also rewritten or reprogrammed. In the implementation of the two-page page in the J cycle, the -specific element; = the sorrow of the change is only in the next change; the hundred, ϋ take the page to complete the stylization. In this case, the CPU 12 will always return two meta-pages (that is, the meta-page and the previous one-hundreds, which are only written by the first one). It is reprogrammed, but for the 7G page, it will only reprogram the last page. , by indexing three or more of the RAM 12a, instead of two buffers, the upper reaches are extended to use three or more buffers to store context or security configuration information. And three or more, .^ corresponding to the beginning of the application of the logical block address of 70 pages. When the metapage is encrypted, the above-mentioned fall is suitable for borrowing. I 士 L丄, 诛作通合Write failed

', on the soil, before being written to the memory 20, #δ38 铖 穷 袓 袓 θ (, right decrypt BRAM trembles) the same process will apply. Although already by reference H99l0.doc -18- 200817993 "Hai sector, in order to add and rewrite the sector after the sector in this sector and the data stream to the memory 20. In this way, the system can avoid the necessity Encrypting the sectors in the metapage that precede the sector in which the writer failed. This improves efficiency. All of these and other variations are within the scope of the present invention. Instant data cryptographic processing to illustrate the present invention. The embodiment, but should be applied to the process of not implementing the instant data password processing in the process of writing a poor person. The embodiment refers to the various sizes of the (four) block-large and 7L pages processed by the engine. Various examples, but it should be understood that the same advantages will apply to data blocks and meta-pages processed by the engine 40 of different sizes. For some applications, when the illusion fails, the system may be expected to return, but not return to The beginning of the metapage where the write failed occurred, and This meta-page

While the invention has been described with reference to the embodiments of the present invention, it is understood that the invention may be modified and modified, and the scope of the invention is defined by the scope of the accompanying claims and their equivalents. . All references cited herein are incorporated by reference in their entirety. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram of a memory system in communication with a host device to illustrate the present invention. Figure 2 is a block diagram showing the CBC process of the present invention. 3 is a flow chart illustrating the operation of the system of FIG. 1 to write data to one of the storage devices to illustrate an embodiment of the present invention in which security configuration information is stored. Figure 4 is a flow chart illustrating an embodiment of the present invention, which illustrates the operation of the system in Figure 1 of 119910.doc -19-200817993, and the stored safety configuration information in the basin φ you κ ▲ The write operation of the failed data is reconfigured to retry the previous writing 0 for convenience of description, and the same components are marked by the same number in this application. Ο [Main component symbol description] 10 Memory system 10f Memory card or memory stick 12 CPU 12a CPU random access memory 12a (0) Buffer 12a (1) Buffer 14 Buffer management unit 16 Host interface module 18 Flash interface module 20 Flash memory 22 Peripheral access module 24 Host device 26 Host interface bus 26a 埠28 Flash interface bus 28a 埠32 Host direct memory access 34 Flash direct memory access 119910 .doc -20- 200817993

36 Arbiter 38 Buffer Random Access Memory 40 Encryption Engine 119910.doc -21 -

Claims (1)

200817993 X. Patent application scope · L; (4) Method for processing bedding in a memory system for storing encrypted data 'The memory system includes a plurality of non-volatile memory cells and a cryptographic circuit, The method includes: causing the circuit to bury a cryptographic block link to a data to be written into the data stream of the cells; U 写入When the data in the data stream is written to j, etc. in a number of sequential stylization cycles, the data in the data & is written to the cell, and the circuit is operated by a password. The block linking process processes the data; and during at least one of the stylized periods, storing the cycle for writing the data to the cell before the data is processed by the MM block link The information of the data is processed by the cipher block link so that the data can be written to the cells again after the discovery of the second write failure. 2. The method of claim 1, further comprising: detecting a failure in the process of writing the data processed by the cipher block link to the cells in the cycle; and, 1... stored > The data processed by the cipher block link is written to the cells. And "^ method of the member 2" further comprising causing the circuit to perform a cipher block linking process on the blame for writing to the cell failure, wherein the stored/stored information is obtained by the cipher block linking process Data, and then the data processed by the 忒I 块 code block link is written to the cells. 4 · If the request item 3 is ancient, earth, and the square, the written data will be in the at least one stylization cycle. _ σ — 枓 枓 枓 枓 枓 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 写入 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 The method, wherein the written data is written to the cells in the at least one program 5, wherein the data is stored in the wrong cell. The Hibe unit performs the security group bear information used in the cipher block link processing. The method of claim 5, wherein the security configuration information comprises a key, an addition, and/or one of the following: a message authentication code and an initial vector. The method of claim 6, further comprising: extracting the stored security group complaint message, the information including a message authentication code and/or an initial vector; and the message authentication code and/or captured by the Kang X 4 An initial vector obtains the latest message authentication code. 8. The method of claim 5, wherein during the mother of at least two consecutive stylized cycles, the storing the password is performed on the data unit storing the data unit before the data unit is written to the cell Security configuration information used for block link processing. 9. The method of claim 8, wherein the stored security configuration information includes positioning information for locating the data unit. 1. The method of claim 9, the method further comprising: fetching the at least one cipher block before writing the one or the other of the at least one cipher block link processing data unit to the cells Linking processing one or more portions of the data unit, wherein the writing writes data from the at least one cipher block linking processing early element and another unit to the cells during the at least one period, and wherein the detecting Detecting which data unit is detected in the (etc.) cache data unit and another unit to write 119910.doc 200817993 to the cell failure; and positioning the data in the form of using the positioning information before the cipher block link processing Writing a failed data unit, wherein the circuit causes the data unit to perform a cipher block linking process. The method of claim 10, wherein the processed data unit is a data unit whose one or more parts have been cached, and the method further comprises: causing the circuit to iiut the data to be 7L and the In the stream, before the unit and not yet completely written to the cell, the sigma 肥 肥 肥 所有 所有 所有 兀 兀 兀 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 12. The method of claim 11, wherein, further comprising deleting from the cells any cells not yet fully written to the cells, or marking the cells to be deleted. 13. A method for processing a bedding material in a memory system for storing encrypted data. The memory system includes a plurality of non-volatile memory cells and a cryptographic circuit, the method comprising: The circuit performs cipher block linking processing on the data in one of the data streams; > writes the data in the data stream to: i in a plurality of sequential materialization cycles so as to be in the data stream The data is processed by the circuit before being written to the cells; and during at least the period of the stylization period, the data is stored for at least part of the period before the data is written to the (four) cells. The information used in the post-code block linking process is implemented to find and write the cells after the tamper block linking process. After the failure, the poor material can be written again to 1199I0.doc 200817993 14 · a non-volatile memory cell for storing encrypted data; a circuit for one-to-block link processing; and a 5 memory system including : 5 Hai special cell: Cangdou Li ^ ^ Bessie flow in the poor material implementation password one controller 'With a number of smooth P, the flow of the cipher block link processing labor cycle 10 will come from at least the period of the staging period of the replenishment period f '., into the cell 'which is written in the material Into 兮 / b1, before the cipher block link processing resource is inserted into the 6 hai cell, the cryptographic block link processing the 资4 saves the period for the write 曰w. Advice, so that the feed can be rewritten to the cells after a write failure is found. 15. If the system of claim 14 is: ^ ψ, the controller in this period detects the failure of the data in the cipher block link processing data g A, 'the ten horses into the cells' The information stored in (4) is rewritten to the cells by the cipher block link processing data., #16: The system of the request item 15 is written to the data of the failed cells for cipher block link processing. After the controller causes the circuit to perform a secret block linking process on the data written to the failed cell, so that (4) the stored information is obtained to obtain the cipher block linking process (4), and the cipher block is processed again by the cipher block. 17. The system of claim 16, wherein the data is written to write a data unit to the cell in the at least one stylized cycle, wherein the controller is cryptographically in the data unit 18. The system of claim 16, wherein the data is written to write to a cell in the at least one stylized cycle, wherein the controller stores 119910.d 〇c 200817993 Save 4Before the implementation of the cryptographic block link processing security configuration resources, the system of the system 18, wherein the security configuration information includes the secret wheel, plus H method, and 7 or below - : message (4) code and - (4) vector. The item 19^ system, wherein the controller retrieves the stored security group Ή 'this information includes the message clock code and/or an initial vector, and according to the selected The message authentication code obtains the latest message clock code. ^ The system of claim 18, wherein during at least two consecutive stylized periods: - during the period of writing the data to the cells, the controller stores the The security configuration information used for the cipher block link processing is performed on the data unit. 1 The system of claim (4), wherein the stored security configuration information includes positioning information for locating the data unit. The system of claim 22, the system further comprising a memory for fetching the (partial) portion of the at least one cryptographic block link processing data unit prior to writing the one or more portions to the cell The controller is in Writing data to the at least one cipher block linking processing unit and another unit from the cryptographic block linking processing unit and the other unit during one less period and wherein the controller pours between the data unit cached by the (4) and the other _ unit Detecting the data unit that is written to the failed cell, and using the location information of the location information before the cipher block link processing, using the data unit of the location information, the substitute in the basin causes the circuit to wire the data unit 24. The method of claim 23, wherein the system of claim 23, wherein the data unit is one or more portions of which have been cached, and the controller makes the circuit 1199I0.doc 200817993 The cryptographic block linking process is performed on the data unit and all data units in the data stream that are in front of the unit and are not completely written to the four cells. 25·=Death: System of 24' where the controller removes from the order - :. The unit that the king writes to the cell of 'Hai' or the cell that is marked as to be deleted is a memory system for storing encrypted data, which includes: a non-volatile memory cell; a circuit, which writes to a ^ Cryptographic block link processing; data implementation in a trickle stream: a controller that writes at least one of the data processing cycles of the weight block link processing from the data stream to the (four) cell in a plurality of sequential stylization cycles, wherein In the program ^ ^ U control benefits before the data is written to the 4 cells to store this cycle s | ^ ^ ^ ' The father part of the data to implement the secret and the end: the information used in order to After being processed by the cipher block link, this data can be rewritten to the cells after the defeat. 0 119910.doc