WO2007098974A3 - Vorrichtung und verfahren zur ausgabe von unterschiedlichen bildern auf wenigstens zwei anzeigen - Google Patents

Vorrichtung und verfahren zur ausgabe von unterschiedlichen bildern auf wenigstens zwei anzeigen Download PDF

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Publication number
WO2007098974A3
WO2007098974A3 PCT/EP2007/050260 EP2007050260W WO2007098974A3 WO 2007098974 A3 WO2007098974 A3 WO 2007098974A3 EP 2007050260 W EP2007050260 W EP 2007050260W WO 2007098974 A3 WO2007098974 A3 WO 2007098974A3
Authority
WO
WIPO (PCT)
Prior art keywords
display units
different images
image data
control unit
synchronisation signal
Prior art date
Application number
PCT/EP2007/050260
Other languages
English (en)
French (fr)
Other versions
WO2007098974A2 (de
Inventor
Axel Kirschbaum
Markus Lindner
Simone Tonte
Original Assignee
Bosch Gmbh Robert
Axel Kirschbaum
Markus Lindner
Simone Tonte
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosch Gmbh Robert, Axel Kirschbaum, Markus Lindner, Simone Tonte filed Critical Bosch Gmbh Robert
Priority to EP07703803A priority Critical patent/EP1991924A2/de
Priority to CN2007800067438A priority patent/CN101390040B/zh
Priority to US12/224,076 priority patent/US8477080B2/en
Publication of WO2007098974A2 publication Critical patent/WO2007098974A2/de
Publication of WO2007098974A3 publication Critical patent/WO2007098974A3/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1431Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display using a single graphics controller
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006Details of the interface to the display terminal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/395Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Graphics (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Studio Circuits (AREA)

Abstract

Die Erfindung betrifft eine Vorrichtung zur Ausgabe von unterschiedlichen Bildern auf wenigstens zwei Anzeigen (11, 12), mit einer Steuereinheit (30) zum Auslesen von Bilddaten der unterschiedlichen Bilder aus einem Bildspeicher (32), zum Erzeugen eines horizontalen Synchronisationssignals und zur Ausgabe der Bilddaten und des horizontalen Synchronisationssignals, und mit einer Verarbeitungseinheit (50) zum Empfangen der Bilddaten und des horizontalen Synchronisationssignals, zum Erzeugen von weiteren Synchronisationssignalen jeweils für eine der wenigstens zwei Anzeigen in Abhängigkeit von dem von der Steuereinheit gelieferten Synchronisationssignal und einem Taktsignal und zum Aufteilen der von der Steuereinheit übertragenen Bilddaten derart, dass die Bilddaten der unterschiedlichen Bilder jeweils an eine der Anzeigen ausgegeben werden.
PCT/EP2007/050260 2006-02-27 2007-01-11 Vorrichtung und verfahren zur ausgabe von unterschiedlichen bildern auf wenigstens zwei anzeigen WO2007098974A2 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP07703803A EP1991924A2 (de) 2006-02-27 2007-01-11 Vorrichtung und verfahren zur ausgabe von unterschiedlichen bildern auf wenigstens zwei anzeigen
CN2007800067438A CN101390040B (zh) 2006-02-27 2007-01-11 在至少两个显示器上输出不同的图像的装置和方法
US12/224,076 US8477080B2 (en) 2006-02-27 2007-01-11 Device and method for outputting different images on at least two display units

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102006009010.1 2006-02-27
DE102006009010A DE102006009010A1 (de) 2006-02-27 2006-02-27 Vorrichtung und Verfahren zur Ausgabe von unterschiedlichen Bildern auf wenigstens zwei Anzeigen

Publications (2)

Publication Number Publication Date
WO2007098974A2 WO2007098974A2 (de) 2007-09-07
WO2007098974A3 true WO2007098974A3 (de) 2008-04-17

Family

ID=38319880

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2007/050260 WO2007098974A2 (de) 2006-02-27 2007-01-11 Vorrichtung und verfahren zur ausgabe von unterschiedlichen bildern auf wenigstens zwei anzeigen

Country Status (5)

Country Link
US (1) US8477080B2 (de)
EP (1) EP1991924A2 (de)
CN (1) CN101390040B (de)
DE (1) DE102006009010A1 (de)
WO (1) WO2007098974A2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102044220A (zh) * 2009-10-09 2011-05-04 深圳市长运通集成电路设计有限公司 一种液晶显示装置的驱动方法
KR20120018539A (ko) * 2010-08-23 2012-03-05 삼성전자주식회사 복수 개의 표시 패널을 가지는 표시부 제어 방법 및 이를 기반으로 운용되는 휴대 단말기
US8467994B2 (en) * 2010-09-28 2013-06-18 General Electric Company Monitoring system and display for use in a monitoring system
US8704732B2 (en) 2010-09-29 2014-04-22 Qualcomm Incorporated Image synchronization for multiple displays
US9088750B2 (en) * 2012-07-25 2015-07-21 Omnivision Technologies, Inc. Apparatus and method for generating picture-in-picture (PIP) image
CN103092100B (zh) * 2013-01-10 2015-03-11 湘潭大学 一种同步采集数据和多画面显示的控制与显示装置
US9761028B2 (en) * 2013-02-13 2017-09-12 Konica Minolta Laboratory U.S.A., Inc. Generation of graphical effects
JP6881950B2 (ja) * 2016-11-10 2021-06-02 キヤノン株式会社 画像処理装置、画像処理装置の制御方法、及びプログラム
CN113838438B (zh) * 2021-09-01 2022-08-26 深圳市思坦科技有限公司 一种拼屏的数据处理方法、系统、电子装置及存储介质

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998025200A1 (de) * 1996-12-03 1998-06-11 Spea Software Gmbh Ansteuerung von zwei monitoren mit anzeigedatenübertragung via fifo-puffer

Family Cites Families (9)

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Publication number Priority date Publication date Assignee Title
US6215459B1 (en) * 1993-10-01 2001-04-10 Cirrus Logic, Inc. Dual display video controller
CN1091899C (zh) * 1997-03-20 2002-10-02 明碁电脑股份有限公司 显示器模式校正方法及装置
US6188381B1 (en) * 1997-09-08 2001-02-13 Sarnoff Corporation Modular parallel-pipelined vision system for real-time video processing
US7221381B2 (en) * 2001-05-09 2007-05-22 Clairvoyante, Inc Methods and systems for sub-pixel rendering with gamma adjustment
US7451410B2 (en) * 2002-05-17 2008-11-11 Pixel Velocity Inc. Stackable motherboard and related sensor systems
JP2004233743A (ja) * 2003-01-31 2004-08-19 Renesas Technology Corp 表示駆動制御装置および表示装置を備えた電子機器
TWI280498B (en) * 2003-10-28 2007-05-01 Via Tech Inc Combined output driver
KR101001966B1 (ko) * 2004-01-07 2010-12-20 삼성전자주식회사 표시장치 및 이의 제조방법
US20060095617A1 (en) * 2004-10-30 2006-05-04 Tsung-Yung Hung Processing architecture for directly playing audio/video signal

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998025200A1 (de) * 1996-12-03 1998-06-11 Spea Software Gmbh Ansteuerung von zwei monitoren mit anzeigedatenübertragung via fifo-puffer

Also Published As

Publication number Publication date
EP1991924A2 (de) 2008-11-19
WO2007098974A2 (de) 2007-09-07
DE102006009010A1 (de) 2007-08-30
CN101390040A (zh) 2009-03-18
US20100194666A1 (en) 2010-08-05
CN101390040B (zh) 2012-05-30
US8477080B2 (en) 2013-07-02

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