WO2007072375A2 - Procede de fabrication d'un composant microelectronique, au moins un enroulement electriquement conducteur etant dispose autour d'un element de noyau en ferrite - Google Patents
Procede de fabrication d'un composant microelectronique, au moins un enroulement electriquement conducteur etant dispose autour d'un element de noyau en ferrite Download PDFInfo
- Publication number
- WO2007072375A2 WO2007072375A2 PCT/IB2006/054885 IB2006054885W WO2007072375A2 WO 2007072375 A2 WO2007072375 A2 WO 2007072375A2 IB 2006054885 W IB2006054885 W IB 2006054885W WO 2007072375 A2 WO2007072375 A2 WO 2007072375A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- core element
- electrically conductive
- wire
- substrate
- microelectronic device
- Prior art date
Links
- 238000004377 microelectronic Methods 0.000 title claims abstract description 88
- 238000000034 method Methods 0.000 title claims abstract description 70
- 238000004804 winding Methods 0.000 title claims abstract description 40
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 29
- 229910000859 α-Fe Inorganic materials 0.000 title claims description 7
- 239000000758 substrate Substances 0.000 claims abstract description 82
- 238000005452 bending Methods 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims description 25
- 239000012777 electrically insulating material Substances 0.000 claims description 7
- 238000003631 wet chemical etching Methods 0.000 claims description 6
- 241000826860 Trapezium Species 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 239000004593 Epoxy Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000011324 bead Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F17/0033—Printed inductances with the coil helically wound around a magnetic core
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/041—Printed circuit coils
- H01F41/046—Printed circuit coils structurally combined with ferromagnetic material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/2804—Printed windings
- H01F2027/2814—Printed windings with only part of the coil or of the winding in the printed circuit board, e.g. the remaining coil or winding sections can be made of wires or sheets
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/08—Magnetic details
- H05K2201/083—Magnetic materials
- H05K2201/086—Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/222—Completing of printed circuits by adding non-printed jumper connections
Definitions
- the present invention relates to a method for manufacturing a microelectronic device having a core element and at least one electrically conductive winding arranged around the core element.
- a well-known example of such a microelectronic device is a transformer comprising a core element and at least one coil having electrically conductive wires which are wound around the core element.
- the core element In many microelectronic devices having a core element and at least one coil, it is advantageous for the core element to have no free ends and to be shaped like a closed ring, for example. However, in miniaturized devices, it is difficult to manipulate the wires of the coil in the space enclosed by the core element. According to the state of the art, a solution is found in providing at least two pieces of the core element, wherein the pieces are joined after the wires have been wound around one of the pieces.
- US 6 741 155 discloses a transformer and a method for manufacturing the transformer.
- the core element comprises a cylindrical part and two E-type parts having a cylindrical middle leg.
- the transformer comprises two primary coils and one secondary coil, wherein each coil is realized as a sheet coil printed on a substrate having a hole.
- the process of assembling the transformer comprises the steps of placing the cylindrical part of the core element in the hole of the substrate having the secondary coil; wrapping this substrate and the cylindrical core part with an insulating sheet; arranging the whole of the substrate having the secondary coil, the cylindrical core part and the insulating sheet between the substrates having the primary coils; and sandwiching the cylindrical core part and the substrate having the secondary coil by facing ends of the cylindrical middle legs of the E-type core parts, through the insulating sheet.
- the objective is achieved by a method comprising the following steps: providing a substrate having a supporting surface and a pattern of electrically conductive elements which are arranged on the supporting surface, wherein the pattern comprises at least one track; providing a core element; providing at least one electrically conductive wire; bending the wire to a loop; and connecting the wire to the track of the electrically conductive pattern of the substrate, wherein the core element is arranged between the track and the wire.
- the at least one winding of the microelectronic device is realized on the basis of at least one track provided on a substrate and at least one loop-shaped wire connected to the track.
- the loop-shape of the wire it is noted that it is possible for the wire to be bent to a loop prior to being positioned with respect to the supporting surface of the substrate and being connected to the track.
- the wire is more or less automatically bent to a loop in the process of connecting the ends of the wire to the track.
- the coil is obtained by providing a substrate having an electrically conductive pattern which comprises a number of tracks extending next to each other, and connecting a number of electrically conductive wires to the tracks in order to form the at least one coil, wherein each wire is connected to two different tracks by connecting one end portion of the wire to one of the tracks and connecting another end portion of the wire to another of the tracks.
- the at least one coil is obtained in a simple manner, namely providing a number of tracks and wires, and connecting the ends of each wire to different tracks.
- the present invention offers a possibility of obtaining at least two coils extending in the same line, namely by connecting each wire to tracks between which at least one other track is extending.
- the substrate does not need to be part of the microelectronic device.
- the method according to the present invention may comprise further steps, namely steps of applying material to the supporting surface of the substrate and of partially removing the substrate.
- the step of applying material to the supporting substrate may be carried out by using any suitable type of known technique, for example a technique known as overmolding.
- the material which is applied for covering the supporting surface and everything that is arranged on this surface may be any suitable material, and may comprise epoxy.
- the step of partially removing the substrate may also be carried out by using any suitable type of known technique, for example wet chemical etching. This is especially applicable in case the substrate comprises a metal such as copper.
- a shape of the circumference of the cross-section of the core element is adapted to the shape of the loop of the at least one wire, so that the at least one wire may extend at a relatively short distance from the core element, and a relatively good magnetic coupling between the winding and the core element is obtained.
- the cross-section of the core element may be shaped like a trapezium, for example.
- the core element comprises ferrite.
- the core element comprises studs, by means of which the core element is placed on the supporting surface.
- the core element comprises studs, by means of which the core element is placed on the supporting surface.
- the at least one electrically conductive wire which is applied in the process of manufacturing the at least one winding of the microelectronic device may be provided with an insulating layer, but this is not necessary.
- a number of wires is applied, and the wires are not insulated, it is important to take measures aimed at preventing the creation of short circuits.
- a practical measure involves coating at least the portion of the core element that is intended to be arranged inside the coil with electrically insulating material. In this manner, the wires are prevented from touching each other electrically.
- the core element is positioned between the at least one track and the at least one wire, prior to the step in which the track and the wire are connected to each other for the purpose of forming at least one winding. Therefore, it is possible for the core element to consist of only one piece, and to have any suitable shape, for example the shape of a fully closed ring.
- microelectronic device in case the microelectronic device is provided with a microelectronic element such as a controller die or the like, such microelectronic element is placed on the supporting surface of the substrate and is connected to the electrically conductive pattern of the substrate.
- a microelectronic element such as a controller die or the like
- the wire is connected to the track by means of wirebonding.
- the core element is positioned on the track first, while leaving end portions of the track uncovered.
- the wire is arranged over the core element, and the wire is connected to the track by means of wirebonding.
- the substrate is a layered substrate, which comprises a top layer of tracks arranged on the supporting surface and at least one embedded layer of tracks arranged below the level of the supporting surface, and wherein the embedded tracks are accessible from the side of the supporting surface.
- the wire is provided on a carrier, which is bent to a loop along with the wire, and which is at least partially removed after the wire has been connected to the track.
- the carrier may comprise any suitable material, and may be at least partially removed in any suitable way.
- the carrier comprises aluminum, and the carrier is at least partially removed by wet chemical etching.
- This member may comprise any suitable electrically insulating material that is applied to the wires. With a carrier being present, it is very easy to perform this application of material to the wires.
- the carrier having the wire may be obtained in various manners. For example, a sheet being covered with electrically conductive wires is provided, wherein the carrier is obtained by cutting off a piece of this sheet.
- the carrier may be provided as part of a larger sheet carrying groups of electrically conductive wires.
- the desired loop-shape of the wire may easily be obtained by partially cutting out portions of the sheet carrying the wires, and bending these portions with respect to the sheet.
- the present invention also relates to a microelectronic device which is obtained by carrying out the above-described method, in particular a microelectronic device comprising a core element and at least one electrically conductive winding arranged around the core element, wherein the core element consists of only one piece, and wherein the winding comprises at least two interconnected pieces.
- the microelectronic device according to the present invention may be any microelectronic device having a core element and at least one electrically conductive winding arranged around the core element.
- the microelectronic device may be an inductor or a transducer which is suitable to be used for suppressing unwanted signals in data lines or for converting voltages.
- the microelectronic device may be an antenna, an integrated device such as a USB protection device, an interconnect clip for power semiconductors, or a bio-sensing device. Numerous applications for the microelectronic element exist, for example in mobile phones, digital cameras, computers and MP3 players.
- the present invention also relates to a method for manufacturing a microelectronic device having at least one electrically conductive winding, comprising the following steps: providing a substrate having a supporting surface and a pattern of electrically conductive elements which are arranged on the supporting surface, wherein the pattern comprises at least one track; providing a carrier and at least one electrically conductive wire which is arranged on the carrier; bending the carrier to a loop, wherein the wire is bent to a loop along with the carrier; - connecting the wire to the track of the electrically conductive pattern of the substrate; and at least partially removing the carrier after the connection between the wire and the track has been established.
- This method is especially suitable to be applied in case of manufacturing a microelectronic device having at least one electrically conductive winding, wherein a core element is omitted.
- providing on a carrier the at least one electrically conductive wire which is applied in the process of forming the at least one electrically conductive winding; and at least partially removing the carrier when the connection between the wire and the track has been established is an advantageous option, as the use of the carrier allows for accurate and easy positioning of the wire, even with a core element being absent.
- a microelectronic device that may very well be manufactured in the above-described manner is a bio-sensing device, in particular a bio-sensing device in which electrically conductive wires above surfaces are needed.
- a bio-sensing device in particular a bio-sensing device in which electrically conductive wires above surfaces are needed.
- GMR Global Magnetic Resistive
- FIGs. 1-9 illustrate successive steps of a first preferred way of carrying out the method for manufacturing a microelectronic device according to the present invention
- Figs. 10-14 illustrate an alternative way of providing wires which are used in the first preferred process of manufacturing the microelectronic device
- Fig. 15 illustrates an alternative way of providing core elements which are used in the first preferred process of manufacturing the microelectronic device
- FIGs. 16-19 illustrate successive steps of a second preferred way of carrying out the method for manufacturing a microelectronic device according to the present invention
- Fig.20 diagrammatically shows a bottom view and a side view of a preferred embodiment of the core element which is used in the second preferred process of manufacturing the microelectronic device;
- Fig. 21 diagrammatically shows elements of a microelectronic device according to the present invention having two separate coils.
- Figs. 22 and 23 diagrammatically show a sectional view of a layered substrate, a core element and wires which are used in a third preferred process of manufacturing the microelectronic device.
- Figs. 1-9 illustrate successive steps of a first preferred way of carrying out the method for manufacturing a microelectronic device 1 according to the present invention.
- a substrate 10 having a supporting surface 11 and a pattern 12 of electrically conductive elements which are arranged on the supporting surface 11 is provided.
- the substrate 10 comprises copper
- the electrically conductive pattern 12 comprises gold-plated copper.
- other suitable materials are feasible.
- the electrically conductive pattern 12 comprises a number of relatively large connection pads 13, a number of relatively small connection pads 14, and a number of coil tracks 15 extending next to each other.
- the coil tracks 15 are arranged at a relatively small distance with respect to each other, none of the coil tracks 15 contacts another of the coil tracks 15.
- a carrier 20 supporting a number of electrically conductive wires 21 is provided.
- the wires 21 extend parallel with respect to each other, which is the case in the example as shown.
- a suitable material for the carrier 20 is aluminum. In any case, it is preferred for the carrier 20 to comprise another material than the substrate 10.
- Fig. 2 illustrates how the carrier 20 and the wires 21 may initially be part of a larger sheet 25.
- the carrier 20 is obtained by cutting off a piece of the larger sheet 25.
- Fig. 2 illustrates how the carrier 20 and the wires 21 are bent in order to obtain a loop-shape. In the process, end portions 22 of the wires 21 and underlying end portions 23 of the carrier 20 are bent outwardly with respect to the loop.
- a core element 30 is provided.
- a suitable material for the core element 30 is ferrite.
- the core element 30 is shaped like a fully closed ring. Within the scope of the present invention, the core element 30 may have another suitable shape.
- the core element 30 is placed on the substrate 10, such that substantial parts of the coil tracks 15 are covered by the core element 30, wherein only end portions 16 of the coil tracks 15 are left free, on both sides of the core element 30.
- the carrier 20 having the wires
- each of the end portions 22 of each wire 21 is connected to another coil track 15.
- the end portions 22 of each wire 21 are connected to adjacent coil tracks 15, so that a single coil 35 is obtained on the basis of the interconnected coil tracks 15 and wires 21.
- the carrier 20 is selectively removed by wet chemical etching.
- quantities of electrically insulating material are applied to the wires 21 such as to form members 24 for supporting and spacing the wires 21.
- the members 24 are shown in the illustration of the whole of the electrically conductive pattern 12, the core element 30 and the coil 35 as given by Fig. 6.
- a microelectronic element 40 such as a controller die is provided.
- the microelectronic element 40 is arranged in the space enclosed by the core element 30, and is connected to the relatively small connection pads 14 of the electrically conductive pattern 12 of the substrate 10.
- a seventh step which is illustrated by Fig. 8, material is applied to the supporting surface 11 of the substrate 10.
- This step may be carried out in any suitable manner, for example by applying a technique known as overmolding.
- the material may be any suitable type of material, for example epoxy.
- the core element 30, the wires 21 and the microelectronic element 40 are embedded in the material, and a robust package is obtained.
- the substrate 10 is removed by wet chemical etching.
- the microelectronic device 1 as illustrated by Fig. 9 is obtained, which is a ready-to-use product that is connectable to another electronic device through the electrically conductive pattern 12.
- the dimensions of the microelectronic device 1 such as illustrated by Fig. 9 may be in the millimeter range.
- the length en the width of the device 1 may be about 3 mm, while the height of the device 1 may be about 0.7 mm.
- many alternatives to the above- described process and microelectronic device 1 exist.
- Figs. 10-14 illustrate an alternative way of providing the wires 21.
- Figs. 10-14 pertain to manufacturing an array of microelectronic devices 1.
- a sheet 26 carrying groups 27 of electrically conductive wires 21 is shown.
- Each group 27 of wires 21 is intended to be part of a microelectronic device 1.
- the sheet 26 may be regarded as a collection of interconnected carriers 20. Therefore, the sheet 26 will be referred to as carrier sheet 26.
- the carrier sheet 26 is put on top of a sheet 17 comprising an array of substrates 10 and core elements 30.
- a sheet 17 which will be referred to as substrate sheet 17, is shown in Fig. 12.
- the carrier sheet 26 is arranged on the substrate sheet 17 in such a way that a portion of each core element 30 is received between the leg portions 28 of a group 27 of wires 21, and that the end portions 16 of the coil tracks 15 of each substrate 10 are in contact with the end portions 22 of the wires 21.
- Fig. 13 provides an illustration of this situation.
- Fig. 15 illustrates an alternative way of providing the core elements 30 in the above-described case of manufacturing an array of microelectronic devices 1.
- the core elements 30 may be arranged on the carrier sheet 26 first.
- Figs. 16-19 illustrate successive steps of a second preferred way of carrying out the method for manufacturing a microelectronic device 2 according to the present invention.
- a substrate 10 having a supporting surface 11 and a pattern 12 of electrically conductive elements which are arranged on the supporting surface 11 is provided.
- the substrate 10 comprises copper
- the electrically conductive pattern 12 comprises gold-plated copper.
- the electrically conductive pattern 12 comprises a number of connection pads 13, a number of connection tracks 18 being connected to the connection pads 13, and a number of coil tracks 15 extending next to each other.
- the coil tracks 15 are extending substantially parallel with respect to each other, wherein none of the coil tracks 15 contacts another of the coil tracks 15.
- a microelectronic element 40 such as a silicon die is provided.
- the microelectronic element 40 is arranged on the supporting surface 11 of the substrate 10.
- any suitable known technique may be applied, for example a technique known as flip chip, which is suitable to be used for the purpose of connecting the microelectronic element 40 to the connection tracks 18.
- an under fill may be provided.
- a core element 30 is provided and placed on the substrate 10.
- a suitable material for the core element 30 is a material known as ferroxcube.
- the core element 30 is shaped like a fully closed ring.
- the core element 30 may have another suitable shape, although the ring-shape is advantageous in view of the performance of the microelectronic device 2.
- two coils 35, 36 are obtained by providing wires 21 and connecting end portions 22 of the wires 21 to the end portions 16 of the coil tracks 15 by means of wirebonding. It is noted that the coil tracks 15 and the wires 21 are not extending parallel with respect to each other, otherwise one wire 21 would only be connected to one coil track 15, and no coils 35, 36 would be obtained. Instead, each of the end portions 22 of each wire 21 is connected to another coil track 15.
- each wire 21 are connected to coil tracks 15 between which another coil track 15 is extending, so that two coils 35, 36 are obtained on the basis of the interconnected coil tracks 15 and wires 21, wherein the windings 37 of the coils 35, 36 are alternating with each other.
- the wirebonding technique may also be applied for the purpose of establishing connections between the microelectronic element 40 and the connection tracks 18.
- microelectronic device 2 After the fourth step has been carried out, all functional elements of the microelectronic device 2 are put in place and are interconnected in the proper manner.
- the microelectronic device 2 may be finished in subsequent steps of applying material to the supporting surface 11 of the substrate 10 for the purpose of enclosing and protecting the functional elements of the microelectronic device 2; and removing the substrate 10.
- At least a portion of the core element 30 that is intended to be positioned inside the coils 35, 36 is coated with an electrically insulating material.
- the coating may be omitted in case the wires 21 are electrically insulated.
- the core element 30 comprises studs 31 which are arranged at a bottom side of the core element 30, i.e. the side facing the supporting surface 11 of the substrate 10 when the core element 30 has been put in place on the substrate 10.
- Fig. 20 diagrammatically shows a bottom view and a side view of a core element 30 having such studs 31.
- a microelectronic device 1 , 2 having a core element 30 and at least one coil 35, 36 arranged around the core element 30 is manufactured.
- the core element 30 is put in place prior to closing the windings 37 of the coil 35, 36, wherein it is possible for the core element 30 to consist of only one piece and have a closed shape such as a ring-shape.
- the windings 37 of the coils 35, 36 may be located next to each other, wherein the coils 35, 36 are extending in the same line, but the coils 35, 36 may also be extending at different locations.
- elements of a microelectronic device having a ring- shaped core element 30 and two coils 35, 36 are shown, wherein the coils 35, 36 are arranged around different parts of the core element 30.
- Figs. 22 and 23 diagrammatically show a sectional view of a layered substrate 10, a core element 30 and wires 21 which are used in a third preferred process of manufacturing the microelectronic device.
- the layered substrate 10 comprises a top layer of electrically conductive tracks 15a which are arranged on the supporting surface 11 of the substrate 10.
- the layered substrate 10 comprises an intermediate layer of electrically conductive tracks 15b and a bottom layer of electrically conductive tracks 15 c, which are both arranged underneath the supporting surface 11 of the substrate 10.
- both the intermediate layer of tracks 15b and the bottom layer of tracks 15c are accessible from the side of the supporting surface 11, through electrically conductive connection elements 19.
- the layered substrate 10 is not removed.
- the layered substrate 10 comprises a material known as PCB.
- Groups of wires 21a, 21b, 21c are provided, which are connected to the tracks 15a, 15b, 15c of every layer. In this way, multiple-layered windings 37 of the at least one coil 35, 36 are realized.
- the substrate 10 comprises three layers of tracks 15a, 15b, 15c, windings 37 having three layers are obtained.
- a preferred configuration is a configuration in which the loops of the wires 21 are as close as possible to the core element 30.
- an advantageous option is illustrated, namely an option according to which the cross-section of the core element 30 has the shape of a trapezium.
- the bottom side of the core element 30 has larger dimensions than a top side of the core element 30, so that the cross-section of the core element 30 has a tapering appearance.
- a method for manufacturing a microelectronic device 1 , 2 comprises the steps of providing a substrate 10 having a supporting surface 11 and a pattern 12 of electrically conductive elements which are arranged on the supporting surface 11, wherein the pattern 12 comprises at least one track 15; providing at least one electrically conductive wire 21; bending the wire 21 to a loop; and connecting the wire 21 to the track 15 of the electrically conductive pattern 12 of the substrate 10.
- an electrically conductive winding 37 is obtained.
- a number of tracks 15 and a number of wires 21 are provided, a number of windings 37 or at least one coil 35, 36 having a number of windings 37 may be obtained, wherein end portions 22 of each wire 21 are connected to different tracks 15.
- a core element 30 is provided and arranged inside the at least one winding 37, prior to the at least one wire 21 being connected to the at least one track 15, wherein this element 30 may be shaped like a ring or the like and still be provided as a single piece, due to the fact that the realization of the at least one winding 37 and the arrangement of the winding 37 around the core element 30 involves putting together parts 15, 21 of the winding 37 instead of putting together parts of the core element 30.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Coils Or Transformers For Communication (AREA)
- Manufacturing Cores, Coils, And Magnets (AREA)
Abstract
L'invention concerne un procédé de fabrication d'un composant microélectronique qui comprend les étapes consistant à procurer un substrat (10) comportant une surface de support (11) et un motif d'éléments électriquement conducteurs qui sont disposés sur la surface de support (11), le motif comprenant au moins une piste ; à procurer au moins un fil électriquement conducteur (21) ; à cintrer le fil (21) en une boucle et à relier le fil (21) à la piste du motif électriquement conducteur du substrat (10). Sur la base de la piste et du fil (21), un enroulement électriquement conducteur est obtenu. Dans le cas où un certain nombre de pistes et où un certain nombre de fils (21) sont prévus, on peut obtenir au moins une bobine (35) comportant un certain nombre d'enroulements. En outre, un élément de noyau (30) est prévu et disposé à l'intérieur du ou des enroulements, cet élément (30) pouvant être façonné comme un anneau ou autre et être encore fourni comme pièce unique.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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EP05112774 | 2005-12-22 | ||
EP05112774.4 | 2005-12-22 |
Publications (2)
Publication Number | Publication Date |
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WO2007072375A2 true WO2007072375A2 (fr) | 2007-06-28 |
WO2007072375A3 WO2007072375A3 (fr) | 2007-11-01 |
Family
ID=38187869
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2006/054885 WO2007072375A2 (fr) | 2005-12-22 | 2006-12-15 | Procede de fabrication d'un composant microelectronique, au moins un enroulement electriquement conducteur etant dispose autour d'un element de noyau en ferrite |
Country Status (1)
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WO (1) | WO2007072375A2 (fr) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3016067A1 (de) * | 1980-04-25 | 1981-10-29 | Siemens AG, 1000 Berlin und 8000 München | Hybridschaltung und verfahren zu deren herstellung |
US4975671A (en) * | 1988-08-31 | 1990-12-04 | Apple Computer, Inc. | Transformer for use with surface mounting technology |
EP0481755A2 (fr) * | 1990-10-16 | 1992-04-22 | Vlt Corporation | Structures d'emoulements électromagnétiques, et procédés pour la fabrication de structures électromagnétiques |
WO1998034287A1 (fr) * | 1997-02-03 | 1998-08-06 | University Of Utah Research Foundation | Elements inductifs integres sans trous d'interconnexions pour des applications electromagnetiques |
WO1998056016A1 (fr) * | 1997-06-02 | 1998-12-10 | Vacuumschmelze Gmbh | Composant inductif |
US20020093413A1 (en) * | 1994-06-02 | 2002-07-18 | Ryu Shin'ei | Inductor, transformer and manufacturing method thereof |
-
2006
- 2006-12-15 WO PCT/IB2006/054885 patent/WO2007072375A2/fr active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3016067A1 (de) * | 1980-04-25 | 1981-10-29 | Siemens AG, 1000 Berlin und 8000 München | Hybridschaltung und verfahren zu deren herstellung |
US4975671A (en) * | 1988-08-31 | 1990-12-04 | Apple Computer, Inc. | Transformer for use with surface mounting technology |
EP0481755A2 (fr) * | 1990-10-16 | 1992-04-22 | Vlt Corporation | Structures d'emoulements électromagnétiques, et procédés pour la fabrication de structures électromagnétiques |
US20020093413A1 (en) * | 1994-06-02 | 2002-07-18 | Ryu Shin'ei | Inductor, transformer and manufacturing method thereof |
WO1998034287A1 (fr) * | 1997-02-03 | 1998-08-06 | University Of Utah Research Foundation | Elements inductifs integres sans trous d'interconnexions pour des applications electromagnetiques |
WO1998056016A1 (fr) * | 1997-06-02 | 1998-12-10 | Vacuumschmelze Gmbh | Composant inductif |
Also Published As
Publication number | Publication date |
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WO2007072375A3 (fr) | 2007-11-01 |
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