WO2007060739A1

WO2007060739A1 - Plasma display device and method of driving plasma display panel

Info

Publication number: WO2007060739A1
Application number: PCT/JP2005/021759
Authority: WO
Inventors: Yuuka Kobayashi; Takashi Sasaki
Original assignee: Fujitsu Hitachi Plasma Display Limited
Priority date: 2005-11-28
Filing date: 2005-11-28
Publication date: 2007-05-31
Also published as: JPWO2007060739A1

Abstract

A plasma display device is provided with a first transparent electrode (12a), a first metallic electrode (11) disposed in parallel with the first transparent electrode (12a), a second transparent electrode (14a), a second metallic electrode (13) disposed in parallel with the second transparent electrode (14a)and a driving circuit. The first metallic electrode (11) is connected to the first transparent electrode (12a) and a gap is defined between the first metallic electrode (11) and the first transparent electrode (12a). The second metallic electrode (13) is connected to the second transparent electrode (14a) and a gap is defined between the second metallic electrode (13) and the second transparent electrode (14a). A first electrode includes the first transparent electrode (12a) and the first metallic electrode (11) while a second electrode includes the second transparent electrode (14) and the second metallic electrode (13). The driving circuit applies at least two kind of maintaining-discharge voltages between the first and second electrodes to create regions where at least two maintaining discharges expand.

Description

Specification

TECHNICAL FIELD The present invention relates to a plasma display device and a plasma display panel driving method.

The present invention relates to a plasma display device and a plasma display panel driving method.

Background art

[0002] In order to set power consumption to a predetermined value, a plasma display device controls the number of sustain discharge pulses in accordance with a display load factor. Each subfield is set to a predetermined pulse number ratio, and this luminance ratio cannot be maintained at a predetermined value when the total number of force pulses configured so that the luminance ratio becomes a predetermined value changes. In general, the number of sustain discharges is controlled to change the luminance, but there is also a method of changing the brightness of one sustain discharge itself (see Patent Document 1).

In a plasma display device, it is desired to reduce power consumption. In addition, in a plasma display device, display with high luminance is desired.

[0004] Patent Document 1: Japanese Patent No. 3499058

Disclosure of the invention

[0005] An object of the present invention is to provide a plasma display device capable of performing display with low power or display with high luminance.

[0006] According to one aspect of the present invention, a first transparent electrode and a first transparent electrode that are arranged in parallel with the first transparent electrode, are connected to the first transparent electrode, and have a gap. A first metal electrode, a second transparent electrode, a second metal electrode arranged in parallel to the second transparent electrode, connected to the second transparent electrode and having a gap, and At least two types of sustain discharge voltages are provided between the first transparent electrode and the first electrode including the first metal electrode and the second electrode including the second transparent electrode and the second metal electrode. There is provided a plasma display device characterized by having a drive circuit having a region where at least two types of sustain discharge spread by applying.

Brief Description of Drawings FIG. 1 is a plan view showing a structural example of a plasma display panel according to an embodiment of the present invention.

FIG. 2 is an exploded partial perspective view showing a structure example of a plasma display panel.

FIG. 3 is a diagram showing a configuration example of a plasma display device.

FIG. 4 is a diagram showing a configuration example of one field of an image.

FIG. 5 is a diagram showing an example of a voltage waveform of the plasma display device.

FIG. 6 is a diagram showing a middle-range discharge region.

FIG. 7 is a diagram showing a wide discharge region.

FIG. 8 is a waveform diagram of three types of sustain discharge pulses, the X electrode voltage and the Y electrode voltage during the sustain discharge period.

FIG. 9 is a graph showing the relationship between display load factor and luminance.

FIG. 10 is a cross-sectional view of the front glass substrate.

FIG. 11 is a partially enlarged view of the front glass substrate of FIG.

FIG. 12 is a graph showing the relationship between sustain discharge pulse voltage and luminance.

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 3 is a diagram showing a configuration example of an AC plasma display device having a three-electrode structure according to an embodiment of the present invention. The selection means 300 is an operator such as a switch, for example, and selects one of a low power mode (energy saving mode), a standard mode, and a high luminance mode by a user operation. The power supply circuit 8 supplies a power supply voltage to the control circuit 7. The control circuit 7 inputs the mode selected by the selection means 300 and controls the X drive circuit (sustain drive circuit) 4, the Y drive circuit (scan drive circuit) 5, and the address drive circuit 6. The X drive circuit 4 supplies a predetermined voltage to a plurality of X electrodes (sustain electrodes) XI, X2,. Hereinafter, each of the X electrodes XI, X2,... Or their generic name is referred to as an X electrode X. The Y drive circuit 5 supplies a predetermined voltage to a plurality of Y electrodes (scanning electrodes) Yl, Y2,. Hereinafter, each of the Y electrodes Yl, Y2,... Or their generic name is referred to as a Y electrode Y. The address drive circuit 6 supplies a predetermined voltage to the plurality of address electrodes Al, A2,. Hereinafter, each of the address electrodes Al, A2,... Or their generic name is referred to as an address electrode A. This three-electrode structure has an address electrode A, an X electrode X, and a Y electrode Y. [0009] In the plasma display panel 3, X electrodes X and Y electrodes Y form rows extending in parallel in the horizontal direction, and address electrodes A form columns extending in the vertical direction. The address electrode A is arranged so as to intersect the X electrode X and the Y electrode Y. X electrode X and Y electrode Y are alternately arranged in the vertical direction. Y electrode Yi and address electrode Aj form a two-dimensional matrix of i rows and j columns. The display cell C11 is formed by the intersection of the Y electrode Y1 and the address electrode A1, and the corresponding X electrode XI corresponding thereto. This display cell C11 corresponds to a pixel. With this two-dimensional matrix, the plasma display panel 3 can display a two-dimensional image.

FIG. 2 is an exploded partial perspective view showing a structural example of the plasma display panel 3 of FIG. The X electrode 11 is a bus electrode (metal electrode), and the X electrodes 12a and 12b are transparent electrodes. The set of X electrodes 11, 12a and 12b corresponds to one X electrode X in FIG. 3, and the same voltage is applied. The bus electrode has a lower electrical resistance value than the transparent electrode. The Y electrode 13 is a bus electrode, and the Y electrodes 14a and 14b are transparent electrodes. The set of Y electrodes 13, 14a and 14b corresponds to one Y electrode Y in FIG. 3, and the same voltage is applied. The address electrode 17 corresponds to the address electrode A in FIG.

[0011] The X electrodes 11, 12a, 12b and the Y electrodes 13, 14a, 14b are formed on the front glass substrate 1. On top of that, a dielectric layer 15 for insulating against the discharge space is deposited. The dielectric layer 15 is SiO formed by vapor phase growth on the front glass substrate 1 so as to cover the X electrodes 11, 12a, 12b and the Y electrodes 13, 14a, 14b. On top of that, M

2

A gO (magnesium oxide) protective layer 16 is applied.

On the other hand, the address electrode 17 is formed on the back glass substrate 2 disposed to face the front glass substrate 1. A dielectric layer 18 is deposited thereon. Further thereon, phosphors 20 to 22 are deposited. The partition walls (ribs) 19 are disposed on both sides of the address electrode 17 on the rear glass substrate 2. On the inner surface of the partition wall 19, red, blue and green phosphors 20 to 22 are arranged and applied in stripes for each color. Each color emits light by exciting the phosphors 20 to 22 by a sustain discharge between the X electrodes 11, 12a, 12b and the Y electrodes 13, 14a, 14b. The discharge space between the front glass substrate 1 and the back glass substrate 2 is filled with N e + Xe Paying gas (discharge gas)! RU FIG. 1 is a plan view showing a structural example of the plasma display panel of FIG. The X electrode 1 Olx is composed of a nose electrode 11, l ib and transparent electrodes 12a, 12b. Under the bus electrode 11, a transparent electrode 12b is disposed. Transparent electrodes 12 a are disposed on both sides of the bus electrode 11. The bus electrode 11 is arranged in parallel with the transparent electrode 12a, is connected to the transparent electrode 12a, and has gaps dxl and dx2. The transparent electrode 12a and the bus electrode 11 are connected by the bus electrode l ib at a position on the front glass substrate 1 where the partition wall 19 is projected.

[0014] The Y electrode lOly is composed of bus electrodes 13, 13b and transparent electrodes 14a, 14b. Under the bus electrode 13, a transparent electrode 14b is disposed. Transparent electrodes 14 a are disposed on both sides of the bus electrode 13. The bus electrode 13 is disposed in parallel with the transparent electrode 14a, is connected to the transparent electrode 14a, and has gaps dyl and dy2. The transparent electrode 14a and the bus electrode 13 are connected by a nose electrode 13b at a position on the front glass substrate 1 where the partition wall 19 is projected.

The transparent electrodes 12a, 12b, 14a, 14b are, for example, ITO or Nesa. The bus electrodes 11, l ib, 13, 13b are, for example, a three-layer structure of Cr—Cu—Cr or an Ag metal electrode, and are connected to the front glass substrate 1 in order to improve adhesion to the front glass substrate 1. A transparent electrode is provided between them.

[0016] Since the nose electrodes l ib and 13b are black, the reflectance can be reduced and the image quality can be improved by the effect of the black stripe. The electrodes l ib and 13b may be transparent electrodes instead of the nose electrodes.

[0017] The distance (discharge slit) d between the X electrode 電極 χ and the Y electrode lOly is, for example, 100 μm.

The gaps dxl and dx2 between the transparent electrode 12a and the bus electrode 11 are 50 / z m or more and are smaller than the distance d between the X electrode ΙΟΙχ and the Y electrode lOly. Similarly, the gaps dyl and dy2 between the transparent electrode 14a and the bus electrode 13 are 50 / z m or more, which is narrower than the distance d between the powerful X electrode ΙΟΙχ and Y electrode lOly. The gaps dxl, dx2, dyl, and dy2 are preferably about 20 m narrower than the discharge slit d in order to clarify the difference from the discharge slit d. When the discharge slit d is 10 O / z m, the gap f¾dxl, dx2, dyl, dy2i, 50 / z m or more, 80 m or less is preferable! / ヽ.

FIG. 4 is a diagram illustrating a configuration example of one field of an image. One field is, for example, a weighted first subfield 31, second subfield 32, ... Of subfields 40. The number of subfields is 10, for example, and is related to the number of gradation bits. Each field can display one image, for example 60 fields Z seconds.

Each subfield 31-40 includes a reset period 41, an address period 42, and a sustain discharge (sustain discharge) period 43a or 43b. Hereinafter, the sustain discharge period 43a or 43b is referred to as a sustain discharge period 43. As will be described later, the sustain discharge period 43 is at least two types of sustain discharge periods 43a or 43b. In the reset period 41, the display cell C11 and the like are initialized. In the address period 42, light emission or non-light emission of each display cell can be selected by address discharge between the address electrode A and the Y electrode Y. Specifically, scan pulses are sequentially applied to the Y electrodes Yl, Y2, Y3, Y4, etc., and the address pulses are applied to the address electrodes A corresponding to the scan pulses, and the X electrodes The potential of X can be discharged between Y electrode Y and the discharge between Y electrode Y and address electrode A can be used as a fire. Light emission or non-light emission can be selected. In the sustain discharge period 43, a sustain discharge is performed between the X electrode X and the Y electrode Y of the selected display cell to emit light. In each subfield 31 to 40, the number of times of light emission by the sustain discharge pulse between the X electrode X and the Y electrode Y (the length of the sustain discharge period 43) is different. Thereby, the gradation value can be determined.

FIG. 5 is a diagram illustrating an example of a voltage waveform of the plasma display device. 4 shows voltage waveform examples in the reset period 41, the address period 42, and the sustain discharge period 43 in FIG. Voltage Vx is the voltage waveform of X electrode X. Voltage Vy is the voltage waveform of Y electrode Y. The voltage Va is a voltage waveform of the address electrode A.

First, the reset period 41 will be described. As the voltage Vx, the write voltage 50 and the adjustment voltage 51 are applied. In addition, a write blunt wave voltage 60 and a regulated blunt wave voltage 61 are applied as the voltage Vy. As a result, a write discharge and a reset discharge for reset are generated between the X electrode X and the Y electrode Y.

Next, the address period 42 will be described. Scan voltage 52 is applied as voltage Vx. A scan pulse 62 is applied as the voltage Vy. Specifically, the scan pulse 62 is sequentially applied to the Y electrodes Y1, Y2, Y3, Y4,. Also, as voltage Va The address pulse 90 is applied to the display cell to be selected in synchronization with the scan pulse 62 of each row. When an address pulse 90 is applied corresponding to the scan pulse 62, a discharge occurs between the Y electrode Y and the address electrode A. Using this discharge as a fire, a discharge occurs between X electrode X and Y electrode Y, and wall charges are generated in the vicinity of X electrode X and Y electrode Y.

[0023] Another voltage waveform example of the address period 42 will be described. The address period 42 is divided into a first half address period and a second half address period. As the voltage Vy, the scan pulse 62 is sequentially applied only to the odd-numbered Y electrodes Yl, Y3, etc. in the first half address period, and the scan pulse 62 is applied only to the even-numbered Y electrodes Y2, Y4, etc. in the subsequent second address period. To do. In the first half address period, scan voltage 52 is applied to odd-numbered X electrodes XI and X3 as voltage Vx, and selection is performed as voltage Va in synchronization with scan node 62 of odd-numbered Y electrodes Yl and Y3. Apply address pulse 90 to the display cell. In the second half address period, scan voltage 52 is applied to even-numbered X electrodes X2 and X4 as voltage Vx, and display is selected in synchronization with scan pulse 62 of even-numbered Y electrodes Y2 and Y4 as voltage Va. Address pulse 91 is applied to the cell.

Next, the sustain discharge period 43 will be described. As voltage Vx, first sustain discharge pulse 53, repeated sustain discharge pulses 54 and 55, and erase pulse 56 are applied. Repetitive maintenance The discharge pulses 54 and 55 are repeatedly applied with pulses whose polarities are alternately reversed. The first sustain discharge pulse 63, the repeated sustain discharge pulses 64 and 65, and the erase pulse 66 are applied as the voltage Vy. The repetitive sustain discharge pulses 64 and 65 are pulses that are inverted with respect to the repetitive sustain discharge pulses 54 and 55 by repeatedly applying a pulse whose polarity is alternately reversed.

In the sustain discharge period 43, only the display cells in which the wall charges are generated by applying the address pulses 90 and 91 in the address period 42 can be discharged. The first sustain discharge pulses 53 and 63 cause a discharge between the X electrode X and the Y electrode Y. As a result, the sustain discharge is started thereafter.

[0026] In addition, discharge is generated between the X electrode X and the Y electrode Y by the repeated sustain discharge pulses 54 and 64. In addition, the discharge is generated between the X electrode X and the Y electrode Y by the repeated sustain discharge pulses 55 and 65. The discharge is repeated as many times as the number of sustain discharge pulses. This sustain discharge Emits light.

In addition, the erasing pulses 56 and 66 cause an erasing discharge between the X electrode X and the Y electrode Y.

This erasing discharge reduces the wall charge of the emitted display cell so that no sustain discharge occurs.

[0028] Next, at the beginning of the reset period 41, the blunt wave voltage 58 is applied as the voltage Vx, and the noise 68 is applied as the voltage Vy. After that, it leads to the reset period 41 described above.

FIG. 8 is a waveform diagram of three types of sustain discharge pulses, that is, the X electrode voltage Vx and the Y electrode voltage Vy in the sustain discharge period 43 of FIG. Vsl <Vs2 Vs3. For example, Vs 3 is 85V, Vs2 is 80V, and Vsl is 75V.

[0030] In the low power mode, voltage Vx is sustain discharge pulse 80 lx, and voltage Vy is sustain discharge pulse 801y. The sustain discharge pulses 80 lx and 80 ly are pulses in which the voltages Vsl and -Vsl are alternately inverted. A voltage of 2 X Vsl is applied between the X and Y electrodes and discharged. When low-voltage sustain discharge pulses 801x and 801y are applied, discharge regions 25 to 27 are formed as shown in FIG. The discharge regions 25 to 27 expand only between the X transparent electrode 12a and the Y transparent electrode 14a adjacent to the discharge slit d, and form a narrow discharge region.

In the standard mode, the voltage Vx is the sustain discharge pulse 802x, and the voltage Vy is the sustain discharge pulse 802y. The sustain discharge pulses 802x and 802y are pulses in which the voltages Vs2 and Vs2 are alternately inverted. A voltage of 2 XVs2 is applied between the X and Y electrodes, and discharge occurs. When medium voltage sustain discharge pulses 802x and 802y are applied, discharge regions 25 to 27 are formed as shown in FIG. The discharge regions 25 to 27 extend to a region including the transparent electrodes 12a and 14a and the bus electrodes 11 and 13 adjacent to the discharge slit d, and form a middle range discharge region.

In the high luminance mode, voltage Vx is sustain discharge pulse 803x, and voltage Vy is sustain discharge pulse 803y. The sustain discharge pulses 803x and 803y are pulses in which the voltages Vs3 and -Vs3 are alternately inverted. A voltage of 2 XVs3 is applied between the X and Y electrodes and discharged. When high voltage sustain discharge pulses 803x and 803y are applied, discharge regions 25 to 27 are formed as shown in FIG. The discharge regions 25 to 27 extend over the entire region of the X electrode ΙΟΙχ and the Y electrode 10 ly to form a wide discharge region. [0033] By applying a sustain discharge pulse of three types of modes between the X electrode and the Y electrode, as shown in Figs. Various types of sustain discharges can be performed.

FIG. 12 is a graph showing the relationship between the sustain discharge pulse voltage and the luminance. The horizontal axis shows the absolute value of the sustain discharge pulse voltage in Fig. 8. The solid line shows the characteristics of the plasma display panel shown in Fig. 1. The broken line shows the case where the X electrode 101 X and the Υ electrode 10 ly in Fig. 1 are joined together without gaps dx1, dx2, and dyl, dy2, respectively. The characteristics of

[0035] In the broken line, the bus electrode and the transparent electrode are continuously connected in the discharge space, and there is no discharge separation. Therefore, the luminance increases as the discharge spreads and the discharge intensity increases due to the increase of the sustain discharge pulse voltage. As a result, the luminance changes continuously (linearly) with respect to the sustain discharge pulse voltage.

In the solid line, since the X electrode ΙΟΙχ and the Y electrode lOly have gaps dxl and dx2 and gaps dyl and dy2, respectively, the characteristics change stepwise in three stages shown in FIGS. The selection means 300 in FIG. 3 can select one of a low power mode, a standard mode, and a high brightness mode.

[0037] In the low power mode, the sustain discharge pulse becomes Vsl, and has the discharge regions 25 to 27 shown in FIG. 1, and the brightness is substantially constant in the vicinity of the sustain discharge pulse voltage. Since the sustain discharge pulse voltage is low, a low power and energy saving display can be realized. In other words, since the absolute value of the sustain discharge pulse voltage is small, the luminous efficiency can be improved and unnecessary power can be reduced.

[0038] In the standard mode, the sustain discharge pulse has a level of Vs2, and has the discharge regions 25 to 27 shown in FIG. 6, and the brightness is substantially constant in the vicinity of the sustain discharge pulse voltage. Since the sustain discharge pulse voltage is standard, standard power and brightness display can be realized.

In the high luminance mode, the sustain discharge pulse becomes Vs3, has the discharge regions 25 to 27 shown in FIG. 7, and the luminance is substantially constant at the sustain discharge pulse voltage in the vicinity thereof. Since the discharge regions 25 to 27 where the absolute value of the sustain discharge pulse voltage is large are wide, a high-luminance display can be realized. [0040] Within each stage, the increase in luminance is only an increase in discharge intensity due to the increase in sustain discharge pulse voltage, and the change is small. Even if the gap between the discharge slits d varies due to manufacturing variations, the change in luminance is small and the variation is small. On the other hand, in the case of the broken line, the luminance change due to the variation in the interval between the discharge slits d becomes large. In the solid line, the spread of the discharge is stepped by the gaps dxl, dx2, dyl, dy2 between the transparent electrode and the bus electrode, and the brightness can be clearly separated by the sustain discharge pulse voltage.

FIG. 10 is a cross-sectional view of the front glass substrate 1 of FIG. 2, and FIG. 11 is a partially enlarged view of the front glass substrate 1 of FIG. The discharge slit d is a slit between the transparent substrate 12a of the X electrode and the transparent electrode 14a of the Y electrode, and is 100 / z m, for example. The dielectric layer 15 is SiO formed by vapor deposition.

2

As indicated by a broken line in FIG. 11, the electric field on the surface of the dielectric layer 15 increases in proportion to the thickness T1 of the dielectric layer 15. The electrode 12a forms a virtual electrode by expanding the electric field of width W1 on the surface of the dielectric layer 15. Similarly, the electrodes 11 and 12b form a virtual electrode by expanding the electric field of width W3 on the surface of the dielectric layer 15. When the dielectric layer 15 is formed by vapor deposition, the thickness T1 can be made thinner than 10 IX m. Empirically, if there is a distance W2 of about 30 m on the surface of the dielectric layer 15, the discharge between the electrode 12a and the electrodes 11 and 12b can be separated. Therefore, when the thickness T1 of the dielectric layer 15 is 10 / zm, the distances dxl, dx2, dyl, dy2 between each bus electrode and each transparent electrode are preferably 50 μm or more. When the discharge slit d is 100 μm, the gaps dxl, dx2, dyl, and dy2 between each bus electrode and each transparent electrode are preferably 80 m or less. For example, the discharge slit d is 100 / ζ πι, the thickness T1 of the dielectric layer 15 is 10 m, the gaps dxl, dx2, dyl, and dy2 are 50 μm, the widths Wl and W3 are 10 μm, and the interval W2 is 30. μm. The thickness of the bus electrodes 11 and 13 is, for example, 2 to 3 / ζ πι. This dimension is an example and is not limited to this.

FIG. 9 is a graph showing the relationship between the display load factor and the luminance. The low power mode 901 is a mode characteristic when the sustain discharge pulse voltage is Shi Vsl. The standard mode 902 is a mode characteristic when the sustain discharge pulse voltage is Shi Vs2. The high brightness mode 903 is a mode characteristic when the sustain discharge pulse voltage is Vs3.

[0044] The control circuit 7 detects the display load factor according to the input image signal. Display load factor is Detection is based on the number of pixels that emit light and the gradation value of the pixels that emit light. For example, when all pixels of an image are displayed with the maximum gradation value, the display load factor is 100%. In addition, when all pixels of the image are displayed with the maximum gradation value of 1Z2, the display load factor is 50%. The display load factor is also 50% when only half (50%) of the image is displayed with the maximum gradation value.

The control circuit 7 determines the total number of sustain discharge pulses for one field applied to the X electrode and the Y electrode so that the power becomes constant based on the display load factor. Specifically, the total number of sustain discharge pulses in one field is reduced so that the power becomes constant when the displayed load ratio exceeds a predetermined value. As a result, when the display load factor exceeds a predetermined value, the luminance decreases.

[0046] In the low power mode 901, the sustain discharge pulse voltage is low, so that the light emission efficiency is improved and unnecessary power can be reduced. In particular, the general display load factor is about 10 to 30%. In moving images, the brightness can be relatively increased. In the high luminance mode 903, since the discharge region where the sustain discharge voltage is high is wide, display with higher luminance can be performed.

[0047] According to the present embodiment, the drive circuits 4 and 5 are regions in which at least two types of sustain discharge spread by applying at least two types of sustain discharge pulse voltages between the X electrode and the Y electrode. Can be given. Drive circuits 4 and 5 cause the same type of sustain discharge to occur in the same field. In other words, after the mode is selected, the mode is switched in units of fields.

[0048] In the plasma display panel 3, a gap is provided between the bus electrode and the transparent electrode in the display cell that performs discharge. The bus electrode and the transparent electrode are connected by the bus electrode at a position where the partition wall is projected. By changing the sustain discharge pulse voltage, the expansion of the discharge region becomes stepwise with respect to the sustain discharge pulse voltage, and the luminance (brightness) is changed stepwise.

[0049] Even if the number of sustain discharge pulses is reduced, if the sustain discharge pulse voltage does not change, the light emission efficiency does not change. In addition, the lower the sustain discharge pulse voltage, the lower the loss in the driving circuit of the plasma display panel, and the higher the luminous efficiency.

[0050] In the standard mode, since the absolute value of the sustain discharge pulse voltage is standard, display is performed with standard power consumption and luminance. In the low power mode, the absolute value of the sustain discharge pulse voltage is reduced. As a result, the luminous efficiency can be increased and the power consumption can be reduced. In high brightness mode, high brightness display can be achieved by increasing the absolute value of the sustain discharge pulse voltage.

In FIG. 1, the X electrode ΙΟΙχ can sustain discharge with respect to both adjacent Y electrodes lOly, and the Y electrode lOly can also sustain discharge with respect to both adjacent X electrodes ΙΟΙχ. The X electrode ΙΟΙχ may be configured to be capable of sustain discharge only with respect to the Y electrode lOly adjacent to the lower side. In this case, the transparent electrode 12a adjacent to the upper side of the nose electrode 11 can be deleted, and the transparent electrode 14a adjacent to the lower side of the bus electrode 13 can be deleted.

The plasma display device of the present embodiment is applied to an AZC type plasma display device used for a display device such as a personal computer or a workstation, a flat wall-mounted television, or a display for displaying advertisements or information. be able to

It should be noted that the above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed as being limited thereto. It is. That is, the present invention can be implemented in various forms without departing from the technical idea or the main characteristic power thereof.

Industrial applicability

[0054] By providing at least two types of areas where the sustain discharge spreads, display with low power or display with high luminance can be performed.

Claims

The scope of the claims

[1] a first transparent electrode;

A first metal electrode disposed in parallel with the first transparent electrode, connected to the first transparent electrode and having a gap;

A second transparent electrode;

A second metal electrode disposed in parallel with the second transparent electrode, connected to the second transparent electrode and having a gap;

At least two types of sustain discharges between the first electrode including the first transparent electrode and the first metal electrode and the second electrode including the second transparent electrode and the second metal electrode. By applying a voltage, there is a drive circuit that has an area where at least two types of sustain discharge can be expanded.

A plasma display device comprising:

[2] Furthermore, it has selection means capable of selecting at least the first or second mode,

The plasma according to claim 1, wherein the driving circuit applies a sustain discharge voltage having a small absolute value in the first mode, and applies a sustain discharge voltage having a large absolute value in the second mode. Display device.

[3] Furthermore, a first substrate on which the first and second electrodes are disposed; and

A second substrate facing the first substrate;

A third electrode disposed on the second substrate so as to intersect the first and second electrodes;

2. The plasma display device according to claim 1, further comprising: a partition wall disposed on both sides of the third electrode on the second substrate.

[4] The first transparent electrode and the first metal electrode are connected at a position on the first substrate where the partition wall is projected, and the second transparent electrode and the second metal electrode are The plasma display device according to claim 3, wherein the partition wall is connected at a position on the first substrate onto which the partition wall is projected.

[5] The first transparent electrode and the first metal electrode are connected by a metal electrode, and the second transparent electrode and the second metal electrode are connected by a metal electrode. 4. The plasma display device according to 4.

6. The plasma according to claim 4, further comprising a SiO dielectric layer formed by vapor deposition so as to cover the first and second electrodes on the first substrate.

2

Display device.

[7] The gap between the first transparent electrode and the first metal electrode is 50 m or more, and is narrower than the distance between the first and second electrodes.

5. The gap between the second transparent electrode and the second metal electrode is 50 m or more, and is narrower than an interval between the first and second electrodes. Plasma display device.

8. The plasma display device according to claim 1, wherein the drive circuit causes the same type of sustain discharge to be performed in the same field.

[9] a first transparent electrode;

A second transparent electrode;

A plasma display panel driving method comprising: a second metal electrode that is arranged in parallel with the second transparent electrode, and is connected to the second transparent electrode and has a gap.

At least two types of sustain discharges between the first electrode including the first transparent electrode and the first metal electrode and the second electrode including the second transparent electrode and the second metal electrode. A driving method of a plasma display panel, comprising: a driving step for providing at least two types of sustain discharge spreading regions by applying a voltage.

[10] The method further comprises a selection step of selecting at least the first or second mode,

10. The driving step includes applying a sustain discharge voltage having a small absolute value in the first mode and applying a sustain discharge voltage in the second mode, and applying a sustain discharge voltage in the second mode. Driving method of the plasma display panel.

[11] The plasma display panel comprises:

A first substrate on which the first and second electrodes are disposed; A second substrate facing the first substrate;

10. The method for driving a plasma display panel according to claim 9, further comprising: partition walls disposed on both sides of the third electrode on the second substrate.

[12] The first transparent electrode and the first metal electrode are connected at a position on the first substrate where the partition wall is projected, and the second transparent electrode and the second metal electrode are 12. The method of driving a plasma display panel according to claim 11, wherein the partition wall is connected at a position on the first substrate onto which the partition wall is projected.

[13] The first transparent electrode and the first metal electrode are connected by a metal electrode, and the second transparent electrode and the second metal electrode are connected by a metal electrode.

12. A driving method of a plasma display panel according to 12.

[14] The plasma display panel further includes a SiO dielectric layer formed by vapor deposition so as to cover the first and second electrodes on the first substrate.

2

13. The method for driving a plasma display panel according to claim 12, wherein:

[15] The gap between the first transparent electrode and the first metal electrode is 50 m or more, and is narrower than the distance between the first and second electrodes.

13. The gap between the second transparent electrode and the second metal electrode is 50 m or more, and is narrower than the distance between the first and second electrodes. Driving method of plasma display panel.

16. The method of driving a plasma display panel according to claim 9, wherein the driving step causes the same type of sustain discharge to be performed in the same field.