WO2007041763A1 - Multiple computer system with enhanced memory clean up - Google Patents

Multiple computer system with enhanced memory clean up Download PDF

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Publication number
WO2007041763A1
WO2007041763A1 PCT/AU2006/001448 AU2006001448W WO2007041763A1 WO 2007041763 A1 WO2007041763 A1 WO 2007041763A1 AU 2006001448 W AU2006001448 W AU 2006001448W WO 2007041763 A1 WO2007041763 A1 WO 2007041763A1
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WO
WIPO (PCT)
Prior art keywords
memory
memory locations
computers
computer
category
Prior art date
Application number
PCT/AU2006/001448
Other languages
English (en)
French (fr)
Inventor
John Matthew Holt
Original Assignee
Waratek Pty Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from AU2005905581A external-priority patent/AU2005905581A0/en
Application filed by Waratek Pty Limited filed Critical Waratek Pty Limited
Priority to JP2008534814A priority Critical patent/JP2009512029A/ja
Priority to AU2006301910A priority patent/AU2006301910B2/en
Priority to CN200680037516.7A priority patent/CN101283344B/zh
Priority to EP06790318A priority patent/EP1934775A4/en
Publication of WO2007041763A1 publication Critical patent/WO2007041763A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00Network arrangements or protocols for supporting network services or applications
    • H04L67/01Protocols
    • H04L67/10Protocols in which an application is distributed across nodes in the network
    • H04L67/1095Replication or mirroring of data, e.g. scheduling or transport for data synchronisation between network nodes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0253Garbage collection, i.e. reclamation of unreferenced memory
    • G06F12/0269Incremental or concurrent garbage collection, e.g. in real-time systems

Definitions

  • the present invention relates to computing and, in particular, to the simultaneous operation of a plurality of computers interconnected via a communications network.
  • the abovementioned patent specifications disclose that at least one application program written to be operated on only a single computer can be simultaneously operated on a number of computers each with independent local memory.
  • the memory locations required for the operation of that program are replicated in the independent local memory of each computer.
  • each computer has a local memory the contents of which are substantially identical to the local memory of each other computer and are updated to remain so. Since all application programs, in general, read data much more frequently than they cause new data to be written, the abovementioned arrangement enables very substantial advantages in computing speed to be achieved.
  • the stratagem enables two or more commodity computers interconnected by a commodity communications network to be operated simultaneously running under the application program written to be executed on only a single computer.
  • the genesis of the present invention is a desire to accelerate clean up or reclamation of local memory locations in the multiple computer system thereby permitting such memory locations to be sooner re-allocated to future tasks.
  • a clean-up procedure modified multiple computer system in which a plurality of computers each has their corresponding independent local memory, each has an inherent local memory clean-up procedure, each substantially simultaneously executes a corresponding different portion of an application program written to execute on only a single computer, and each is connected via a communications network to permit updating of corresponding memory locations
  • said system including a reachability means to categorize memory locations of said local memories into a first category in which the local memory locations are replicated on selected ones, or all, of said computers and therefore require updating via said communications network with changes to corresponding memory locations of other computers to maintain substantial memory coherence, and into a second category in which the local memory locations are present only in the local computer and therefore no updating is required
  • said system includes a disabling means connected to said reachability means and to each of said plurality of computers to disable said inherent local memory clean-up procedure in respect of memory locations in said first category only
  • said reachability means includes a demoting means to demote from said
  • a single computer adapted to co-operate with at least one other computer in order to carry out the above method or form the above system.
  • a computer program product comprising a set of program instructions stored in a storage medium and operable to permit a plurality of computers to carry out the above method.
  • a fifth aspect of the present invention there is disclosed a plurality of computers interconnected via a communications network and operable to ensure carrying out of the above method.
  • Fig. IA is a schematic illustration of a prior art computer arranged to operate JAVA code and thereby constitute a single JAVA virtual machine
  • Fig. IB is a drawing similar to Fig. IA but illustrating the initial loading of code
  • Fig. 1C illustrates the interconnection of a multiplicity of computers each being a JAVA virtual machine to form a multiple computer system
  • Fig. 2 schematically illustrates "n" application running computers to which at least one additional server machine X is connected as a server
  • Fig. 3 is a schematic map of the memory locations in all the multiple machines showing memory locations including classes and objects,
  • Fig. 4 is a single reachability table showing the various memory locations of Fig. 3 and their ability to be reached
  • Fig. 5 shows multiple reachability tables corresponding to the single table of
  • Fig. 6 is a map similar to Fig. 3 and showing memory location X no longer pointing to memory location A
  • Fig. 7 is the single reachability table corresponding to Fig. 6,
  • Fig. 8 shows the multiple reachability tables corresponding to Fig. 7,
  • Fig. 9 is a memory map similar to Figs. 3 and 6 showing the reclamation of one memory location
  • Figs. 10 and 11 respectively illustrate the single and multiple reachability tables corresponding to the memory changes of Fig. 9
  • Fig. 12 illustrates another memory change
  • Figs. 13 and 14 respectively illustrate the single and multiple reachability tables corresponding to the memory changes of Fig. 12.
  • the code and data and virtual machine configuration or arrangement of Fig IA takes the form of the application code 50 written in the JAVA language and executing within the JAVA virtual machine 61.
  • the intended language of the application is the language JAVA
  • a JAVA virtual machine is used which is able to operate code in JAVA irrespective of the machine manufacturer and internal details of the computer or machine.
  • Fig. IA This conventional art arrangement of Fig. IA is modified in accordance with embodiments of the present invention by the provision of an additional facility which is conveniently termed a “distributed run time” or a “distributed run time system” DRT 71 and as seen in Fig. IB.
  • the application code 50 is loaded onto the Java Virtual Machine(s) Ml, M2,...Mn in cooperation with the distributed runtime system 71, through the loading procedure indicated by arrow 75 or 75A or 75B.
  • distributed runtime and the “distributed run time system” are essentially synonymous, and by means of illustration but not limitation are generally understood to include library code and processes which support software written in a particular language running on a particular platform. Additionally, a distributed runtime system may also include library code and processes which support software written in a particular language running within a particular distributed computing environment.
  • a runtime system typically deals with the details of the interface between the program and the operating system such as system calls, program start-up and termination, and memory management.
  • a conventional Distributed Computing Environment (DCE) (that does not provide the capabilities of the inventive distributed run time or distributed run time system 71 used in the preferred embodiments of the present invention) is available from the Open Software Foundation.
  • This Distributed Computing Environment (DCE) performs a form of computer-to-computer communication for software running on the machines, but among its many limitations, it is not able to implement the desired modification or communication operations.
  • the preferred DRT 71 coordinates the particular communications between the plurality of machines Ml, M2,...Mn.
  • the preferred distributed runtime 71 comes into operation during the loading procedure indicated by arrow 75A or 75B of the JAVA application 50 on each JAVA virtual machine 72 or machines JVM#1, JVM#2,.. JVM#n of Fig. 1C. It will be appreciated in light of the description provided herein that although many examples and descriptions are provided relative to the JAVA language and JAVA virtual machines so that the reader may get the benefit of specific examples, the invention is not restricted to either the JAVA language or JAVA virtual machines, or to any other language, virtual machine, machine or operating environment.
  • Fig. 1C shows in modified form the arrangement of the JAVA virtual machines, each as illustrated in Fig. IB.
  • the same application code 50 is loaded onto each machine Ml, M2...Mn.
  • the communications between each machine Ml 5 M2...Mn are as indicated by arrows 83, and although physically routed through the machine hardware, are advantageously controlled by the individual DRT's 71/1...71/n within each machine.
  • this may be conceptionalised as the DRT's 71/1, ...71/n communicating with each other via the network or other communications link 53 rather than the machines Ml , M2...Mn communicating directly themselves or with each other.
  • Contemplated and included are either this direct communication between machines Ml, M2...Mn or DRT's 71/1, 71/2...71/n or a combination of such communications.
  • the preferred DRT 71 provides communication that is transport, protocol, and link independent.
  • the one common application program or application code 50 and its executable version (with likely modification) is simultaneously or concurrently executing across the plurality of computers or machines Ml, M2...Mn.
  • the application program 50 is written to execute on a single machine or computer (or to operate on the multiple computer system of the abovementioned patent applications which emulate single computer operation).
  • the modified structure is to replicate an identical memory structure and contents on each of the individual machines.
  • common application program is to be understood to mean an application program or application program code written to operate on a single machine, and loaded and/or executed in whole or in part on each one of the plurality of computers or machines M 1 , M2... Mn, or optionally on each one of some subset of the plurality of computers or machines Ml , M2...Mn.
  • application code 50 This is either a single copy or a plurality of identical copies each individually modified to generate a modified copy or version of the application program or program code. Each copy or instance is then prepared for execution on the corresponding machine. At the point after they are modified they are common in the sense that they perform similar operations and operate consistently and coherently with each other.
  • a plurality of computers, machines, information appliances, or the like implementing embodiments of the invention may optionally be connected to or coupled with other computers, machines, information appliances, or the like that do not implement embodiments of the invention.
  • the same application program 50 (such as for example a parallel merge sort, or a computational fluid dynamics application or a data mining application) is run on each machine, but the executable code of that application program is modified on each machine as necessary such that each executing instance (copy or replica) on each machine coordinates its local operations on that particular machine with the operations of the respective instances (or copies or replicas) on the other machines such that they function together in a consistent, coherent and coordinated manner and give the appearance of being one global instance of the application (i.e. a "meta- application").
  • the copies or replicas of the same or substantially the same application codes are each loaded onto a corresponding one of the interoperating and connected machines or computers.
  • the application code 50 may be modified before loading, or during the loading process, or with some disadvantages after the loading process, to provide a customization or modification of the application code on each machine.
  • Some dissimilarity between the programs or application codes on the different machines may be permitted so long as the other requirements for interoperability, consistency, and coherency as described herein can be maintained.
  • each of the machines Ml, M2...Mn and thus all of the machines Ml, M2...Mn have the same or substantially the same application code 50, usually with a modification that may be machine specific.
  • each application code 50 is modified by a corresponding modifier 51 according to the same rules (or substantially the same rules since minor optimizing changes are permitted within each modifier 51/1, 51/2...51/n).
  • Each of the machines Ml, M2...Mn operates with the same (or substantially the same or similar) modifier 51 (in some embodiments implemented as a distributed run time or DRT71 and in other embodiments implemented as an adjunct to the application code and data 50, and also able to be implemented within the JAVA virtual machine itself).
  • all of the machines Ml, M2...Mn have the same (or substantially the same or similar) modifier 51 for each modification required.
  • a different modification for example, may be required for memory management and replication, for initialization, for fmalization, and/or for synchronization (though not all of these modification types may be required for all embodiments).
  • the modifier 51 may be implemented as a component of or within the distributed run time 71, and therefore the DRT 71 may implement the functions and operations of the modifier 51.
  • the function and operation of the modifier 51 may be implemented outside of the structure, software, firmware, or other means used to implement the DRT 71 such as within the code and data 50, or within the JAVA virtual machine itself.
  • both the modifier 51 and DRT 71 are implemented or written in a single piece of computer program code that provides the functions of the DRT and modifier. In this case the modifier function and structure is, in practice, subsumed into the DRT.
  • the modifier function and structure is responsible for modifying the executable code of the application code program
  • the distributed run time function and structure is responsible for implementing communications between and among the computers or machines.
  • the communications functionality in one embodiment is implemented via an intermediary protocol layer within the computer program code of the DRT on each machine.
  • the DRT can, for example, implement a communications stack in the JAVA language and use the Transmission Control Protocol/Internet Protocol (TCP/IP) to provide for communications or talking between the machines.
  • TCP/IP Transmission Control Protocol/Internet Protocol
  • a plurality of individual computers or machines Ml, M2...Mn are provided, each of which are interconnected via a communications network 53 or other communications link.
  • Each individual computer or machine is provided with a corresponding modifier 51.
  • Each individual computer is also provided with a communications port which connects to the communications network.
  • the communications network 53 or path can be any electronic signalling, data, or digital communications network or path and is preferably a slow speed, and thus low cost, communications path, such as a network connection over the Internet or any common networking configurations including ETHERNET or INFINIBAND and extensions and improvements, thereto.
  • the computers are provided with one or more known communications ports (such as CISCO Power Connect 5224 Switches) which connect with the communications network 53.
  • the size of the smallest memory of any of the machines may be used as the maximum memory capacity of the machines when such memory (or a portion thereof) is to be treated as 'common' memory (i.e. similar equivalent memory on each of the machines Ml ...Mn) or otherwise used to execute the common application code.
  • 'common' memory i.e. similar equivalent memory on each of the machines Ml ...Mn
  • each machine Ml , M2...Mn has a private (i.e.
  • the private internal memory capability of the machines Ml, M2, ..., Mn are normally approximately equal but need not be.
  • the internal memory capabilities may be quite different.
  • each machine or computer is preferably selected to have an identical internal memory capability, but this need not be so.
  • the independent local memory of each machine represents only that part of the machine's total memory which is allocated to that portion of the application program running on that machine. Thus, other memory will be occupied by the machine's operating system and other computational tasks unrelated to the application program 50.
  • Non-commercial operation of a prototype multiple computer system indicates that not every machine or computer in the system utilises or needs to refer to (e.g. have a local replica of) every possible memory location.
  • some or all of the plurality of individual computers or machines can be contained within a single housing or chassis (such as so-called “blade servers” manufactured by Hewlett-Packard Development Company, Intel Corporation, IBM Corporation and others) or the multiple processors (eg symmetric multiple processors or SMPs) or multiple core processors (eg dual core processors and chip multithreading processors) manufactured by Intel, AMD, or others, or implemented on a single printed circuit board or even within a single chip or chip set.
  • blade servers manufactured by Hewlett-Packard Development Company, Intel Corporation, IBM Corporation and others
  • the multiple processors eg symmetric multiple processors or SMPs
  • multiple core processors eg dual core processors and chip multithreading processors
  • computers or machines having multiple cores, multiple CPU's or other processing logic.
  • the generalized platform, and/or virtual machine and/or machine and/or runtime system is able to operate application code 50 in the language(s) (possibly including for example, but not limited to any one or more of source-code languages, intermediate-code languages, object-code languages, machine-code languages, and any other code languages) of that platform and/or virtual machine and/or machine and/or runtime system environment, and utilize the platform, and/or virtual machine and/or machine and/or runtime system and/or language architecture irrespective of the machine or processor manufacturer and the internal details of the machine.
  • the platform and/or runtime system can include virtual machine and non-virtual machine software and/or firmware architectures, as well as hardware and direct hardware coded applications and implementations.
  • computers and/or computing machines and/or information appliances or processing systems are still applicable.
  • computers and/or computing machines that do not utilize either classes and/or objects include for example, the x86 computer architecture manufactured by Intel Corporation and others, the SPARC computer architecture manufactured by Sun Microsystems, Inc and others, the Power PC computer architecture manufactured by International Business Machines Corporation and others, and the personal computer products made by Apple Computer, Inc., and others.
  • primitive data types such as integer data types, floating point data types, long data types, double data types, string data types, character data types and Boolean data types
  • structured data types such as arrays and records
  • derived types or other code or data structures of procedural languages or other languages and environments such as functions, pointers, components, modules, structures, reference and unions.
  • This analysis or scrutiny of the application code 50 can take place either prior to loading the application program code 50, or during the application program code 50 loading procedure, or even after the application program code 50 loading procedure (or some combination of these). It may be likened to an instrumentation, program transformation, translation, or compilation procedure in that the application code can be instrumented with additional instructions, and/or otherwise modified by meaning- preserving program manipulations, and/or optionally translated from an input code language to a different code language (such as for example from source-code language or intermediate-code language to object-code language or machine-code language).
  • compilation normally or conventionally involves a change in code or language, for example, from source code to object code or from one language to another language.
  • compilation and its grammatical equivalents
  • the term "compilation” is not so restricted and can also include or embrace modifications within the same code or language.
  • the compilation and its equivalents are understood to encompass both ordinary compilation (such as for example by way of illustration but not limitation, from source-code to object code), and compilation from source-code to source-code, as well as compilation from object-code to object code, and any altered combinations therein. It is also inclusive of so-called “intermediary-code languages” which are a form of "pseudo object-code”.
  • the analysis or scrutiny of the application code 50 takes place during the loading of the application program code such as by the operating system reading the application code 50 from the hard disk or other storage device, medium or source and copying it into memory and preparing to begin execution of the application program code.
  • the analysis or scrutiny may take place during the class loading procedure of the java.lang.ClassLoader.loadClass method (e.g. "java.lang.ClassLoader.loadClassO").
  • the analysis or scrutiny of the application code 50 may take place even after the application program code loading procedure, such as after the operating system has loaded the application code into memory, or optionally even after execution of the relevant corresponding portion of the application program code has started, such as for example after the JAVA virtual machine has loaded the application code into the virtual machine via the "java.lang.ClassLoader.loadClass()" method and optionally commenced execution.
  • One such technique is to make the modification(s) to the application code, without a preceding or consequential change of the language of the application code.
  • Another such technique is to convert the original code (for example, JAVA language source-code) into an intermediate representation (or intermediate-code language, or pseudo code), such as JAVA byte code. Once this conversion takes place the modification is made to the byte code and then the conversion may be reversed. This gives the desired result of modified JAVA code.
  • a further possible technique is to convert the application program to machine code, either directly from source-code or via the abovementioned intermediate language or through some other intermediate means. Then the machine code is modified before being loaded and executed.
  • a still further such technique is to convert the original code to an intermediate representation, which is thus modified and subsequently converted into machine code.
  • the present invention encompasses all such modification routes and also a combination of two, three or even more, of such routes.
  • the DRT 71 or other code modifying means is responsible for creating or replicating a memory structure and contents on each of the individual machines Ml, M2...Mn that permits the plurality of machines to interoperate.
  • this replicated memory structure will be identical. Whilst in other embodiments this memory structure will have portions that are identical and other portions that are not. In still other embodiments the memory structures are different only in format or storage conventions such as Big Endian or Little Endian formats or conventions.
  • Such local memory read and write processing operation can typically be satisfied within 10 2 — 10 3 cycles of the central processing unit. Thus, in practice there is substantially less waiting for memory accesses which involves and/or writes. Also, the local memory of each machine is not able to be accessed by any other machine and can therefore be said to be independent.
  • the invention is transport, network, and communications path independent, and does not depend on how the communication between machines or DRTs takes place. In one embodiment, even electronic mail (email) exchanges between machines or DRTs may suffice for the communications.
  • Fig. 2 there are a number of machines Ml, M2, .... Mn, "n” being an integer greater than or equal to two, on which the application program 50 of Fig. 1 is being run substantially simultaneously.
  • These machines are allocated a number 1, 2, 3, ... etc. in a hierarchical order. This order is normally looped or closed so that whilst machines 2 and 3 are hierarchically adjacent, so too are machines "n" and 1.
  • the further machine X can be a low value machine, and much less expensive than the other machines which can have desirable attributes such as processor speed.
  • an additional low value machine (X+ 1) is preferably available to provide redundancy in case machine X should fail.
  • server machines X and X+l are provided, they are preferably, for reasons of simplicity, operated as dual machines in a cluster configuration.
  • Machines X and X+l could be operated as a multiple computer system in accordance with the present invention, if desired. However this would result in generally undesirable complexity. If the machine X is not provided then its functions, such as housekeeping functions, are provided by one, or some, or all of the other machines.
  • each of the multiple machines Ml, M2, Mn (other than any server machine X if present) has its memory locations schematically illustrated.
  • Object A2 in machine M2 is the same as object Al in machine Ml.
  • Class Xn and object An are the same as classes Xl and X2 and objects Al and A2 respectively. Since each of the machines Ml, M2 and Mn is able to both read from, and write to, memory locations X and A, the boundary of each of these memory locations is indicated with a double line.
  • the server machine X of Fig. 2 it is convenient for the server machine X of Fig. 2, to maintain a table listing each memory location and the machines which are able to access each memory location in the table.
  • a table is said to be a reachability table and is illustrated in Fig. 4.
  • the first row in the table of Fig. 4 deals with memory location A which is able to be accessed by machines Ml, M2 and Mn.
  • the second row in the table of Fig. 4 deals with memory location B which is only able to be accessed by machine Ml.
  • object D is only able to be accessed by machine M2
  • object E is only able to be accessed by machine Mn.
  • the class X is able to be accessed by all of the machines Ml, M2 and Mn.
  • a single reachability table can be provided which is located in, and maintained by, the server machine X.
  • the computer system it is also possible for the computer system to be operated without a server machine X in which case it is desirable for each machine to operate its own reachability table.
  • Fig. 5 illustrates individual reachability tables for the individual machines in the circumstances corresponding to Fig. 4.
  • class X As the class X needs to refer to the object A , then class X is said to point to object A. This is indicated in Fig. 3 by an arrow pointing from classes Xl, X2 and Xn to objects Al, A2 and An respectively.
  • Fig. 6 in the execution of the application program 50, an assignment operation is executed by machine Mn in which the reference from class Xn to object An is overwritten with an empty or "null" reference. In this way, class Xn no longer points to object An.
  • classes Xl and X2 on machines Ml and M2 are updated to no longer reference objects Al and A2 respectively. This change is carried out by the server machine X in the case where it is present, or by the DRT 71/n of machine Mn in the case where server machine X is not present.
  • Fig. 9 illustrates the position after the operating system of machine Mn, or the DRT 71/n, determines that object An is no longer needed on machine Mn. At this point machine Mn is free to reclaim the memory presently occupied by the local copy (An) of the object A.
  • Such a system of memory reclamation is inherent in a computer and necessary to ensure that the local memory does not become cluttered with unused material.
  • such a system operates in the background and thus programmers can rely upon unused objects, etc being cleaned up in due course. Therefore, no specific action needs to be taken by the programmer to delete or finalise unused objects.
  • the single reachability table of Fig. 10, or the reachability table for machine Mn in Fig. 11, is updated to indicate the object A is no longer accessible on machine Mn.
  • object A is still regarded as being shared because at least two machines, Ml and M2 in this example, are still able to access object A.
  • object A is still bounded by double lines.
  • any changes to Al must be made to A2, and visa versa.
  • machine M2 determines that object A2 on machine M2 is no longer needed or utilised locally by machine M2.
  • the operating system of machine M2 or DRT 71/2 can execute an inherent procedure to reclaim the memory presently utilized by the local copy A2 of the global object A.
  • the reachability table(s) is/are modified so that object A is no longer recorded as being accessible by machine M2.
  • object A is indicated in Fig. 12 as being bounded only by a single line. That is, only machine Ml can access object A (and so it can be referred to in Fig. 12 merely as A rather than Al - since the Al terminology would imply that the copy on machine Ml of an object is also present on at least one other machine).
  • the reference to object A in the reachability table(s) can be deleted entirely, if desired. More importantly, changes to object A need not be communicated to any other machine, and if machine Ml no longer needs to make reference to object A then it can be deleted from machine Ml to reclaim the memory space previously occupied by object A.
  • the reachability data enables structures, assets or resources (ie memory locations) to be divided into two categories or classes.
  • the first category consists of those locations which are able to be accessed by all machines. It is necessary that write actions carried out in respect of such memory locations be distributed to all machines so that all corresponding memory locations have the same content (except for delays due to transmission of updating data).
  • write actions to these memory locations need not be distributed to all the other machines, nor need there be corresponding memory locations on the other machines. As a consequence of this categorisation, unused memory locations can be quickly identified and reclaimed.
  • JAVA includes both the JAVA language and also JAVA platform and architecture.
  • the unmodified application code may either be replaced with the modified application code in whole, corresponding to the modifications being performed, or alternatively, the unmodified application code may be replaced in part or incrementally as the modifications are performed incrementally on the executing unmodified application code. Regardless of which such modification routes are used, the modifications subsequent to being performed execute in place of the unmodified application code.
  • a global identifier is as a form of 'meta-name' or 'meta-identity' for all the similar equivalent local objects (or classes, or assets or resources or the like) on each one of the plurality of machines Ml, M2...Mn.
  • a global name corresponding to the plurality of similar equivalent objects on each machine (e.g. "globalname7787"), and with the understanding that each machine relates the global name to a specific local name or object (e.g.
  • each DRT 71 when initially recording or creating the list of all, or some subset of all objects (e.g. memory locations or fields), for each such recorded object on each machine Ml, M2...Mn there is a name or identity which is common or similar on each of the machines Ml , M2...Mn.
  • the local object corresponding to a given name or identity will or may vary over time since each machine may, and generally will, store memory values or contents at different memory locations according to its own internal processes.
  • each of the DRTs will have, in general, different local memory locations corresponding to a single memory name or identity, but each global "memory name” or identity will have the same "memory value or content” stored in the different local memory locations. So for each global name there will be a family of corresponding independent local memory locations with one family member in each of the computers. Although the local memory name may differ, the asset, object, location etc has essentially the same content or value. So the family is coherent.
  • the term "table” or “tabulation” as used herein is intended to embrace any list or organised data structure of whatever format and within which data can be stored and read out in an ordered fashion.
  • memory locations include, for example, both fields and array types.
  • the above description deals with fields and the changes required for array types are essentially the same mutatis mutandis.
  • the present invention is equally applicable to similar programming languages (including procedural, declarative and object orientated languages) to JAVA including Microsoft.NET platform and architecture (Visual Basic, Visual C/C ++ , and C#) FORTRAN, C/C*, COBOL, BASIC etc.
  • object and class used herein are derived from the JAVA environment and are intended to embrace similar terms derived from different environments such as dynamically linked libraries (DLL), or object code packages, or function unit or memory locations.
  • DLL dynamically linked libraries
  • any one or each of these various means may be implemented by computer program code statements or instructions (possibly including by a plurality of computer program code statements or instructions) that execute within computer logic circuits, processors, ASICs, logic or electronic circuit hardware, microprocessors, microcontrollers or other logic to modify the operation of such logic or circuits to accomplish the recited operation or function.
  • any one or each of these various means may be implemented in firmware and in other embodiments such may be implemented in hardware.
  • any one or each of these various means may be implemented by a combination of computer program software, firmware, and/or hardware.
  • any and each of the abovedescribed methods, procedures, and/or routines may advantageously be implemented as a computer program and/or computer program product stored on any tangible media or existing in electronic, signal, or digital form.
  • Such computer program or computer program products comprising instructions separately and/or organized as modules, programs, subroutines, or in any other way for execution in processing logic such as in a processor or microprocessor of a computer, computing machine, or information appliance; the computer program or computer program products modifying the operation of the computer in which it executes or on a computer coupled with, connected to, or otherwise in signal communications with the computer on which the computer program or computer program product is present or executing.
  • Such a computer program or computer program product modifies the operation and architectural structure of the computer, computing machine, and/or information appliance to alter the technical operation of the computer and realize the technical effects described herein.
  • the invention may therefore include a computer program product comprising a set of program instructions stored in a storage medium or existing electronically in any form and operable to permit a plurality of computers to carry out any of the methods, procedures, routines, or the like as described herein including in any of the claims.
  • the invention includes (but is not limited to) a plurality of computers, or a single computer adapted to interact with a plurality of computers, interconnected via a communication network or other communications link or path and each operable to substantially simultaneously or concurrently execute the same or a different portion of an application code written to operate on only a single computer on a corresponding different one of computers.
  • the computers are programmed to carry out any of the methods, procedures, or routines described in the specification or set forth in any of the claims, on being loaded with a computer program product or upon subsequent instruction.
  • the invention also includes within its scope a single computer arranged to co-operate with like, or substantially similar, computers to form a multiple computer system.
  • a method of disabling a local memory clean-up procedure inherently present in each of a plurality of computers each with their corresponding independent local memory, each substantially simultaneously executing a corresponding different portion of an application program written to execute on only a single computer, and each being connected via a communications network to permit updating of corresponding memory locations comprising the steps of: (i) categorizing the memory locations of the local memories into a first reachability category in which the local memory locations are replicated on selected ones, or all, of the computers and therefore require updating via the communications network with changes to corresponding memory locations of the other computers having access to maintain substantial memory coherence, and into a second category in which the local memory locations are present only in the local computer and therefore no updating is required,
  • the method includes the further step of;
  • the method includes the further step of:
  • the method includes the step of:
  • the method includes the further step of:
  • the memory locations include an asset, structure or resource.
  • a computer program product comprising a set of program instructions stored in a storage medium and operable to permit a plurality of computers to carry out any of the above method(s). Furthermore there is provided a plurality of computers interconnected via a communications network and operable to ensure carrying out of any of the above method(s).
  • a clean-up procedure modified multiple computer system in which a plurality of computers each has their corresponding independent local memory, each has an inherent local memory clean-up procedure, each substantially simultaneously executes a corresponding different portion of an application program written to execute on only a single computer, and each is connected via a communications network to permit updating of corresponding memory locations
  • the system including a reachability means to categorize memory locations of the local memories into a first category in which the local memory locations are replicated on selected ones, or all, of the computers and therefore require updating via the communications network with changes to corresponding memory locations of other computers to maintain substantial memory coherence, and into a second category in which the local memory locations are present only in the local computer and therefore no updating is required
  • the system includes a disabling means connected to the reachability means and to each of the plurality of computers to disable the inherent local memory clean-up procedure in respect of memory locations in the first category only
  • the reachability means includes a demoting means to demote from the first category to the second category any of the first
  • the reachability means comprises a reachability table in which is maintained data regarding the memory location classification.
  • a server computer connected to the communications network, the server computer including a single reachability table.
  • each of the plurality of computers includes a corresponding reachability table.
  • the memory locations include an asset, structure or resource.
  • a single computer adapted to co-operate with at least one other computer in order to carry out any of the above method(s) or form the above computer system.
PCT/AU2006/001448 2005-10-10 2006-10-05 Multiple computer system with enhanced memory clean up WO2007041763A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2008534814A JP2009512029A (ja) 2005-10-10 2006-10-05 拡張メモリクリーンアップを備えたマルチコンピュータシステム
AU2006301910A AU2006301910B2 (en) 2005-10-10 2006-10-05 Multiple computer system with enhanced memory clean up
CN200680037516.7A CN101283344B (zh) 2005-10-10 2006-10-05 具有增强的存储器清除的多计算机系统
EP06790318A EP1934775A4 (en) 2005-10-10 2006-10-05 MULTIPLE COMPUTER SYSEMA WITH IMPROVED CLEANING OF THE MEMORY

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AU2005905581 2005-10-10
AU2005905581A AU2005905581A0 (en) 2005-10-10 Multiple Computer System with Enhanced Memory Clean Up

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JP (1) JP2009512029A (zh)
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US9235485B2 (en) * 2013-07-22 2016-01-12 International Business Machines Corporation Moving objects in a primary computer based on memory errors in a secondary computer

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EP1934775A1 (en) 2008-06-25
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CN101283344B (zh) 2010-10-06
EP1934775A4 (en) 2009-01-28

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