WO2007039891A2

WO2007039891A2 - Burst mode pin diode for passive optical networks (pon) applications

Info

Publication number: WO2007039891A2
Application number: PCT/IL2006/000500
Authority: WO
Inventors: Haim Ben-Amram
Original assignee: Passave Ltd.
Priority date: 2005-10-04
Filing date: 2006-04-23
Publication date: 2007-04-12
Also published as: WO2007039891A3

Abstract

A PIN photodiode optimized for burst mode applications comprising an InP substrate, an N-InGaAs layer grown on the InP substrate, an essentially intrinsic (I)-InGaAs layer formed on the highly doped InP layer, a highly doped P+- InGaAs layer formed on the I-InGaAs layer and an antireflection coating formed on top of the highly P- InGaAs layer. In a preferred embodiment, the N-InGaAs layer is 60nm thick, the I-InGaAs layer is 450nm thick and the P-InGaAs layer is 450nm thick.

Description

BURST MODE PIN DIODE FOR PASSIVE OPTICAL NETWORK (PON) APPLICATIONS

FIELD OF THE INVENTION

The present invention relates to optical receivers operative to detect optical signals in passive optical networks (PON)₅ and more particularly to PIN diode devices operating as such receivers in burst mode in PON.

BACKGROUND OF THE INVENTION

Passive optical networks including Ethernet PON (EPON) and Gigabit PON (GPON) are known, see for example US Patent Application No. 20020196801 to Haran et al, which is incorporated herein by reference. A PON, shown exemplarily in FIG. 1 , is a single shared optical fiber network that uses a passive splitter (1 : 16, 1 :32 or 1 :64) to divide a single fiber connecting a central office optical line terminal (OLT) to separate users (subscribers) represented by optical network units (ONUs). A PON configured as a full duplex mode in Point to Multi-Point (P2MP) topology uses 2 wavelengths, 1490nm for the downstream direction (link) and 1310nm for the upstream link. The downstream traffic is based on Time Division Multiplexing (TDM) and the upstream traffic is based on Time Division Multiplexing Access (TDMA) or "burst traffic". PON topology allows ONUs to be connected at different distances from the OLT.

Optical receivers (OR) in PONs are also known, as disclosed for example in U.S. Patent Application No. 2005/0281565 by Duanmu et al. The function of an OR is to convert an optical signal into electrical signal. As shown in FIG. 2, and OR receiver comprises a photo detector (e.g. PIN photodiode of PD), an analog front end (a trans-impedance amplifier TIA and a low impedance amplifier LIA) module and an optional clock and data recovery module (CDR). The PIN PD is the main element of the receiver, and it is required to have high responsivity, fast response, low noise and low capacitance. PIN PDs are described for example in chapter 50, p. 402-408 of the "Complete guide to semiconductor devices" by. Kwok K. Ng₅ ISBN 0-07- 035860-5, McGraw-Hill 1995, which is hereby incorporated herein by reference. As a material for PDs₅ InGaAs is superior to Si and Ge in a number of key parameters, as shown in Table 1. Table 1

The speed of a PIN PD is mainly determined by either the PIN capacitance or the carrier transit time. The capacitance of the PIN diode changes depending on the PIN size and structure. Once a PIN diode converts the incident light into current signal, the TIA boosts the small current input and converts it to a voltage output signal.

The application of PIN diodes in burst mode receivers is known, see e.g. U.S. Patent No.

5,661,585 to Feldman et al, and U.S. Patent Applications No. 2005/020665 by Manderscheid and 2005/0281565 by Duanmu et al. In a burst-mode application, the optical receiver in the OLT receives packet streams from different ONUs₅ which are located at different distances from the OLT. This introduces problems, as the optical receiver needs to handle packet data with different amplitudes, different phase, a wide dynamic range and high sensitivity. Present PIN

PDs, including those disclosed in the abovementioned US patent applications, are not designed to fulfill all these requirements and perform rather poorly in burst mode applications. The problems of using existing PIN diodes in burst mode are described in more detail next.

Off-the-shelf PIN PDs are targeted for continuous mode (CM) traffic in point-to-point (P2P) topology. In CM, there is always traffic in the fiber although there is no data to send. Due to the fact the topology is P2P, the amplitude of the incoming data is constant. Burst Mode traffic is different. The main problem here is to achieve dynamic range (>22dB) and high sensitivity (-29dBm @1.25Gbps) in view of the "tail effect" shown in FIG. 3 and explained below. This effect is affected by the RC time constant, the carrier transit time and the carrier diffusion time. "RC" comprises the PIN PD capacitance and input resistance of the amplifier. The PIN PD capacitance is a function of the area (A), resistivity (p) and bias voltage (Vb). For the case where the PD is not fully depleted by the applied bias voltage, the PD capacitance varies as:

A small RC time constant can be achieved by using a small active area or higher bias voltages. However, higher bias voltages increase the dark current, resulting in higher noise. For a PIN PD which is fully depleted by the applied bias voltage (which is often the case for PIN diodes), the detector capacitance is not decreased by further increases in the bias voltage, and bandwidth improvement is only achieved with the use of smaller detectors and/or reduction in the input resistance of the amplifier.

The carrier transit time t_d the time required for the carriers to be collected, and is essentially the distance that the carriers need to travel divided by the average velocity of the carriers. Increasing the bias voltage will usually increase carrier velocities, and therefore reduce transit times, but results in higher dark currents and noise.

- ^W ^{t d =} V^~ _d

Λvhere W is the depletion layer width and V_d is the carrier drift velocity.

The carrier diffusion time in a not fully depleted PIN PD is the time required for carriers generated outside the depletion region to be collected.

. FIG. 3 illustrates two incoming "Burst" packets from ONUs (subscribers) to the OLT (Central Office) in PON topology. Each burst arrives from a different ONU with a constant gap time between bursts. The first burst has a high amplitude (energy), while the second has a low amplitude. The different amplitude demonstrates the different distances between the ONUs and the OLT. A large amplitude means an ONU closer to the OLT?, while a small amplitude means an ONU farther from the OLT.

When the optical receiver receives a burst packet, it samples the data at the center of the signal. This is done by the LIA. When a low energy burst follows by a high energy burst, the PIN diode needs to discharge the high energy very fast to start "learning" the new, lower amplitude burst. If the PIN PD is not fast we will get the "tail effect". The "Tail effect" affects the sensitivity, since it leads to a long tail in the response time. The dotted line is the optimum situation, after each burst the photocurrent goes to "zero".

Since known PIN ODs are not optimized for burst mode detection, is would be advantageous to have such optimized PDs.

SUMMARY OF THE INVENTION

The present invention discloses a burst mode PIN PD especially suited to handle burst mode traffic in a P2MP PON topology. The invention discloses an optical InGaAs PIN PD with high linearity, high sensitivity and fast response.

According to the present invention there is provided a PIN photodiode optimized for burst mode applications comprising an InP substrate, an N- InGaAs layer grown on the InP substrate, an essentially intrinsic (I)-InGaAs layer formed on the highly doped InP layer, a highly doped P⁺- InGaAs layer formed on the 1-InGaAs layer and an antireflection coating formed on top of the highly P- InGaAs layer.

In some embodiments, the antireflection coating layer includes a Al₂O₃ layer and a SiO layer applied to an active open area of about 70 square micrometers.

In some embodiments, the Al₂O₃ layer has a thickness of approximately 30nm and the SiO layer has a thickness of 150nm. As used herein, "approximately" indicates a possible variation of no larger than ± 1%.

In some embodiments, the N-InGaAs layer has a thickness ranging from 50 to 70 nm and a doping ranging between 1O³⁶-1O¹⁸ cm^"3, wherein the 1-InGaAs layer has a thickness ranging between 200 and 300 nm and wherein the P⁺-InGaAs layer has a thickness ranging between 370 and 540 nm and a doping ranging between 10¹⁷-10¹⁹ cm^'3. In some embodiments, the N-InGaAs layer has a thickness of 60 nm and a doping of 10¹⁷ cm^"3, wherein the 1-InGaAs layer has a thickness of 60nm, wherein the P⁺-InGaAs layer has a thickness of approximately 450 nm and a doping of 5xlO¹⁸ cm^"3.

In some embodiments, the PIN photodiode comprises a highly doped N⁺-InP layer with a thickness ranging between 240 and 360 nm and interposed between the N-InGaAs layer and the InP substrate.

In some embodiments, the N⁺-InP layer has a thickness of 300 nm. In some embodiments, the PIN photodiode further comprises a highly doped P⁺-InP layer and a P⁺-InGaAs layer interposed between the P-InGaAs layer and the antireflection coating.

In some embodiments, the P⁺-InP layer has a thickness ranging between 80-120 nm and a doping ranging between 10¹⁸-10¹⁹ cm^'3 and wherein the P⁺-InGaAs layer has a thickness ranging between 24 and 36nm and a doping ranging between 10¹⁸-10¹⁹ cm^'3.

In some embodiments, the P⁺-InP layer has a thickness of approximately 100 nm and a doping of 2x10¹⁹ cm^'3 and wherein the P⁺-InGaAs layer has a thickness of approximately 30nm and a doping of 4xlO¹⁹ cm^"3.

According to the present invention there is provided a PIN photodiode optimized for burst mode applications comprising an InP substrate; an approximately 60nm thick, IxIO¹⁷ cm^"3 doped N- InGaAs layer grown on the InP substrate; a non-intentionally doped approximately 250nm thick 1-InGaAs layer formed on the highly doped InP layer; an approximately 30 nm thick, 4xlO¹⁹ cm^" P⁺-InGaAs layer formed on the 1-InGaAs laye and an antireflection coating formed on top of the highly P-InGaAs layer.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is herein described, by way of example only, with reference to the accompanying drawings, wherein: FIG. 1 shows schematically a passive optical network; FIG. 2 shows schematically an optical receiver;

FIG. 3 illustrates the tail effect in a PIN photodiode;

FIG. 4 shows the structure of a PIN photodiode of the present invention fabricated according to the specification in Table 2.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention discloses an innovative PIN structure and photodiode based on such a structure, which provide high performance in burst-mode applications. The special structure optimizes various structural parameters (irradiated area, layer thickness and doping, etc.). Various simulations and calculations to obtain an optimal design have been performed using a host of parameters listed in Table 1. These calculations have resulted in the specification shown in Table 2, which leads to a preferred embodiment of the structure. The technical specification in Table 2 is designed to meet both ITU-G.984 (GPON) and EEEE 802.3ah (GE- PON) requirements.

Table 2

FIG. 4 shows a preferred embodiment of a PIN photodiode 100 of the present invention fabricated according to the specification in Table 2. PD 100 is built of InGaAs on an InP substrate 102 and comprises a top P-InGaAs layer 104, an undoped (or "non-intentionally doped") I-InPGaAs layer 106 and a bottom N-type InGaAs layer 108. Each layer may be subdivided into sub-layers. A N⁺InP buffer layer 110 is used between the InP substrate and the N-InGaAs layer to lattice-match the two and provide a low conductivity path to a bottom contact 112. Top P⁺ InP and InGaAs layers (114 and 116 respectively) are used between the P-InGaAs and a top contact 118 to improve the quantum efficiency. Layer 116 is coated with an antireflection layer 120. A single-layer antireflection coating is good for a very narrow wavelength range (theoretical only at one wavelength) and dielectric materials with suitable refractive indices may not even exist. Thus, the surface reflection cannot be reduced to zero. Ideally, one needs to utilize multiple layers to form an antireflection coating matched in a wider wavelengths range and relax the requirements for the dielectric coating materials themselves. In the PIN PD of the present invention, we use two antireflection coating layers consisting of SiO and Al₂O₃.

As mentioned, in order to achieve fast response, the transit time needs to be minimized by reducing W;, (the intrinsic layer thickness). This leads to an increase of the junction capacitance and thus gives a larger RC limitation. For a given photosensitive area A, there is an optimum value for W; for fastest possible response speed. Since the quantum efficiency also decreases with decreasing Wj, a trade-off has to be found between speed of response and quantum efficiency. Increasing the junction area "A", directly increases the RC limitation, but can lead to better responsivity values because of reduced optical coupling losses. In the present invention, calculations and simulations have shown that the optimal value for the thickness of Wj is between 1 to 3μm. A key advantage of the burst mode PIN PD of the present invention is a faster switching time between two different burst packets due to the fast transit time.

Structure 100 in FIG. 4 is shown with preferred thickness and doping levels as well as ranges of each. The PIN PD has an active photosensitive area "A" 122 of about 70 square micrometers. The antireflection coating preferably comprises a 150nm thick SiO layer and a 30nm thick AI2O3 layer. In alternative embodiments, these thicknesses may vary by no more than ± 20%, and preferably by less than ± 5%. The top P⁺ InGaAs layer is approximately 30nm thick, with an average doping level of 4x10¹⁹ cm^"3. In alternative embodiments, this doping may range between 10^I8-10¹⁹ cm^'3. The P⁺ InP layer is approximately lOOnm thick, with an average doping level of 2xl0¹⁹cm^"3. In alternative embodiments, this doping may range between 10¹⁸-10¹⁹ cm^"3. The P-InGaAs layer is approximately 450nm thick, with an average doping level of 5xlO¹⁸ cm^"3. In alternative embodiments, this doping may range between 10¹⁷-10¹⁹ cm^"3. The 1-InGaAs layer is approximately 250nm thick and without any intentional doping (nominally intrinsic). The N-InGaAs layer is approximately 60nm thick with an average doping level of IxIO¹⁷Cm^'3. In alternative embodiments, this doping may range between 10¹⁶-10¹⁸ cm^"3. The N⁺InP layer is approximately 300nm thick, with an average doping level of 2xlO^π cm^"3. In alternative embodiments, this doping may range between 10¹⁷ - 10¹⁸ cm^"3. The entire structure above is formed on top of an undoped 600nm LiP substrate.

In general, the thickness of each of the layers in FIG. 4 may vary by up to +20%, and preferably by less than ca. ±5 percent and still provide beneficial burst mode operation characteristics. The PIN diode supports the required dynamic range (>22dB) and high sensitivity of (-

29dBm @1.25Gbps) in a worst case situation (smallest burst energy followed by highest burst energy).

All publications, patents and patent applications mentioned in this specification are herein incorporated in their entirety by reference into the specification, to the same extent as if each individual publication, patent or patent application was specifically and individually indicated to be incorporated herein by reference. In addition, citation or identification of any reference in this application shall not be construed as an admission that such reference is available as prior art to the present invention.

While the invention has been described with respect to a limited number of embodiments, it will be appreciated that many variations, modifications and other applications of the invention may be made.

Claims

WHAT IS CLAIMED IS:

1. A PIN photodiode optimized for burst mode applications comprising: a. an InP substrate; b. an N- InGaAs layer grown on the InP substrate; c. an essentially intrinsic (I)-InGaAs layer formed on the highly doped InP layer; d. a highly doped P⁺- InGaAs layer formed on the 1-InGaAs layer; and e. an antireflection coating formed on top of the highly P- InGaAs layer.

2. The PIN photodiode of claim I₅ wherein the antireflection coating layer includes a AI₂O₃ layer and a SiO layer applied to an active open area of about 70 square micrometers.

3. The PIN photodiode of claim 2, wherein the Al₂O₃ layer has a thickness of 30nm and the SiO layer has a thickness of approximately 150nm.

4. The PIN photodiode of claim 2, wherein the N-InGaAs layer has a thickness ranging from 50 to 70 nm and a doping ranging between 10¹⁶-10¹⁸ cm^"3, wherein the 1-InGaAs layer has a thickness ranging between 200 and 300 nm and wherein the P⁺-InGaAs layer has a thickness ranging between 370 and 540 nm and a doping ranging between 10¹⁷-10¹⁹ cm^'3.

5. The PIN photodiode of claim 4, wherein the N-InGaAs layer has a thickness of approximately 60 nm and a doping of 10¹⁷ cm^'3, wherein the 1-InGaAs layer has a thickness of approximately 60nm, wherein the P⁺-InGaAs layer has a thickness of approximately 450 nm and a doping of 5xl0^!8 cm^"3.

6. The PIN diode of claim 5, further comprising a highly doped N⁺-InP layer with a thickness ranging between 240 and 360 nm and interposed between the N-InGaAs layer and the InP substrate.

7. The PIN photodiode of claim 6, wherein the N⁺-InP layer has a thickness of approximately 300 nm.

8. The PIN photodiode of claim 7, further comprising a highly doped P⁺-InP layer and a P⁺- InGaAs layer interposed between the P-InGaAs layer and the antireflection coating.

9. The PIN photodiode of claim 8, wherein the P⁺-InP layer has a thickness ranging between 80-120 nm and a doping ranging between 10¹⁸-10¹⁹ cm^'3 and wherein the P⁺-InGaAs layer has a thickness ranging between 24 and 36nm and a doping ranging between 10¹⁸-10¹⁹ cm^"3.

10. The PIN photodiode of claim 9, wherein the P⁺-InP layer has a thickness of approximately 100 nm and a doping of 2xlO¹⁹ cm^'3 and wherein the P⁺-InGaAs layer has a thickness of 3 Onm and a doping of 4x 10¹⁹ cm^"3.

11. A PIN photodiode optimized for burst mode applications comprising: a. an InP substrate; b. an approximately 60nm thick, IxIO¹⁷ cm^"3 doped N- InGaAs layer grown on the InP substrate; c. a non-intentionally doped approximately 250nm thick 1-InGaAs layer formed on the highly doped InP layer; d. an approximately 30 nm thick, 4xlO¹⁹ cm^"3 P⁺-InGaAs layer formed on the I- InGaAs layer; and e. an antireflection coating formed on top ofthe highly P-InGaAs layer.