WO2007037658A1

WO2007037658A1 - Method for fabricating nanostructure

Info

Publication number: WO2007037658A1
Application number: PCT/KR2006/003939
Authority: WO
Inventors: Ki-Bum Kim; Sang-Hyun Park
Original assignee: Seoul National University Industry Foundation
Priority date: 2005-09-29
Filing date: 2006-09-29
Publication date: 2007-04-05
Also published as: KR101003836B1; KR20070036499A

Abstract

A method for fabricating a nanostructure includes forming a silicon oxide layer over a substrate, selectively etching the silicon oxide layer to form a trench with gradually sloped sidewalls, forming a conductive layer over the silicon oxide layer with the trench, forming an aluminum layer over the conductive layer, planarizing a surface of the aluminum layer using chemical mechanical polishing (CMP), anodizing the aluminum layer to form an aluminum oxide layer with an array of nanopores, removing the barrier type aluminum oxide layer underneath the nanopores by performing the anodization overly to thereby expose the conductive layer underneath the nanopores, and growing nanowires inside the individual nanopores using the exposed conductive layer.

Description

METHOD FOR FABRICATING NANOSTRUCTURE

Technical Field

[1] The present invention relates to a nanostructure, and more particularly, to a method for fabricating a nanostructure using a pore array of anodized aluminum oxide. Background Art

[2] Nanostructural pores that can be obtained from anodized aluminum oxide are initially oriented irregularly. However, as oxidization proceeds from upper portions of the pores, the pores are oriented in a regular direction due to interactions between the pores.

[3] Pores that are formed at the initial stage are oriented irregularly because the pore formation is highly correlated with surface roughness of aluminum, which generates a non-uniform distribution of an electric field. Due to a growth characteristic of the pores that are usually grown perpendicular to the aluminum surface, regularity in the orientation of the pores is often destructed when the aluminum surface is rough.

[4] Figs. 1 to 4 are cross-sectional views to illustrate a conventional method for forming a pore array of anodized aluminum oxide.

[5] Referring to Fig. 1, a silicon oxide layer 12, a conductive layer 13, and an aluminum layer 14 are sequentially formed on a substrate 11, which is formed of silicon. The aluminum layer 14 is formed using a thin film formation process including sputtering, chemical vapor deposition (CVD), or atomic layer deposition (ALD).

[6] The above resultant structure is immersed into an electrolyte solution. At this point, direct current flows under the condition that the aluminum (Al) layer 14 and a separate carbon electrode 15 are set as an anode and a cathode, respectively. The electrolyte solution is an acidic electrolyte solution such as oxalic acid, phosphoric acid or sulfuric acid.

[7] Referring to Fig. 2, due to electrochemical oxidization of the aluminum layer 14 in the electrolyte solution, the aluminum layer 14 is oxidized to an aluminum oxide (Al O ) layer 14 A, and a plurality of pores 14B are formed to a certain depth within the aluminum oxide layer 14 A. Though the pores 14B are initiated with an irregular position at the surface, the pores 14B are transformed to a periodic array as the an- odization proceeds. Thus, the periodicity of the pores 14B is proportional to the an- odization time. A remaining portion 14C of the aluminum layer 14 whose thickness decreases as the aluminum oxide layer 14A is formed have a pitted surface following the position of the pores 14B. This oxidization is referred to as a first anodization.

[8] Referring to Fig. 3, the aluminum oxide layer 14A (see Fig. 2) is removed by being immersed into an acidic solution, and the remaining portion 14C of the aluminum layer 14 is oxidized again using the same method described in Fig. 1. This oxidization is referred to as a second anodization.

[9] Referring to Fig. 4, due to the second anodization, the remaining portion 14C of the aluminum layer 14 is oxidized again to the aluminum oxide layer 14 A, and the same pores 14B are formed to a certain depth within the aluminum oxide layer 14 A. The pores 14B are arranged with a regular orientation. A further remaining portion 14D of the aluminum layer 14 whose thickness further decreases as the aluminum oxide layer 14A is formed have amore regularly pitted rough surface following the position of the pores 14B.

[10] As mentioned above, anodization is a method of forming multiple pores by anodizing an aluminum layer within an electrolyte solution and the periodicity of the pores can be improved by repeating the anodization at least twice after removing the former pore array. However, this conventional anodization method has several disadvantages as follows. First, forming pores with the uniform size and depth is often difficult due to bad surface flatness of an aluminum layer. More particularly, when a micrometer-thick aluminum layer is deposited by sputtering, the aluminum layer has bad surface roughness. Hence, nanosized pores formed through anodization without a planarization commonly have non-uniform depths and sizes.

[11] Figs. 5 to 7 are scanning electron microscopy (SEM) micrographs of pore arrays each obtained after performing the conventional anodization twice to a rough aluminum layer. Particularly, the pore arrays illustrated in Figs. 5, 6 and 7 are obtained when a first anodization process is performed for 8 minutes, 30 minutes and 60 minutes, respectively and a second anodization process is performed for 8 minutes for all the cases.

[12] As illustrated in Figs. 5 to 7, a bottom portion of an aluminum layer has a wavy interface between pores and underlying aluminum even though the anodization is carried out. Thus, the pores that are formed after the anodization have very irregular depths and sizes. This non-uniformity is also disadvantageous when other materials that can form nanosized pores through anodization are used instead of aluminum.

[13] According to the conventional anodization, when nanowires such as carbon nanotubes are grown inside the pores using the pore array as a template, aluminum oxide that consecutively exist at the bottom of the pores, which is often called "barrier type aluminum oxide," hinders a contact between the nanowires and the substrate. Especially, when nanowires are grown using an electrochemical deposition method in which a conductive layer underneath the pores needs to be exposed or a CVD method that usually requires a catalyst, the barrier type aluminum oxide needs to be removed to expose the conductive layer that is generally required for the nanowire growth or electrical contact to the nanowire.

[14] The barrier type aluminum oxide layer is often removed through wet etching. The wet etching makes not only the bottom of the pores but also the entire pores etched. Hence, the pores should be grown on the conductive layer to selectively remove the barrier type aluminum oxide by the wet etching method because the conductive underlayer causes voids underneath the pores during the successive reaction with oxidants and the electrolyte. However, the successive reaction of the underlying conductive layer is usually another oxidation which makes another oxide layer between the nanowires and the substrate or noble metals (e.g. Pt, Au) causes an aggressive evolution of gas elements, which causes a delamination of the pores with the substrate. Accordingly, when nanowires need to be grown inside the pores, a method of selectively removing the aluminum oxide layer consecutively exist at the bottom of the pores without a further oxidation of the underlying conductive layer or an aggressive gas evolution is required. Disclosure of Invention Technical Problem

[15] The present invention is directed to provide a method for fabricating a nanostructure including uniformly sized and deepened nanopores that are formed when an aluminum layer is oxidized via anodization. Technical Solution

[16] In accordance with one aspect of the present invention, there is provided a method for fabricating a nanostructure including: forming a silicon oxide layer over a substrate; selectively etching the silicon oxide layer to form a trench with gradually sloped sidewalls; forming a conductive layer over the silicon layer within the trench; forming an aluminum layer over the conductive layer; planarizing a surface of the aluminum layer using chemical mechanical polishing (CMP); anodizing the aluminum layer to form an aluminum oxide layer with an array of nanopores; removing the barrier type aluminum oxide layer underneath the nanopores by performing the anodization overly to thereby expose the conductive layer underneath the nanopores; and growing nanowires inside the individual nanopores using the exposed conductive layer.

[17] In accordance with another aspect of the present invention, there is provided a method for fabricating a nanostructure including: forming a silicon oxide layer over a substrate; forming a conductive layer over the silicon oxide layer; forming an aluminum layer over the conductive layer; planarizing a surface of the aluminum layer through performing CMP; anodizing the aluminum layer to form an aluminum oxide layer with an array of nanopores; removing the barrier type aluminum oxide layer by performing overly the anodization to thereby expose the conductive layer underneath the nanopores; and growing nano wires inside the individual nanopores using the exposed conductive layer. Advantageous Effects

[18] According to various embodiments of the present invention, after an aluminum layer is formed, the aluminum layer is planarized through performing chemical mechanical polishing (CMP) to thereby improve surface roughness of the aluminum layer. The improved surface roughness can contribute to a further improvement on uniformity in size and depth of pores and periodicity of the positions of the pores formed inside the anodized aluminum layer. The pores can still be oriented in a regular direction with the uniform size and depth even though variously shaped patterns are formed over a substrate structure.

[19] A barrier type aluminum oxide layer formed underneath an anodized aluminum oxide pore array can be removed by oxidizing a conductive layer formed beneath the aluminum layer and performing a chemical etching method to selectively remove the oxidized part of the conductive layer. The extent of the oxidation of the conductive layer can be minimized by control of the deposition process. As a result, the conductive layer disposed underneath the pore array can be exposed so as to be used in selectively growing nanowires over the pore array.

[20] Various types of nanowires (e.g., nanowires including nanotubes) are formed over an array of nanosized pores that are formed within an anodized aluminum mold. Accordingly, many different nanosized sensors can be manufactured with use of the nanowires. Brief Description of the Drawings

[21] The above and other objects and features of the present invention will become better understood with respect to the following description of the embodiments given in conjunction with the accompanying drawings, in which:

[22] Figs. 1 to 4 are cross-sectional views to illustrate a conventional method for forming a pore array of anodized aluminum oxide;

[23] Figs. 5 to 7 are SEM micrographs of pore arrays of anodized aluminum oxide after performing conventional anodization twice to a rough aluminum layer;

[24] Figs. 8 to 11 are cross-sectional views to illustrate a method for fabricating a pore array of anodized aluminum oxide in accordance with a first embodiment of the present invention;

[25] Figs. 12 to 15 are cross-sectional views to illustrate a method for fabricating a pore array of anodized aluminum oxide in accordance with a second embodiment of the present invention; [26] Figs. 16 to 19 are cross-sectional views to illustrate a method for fabricating a pore array of anodized aluminum oxide in accordance with a third embodiment of the present invention;

[27] Figs. 20 to 22 illustrate SEM micrographs of pore arrays of anodized aluminum oxide after anodization is performed twice in accordance with the first embodiment of the present invention;

[28] Figs. 23 to 27 illustrate SEM micrographs of pore arrays of anodized aluminum oxide when a pattern exists over a substrate in accordance with the third embodiment of the present invention;

[29] Figs. 28 to 32 are cross-sectional views to illustrate a method for fabricating a nanostructure obtained using a pore array of anodized aluminum oxide in accordance with a fourth embodiment of the present invention;

[30] Figs. 33 to 35 are cross-sectional views to describe a method for forming a trench in accordance with an embodiment of the present invention; and

[31] Figs. 36 and 37 are cross-sectional views to illustrate a nanowire growth method when a conductive layer includes titanium nitride. Best Mode for Carrying Out the Invention

[32] A method for fabricating a nanostructure in accordance with various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[33] Figs. 8 to 11 are cross-sectional views to illustrate a method for fabricating a nanostructure using a pore array of anodized aluminum oxide in accordance with a first embodiment of the present invention.

[34] Referring to Fig. 8, a silicon oxide (SiO ) layer and a conductive layer 23 are sequentially formed over a silicon-based substrate 21. An aluminum layer 24 is formed over the conductive layer 23 using a thin film formation process such as sputtering, CVD or ALD. It is possible not to form the silicon oxide layer 22.

[35] Referring to Fig. 9, the aluminum layer 24 is planarized through CMP. Since the surface of the aluminum layer 24 is planarized, the surface roughness of the aluminum layer 24 can be improved. Reference numerals 24A and 24B represent a planarized aluminum layer and a portion of the aluminum layer 24 removed by the CMP.

[36] Referring to Fig. 10, the above resultant structure is immersed into an electrolyte solution to form an aluminum oxide layer 24C, and then into an acidic solution to remove the aluminum oxide layer 24C. The remaining structure is immersed again into the electrolyte solution. That is, the anodization is performed twice. While performing the anodization within the electrolyte solution, current flows under the condition that the planarized aluminum layer 24A and a separate carbon electrode (not illustrated) are set as an anode and a cathode, respectively. The electrolyte solution includes one selected from a group consisting of oxalic acid, sulfuric acid and phosphoric acid.

[37] As illustrated, due to the anodization in the electrolyte solution, the planarized aluminum layer 24 A is oxidized to become the aluminum oxide layer 24C. At this time, a plurality of pores 24D are formed within the aluminum oxide layer 24C, being arranged with a regular orientation after the second anodization.

[38] In the first embodiment of the present invention, there is no pattern formed over the silicon-based substrate 21. The CMP for the aluminum layer 24 is carried out for approximately 5 minutes using silica-based slurry at a pH of approximately 7.2. The aluminum layer 24 is chemically and mechanically polished to an average thickness of approximately 2 μm. During the CMP, the weight or load applied to the wafers is approximately 5 kg. For instance, the CMP is performed simultaneously on three sample pieces of wafers, each having a dimension of approximately 2.5 cm x 2.5 cm, with a rotation speed of approximately 60 rpm.

[39] After the pores 24D are formed, nanowires are grown inside the pores 24D. As illustrated in Fig. 11, when anodization is performed to remove the barrier type aluminum oxide layer 24C underneath the pores 24D, the anodization is performed overly, exposing the conductive layer 23 underneath the pores 24D, which may be partially oxidized or not. In other words, performing the over anodization causes the barrier type aluminum oxide layer 24C that is consecutively formed underneath the pores 24D to be removed and thus, to expose the conductive layer 23, which may be partially oxidized or not. During the anodization at the bottom of the pores 24D, the aluminum oxide layer 24C underneath the pores 24D is removed based on the fact that a layer of aluminum is grown under the condition that dissolution and generation of aluminum oxide are in an equilibrium state. As a result, the aluminum layer underneath the pores 24D can be consumed away. The additional oxide from the oxidation of the conductive layer can be selectively etched preserving the aluminum oxide on the conductive layer by applying a proper etchant.

[40] If the conductive layer 23 includes titanium nitride (TiN), the anodization is performed further even though the barrier type aluminum layer is consumed away. Thus, the titanium nitride layer that is exposed underneath the pores 24D is oxidized to a titanium oxide layer, and the titanium oxide layer is removed through selective wet etching, thereby exposing the titanium nitride layer.

[41] When titanium oxide-based nanowires are to be grown, the titanium oxide layer formed by the anodization is not removed. Rather, the titanium oxide layer is used as a seed layer for the titanium oxide-based nanowires, and CVD is used to grow the titanium oxide-based nanowires.

[42] If the conductive layer 23 underneath the pores 24D includes a metal that is hardly oxidized (e.g., platinum (Pt) or gold (Au)), the aluminum layer is oxidized and then anodized to selectively expose the conductive layer 23 underneath the pores 24D. Thus, the selective wet etching is not necessary. In this case, the conductive layer 23 can also be used as a catalyst for growing the nanowires.

[43] Figs. 12 to 15 are cross-sectional views to illustrate a method for fabricating a nanostructure using a pore array of anodized aluminum oxide in accordance with a second embodiment of the present invention.

[44] Referring to Fig. 12, a patterned silicon oxide layer 32 is formed in a certain profile over a silicon-based substrate 31. A trench is one exemplary pattern formed in the patterned silicon oxide layer 32. The patterned silicon oxide layer 32 is overlaid with a conductive layer 33. An aluminum layer 34 is formed over the conductive layer 33 employing sputtering. At this time, the aluminum layer 34 has a rough surface 34A.

[45] Referring to Fig. 13, the rough surface 34A of the aluminum layer 34 is planarized by CMP. The CMP is performed until the aluminum layer 34 remains with a certain thickness, and reference numeral 34B represents an aluminum layer remaining after the CMP. Since the surface of the remaining aluminum layer 34B is planarized by the CMP, surface roughness of the remaining aluminum layer 34B, caused by the deposition and the embossed profile of the bottom pattern structure, can be improved.

[46] The resultant structure is immersed into an electrolyte solution to be anodized and then into an acidic solution to remove a layer of aluminum oxide. After the removal of the aluminum oxide layer, the remaining structure is immersed again into the electrolyte solution. That is, anodization is performed at least twice. At this time, the remaining aluminum layer 34B and a separate carbon-based electrode (not illustrated) are set as an anode and a cathode, respectively, and direct current flows through the anode and the cathode. The electrolyte solution includes an acid-based electrolyte solution selected from a group consisting of oxalic acid, sulfuric acid and phosphoric acid.

[47] Referring to Fig. 14, when the anodization proceeds within the electrolyte solution, the remaining aluminum layer 34B is oxidized to an aluminum oxide layer 35, and a plurality of pores 36 are formed within the aluminum oxide layer 35. During the anodization, the thickness of the remaining aluminum layer 34B may be reduced, and reference numeral 34C represents a further remaining aluminum layer. The further remaining aluminum layer 34C may be oxidized to extend the pores 36 down to the pattern. Alternatively, the aluminum oxide layer 35 except for the further remaining aluminum layer 34C existing in the pattern may be etched, and anodization may be performed thereon twice to form an aluminum oxide layer with a plurality of pores that are regularly oriented within the pattern. By monitoring the color of the specimen or the current or potential change during the anodization, the first anodization may be stopped when the aluminum out of the pattern is completely consumed leaving the aluminum only inside of the pattern. In this case, the aluminum oxide pore array may be formed only inside of the pattern after removing the former oxide and the second anodization of the remaining aluminum.

[48] Referring to Fig. 15, nanowires are grown inside the pores 36. The anodization is performed overly such that the barrier type aluminum oxide layer 35 underneath the pores 36 does not exist. As a result, the conductive layer 33, which may be partially oxidized or not is exposed. In other words, the over anodization is performed to remove the barrier type aluminum oxide layer 35 that is consecutively formed underneath the pores 36, so that the conductive layer 33, which may be partially oxidized or not is exposed.

[49] If the conductive layer 33 includes titanium nitride, the anodization is performed continuously even though the further remaining aluminum layer 34C is removed, so that the titanium nitride layer (i.e., the conductive layer 33) that is exposed underneath the pores 36 is oxidized to a titanium oxide layer. The titanium oxide layer is removed by selective wet etching, thereby exposing the bottom titanium nitride layer.

[50] When titanium oxide-based nanowires are to be grown, the titanium oxide layer that is formed during the anodization is not removed. The titanium oxide layer is used as a seed layer for the titanium oxide-based nanowires, and CVD is employed to grow the titanium oxide-based nanowires.

[51] If the conductive layer 33 underneath the pores 36 includes a metal that is hardly oxidized (e.g., platinum or gold), the selective wet etching of a metal oxide is not necessary. Instead, the further remaining aluminum layer 34C is oxidized and then anodized to selectively expose the conductive layer 33 underneath the pores 36. Thus, the selective wet etching is not necessary. In this case, the conductive layer 33 can also be used as a catalyst for growing the nanowires.

[52] Figs. 16 to 19 are cross-sectional views to illustrate a method for fabricating a nanostructure using a pore array of anodized aluminum oxide in accordance with a third embodiment of the present invention.

[53] Referring to Fig. 16, a patterned silicon oxide layer 42 is formed to have a pattern

(e.g., trench) over a substrate 41 (e.g., a silicon-based substrate). The patterned silicon oxide layer 42 is overlaid with a conductive layer 43. An aluminum layer 44 is formed over the conductive layer 43 using sputtering. The aluminum layer 44 has a rough surface 44A.

[54] Referring to Fig. 17, the rough surface 44A of the aluminum layer 44 is planarized using CMP. The CMP is performed until the aluminum layer 44 remains inside the pattern of the patterned silicon oxide layer 42 over the substrate 41. Reference numeral 44B denotes a remaining aluminum layer inside the pattern. Since the aluminum layer 44 is planarized through the CMP, surface roughness of the aluminum layer 44 can be improved.

[55] The resultant structure is immersed into an electrolyte solution for anodization, and then into an acidic solution to remove an aluminum oxide layer formed as a result of the immersion into the electrolyte solution (i.e., the anodization). The remaining structure is immersed again into the electrolyte solution for another anodization. The anodization proceeds with flowing direct current through the remaining aluminum layer 44B and a separately prepared carbon electrode (not shown) that are set as an anode and a cathode, respectively. The electrolyte solution includes an acid-based electrolyte solution selected from a group consisting of oxalic acid, sulfuric acid and phosphoric acid.

[56] Referring to Fig. 18, the anodization causes the remaining aluminum layer 44B

(see Fig. 17) to be oxidized to the aforementioned aluminum oxide layer 45. When the aluminum oxide layer 45 is formed, a plurality of pores 46 are formed inside the aluminum oxide layer 45. Due to the anodization, the thickness of the remaining aluminum layer 44B decreases, and reference numeral 44C denotes a further remaining aluminum layer 44B after the twice performed anodization.

[57] Referring to Fig. 19, after the formation of the pores 46, nanowires are grown inside the pores 46. The anodization is performed overly to make the barrier type aluminum oxide layer 45 disposed underneath the pores 46 be removed, so that the conductive layer 43, which may be partially oxidized or not is exposed. In other words, the over anodization is performed to remove the barrier type aluminum oxide layer 45 that is consecutively formed underneath the pores 46, so that the conductive layer 43 is exposed which may be partially oxidized or not.

[58] Particularly, if the conductive layer 43 includes titanium nitride, the anodization is performed further even though the further remaining aluminum layer 44C is consumed away. Thus, the titanium nitride layer that is exposed underneath the pores 46 is oxidized to a titanium oxide layer, and the titanium oxide layer is removed through selective wet etching, thereby exposing the titanium nitride layer (i.e., the conductive layer 43).

[59] When titanium oxide-based nanowires are to be grown, the titanium oxide layer formed by the anodization is not removed. Rather, the titanium oxide layer is used as a seed layer for the titanium oxide-based nanowires, and CVD is used to grow the titanium oxide-based nanowires.

[60] If the conductive layer 43 underneath the pores 46 includes a metal that is hardly oxidized (e.g., platinum or gold), the aluminum layer is oxidized and then anodized to selectively expose the conductive layer 43 underneath the pores 46. Thus, the selective wet etching is not necessary. In this case, the conductive layer 43 can also be used as a catalyst for growing the nanowires.

[61] Figs. 20 to 22 are SEM micrographs of pore arrays of anodized aluminum oxide formed after performing anodization twice with different performance time in accordance with the first embodiment of the present invention. Particularly, the pore arrays illustrated in Figs. 20, 21 and 22 are obtained when a first anodization process is performed for approximately 8 minutes, 30 minutes and 60 minutes, respectively and a second anodization process is performed for approximately 8 minutes for all the cases.

[62] As illustrated, surface roughness of the aluminum layer at which the anodization is to be performed is improved (i.e., the rough surface of the aluminum layer is planarized). Thus, uniformity in depths and sizes of the pores formed after the anodization can be improved as well.

[63] Figs. 23 to 27 are SEM micrographs of pore arrays of anodized aluminum oxide when a pattern is formed over a substrate as like the third embodiment of the present invention. The pore arrays are formed over respective patterns. For the pattern formation, a silicon oxide layer is formed to a thickness of approximately 2 μm using CVD and patterned to have several micrometers to several hundreds of micrometers through performing photolithography and dry etching processes.

[64] Fig. 23 shows a SEM micrograph of an aluminum layer that is initially formed to a thickness of approximately 8 μm over a substrate and planarized through CMP using a hard pad and a soft pad in sequential order under the state of applying a load of approximately 3 Kg to the aluminum layer. When the pattern is formed over the substrate, CMP is performed sequentially using a hard pad and a soft pad with a load lighter than the aforementioned one so as to minimize the consumed aluminum during CMP. When CMP is performed on the substrate where the pattern is formed, the CMP is performed for approximately several minutes (e.g., for approximately 2 minutes to 3 minutes).

[65] Fig. 24 shows a SEM micrograph of an aluminum layer after anodization that is performed until the aluminum layer planarized through CMP remains within the pattern. Underneath the aluminum layer, a layer of titanium nitride and a layer of titanium, each having a thickness of approximately 50 nm, are used as a conductive layer. For instance, the resultant structure includes layers of Al/TiN/Ti/SiO /Si.

[66] Fig. 25 shows a SEM micrograph of a pore array formed inside the pattern through performing anodization on the aluminum layer remaining inside the pattern after an aluminum oxide layer is removed. Particularly, Fig. 25 shows a top view of the pore array. Also, white dots outside the square region are not pores but titanium oxide (TiO) produced when the TiN layer at the bottom of the aluminum layer is oxidized.

[67] Fig. 26 shows a cross-sectional SEM micrograph of the pore array shown in Fig.

25. As shown, a layer of aluminum that is not anodized remains over edge portions of the pattern.

[68] Fig. 27 shows a cross-sectional SEM micrograph of a pore array formed over a pattern wider than the pattern shown in Fig. 26.

[69] Figs. 28 to 32 are cross-sectional views to illustrate a method for fabricating a nanostructure using a pore array of anodized aluminum oxide in accordance with a fourth embodiment of the present invention.

[70] Referring to Fig. 28, a silicon oxide layer 52 is formed over a substrate (e.g., a silicon-based substrate) and selectively etched to form a trench 53. Particularly, the silicon oxide layer 52 is wet etched or dry and wet etched together to shape sidewalls of the trench 53 as like the shape resulted from isotropic etching. When the trench 53 is formed by the wet etching, the sidewalls of the trench 53 have a gradually sloped profile. In the present embodiment, the sidewalls have a gradual curvature profile.

[71] The gradually curved sidewalls of the trench 53 can reduce an additional stress exerted on the pores, which is in contact with the sidewalls. As a result, the aluminum layer is less likely to remain without being oxidized and most of the pores may grow straight over the trench. If the depth of the trench 53 is decreased, the anodization can be finished before the pore growth starts being suppressed. In short, the sidewalls of the trench 53 are gradually curved to form the pore array uniformly inside the trench 53 without an aluminum residue.

[72] Referring to Fig. 29, a conductive layer 54 is formed over the silicon oxide layer 52 with the trench 53. An aluminum layer 55 is formed over the conductive layer 54 using sputtering. The aluminum layer 55 has a rough surface 55A.

[73] Referring to Fig. 30, the rough surface 55 A of the aluminum layer 55 is planarized through CMP. The CMP continues until the aluminum layer 55 remains inside the trench 53. Since the rough surface 55A of the aluminum layer 55 is planarized, surface roughness of the aluminum layer 55 can be improved. Reference numeral 55B denotes an aluminum layer remaining inside the trench 53.

[74] The resultant structure is immersed into an electrolyte solution to stimulate anodization, and then into an acidic solution to remove an aluminum oxide layer formed due to the anodization. Afterwards, the remaining structure is immersed again into the electrolyte solution to stimulate another anodization. The anodization is performed while direct current flows under conditions that the remaining aluminum layer 55B and a separate carbon electrode (not illustrated) are set as an anode and a cathode, respectively. The electrolyte solution includes an acid-based electrolyte solution selected from a group consisting of oxalic acid, sulfuric acid and phosphoric acid.

[75] Referring to Fig. 31, due to the anodization that is performed twice, the remaining aluminum layer 55B is oxidized to the aforementioned aluminum oxide layer 56. At this time, a plurality of pores 57 that are oriented in a regular direction are formed inside the aluminum oxide layer 56. After the anodization, the thickness of the remaining aluminum layer 55B decreases.

[76] Referring to Fig. 32, nanowires 58 are grown inside the pores 57. Particularly, the anodization illustrated in Fig. 31 is performed overly to expose the conductive layer 54 by removing the barrier type aluminum oxide layer 56 disposed underneath the pores 57. Also, during the anodization, the barrier type aluminum oxide layer 56 underneath the pores 57 is consumed away based on the fact that a layer of aluminum oxide is grown under the condition that dissolution and generation of aluminum oxide are in an equilibrium state.

[77] Figs. 33 to 35 are detailed cross-sectional views to illustrate a method for forming the trench 53 illustrated in Figs. 28 to 32.

[78] Referring to Fig. 33, a photoresist material is coated over the silicon oxide layer 52 and patterned to form a photoresist pattern PR. The silicon oxide layer 52 is wet etched using the photoresist pattern PR to form the trench 53 of which sidewalls are gradually sloped.

[79] Particularly, Figs. 34 and 35 are detailed cross-sectional views to illustrate a method for forming the trench 53 when the sidewalls of the trench 53 are gradually sloped in a controller manner. As illustrated in Fig. 34, the silicon oxide layer 52 is dry etched to form a premature trench 53A, and as illustrated in Fig. 35, wet etching is performed such that sidewalls of the premature trench 53 A are sloped whose angle is controlled by the ratio of the etched extent during the dry and wet etching.

[80] Figs. 36 and 37 are cross-sectional views to illustrate a method for growing the nanowires 58 when the conductive layer 54 includes titanium nitride in accordance with the fourth embodiment of the present invention.

[81] Referring to Fig. 36, during the barrier type aluminum oxide layer 56 underneath the pores 57 is consumed away by the anodization which is performed further, the titanium nitride-based conductive layer 54 is exposed underneath the pores 57 and partially oxidized. Reference numeral 54A represents a titanium oxide layer.

[82] Referring to Fig. 37, the titanium oxide layer is removed through selective wet etching. Afterwards, an electrochemical deposition method is applied using the exposed titanium nitride-based conductive layer 54 to deposit a catalyst or seed layer, and the nanowires 58 are grown using the catalyst or seed layer. If the nanowires 58 include titanium oxide, the titanium layer 54A is not removed and used as a seed for the titanium nitride-based nanowires 58. The titanium nitride-based nanowires 58 are grown from the seed using CVD.

[83] If the conductive layer 54 underneath the pores 57 includes a metal that is hardly oxidized (e.g., platinum or gold), even though the selective wet etching is not performed, the conductive layer 54 underneath the pores 57 can be selectively exposed by performing the anodization further after the aluminum layer is oxidized. In such a case, the conductive layer 54 can be directly used as a catalyst for growing the nanowires 58.

[84] In the fourth embodiment of the present invention, the sidewalls of the trench 53 are formed to have a gradually curved profile, so that the pores 57 disposed at the edge sides of the sidewalls of the trench 53 are straight and the aluminum layer 55B is less likely to remain without being oxidized. As a result, a uniform pore array can be formed without an aluminum residue near the edge side of the patterns. If the depth of the trench 53 is reduced, the anodization can be finished before the pore growth starts being suppressed.

[85] According to various embodiments of the present invention, an aluminum layer formed over a substrate is directly anodized. To obtain nanopore structure, the aluminum layer needs to be formed with a sufficient thickness to stay for a long period during anodization. The aluminum layer needs to be planarized sufficiently to improve uniformity of upper portions of the nanopores. When implementing an anodized aluminum oxide nanopore structure over a substrate, it is necessary to control the surface roughness, which is often caused by a pattern formed over the substrate, not to affect the formation of the anodized aluminum oxide nanopore structure.

[86] Also, a channel structure may be formed inside a trench that is formed through patterning the substrate to selectively place the anodized aluminum oxide nanopore structure over the substrate. In such a case, a conductive material may be formed over the substrate to allow current to flow continuously through the aluminum layer formed inside the trench. Particularly, since a titanium or titanium nitride layer, which is used as a bonding layer when forming the aluminum layer, has good conductivity, the titanium or titanium nitride layer can be used as the conductive layer. Also, a layer that can be used as a catalyst can be formed over the conductive layer to help nanowires to grow after the growth of the nanopores.

[87] Although the silicon-based substrate is exemplified in the above embodiments of the present invention, the substrate may include glass (e.g., SiO ), sapphire, quartz, metal, a plastic-based material, a ceramic-based material, gallium arsenide, or silicon carbide. A material that can be anodized can be used to form a nanopore array. For instance, instead of aluminum, another metal such as titanium (to be anodized as a titanium oxide layer), tantalum (to be anodized as a tantalum oxide layer), niobium or an alloy thereof can be used to form the nanopore array. In general, any metal or semiconductor that can be oxidized to form a micronized pore structure can be used.

[88] After the nanowires are grown, the aluminum oxide layer with the nanopores is removed, so that the nanowires are exposed. As a result, the surface area of the nanowires can be increased. [89] While the present invention has been described with respect to certain preferred embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims.

Claims

[1] A method for fabricating a nanostructure comprising: forming a silicon oxide layer over a substrate; selectively etching the silicon oxide layer to form a trench with gradually sloped sidewalls; forming a conductive layer over the silicon oxide layer with the trench; forming an aluminum layer over the conductive layer; planarizing a surface of the aluminum layer using chemical mechanical polishing

(CMP); anodizing the aluminum layer to form an aluminum oxide layer with an array of nanopores; removing the barrier type aluminum oxide layer underneath the nanopores by performing the anodization overly to thereby expose the conductive layer underneath the nanopores; and growing nanowires inside the individual nanopores using the exposed conductive layer.

[2] The method of claim 1, wherein the CMP is performed until the aluminum layer remains inside the trench.

[3] The method of claim 1, wherein the anodizing aluminum layer to form the aluminum oxide layer with the array of the nanopores comprises: anodizing the aluminum layer until the aluminum layer remains inside the trench; removing the aluminum oxide layer; and anodizing a remaining portion of the aluminum layer such that the nanopores are formed within the trench.

[4] The method of claim 3, wherein the anodizing the aluminum layer until the aluminum layer remains inside the trench comprises stopping the anodization by monitoring the color of a specimen or a current or potential change during the anodization.

[5] The method of claim 1, wherein selectively etching the silicon oxide layer to form the trench comprises performing a wet etching.

[6] The method of claim 5, wherein selectively etching the silicon oxide layer to form the trench comprises performing a dry etching prior to performing the wet etching to adjust a slope of the sidewalls of the trench.

[7] The method of claim 1, wherein the conductive layer includes a material that is oxidized as simultaneously as the aluminum layer is anodized.

[8] The method of claim 7, wherein the conductive layer includes titanium nitride

(TiN).

[9] The method of claim 1, wherein the conductive layer includes a material that is not oxidized when the aluminum layer is anodized.

[10] The method of claim 9, wherein the conductive layer includes one of platinum

(Pt) and gold (Au).

[11] The method of claim 1, wherein the conductive layer includes a material substantially the same as the material for the nano wires.

[12] The method of claim 11, wherein the conductive layer includes an oxide-based material.

[13] The method of claim 1, wherein the CMP is performed until the surface of the aluminum layer that is rough due to the trench is planarized and a predetermined thickness of the aluminum layer remains.

[14] A method for fabricating a nanostructure comprising: forming a silicon oxide layer over a substrate; forming a conductive layer over the silicon oxide layer; forming an aluminum layer over the conductive layer; planarizing a surface of the aluminum layer through performing CMP; anodizing the aluminum layer to form an aluminum oxide layer with an array of nanopores; removing the barrier type aluminum oxide layer by performing overly the an- odization to thereby expose the conductive layer underneath the nanopores; and growing nanowires inside the individual nanopores using the exposed conductive layer.

[15] The method of claim 14, wherein the conductive layer includes an oxide-based material that is oxidized as simultaneously as the aluminum layer is anodized.

[16] The method of claim 15, wherein the conductive layer includes TiN.

[17] The method of claim 14, wherein the conductive layer includes a material that is not oxidized when the aluminum layer is anodized.

[18] The method of claim 17, wherein the conductive layer includes one of Pt and Au.

[19] The method of claim 14, wherein the conductive layer includes a material substantially the same as the material for the nanowires.

[20] The method of claim 19, wherein the conductive layer includes an oxide-based material.

[21] The method of claim 14, further comprising, after growing the nanowires, selectively removing the barrier type aluminum oxide layer underneath the nanopores.