WO2007035043A1

WO2007035043A1 - Apparatus and method for playing audio using dma

Info

Publication number: WO2007035043A1
Application number: PCT/KR2006/003752
Authority: WO
Inventors: Jae-Ho Lee
Original assignee: Mtekvision Co., Ltd
Priority date: 2005-09-23
Filing date: 2006-09-21
Publication date: 2007-03-29
Also published as: KR100722930B1; KR20070034352A

Abstract

Disclosed is an apparatus for playing back a plurality of audio data, the apparatus including: a memory storing the plurality of audio data; an audio processor editing and processing the plurality of audio data; a DMA controlling unit that receives control signals for reading and writing data from the audio processor, multiplexes the plurality of audio data read from the memory, and outputs the multiplexed data; and an I/O interface transmitting the multiplexed data to a DAC (Digital/ Anlaog Converter).

Description

[DESCRIPTION]

[Invention Title]

APPARATUS AND METHOD FOR PLAYING AUDIO USING DMA

[Technical Field]

The present invention relates to an apparatus and a method for playing back

audio, more particularly, to an apparatus and a method for playing back audio using a

DMA, in which a plurality of digital audio data is multiplexed and outputted by a DMA to

improve effieciency in data processing.

[Background Art]

Conventional audio playback apparatuses used to read out analog audio signals

themselves from recorded media such as a cassette tape in order to play back audios.

Nowadays, the audio playback apparatus takes a form of a digital data processing

terminal, in which audio signals are converted into digital data in order to enhance

efficiency in data storing and transmitting audio data through networks, and furthermore,

this digital data is encoded and decoded. Fig. 1 is a block diagram illustrating a typical audio playback apparatus. As

shown in Fig. 1, the audio playback apparatus includes an audio processor 100, a memory

106, a DAC (Digital toAnalog Converter) 108, and an audio output unit 110.

Typically, analog audio signals are converted into digital data by an ADC

(Analog to Digital Converter, not shown in the accompanying drawings) to be stored in

the memory 106. Here, the digital conversion is performed through sampling,

quantizating, and encoding.

The sampling refers to selecting samples from an analog wave at a predefined

sampling frequency, and the quantizating is a process of approximating a data value of

the selected sample by bit. This quantized data is later encoded as digital information.

The audio processor 100, editing and processing audio data, maybe a separate

digital signal processor (DSP) besides a central processor unit (CPU).

Audio data converted through the above processes is generally called PCM data.

In order to output audio, the audio processor 100 reads the PCM data stored in the

memory 106, and sends it to the DAC 108 through an I2S interface 104. The DAC 108

converts the PCM data, which is digital data, to analog signals, which are outputted to the

outside through the audio ouput unit 110 (e.g. a speaker).

Meanwhile, a DMA (Direct Memory Access) controller unit 102 controls data to

be directly delivered between the memory 106 and peripheral units such as the DAC 108

and the audio ouput unit 110 without passing through the audio processor 100. Such a DMA controlling unit 102 is responsible for reading data from the

memory 106 or writing down data in the memory 106 instead of the audio processor 100.

With a memory containing various audio sources, the audio playback apparatus

often plays back more than one audio sources at the same time. For example, a mobile

phone with an mp3 player outputs a ringtone for an incoming call while playing back

MP3 data.

Fig. 2 is a block diagram illustrating a conventional audio playback apparatus.

Fig. 2 illustrates a structure for playing back a plurality of audio data through

hardware, where a plurality of audio data is multiplexed and outputted by a DAC 210.

As shown in Fig. 2, the DAC 210 requires two I/O ports in order to perform a

muxing. Furthermore, additional I2S interfaces 206, 208 are necessary so as to receive a

plurality of audio data from an audio processor 200.

Accoringly, the audio playback apparatus of Fig.2 requires a DAC with a large

number of I/O ports, increasing the size, and requires additional I2S interfaces,

complicating the manufacturing process and increasing the manufacturing cost.

Fig. 3 is a block diagram illustrating another conventional audio playback

apparatus, in which a plurality of audio data is played back through software without

additional hardware.

In an audio processor 300 of Fig.3 is ported a program for multiplexing a

plurality of audio data. For example, two pieces of PCM data (PCM data 1 , PCM data 2) are read from a memory 306 to be multiplexed, and the mixed PCM data through the

multiplexing is restored in the memory 306.

Fig. 4 illustrates a data processing of an audio mux according to Fig.3. As shown

in Fig. 4, the conventional audio mux multiplexes a plurality of audio data from a

memory, and then restores the multiplexed data in the memory.

Validation codes for the conventional audio mux are as follows:

for^oop^ 1 ;loop<=^:S ample_Count;loop++)

pcm 1 =read_one_sample_of_sound 1 _from_memory(loop) ;

pcm2=read_one_sample_of_sound2_from_memory(loop);

pcm=mux_one_sample(pcml ,pcm2);

write one_sample_o f_output_sound(pcm) ;

As seen in the above validation codes, when the audio muxing is performed

through software, the audio mux reads a plurality of data from the memory, multiplexes

the plurality of data, and writes down the multiplexed data in the memory.

As shown in Fig. 3, a DMA controlling unit 302 reads the multiplexed data from

the memory 306, and ouputs it to a DAC 310 through an I2S interface 308. The DAC 310

converts the mixed data to analog data. Since the audio playback apparatus shown in Figs. 3 and 4 does not need

additional hardware, a DAC with dual ports and additional I2S interfaces are not required.

However, the audio processor should multiplex a plurality of audio data and restore the

multiplexed data in the memory, increaing a load in the audio processor. Furthermore, the

audio processor should reach at lease a certain level in order to perform the above

processes, increasing the manufacturing cost.

[Disclosure]

[Technical Problem]

An embodiment of the present invention provides an audio playback apparatus

and a method for playing back a plurality of audio data using a DMA without additional

hardware.

An embodiment of the present invention provides an audio playback apparatus

and a method for playing back a plurality of audio data using a DMA without increasing a

load in an audio processor.

[Technical Solution]

An aspect of the present invention features an apparatus for playing back a

plurality of audio data. In an embodiment of the present invention, the apparatus includes a memory

storing the plurality of audio data; an audio processor editing and processing the plurality

of audio data; a DMA controlling unit that receives control signals for reading and

writing data from the audio processor, multiplexes the plurality of audio data read from

the memory, and outputs the multiplexed data; and an I/O interface transmitting the

multiplexed data to a DAC (Digital/ Anlaog Converter).

The DMA controlling unit includes a data buffer temporarily storing a plurality

of audio data read from the memory and the multiplexed data; and a MUX multiplexing

the plurality of audio data temporarily stored in the data buffer.

The MUX multiplexes the plurality of audio data according to preset weighted

values.

The I/O interface is an 12 S interface.

Another aspect of the present invention features a me a method for playing back a

plurality of audio data performed in a DMA controlling unit of an apparatus.

In an embodiment of the present invention, the apparatus includes: a memory

storing a plurality of audio data; an audio processor editing and processing the plurality of

audio data; the DMA controlling unit reading and writing data; and an I/O interface

outputting data transmitted by the DMA controlling unit to a DAC, the method

comprising: receiving control signals for reading and writing the plurality of audio data

from the audio processor ; reading the plurality of audio data from the memory and multiplexing the audio data in correspondence with the control signals; and transmitting

the multiplexed data to the I/O interface.

The process of reading and multiplexing the audio data includes: reading a

plurality of audio data from the memory and storing the audio data in a data buffer

temporarily; multiplexing the data temporarily stored in the data buffer; and storing the

multiplexed data in the data buffer temporarily.

The plurality of audio data is multiplexed according to preset weighted values in

the multiplexing process.

[Description of Drawings]

Fig. 1 is a block diagram of a typical audio playback apparatus;

Fig. 2 is a block diagram of a conventional audio playback apparatus;

Fig. 3 is a block diagram of another conventional audio playback apparatus;

Fig. 4 illustrates a data processing of an audio mux according to Fig.3;

Fig. 5 is a block diagram of an audio playback apparatus according to an

embodiment of the present invention;

Fig. 6 is a block diagram of a DMA controlling unit according to an embodiment

of the present invention;

Fig. 7 illustrates an audio playback process according to an embodiment of the

present invention; and Fig.8 illustrates a data processing of a typical audio DMA.

[Mode for Invention]

In order to fully understand the present invention, operational advantages of the

present invention and objects achieved by embodying the present invention, the

accompanying drawings illustrating embodiments of the present invention and

description attached to the drawings must be referenced.

To aid the overall understanding of the description of the present invention, the

same reference numerals are assigned to the same means regardless of the figure number.

The numbers (e.g. the first and the second) in this description are merely used to

distinguish the identical or similar elements.

Hereinafter, embodiments of the present invention will be described with

reference to the accompanying drawings.

Fig. 5 is a block diagram of an audio playback apparatus according to an

embodiment of the present invention.

As shown in Fig. 5, the audio playback apparatus according to an embodiment of

the present invention may include an audio processor 500, a DMA controlling unit 502

performing a multiplexing, a memory 506, an I2S interface 508, a DAC (Digital Analog

Converter) 510, and an audio ouput unit 512. The DMA controlling unit 502 further includes a module 504 for multiplexing a

plurality of audio data (PCM data). The DMA controlling unit 502 reads a plurality of

audio data (samples) from the memory 506, multiplexes the data, and transmits the

multiplexed data to the DAC 510 as one output.

Here, the memory 506, which stores a plurality of audio data therein, may

include a ROM (Read Only Memory), a RAM (Random Access Memory), a flash

memory, a SD memory card, etc.

In the case that a DAC performs audio data multiplexing, additional hardware is

necessary, or in the case that an audio processor performs multiplexing through software,

a load increases in the audio processor. However, in the present invention, the DMA

controlling unit, which inputs and ouputs data, multiplexes a plurality of audio data (PCM

data) instead of the audio processor, thereby neither requiring additional hardware nor

increasing a load in the audio processor.

Fig. 6 is a block diagram of a DMA controlling unit according to an embodiment

of the present invention. As shown in Fig. 6, the DMA controlling unit may include a

control part 600, a data buffer 602, an address register 604, a word count register 606, a

control register 608, and a mux 610.

The control part 600 controls the DMA controlling unit 502 to read and write

data by receiving predetermined signals from the audio processor 500. The data buffer 602 temporarily stores data read from the memory 506, or data

multiplexed according to the present invention until it is outputted to the DAC 510.

The address register 604 holds addresses for transmitting data to the memory or

pheripheral devices (e.g. the DAC). With each transmission, register value increases by 1.

Meanwhile, the word count register 606 is a register indicating the size of data

that will be transmitted. The audio processor 500 transmits information on a word number

to the DMA controlling unit 502, whereupon the word count register 606 decreases a

register value by 1 everytime one word data is transmitted, unitl the register value reaches

0. (until data transmission is completed)

The control register 608 appoints a transmission mode such as data reading, data

writing, etc.

According to an embodiment of the present invention, when the data buffer 602

holds a plurality of audio data, the mux 610 multiplexes the plurality of audio data.

In addition, in playing back a plurality of data at the same time, there are cases

where each audio data has a predetermined weighted value. For example, when a mobile

phone rings a sound for indicating an incoming call while it plays back an MP3 file, 0 and

1 can be set as the weighted values for the audio data of the MP3 file and for the audio

data of the ringsound, respectively. The mux 610 multiplexes data using the weighted values preset on the plurality

of audio data. Such multiplexed data is outputted directly to the DAC 510 by the DMA

controlling unit 502.

To help understand the present invention, a data processing of the DMA

controlling unit according to the present invention will be described with a comparison to

a data processing of a general audio DMA.

Fig. 8 illustrates a data processing of a general audio DMA controlling unit.

Referring to Fig. 8, the general audio DMA controlling unit reads a plurality of

audio data from a memory, and sends it to an output unit.

Validation codes for the general DMA controlling unit are as follows;

for(loop=l; loop<==Sample_Count, loop++)

pcm = read_one_sample_from_memory(loop);

send_one_sample to_I2 S_output_block(pcm) ;

I

As described in the above codes, the general DMA controlling unit for an audio

playback apparatus only reads data from a memory, and sends the data to a DAC through

an I2S interface. However, according to the present invention, data multiplexing and outputting the

multiplexed data directly to the I2S interface are performed by the DMA controlling unit

502.

Fig. 7 illustrates an audio playback process according to an embodiment of the

present invention. As shown in Fig. 7, the DMA controlling unit according to the present

invention reads a plurality of audio data from the memory, multiplexes this data, and

outputs directly to the 12 S interface.

Validation codes for the DMA controlling unit 502 accoring to the present

invention are as follows;

for(loop= 1 ;loop<=Sample_Count;loop++)

pcm 1 =read_one_sample_of_sound l_from_memory(loop);

pcm2=read_one_sample_of_sound2_from_memory(loop);

pcm=mux_one_sample(pcm 1 ,pcm2) ;

send one_sample_of_output_sound(pcm);

As shown in the above codes, the DMA 502 according to the present invention

reads a plurality of data from the memory 506, multiplexes this data, and sends the

multiplexed data directly to the 12 S interface. Here, the data multiplexing can be performed with referring to the preset

weighted values, and the audio output unit 512 can therefore output sound sources to the

outside according to the corresponding weighted value

As described above, the DMA controlling unit 502 according to the present

invention includes the mux 610, so that it can multiplex a plurality of audio data as well as

reading and writing data. This multiplexed data is transmitted directly to the 12 S interface,

so that no additional hardware is necessary, and a load in the audio processor does not

increase.

Although, in the above description, the DMA controlling unit is connected to the

DAC through the I2S interface, it is to be appreciated that other I/O interfaces can also be

applied besides the I2S interface in the present invention.

[Industrial Applicability 1

While the invention has been described with reference to the disclosed

embodiments, it is to be appreciated that those skilled in the art can change or modify the

embodiments without departing from the scope and spirit of the invention or its

equivalents as stated below in the claims.

Claims

[CLAIMS]

[Claim 1 ]

An apparatus for playing back a plurality of audio data, the apparatus

comprising:

a memory storing the plurality of audio data;

an audio processor editing and processing the plurality of audio data;

a DMA controlling unit that receives control signals for reading and writing data

from the audio processor, multiplexes the plurality of audio data read from the memory,

and outputs the multiplexed data; and

an I/O interface transmitting the multiplexed data to a DAC (Digital/ Anlaog

Converter).

[Claim 2]

The apparatus of claim 1, wherein the DMA controlling unit comprises:

a data buffer temporarily storing a plurality of audio data read from the memory

and the multiplexed data; and

a MUX multiplexing the plurality of audio data temporarily stored in the data

buffer.

[Claim 3] The apparatus of claim 2, wherein the MUX multiplexes the plurality of audio

data according to preset weighted values.

[Claim 4]

The apparatus of claim 1, wherein the I/O interface is an I2S interface.

[Claim 5]

A method for playing back a plurality of audio data performed in a DMA

controlling unit of an apparatus, the apparatus comprising: a memory storing a plurality

of audio data; an audio processor editing and processing the plurality of audio data; the

DMA controlling unit reading and writing data; and an I/O interface outputting data

transmitted by the DMA controlling unit to a DAC, the method comprising:

receiving control signals for reading and writing the plurality of audio data from

the audio processor ;

reading the plurality of audio data from the memory and multiplexing the audio

data in correspondence with the control signals; and

transmitting the multiplexed data to the I/O interface.

[Claim 6] The method of claim 5, whrerin the process of reading and multiplexing the

audio data comprises:

reading a plurality of audio data from the memory and storing the audio data in a

data buffer temporarily;

multiplexing the data temporarily stored in the data buffer; and

storing the multiplexed data in the data buffer temporarily.

[Claim 7]

The method of claim 5, whrerin the plurality of audio data is multiplexed

according to preset weighted values in the multiplexing process.