WO2007020550A1 - Resonant power converter - Google Patents

Resonant power converter Download PDF

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Publication number
WO2007020550A1
WO2007020550A1 PCT/IB2006/052661 IB2006052661W WO2007020550A1 WO 2007020550 A1 WO2007020550 A1 WO 2007020550A1 IB 2006052661 W IB2006052661 W IB 2006052661W WO 2007020550 A1 WO2007020550 A1 WO 2007020550A1
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WO
WIPO (PCT)
Prior art keywords
node
resonant
voltage
current
time window
Prior art date
Application number
PCT/IB2006/052661
Other languages
French (fr)
Inventor
John Van Den Homberg
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Publication of WO2007020550A1 publication Critical patent/WO2007020550A1/en

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Definitions

  • the invention relates to a resonant power converter comprising a switchable means.
  • the invention further relates to a method of controlling an amplitude of a resonant voltage in a resonant power converter, and to an electronic apparatus comprising the resonant power converter.
  • FIG. 1 A known resonant power converter for boosting an input voltage is shown in Fig. 1 in which a first terminal of a first switch is connected to an input node for receiving an input voltage and a second terminal of the first switch is connected to a first terminal of an inductor and to a first terminal of a second switch. A second terminal of the second switch is connected to ground. A second terminal of the inductor is connected to a first terminal of a capacitor and to a first terminal of a rectifying diode. A second terminal of the capacitor is connected to ground. A second terminal of the rectifying diode is connected to a first terminal of a further capacitor and to a first terminal of a load. A second terminal of the further capacitor and a second terminal of the load are connected to ground.
  • the resonant power converter further comprises a controller (not shown) for controlling the first and the second switch.
  • the controller switches the first switch and the second switch at substantially 50% duty cycle to induce a square-wave input signal having an amplitude equal to the input voltage at the input node.
  • the frequency of the induced square-wave signal is close to the resonance frequency of the LC circuit of the resonant power converter.
  • the varying voltage at the second terminal of the inductor due to the square-wave signal typically sinusoidally varies with an amplitude which is typically larger than the input voltage at the input node.
  • the sinusoidal varying voltage is rectified via the rectifying diode and smoothed by the further capacitor to provide a substantially constant output voltage to the load.
  • the amplitude of the sinusoidal varying voltage at the second terminal of the inductor typically depends on a quality factor of the resonant power converter and on the frequency of the induced square- wave signal.
  • a drawback of the known resonant power converter is that it typically requires relatively large and low ohmic switches.
  • the object is achieved with the resonant power converter as claimed in claim 1.
  • the object is achieved with the method of controlling an amplitude of a resonant voltage in a resonant power converter as claimed in claim 12.
  • the object is achieved with an electronic apparatus comprising the resonant power converter as claimed in claim 13.
  • the resonant power converter in accordance with the first aspect of the invention comprises a resonant circuit which comprises a series arrangement of a first capacitor, an inductive element and a second capacitor.
  • the inductive element is arranged between a first node and a second node and the first capacitor is arranged between the first node and a reference voltage and the second capacitor is arranged between the second node and the reference voltage.
  • the first node is connected to a switchable means for supplying a sourcing current to the first node and for supplying a sinking current to the first node.
  • the second node is connected to an output node via the rectifying circuit.
  • the resonant circuit comprises a resonant current having a resonance frequency which is substantially dependent on the series arrangement of the first capacitor, the inductive element and the second capacitor.
  • the resonant current in the resonant power converter according to the invention substantially flows within the resonant circuit.
  • the resonant current causes a resonant voltage at the first node and the second node.
  • the resonant current reduces over time due to losses within the resonant power converter.
  • the switch controller is designed to replenish the losses by switching the switchable means for supplying a sourcing current or a sinking current during a first on-time window and by switching the switchable means for supplying a sinking current or a sourcing current, respectively, during a second on- time window.
  • the switchable means comprises a first switch arranged between the first node and an input node for supplying the sourcing current or the sinking current to the first node and comprises a second switch being arranged between the first node and a reference node for supplying the sinking current or the sourcing current to the first node (A), respectively.
  • the switch controller drives the first switch to be conductive during a first on-time window to increase a voltage at the first node to a first predetermined voltage by supplying the sourcing current.
  • the first on-time window substantially starts at a first instant which corresponds to a maximum voltage of the resonant voltage at the first node.
  • a first replenishing current flows via the first switch into the first node, replenishing the resonant current.
  • the voltage at the first node is determined by the resonant voltage together with the first replenishing current.
  • the voltage difference across the first switch is substantially at a minimum which results in a low first replenishing current through the first switch.
  • a duration of the first on-time window is shorter than one-eighth of a period of the resonant voltage. Limiting the duration of the first on-time window ensures that the voltage difference across the first switch remains low and that the first replenishing current through the first switch remains low.
  • the switch controller drives the second switch to be conductive during a second on-time window to decrease the voltage at the first node to a second predetermined voltage by supplying the sinking current.
  • the second instant corresponds to a minimum voltage of the resonant voltage at the first node.
  • a second replenishing current flows via the second switch away from the first node, further reducing the voltage at the first node and increasing an amplitude of the resonant voltage at the first node.
  • the voltage at the first node is determined by the resonant voltage together with the second replenishing current caused by the closing of the second switch.
  • the voltage difference across the second switch is substantially at a minimum which results in a low second replenishing current through the second switch.
  • a duration of the second on-time window is shorter than one-eighth of a period of the resonant voltage. Limiting the duration of the second on-time window ensures that the voltage difference across the second switch remains low and that the second replenishing current through the second switch remains small.
  • the resonant power converter according to invention substantially confines the resonant current within the resonant circuit and switches the switches at an extreme level of the resonant voltage during an on-time window with a limited duration. This results in a low voltage difference across the switches which cause the substantially low replenishing currents to flow through the switches. This enables the use of relatively small switches in the resonant power converter.
  • the resonant circuit can consist of passive components.
  • the passive components can relatively easily be selected to have a relatively low equivalent series resistance (further also referred to as ESR) and thus can relatively easily be selected to have relatively low losses inside the resonant circuit. Reducing the losses inside the resonant circuit results in a further reduction of the required first and second replenishing currents and thus further enables the use of relatively small switches in the resonant power converter according to the invention.
  • a further benefit of the resonant power converter according to the invention is that the use of relatively small switches enables the switches to be switched 'on' and 'off very fast with relatively low switching losses. Due to the fast switching of the switches, the resonant current within the resonant circuit can flow at relatively high frequency, which enables the use of a small inductive element.
  • a benefit when using relatively small switches and a relatively small inductive element is that the resonant power converter solution can be miniaturized.
  • a square-wave signal is induced at the first node by driving the first and second switch to be conductive at the resonance frequency with a duty cycle of substantially 50%.
  • the first switch or the second switch is conducting, carrying the resonant current of the known resonant power converter.
  • a capacitor were to be applied parallel to the second switch of the known resonant power converter a significant increase of the losses would occur.
  • the inventor has realized that using a resonant circuit consisting of passive components to substantially confine the resonant current prevents the switches from carrying the relatively large resonant current.
  • the losses of the resonant current within the resonant power converter according to the invention are replenished by switching the first switch and the second switch during a first on-time window and a second on-time window, respectively.
  • both switches are non-conductive during the major part of the period of the resonant current and are substantially switched 'on' at a first instant and a second instant, corresponding to the extremes of the resonant voltage at the first and second node.
  • the losses in the resonant current are replenished.
  • the first and second switch are non-conductive and the resonant current is completely carried within the resonant circuit.
  • the switchable means comprises a first switchable current source arranged between the first node and an input node for supplying the sourcing current or the sinking current to the first node and comprises a second switchable current source arranged between the first node and a reference node for supplying the sinking current or the sourcing current, respectively to the first node.
  • a load coupled to the output node is a capacitive load.
  • the resonant current in a resonant power converter is typically substantially larger than the current supplied to the load.
  • the load is a capacitive load even the losses within the known resonant power converter typically are larger than the power supplied to the capacitive load which results in a poor efficiency of the known resonant power converter for capacitive loads. This is typically due to the fact that the large resonant current in the known resonant power converter runs via the switches causing relatively large losses.
  • the resonant current runs within the resonant circuit which, for example, can consist of passive components.
  • the passive components can relatively easily be selected to have a relatively low ESR and thus can relatively easily be selected to have relatively low losses inside the resonant circuit.
  • the switches in the resonant power converter according to the invention only need to carry a relatively low replenishing current. This relatively low replenishing current can be carried with relatively low losses even using relatively small switches. This enables the resonant power converter according to the invention to have a relatively high efficiency even for capacitive loads.
  • the inductive element is a quartz crystal or ceramic resonator.
  • the inductance value varies a few percent from the targeted inductance value due to manufacturing tolerances. Therefore, the resonance frequency of the resonant voltage can vary a few percent from the targeted resonance frequency.
  • the use of the quartz crystal or ceramic resonator as inductive element in the resonant power converter results in a well- defined resonance frequency of the resonant current, because a typical quartz crystal or ceramic resonator behaves as an inductive element at a well defined frequency within a relatively small bandwidth. This results in a resonant power converter having a relatively high quality factor.
  • a quartz crystal or ceramic resonator as inductive element is that the well-defined frequency enables the resonant power converter to be used as clock generator in the remainder of a circuit.
  • the resonant power converter is integrated inside an integrated circuit (further also referred to as IC) which comprises a quartz crystal or ceramic resonator this quartz crystal or ceramic resonator can be used both as inductive element for the resonant power converter and as clock generator.
  • IC integrated circuit
  • this combined use will reduce the electromagnetic interference (further also referred to as EMI) emitted by the resonant power converter because the resonant power converter drives the switches in phase with the clock signal.
  • EMI electromagnetic interference
  • a duration of the first on- time window and a duration of the second on-time window are fixed.
  • the switch controller can be simplified in that the switch controller only needs to determine the maximum or minimum of the resonant voltage at the first node caused by the resonant current.
  • the duration of the fixed time window is not sufficient to compensate the losses in the resonant circuit, the amplitude of the resonant voltage will be too low and thus the output voltage of the resonant power converter will be too low.
  • the switch controller determines the duration of the first on-time window and/or of the second on-time window by sensing a level of the resonant voltage at the first node or the second node and by comparing the sensed level with a predetermined level.
  • the switch controller for example, senses a voltage variation at the first node during the first on-time window.
  • the switch controller ends the first on-time window by opening the first switch.
  • the switch controller for example, senses the voltage variation at the first node. If the voltage at the first node is equal to a second predetermined voltage, the switch controller ends the second on-time window by opening the second switch.
  • the duration of the on-time window is adapted to the replenishing time needed to replenish the resonant current at the first node to achieve a predetermined voltage at the first node.
  • a benefit of this embodiment is that the duration of the on-time window can be varied depending on the load of the resonant power converter such that the output voltage, also at higher loads, can be kept at a substantially constant level.
  • the switch controller is coupled to the first node for sensing a level of the resonant voltage at the first node to determine the first instant and the second instant.
  • the first node is at the low- voltage range of the resonant power converter which enables full integration of a sensing circuit of the resonant voltage inside a low voltage IC. The full integration of the sensing circuit typically reduces the number of input and output pins on the IC.
  • the switch controller is designed to disable the switchable means for a duration of a first disable-time window after the first on-time window and to disable the switchable means for the duration of a second disable-time window after the second on-time window.
  • the duration of the first disable-time window and/or the second disable-time window may be fixed or may be variable.
  • the voltage variations at the first node typically comprise disturbances from the sinusoidal shape of the resonant voltage due to the switching of the switchable means. These disturbances from the sinusoidal shape may cause false switching of the switchable means outside first on- time windows and second on-time windows.
  • the switch controller is coupled to the second node for sensing a level of the resonant voltage at the second node to determine the first instant and the second instant.
  • a benefit of this embodiment is that the voltage variation at the second node typically is sinusoidal, not disturbed by the switching of the first and the second switch. Although the phase of the sinusoidal signal at the second node typically is shifted 180 degrees, the smooth sinusoidal resonant voltage enables a simple and accurate determination of the first instant and the second instant at which the switch controller drives the first switch and second switch, respectively.
  • the capacitance of the first capacitor is larger than the capacitance of the second capacitor. Amplitudes of the resonant voltage at the first node and the second node substantially depend on a ratio between the first capacitor and the second capacitor and on the resonant current flowing within the resonant circuit. By choosing the first capacitor to be larger than the second capacitor the resonant power converter is an up-converter.
  • the switch controller is designed to generate a drive signal for switching the switchable means and a start-up circuit is designed to sense the drive signal and, when no drive signal is sensed during a predetermined time window, to initiate the resonant current within the resonant circuit by switching the switchable means at a predetermined frequency.
  • the start-up circuit typically is necessary to start a resonant current within the resonant circuit.
  • the start-up circuit can also be used as a watchdog circuit which, for example, starts to initiate a resonant current within the resonant circuit if none of the first and second switches have switched during the start-up-time window.
  • Fig. 1 shows an embodiment of the known resonant power converter for boosting an input voltage.
  • Fig. 2 shows an embodiment of the resonant power converter according to the invention, in which the switch controller is coupled to the second node,
  • Fig. 3 shows an embodiment of the resonant power converter in which the switchable means for sourcing is a first switchable current source and in which the switchable means for sinking is a second switchable current source,
  • Fig. 4 shows the resonant voltage at the first node, the resonant voltage at the second node and the output voltage across the load against time
  • Fig. 5 shows an embodiment of the resonant power converter according to the invention, in which the switch controller is coupled to the first node,
  • Fig. 6 shows several diagrams showing several signals at several terminals of the switch controller shown in Fig. 4
  • Fig. 7 shows a start-up circuit for use in the resonant power converter according to the invention
  • Fig. 8 shows a consumer apparatus comprising the resonant power converter according to the invention.
  • Fig. 1 shows one embodiment of the known resonant power converter for boosting an input voltage Vin.
  • a first terminal of a first switch SlO is coupled to an input node for receiving an input voltage Vin and a second terminal of the first switch SlO is coupled to a first terminal of an inductor LlO and to a first terminal of a second switch S20.
  • a second terminal of the second switch S20 is coupled to ground.
  • a second terminal of the inductor LlO is coupled to a first terminal of a capacitor ClO and to a first terminal of a rectifying diode DlO.
  • a second terminal of the capacitor ClO is coupled to ground.
  • a second terminal of the rectifying diode DlO is connected to a first terminal of a further capacitor C20 and to a first terminal of a load RLp.
  • a second terminal of the further capacitor C20 and a second terminal of the load RLp are coupled to ground.
  • the resonant power converter further comprises a controller (not shown) for controlling the first switch SlO and the second switch S20.
  • the controller switches the first switch SlO and the second switch S20 at substantially 50% duty cycle to induce a square-wave input signal (not shown) having a voltage amplitude at the input node equal to the input voltage Vin.
  • the frequency of the induced square-wave signal is close to the resonance frequency of the resonant power converter.
  • the resonant signal causes a sinusoidal voltage variation at the second terminal of the inductor LlO having a voltage amplitude which is typically larger than the input voltage Vin at the input node.
  • the sinusoidal voltage variation is rectified via the rectifying diode DlO and smoothed by the further capacitor C20 to provide a substantially constant output voltage Vout to the load RLp.
  • the voltage amplitude of the resonant voltage at the second terminal of the inductor LlO typically is dependent on the quality factor of the resonant power converter and on the frequency of the induced square-wave signal.
  • Fig. 2 shows one embodiment of the resonant power converter PCr according to the invention.
  • the resonant power converter PCr comprises a first switch Sl, a second switch S2, a resonant circuit CR, a rectifying circuit CO and a switch controller SC.
  • the first switch Sl is arranged between an input node at an input potential and a first node A.
  • the second switch S2 is arranged between the first node A and a reference node being ground G.
  • the input voltage Vi is the voltage between the input node and ground G.
  • the resonant circuit CR is arranged between the first node A, a second node B and ground G and consists of a first capacitor Cl arranged between the first node A and ground G, a second capacitor C2 arranged between the second node B and ground G and an inductive element L arranged between the first node A and the second node B.
  • the rectifying circuit CO of the resonant power converter PCr is arranged between the second node B, an output node at an output potential and ground G.
  • the output voltage Vo is the voltage between the output node and ground G.
  • the rectifying circuit CO comprises a rectifying diode Dl and a third capacitor C3.
  • the rectifying diode Dl is arranged between the second node B and the output node and the third capacitor C3 is arranged between the output node and ground G.
  • a load RL is connected to the output node and is arranged between the output node and ground G.
  • the resonant power converter PCr further comprises a switch controller SC for controlling the output voltage Vo of the resonant power converter PCr.
  • the switch controller SC comprises a input line Li for receiving an input signal and comprises two output lines LoI, Lo2 for driving the first switch Sl and the second switch S2, respectively.
  • the switch controller SC further comprises a comparator cmpl which creates a square- wave signal V bsq indicating a first instant Tl and a second instant T2 at which the first switch Sl and the second switch S2 must be switched on, respectively.
  • the input line Li is connected to the second node B via a first resistor Rl and the input line Li is connected to a negative input of the comparator cmpl via a fourth capacitor C4.
  • the negative input of the comparator cmpl is also connected to a first terminal of a second resistor R2.
  • the second terminal of the second resistor R2 is connected to a positive input of the comparator cmpl and is also connected to ground G.
  • a resonant current i r flows within the resonant circuit CR.
  • the resonant current CR causes a resonant voltage Vr a , v rb at the first node A and the second node B with respect to ground G.
  • the arrangement of the first capacitor Cl, the inductive element L and the second capacitor C2 within the resonant circuit CR results in a ratio between an amplitude of the resonant voltage v rb at the second node B and an amplitude of the resonant voltage v ra at the first node A which is substantially fixed.
  • a phase of the resonant voltage v ra at the first node A is shifted 180 degrees with respect to a phase of the resonant voltage v rb at the second node B. Due to the substantially fixed ratio a relatively constant output voltage Vo in the resonant power converter PCr is obtained by controlling the amplitude of the resonant voltage v ra at the first node A.
  • the resonant power converter PCr senses the resonant current i r via the resonant voltage v rb at the second node B.
  • the resonant voltage v rb at the second node B causes a current to flow into the switch controller SC via the first resistor Rl and the fourth capacitor C4. This current is sensed by the comparator cmpl via the second resistor R2 arranged between the positive and negative input of the comparator cmpl. Due to the presence of the fourth capacitor C4 the voltage variation sensed across the second resistor R2 is a differentiated voltage V d i compared to the resonant voltage v rb at the second node B.
  • the output signal of the comparator cmpl is a square-wave signal V bSq in which the square wave signal V bSq has a negative edge when the differentiated resonant voltage v ⁇ crosses a mid- level Vmid via a positive slope and in which the square-wave signal V bSq has a positive edge when the differentiated resonant voltage v ⁇ crosses the mid- level Vmid via a negative slope.
  • the mid- level Vmid is defined as being between the two extremes of the sinusoidal differentiated resonant voltage v ⁇ .
  • the negative slope of the square- wave signal V bsq indicates a first instant Tl at which the first switch Sl is switched.
  • the positive slope of the square-wave signal V bSq indicates a second instant T2 at which the second switch S2 is switched.
  • the first switch Sl and the second switch S2 are only switched on during a first on-time window TwIa, TwIb (see Fig. 3) and during a second on-time window Tw2 (see Fig. 3), respectively.
  • the duration of both the first on-time window TwIa, TwIb and the second on-time window Tw2 is typically shorter than one- eighth of a period Pr (see Fig. 3) of the resonant voltage v ra at the first node A.
  • the switch controller replenishes the resonant current i r .
  • the duration of the first on-time window TwIa, TwIb and the second on-time window Tw2 may be fixed and, for example, be determined by a timer (not shown) or the duration may be variable and, for example, depend on the losses which need to be replenished.
  • Fig. 3 shows an embodiment of the resonant power converter PCr having a first switchable current source JsI for supplying the replenishment current at one of the extreme levels VtIr, Vt2r (see Fig. 4) of the resonant voltage v ra at the first node A and having a second switchable current source Js2 for supplying the replenishment current at the other of the two extreme levels Vt2r, VtIr (see Fig. 4) of the resonant voltage v ra at the first node A.
  • Supplying the replenishment current being either sourcing the replenishment current or sinking the replenishment current, depending on the polarity of the input node.
  • the switch controller SC now switches the first switchable current source JsI during the first on-time window TwIa, TwIb and switches the second switchable current source Js2 during the second on-time window Tw2.
  • Fig. 4 shows the resonant voltage v ra at the first node A, the resonant voltage Vr b at the second node B and the output voltage Vo across the load RL against time t.
  • the first instant Tl coincides with a minimum Vminb of the resonant voltage v rb at the second node B and thus also coincides with a maximum VtIr of the resonant voltage v ra at the first node A.
  • the second instant T2 coincides with a maximum Vmaxb of the resonant voltage v rb at the second node B and thus also coincides with a minimum Vt2r of the resonant voltage v ra at the first node A.
  • an amplitude of the resonant voltage v ra at the first node A and of the resonant voltage v rb at the second node B caused by the resonant current i r reduces over time due to losses inside the resonant circuit CR and/or due to power supplied to the load RL.
  • the first switch Sl connects the first node A to the input node at the input potential.
  • the resonant voltage v ra at the first node A is at its maximum VtIr.
  • the maximum voltage VtIr at the first node A typically is lower than the input voltage Vi.
  • a replenishing current will flow through the first switch Sl trying to increase the maximum amplitude VtIr of the resonant voltage v ra at the first node A to be equal to the input voltage Vi.
  • the replenishing current typically is relatively weak because it only needs to replenish losses and/or power supplied by the resonant power converter PCr during half the period Pr of the resonant current i r .
  • the first switch Sl is closed at a maximum VtIr of the resonant voltage v ra at the first node A which results in a small voltage difference across the first switch Sl which also results in a relatively weak replenishing current.
  • the resonant voltage v ra at the first node A is determined by the resonant current i r together with the replenishing current through the first switch Sl.
  • the second switch S2 connects the first node A to the reference node at the reference potential, which is ground G in the embodiment shown.
  • the resonant voltage v ra at the first node A is at its minimum Vt2r.
  • the minimum voltage Vt2r at the first node A typically is higher than the reference potential at ground G.
  • the replenishing current typically is relatively weak because it only needs to replenish losses and/or power supplied by the resonant power converter PCr during half the period Pr of the resonant current i r .
  • the second switch S2 is closed at a minimum Vt2r of the resonant voltage v ra at the first node A which results in a small voltage difference across the second switch S2 which also results in a relatively weak replenishing current.
  • the resonant voltage v ra at the first node A is determined by the resonant current i r together with the replenishing current through the second switch S2.
  • Fig. 4 also shows a first disable-time window Twdl and a second disable-time window Twd2.
  • the first disable-time window Twdl the first switch Sl is disabled and during the second disable-time window Twd2 the second switch S2 is disabled.
  • the duration of the disable-time windows Twdl, Twd2 can be fixed or can vary, for example, depending on the instant at which the resonant voltage v ra at the first node A crosses a predetermined voltage level.
  • the benefit of the disable-time windows Twdl, Twd2 is that they can prevent false switching of the first switch Sl and the second switch S2.
  • the first instant Tl and/or the second instant T2 are determined from the resonant voltage v ra at the first node A, false switching may occur due to the disturbances in the resonant voltage v ra at the first node A caused by the switching of the first switch Sl and the second switch S2.
  • the first switch Sl and second switch S2 in the resonant power converter PCr are non-conductive during the major part of the period Pr of the resonant current i r and are only conductive during a first on- time window TwIa, TwIb and a second on-time window Tw2, respectively.
  • the combination of the resonant circuit CR comprising the first capacitor Cl, the inductive element L and the second capacitor C2, together with the described switching of the first switch Sl and the second switch S2, maintains the amplitude Ar of the resonant voltage v ra at the first node A to be substantially equal to the input voltage Vi.
  • the controlling of the amplitude Ar of the resonant voltage v ra at the first node A also controls the amplitude of the resonant voltage Vr b at the second node B.
  • the duration of the first on-time window TwIa, TwIb and of the second on-time window Tw2 are fixed and are substantially shorter than the period Pr of the resonant current i r .
  • the duration of the first on-time window TwIa, TwIb and the second on-time window Tw2 will result in a simplification of the switch controller SC. Because the losses and/or power supplied to the load RL are typically small, the time to replenish the resonant current i r at the first node A is typically very short. However, the duration of the first on-time window TwIa, TwIb and of the second on-time window Tw2 should be long enough to ensure enough replenishment time for the typical load RL. If there is not enough time to replenish the losses and/or power supplied to the load RL, the amplitude Ar of the resonant voltage v ra at the first node A will be lower than the required amplitude which results in the output voltage Vo being lower.
  • the resonant power converter PCr may, for example, comprise a voltage sensor SV (see Fig. 2) which senses the voltage difference between the first node A and ground G while the first switch Sl or the second switch S2 are closed.
  • the switch controller SC for example, comprises comparing circuitry CC (see Fig. 2) for comparing the voltage sensed by the voltage sensor SV with a first predetermined voltage Vsetl (see Fig. 2) and, for example, with a second predetermined voltage Vset2 (see Fig. 2).
  • the comparing circuitry CC opens the first switch Sl at an instant after the first instant Tl in which the sensed voltage is equal to a first predetermined voltage Vsetl, thus ending the first on-time window TwIa, TwIb.
  • the comparing circuitry CC opens the second switch S2 at an instant after the second instant T2 in which the sensed voltage is equal to a second predetermined voltage Vset2, thus ending the second on-time window Tw2.
  • the comparing circuitry CC adapts the duration of the first on-time window TwIa, TwIb and of the second on-time window Tw2 depending on the sensed voltage.
  • Fig. 5 shows an embodiment of the resonant power converter PCr according to the invention, in which the switch controller SC is coupled to the first node A for sensing the resonant voltage v ra at the first node A and determining the first instant Tl and the second instant T2.
  • the resonant power converter PCr again comprises an arrangement of the first switch Sl, the second switch S2, the resonant circuit CR the rectifying circuit CO and the switch controller SC as shown in Fig. 2.
  • the major differences between the resonant power converter PCr shown in Fig. 2 and the resonant power converter PCr shown in Fig. 5 are that in Fig.
  • the switch controller SC is coupled to the first node A for sensing the resonant voltage Vr a , the switch controller SC further comprises circuitry for disabling the first switch Sl for a duration of the first disable-time window Twdl (see Fig. 4) and for disabling the second switch S2 for a duration of a second disable-time window Twd2 (see Fig. 4),
  • the inductive element in the resonant power converter PCr is a quartz crystal QC or a ceramic resonator QC and ground G has been replaced by a reference node at a reference voltage Vref.
  • the inductive element in the resonant power converter PCr shown in Fig. 5 is a quartz crystal QC or a ceramic resonator QC.
  • the inductance value varies by a few percent from the targeted inductance value due to manufacturing tolerances. Therefore, the resonance frequency of the resonant voltage can vary by a few percent from the targeted resonance frequency.
  • the use of the quartz crystal QC or ceramic resonator QC as inductive element in the resonant power converter PCr results in a well-defined resonance frequency of the resonant current i r , because a typical quartz crystal QC or ceramic resonator QC behaves as an inductive element at a well-defined frequency within a relatively small bandwidth. This results in a resonant power converter PCr having a relatively high quality factor.
  • a further benefit when using a quartz crystal QC or a ceramic resonator QC is that the well-defined frequency of the quartz crystal QC or the ceramic resonator QC enables the resonant power converter PCr also to be used as clock generator in the remainder of a circuit.
  • the resonant power converter PCr is integrated inside an IC which already comprises a quartz crystal QC or ceramic resonator QC this can be used both as inductive element for the resonant power converter PCr and as clock generator for the IC.
  • the switch controller SC in the resonant power converter PCr shown in Fig. 5 is coupled to the first node A for sensing the resonant voltage v ra at the first node A.
  • a benefit of sensing the resonant voltage v ra at the first node A is that the first node A is at a low voltage end of the resonant power converter PCr which enables the input line Li to be directly connected to the first node A, omitting the first resistor Rl (see Fig. 2).
  • a further benefit is that the switch controller SC together with the first switch Sl, the second switch S2 and the input line Li can be integrated in an IC (thus also integrating the first node A).
  • the resonant voltage v ra at the first node A is typically not a smooth sinusoidal resonant voltage v ra but rather is disturbed due to the switching of the first switch Sl and the second switch S2 which may cause false switching of the first switch Sl and/or the second switch S2.
  • the switch controller comprises circuitry for disabling the first switch Sl for a duration of the first disable-time window Twdl and for disabling the second switch S2 for a duration of a second disable-time window Twd2.
  • the disabling is achieved using a second comparator cmp2.
  • the first node A is connected to the positive input of the second comparator cmp2 and a voltage equal to half the input voltage Vi/2 is connected to the negative input of the second comparator cmp2.
  • the output of the second comparator cmp2 is connected to the gate of a third switch being a third switch (PMOS) S3.
  • the source of the third switch (PMOS) S3 is connected to the input voltage Vi and the drain of the third switch (PMOS) S3 is connected to the source of a fourth switch (PMOS) S4.
  • the output of the second comparator cmp2 is also connected to the gate of a sixth switch (NMOS) S6.
  • the source of the sixth switch (NMOS) S6 is connected to the reference voltage Vref and the drain of the sixth switch (NMOS) S6 is connected to the source of a fifth switch (NMOS) S5.
  • the gate of the fourth switch (PMOS) S4 and the gate of the fifth switch (NMOS) S5 are both connected to the output of the first comparator cmpl (see Fig.
  • the drain of the fourth switch (PMOS) S4 is connected to a third node C.
  • the drain of the fifth switch (PMOS) S5, a first terminal of a parasitic capacitance Cpar, an input of a first one-shot trigger TrI, and an input of an inverter invl are also connected to the third node C.
  • the first one-shot trigger TrI for example, triggers at a positive slope.
  • An output of the inverter invl is connected to an input of a second one-shot trigger Tr2, for example, also triggering at a positive slope.
  • the output of the first one-shot trigger TrI is connected to the second switch S2 and the output of the second one-shot trigger Tr2 is connected to the first switch Sl.
  • a second terminal of the parasitic capacitance Cpar is connected to the reference voltage Vref.
  • the combination of the third switch (PMOS) S3, the fourth switch (PMOS) S4, the fifth switch (NMOS) S5 and the sixth switch (NMOS) S6 together with the parasitic capacitance Cpar substantially behave as a second inverter inv2 of which both supply terminals can be enabled and disabled independently.
  • voltages at several terminals of the switch controller SC are shown in Fig. 5.
  • a first diagram, labeled Vr a shows the resonant voltage Vr a at the first node A.
  • a second diagram, labeled v rb shows the resonant voltage v rb at the second node B.
  • a third diagram, labeled v ad i shows a differentiated signal resulting from differentiating the resonant voltage v ra at the first node A.
  • a fifth diagram, labeled v asq 2 shows a square-wave signal vasq2 at the third node C.
  • a sixth diagram, labeled V as qn shows the square-wave signal at the output of the first comparator cmpl.
  • the resonant voltage ⁇ 8 at the first node A is differentiated via the fourth capacitor C4 and provided to the negative input of the first comparator cmpl.
  • the output of the first comparator cmpl would be a square- wave signal when the input would be a substantially sinusoidal resonant voltage.
  • the differentiated signal v ad i resulting from differentiating the resonant voltage v ra at the first node is not sinusoidal as can be seen in the third diagram.
  • the differentiated resonant voltage v ad i shows typical spikes dl, d2 caused by the switching of the first switch Sl and by the switching of the second switch S2.
  • the differentiated resonant voltage v ad i crosses a mid- level via a negative slope.
  • the mid- level is defined between the two extremes of the sinusoidal differentiated resonant voltage v ad i (disregarding the spikes dl and d2).
  • the output of the first comparator v asq n creates a positive edge which is inverted by the second inverter inv2 and again by the first inverter invl to provide the positive edge to the second one-shot trigger Tr2 which triggers the first switch Sl.
  • a first spike dl occurs at the differentiated resonant voltage v ad i which causes the differentiated resonant voltage v acl i to again cross the mid- level via a negative slope again creating a positive edge at the output of the first comparator v asq n which again triggers the first switch Sl, and so on, causing a chain of false trigger signals to the first switch Sl.
  • the second comparator cmp2 is used. The second comparator cmp2 disconnects the input voltage Vi or the reference voltage Vref sequentially, thereby disabling the ability of the second inverter inv2 to invert.
  • the parasitic capacitance Cpar keeps the voltage at the third node C constant during the disabling time.
  • the output of the second comparator cmp2 is shown in the fourth diagram of Fig. 6 and results from connecting the resonant voltage v ra of the first node A to the positive input of the second comparator cmp2 and comparing the resonant voltage v ra at the first node A with half of the input voltage Vi/2 connected to the negative input of the second comparator cmp2.
  • the output of the second comparator cmp2 will be high and while the resonant voltage v ra of the first node A is less than half the input voltage Vi/2 the output of the second resonant voltage is low.
  • the resonant voltage v ra at the first node A has almost reached the maximum level at the first instant Tl .
  • the output of the second comparator cmp2 is high which causes the sixth switch (NMOS) S6 to be conductive and the third switch (PMOS) S3 to be off.
  • the first comparator cmpl creates a positive edge which also causes the fifth switch (NMOS) S5 to be conductive.
  • the voltage at the third node C was still high from a previous switching event and remained high due to the presence of the parasitic capacitance Cpar. Because both the fifth switch (NMOS) S5 and the sixth switch (NMOS) S6 are conducting, the parasitic capacitance Cpar will discharge and the signal vasq2 at the third node C will have a negative edge.
  • the signal v asq 2 at the third node C will be inverted by the first inverter invl and the second on-shot trigger Tr2 will trigger the first switch Sl. As soon as the first switch Sl is closed, the output of the first comparator cmpl will immediately have a negative edge and be low again.
  • the fourth switch (PMOS) S4 starts conducting due to the low output of the first comparator cmpl
  • the signal v asq 2 at the third node C will not have a positive edge because the third switch (PMOS) S3 is still off due to the output of the second comparator cmp2.
  • the parasitic capacitance Cpar keeps the signal v asq 2 at the third node C low until both the third switch (PMOS) S3 and the fourth switch (PMOS) S4 are conductive. False triggering has been prevented.
  • the next switching event can only take place when the output Vp 0 I of the second comparator cmp2 is low and the output v asq n of the first comparator cmpl has a negative edge.
  • the duration of the disable-time window is determined by a point at which the resonant signal v ra at the first node A crosses over half of the input voltage Vi/2.
  • Fig. 7 shows an embodiment of a start-up circuit SU for use in the resonant power converter PCr according to the invention.
  • the start-up circuit SU is, for example, arranged between the switch controller SC and the first switch Sl and the second switch S2.
  • the start-up circuit SU may also, for example, be integrated in the switch controller SC.
  • the embodiment of the start-up circuit SU as shown in Fig. 7 comprises two substantially identical timing circuits Til, Ti2 in which the first timing circuit Til is arranged between the first output line LoI of the switch controller SC and the first switch Sl via an inverter inv3 and in which the second timing circuit Ti2 is arranged between the second output line Lo2 of the switch controller SC and the second switch S2.
  • the first timing circuit Til comprises a first current source Jl which supplies a first current Isul to a fourth node El .
  • the first timing circuit Til further comprises a seventh switch (NMOS) S7, a fifth capacitor C5, and a first logical OR-gate ORl.
  • the drain of the seventh switch (NMOS) S7 is connected to the fourth node El and the source is connected to the reference voltage Vref.
  • One terminal of the fifth capacitor C5 is connected to the fourth node El and the other terminal of the fifth capacitor C5 is connected to the reference voltage Vref.
  • the second timing circuit Ti2 comprises a second current source J2 which supplies a second current Isu2 into a fifth node E2.
  • the second timing circuit Ti2 further comprises an eighth switch (NMOS) S8, a sixth capacitor C6, and a second logical OR-gate OR2.
  • the drain of the eighth switch (NMOS) S8 is connected to the fifth node E2 and the source is connected to the reference voltage Vref.
  • One terminal of the sixth capacitor C6 is connected to the fifth node E2 and the other terminal of the sixth capacitor C6 is connected to the reference voltage Vref.
  • One of the two input terminals of the second logical OR-gate OR2 is also connected to the fifth node E2 and the second of the two input terminals of the second logical OR-gate OR2 is connected to the second output line Lo2 of the switch controller SC.
  • the output of the second logical OR-gate OR2 is connected to the gate of the eighth switch (NMOS) S8 and to the second switch S2.
  • the fifth capacitor C5 and the sixth capacitor C6 are not charged. As long as the first output line LoI and the second output line Lo2 remain low (no switching of the first switch Sl or the second switch S2), the first current source Jl and the second current source J2 will charge the fifth capacitor C5 and the sixth capacitor C6, respectively.
  • the voltage at the input of the logical OR-gate ORl, OR2 connected to the fourth node El or the fifth node E2 will be high enough to trigger the logical OR-gate ORl , OR2 which will provide an output which is high.
  • the seventh switch (NMOS) S7 and the eighth switch (NMOS) S8 will conduct and discharge the fifth capacitor C5 and sixth capacitor C6, respectively.
  • the voltage at the fourth node El and the fifth node E2 will be low again and the output of the logical OR-gate ORl, OR2 will be low again, resulting in providing a short pulse to the first switch Sl and the second switch S2. If the first output line LoI and second output line Lo2 remain low (thus still switching of the first switch Sl and second switch S2 by the switch controller SW) the sequence will be repeated, sending pulses via the first node A into the resonant circuit CR for starting the resonant current i,-.
  • the timings of the first timing circuit Til and the timings of the second timing circuit Ti2 will differ, which can be influenced by the choice of the current source Jl, J2 and of the capacitors C5, C6.
  • the predetermined time before the start-up circuit Til, Ti2 starts switching the first switch Sl and the second switch S2 typically is longer than the period of the resonant current i r in the resonant circuit CR.
  • the first output line LoI and the second output line Lo2 will send pulses to the first switch Sl and the second switch S2, respectively, before the predetermined time is passed.
  • the pulses sent via the first output line LoI and the second output line Lo2 will trigger the logical OR-gate ORl, OR2 which will trigger the first switch Sl and the second switch S2 and which will discharge the fifth capacitor C5 and the sixth capacitor C6 preventing the first timing circuit Til and the second timing circuit Ti2 from (also) triggering the first switch Sl and the second switch S2.
  • the start-up circuit SU shown in Fig. 7 will also function as a watchdog circuit in that the first timing circuit Til and the second timing circuit Ti2 will trigger the first switch Sl and the second switch S2 when, during operation of the resonant power converter PCr, no pulses are sent via the first output line LoI and the second output line Lo2 during a time longer than the predetermined time of the first timing circuit Til and the second timing circuit Ti2.
  • Fig. 8 shows an electronic apparatus App, for example an optical disk drive, comprising the resonant power converter PCr according to the invention.
  • the apparatus App comprises a laser diode LD for illuminating an optical disk OD via a lens Le. The reflected light is sensed via a photodiode PD which typically requires a reverse voltage of 15 to 30 volts.
  • the apparatus App according to the invention comprises the resonant power converter PCr for supplying the reverse voltage.
  • the resonant power converter PCr comprises an IC which is connected to the input voltage Vi and the reference voltage Vref and which integrates the first switch Sl, the second switch S2 and the switch controller SC.
  • the resonant power converter PCr further comprises the resonant circuit CR and the rectifier circuit CO.
  • the load of the resonant power converter PCr is the photodiode PD.
  • the second terminal of the photodiode PD is connected to a low- impedance amplifier input of the IC for sensing a light intensity via the photodiode PD.
  • the input voltage Vi of the IC is typically 3.3 volts or less.
  • any reference signs placed between parentheses shall not be construed as limiting the claim.
  • Use of the verb "comprise” and its conjugations does not exclude the presence of elements or steps other than those stated in a claim.
  • the article “a” or “an” preceding an element does not exclude the presence of a plurality of such elements.
  • the invention may be implemented by means of hardware comprising several distinct elements. In the device claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

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Abstract

A resonant power converter (PCr) which comprises a switchable means (Js1, Js2; S1, S2) for sequentially supplying a sourcing current and a sinking current to a first node (A) of a resonant circuit (CR). A rectifying circuit (C0) is connected to the resonant circuit. The resonant circuit consists of a series arrangement of a first capacitor (C1), an inductive element (L) and a second capacitor (C2). The resonant power converter further comprises a switch controller (SC) for controlling the switchable means. The switch controller switches the switchable means substantially at an extreme level of the resonant voltage (vra) at the first node caused by the resonant current (ir). The switches (S1, S2) are switched on during an on-time window (Tw1a, Tw1b, Tw2) of which the duration is typically shorter than one-eighth of a period (Pr) of the resonant voltage (vra) at the first node (A).

Description

Resonant power converter
The invention relates to a resonant power converter comprising a switchable means.
The invention further relates to a method of controlling an amplitude of a resonant voltage in a resonant power converter, and to an electronic apparatus comprising the resonant power converter.
A known resonant power converter for boosting an input voltage is shown in Fig. 1 in which a first terminal of a first switch is connected to an input node for receiving an input voltage and a second terminal of the first switch is connected to a first terminal of an inductor and to a first terminal of a second switch. A second terminal of the second switch is connected to ground. A second terminal of the inductor is connected to a first terminal of a capacitor and to a first terminal of a rectifying diode. A second terminal of the capacitor is connected to ground. A second terminal of the rectifying diode is connected to a first terminal of a further capacitor and to a first terminal of a load. A second terminal of the further capacitor and a second terminal of the load are connected to ground. The resonant power converter further comprises a controller (not shown) for controlling the first and the second switch. The controller switches the first switch and the second switch at substantially 50% duty cycle to induce a square-wave input signal having an amplitude equal to the input voltage at the input node. The frequency of the induced square-wave signal is close to the resonance frequency of the LC circuit of the resonant power converter. The varying voltage at the second terminal of the inductor due to the square-wave signal typically sinusoidally varies with an amplitude which is typically larger than the input voltage at the input node. The sinusoidal varying voltage is rectified via the rectifying diode and smoothed by the further capacitor to provide a substantially constant output voltage to the load. The amplitude of the sinusoidal varying voltage at the second terminal of the inductor typically depends on a quality factor of the resonant power converter and on the frequency of the induced square- wave signal. A drawback of the known resonant power converter is that it typically requires relatively large and low ohmic switches.
It is an object of the invention to provide a resonant power converter in which relatively small switches can be used.
According to a first aspect of the invention the object is achieved with the resonant power converter as claimed in claim 1. According to a second aspect of the invention the object is achieved with the method of controlling an amplitude of a resonant voltage in a resonant power converter as claimed in claim 12. According to a fourth aspect of the invention the object is achieved with an electronic apparatus comprising the resonant power converter as claimed in claim 13.
The resonant power converter in accordance with the first aspect of the invention comprises a resonant circuit which comprises a series arrangement of a first capacitor, an inductive element and a second capacitor. The inductive element is arranged between a first node and a second node and the first capacitor is arranged between the first node and a reference voltage and the second capacitor is arranged between the second node and the reference voltage. The first node is connected to a switchable means for supplying a sourcing current to the first node and for supplying a sinking current to the first node. The second node is connected to an output node via the rectifying circuit. In operation the resonant circuit comprises a resonant current having a resonance frequency which is substantially dependent on the series arrangement of the first capacitor, the inductive element and the second capacitor. In contrast to the known resonant power converter in which the resonant current flows through the switches, the resonant current in the resonant power converter according to the invention substantially flows within the resonant circuit. The resonant current causes a resonant voltage at the first node and the second node.
In the resonant power converter according to the invention the resonant current reduces over time due to losses within the resonant power converter. The switch controller is designed to replenish the losses by switching the switchable means for supplying a sourcing current or a sinking current during a first on-time window and by switching the switchable means for supplying a sinking current or a sourcing current, respectively, during a second on- time window. If, for example, the switchable means comprises a first switch arranged between the first node and an input node for supplying the sourcing current or the sinking current to the first node and comprises a second switch being arranged between the first node and a reference node for supplying the sinking current or the sourcing current to the first node (A), respectively. If, for example, the input node provides an input potential which is positive with respect to the reference potential, the switch controller drives the first switch to be conductive during a first on-time window to increase a voltage at the first node to a first predetermined voltage by supplying the sourcing current. The first on-time window substantially starts at a first instant which corresponds to a maximum voltage of the resonant voltage at the first node. During the first on-time window a first replenishing current flows via the first switch into the first node, replenishing the resonant current. During the first on- time window the voltage at the first node is determined by the resonant voltage together with the first replenishing current. Because the first switch switches substantially at the maximum of the resonant voltage, the voltage difference across the first switch is substantially at a minimum which results in a low first replenishing current through the first switch. A duration of the first on-time window is shorter than one-eighth of a period of the resonant voltage. Limiting the duration of the first on-time window ensures that the voltage difference across the first switch remains low and that the first replenishing current through the first switch remains low.
At a second instant the switch controller drives the second switch to be conductive during a second on-time window to decrease the voltage at the first node to a second predetermined voltage by supplying the sinking current. The second instant corresponds to a minimum voltage of the resonant voltage at the first node. During the second on-time window a second replenishing current flows via the second switch away from the first node, further reducing the voltage at the first node and increasing an amplitude of the resonant voltage at the first node. During the second on-time window the voltage at the first node is determined by the resonant voltage together with the second replenishing current caused by the closing of the second switch. Because the second switch switches substantially at the minimum of the resonant voltage, the voltage difference across the second switch is substantially at a minimum which results in a low second replenishing current through the second switch. A duration of the second on-time window is shorter than one-eighth of a period of the resonant voltage. Limiting the duration of the second on-time window ensures that the voltage difference across the second switch remains low and that the second replenishing current through the second switch remains small.
The resonant power converter according to invention substantially confines the resonant current within the resonant circuit and switches the switches at an extreme level of the resonant voltage during an on-time window with a limited duration. This results in a low voltage difference across the switches which cause the substantially low replenishing currents to flow through the switches. This enables the use of relatively small switches in the resonant power converter.
An additional benefit of the resonant power converter according to the invention is that the resonant circuit can consist of passive components. The passive components can relatively easily be selected to have a relatively low equivalent series resistance (further also referred to as ESR) and thus can relatively easily be selected to have relatively low losses inside the resonant circuit. Reducing the losses inside the resonant circuit results in a further reduction of the required first and second replenishing currents and thus further enables the use of relatively small switches in the resonant power converter according to the invention.
A further benefit of the resonant power converter according to the invention is that the use of relatively small switches enables the switches to be switched 'on' and 'off very fast with relatively low switching losses. Due to the fast switching of the switches, the resonant current within the resonant circuit can flow at relatively high frequency, which enables the use of a small inductive element. A benefit when using relatively small switches and a relatively small inductive element is that the resonant power converter solution can be miniaturized.
In the known resonant power converters a square-wave signal is induced at the first node by driving the first and second switch to be conductive at the resonance frequency with a duty cycle of substantially 50%. As a result either the first switch or the second switch is conducting, carrying the resonant current of the known resonant power converter. If a capacitor were to be applied parallel to the second switch of the known resonant power converter a significant increase of the losses would occur. The inventor has realized that using a resonant circuit consisting of passive components to substantially confine the resonant current prevents the switches from carrying the relatively large resonant current. The losses of the resonant current within the resonant power converter according to the invention are replenished by switching the first switch and the second switch during a first on-time window and a second on-time window, respectively. In contrast to the known resonant power converters, both switches are non-conductive during the major part of the period of the resonant current and are substantially switched 'on' at a first instant and a second instant, corresponding to the extremes of the resonant voltage at the first and second node. During the first and the second on-time window the losses in the resonant current are replenished. During the remainder of the period of the resonant voltage the first and second switch are non-conductive and the resonant current is completely carried within the resonant circuit.
In one embodiment of the resonant power converter the switchable means comprises a first switchable current source arranged between the first node and an input node for supplying the sourcing current or the sinking current to the first node and comprises a second switchable current source arranged between the first node and a reference node for supplying the sinking current or the sourcing current, respectively to the first node.
In one embodiment of the resonant power converter a load coupled to the output node is a capacitive load. The resonant current in a resonant power converter is typically substantially larger than the current supplied to the load. When the load is a capacitive load even the losses within the known resonant power converter typically are larger than the power supplied to the capacitive load which results in a poor efficiency of the known resonant power converter for capacitive loads. This is typically due to the fact that the large resonant current in the known resonant power converter runs via the switches causing relatively large losses. In the resonant power converter according to the invention the resonant current runs within the resonant circuit which, for example, can consist of passive components. The passive components can relatively easily be selected to have a relatively low ESR and thus can relatively easily be selected to have relatively low losses inside the resonant circuit. Furthermore, the switches in the resonant power converter according to the invention only need to carry a relatively low replenishing current. This relatively low replenishing current can be carried with relatively low losses even using relatively small switches. This enables the resonant power converter according to the invention to have a relatively high efficiency even for capacitive loads.
In one embodiment of the resonant power converter the inductive element is a quartz crystal or ceramic resonator. In a typical inductive element, for example a coil, the inductance value varies a few percent from the targeted inductance value due to manufacturing tolerances. Therefore, the resonance frequency of the resonant voltage can vary a few percent from the targeted resonance frequency. The use of the quartz crystal or ceramic resonator as inductive element in the resonant power converter results in a well- defined resonance frequency of the resonant current, because a typical quartz crystal or ceramic resonator behaves as an inductive element at a well defined frequency within a relatively small bandwidth. This results in a resonant power converter having a relatively high quality factor. An additional benefit when using a quartz crystal or ceramic resonator as inductive element is that the well-defined frequency enables the resonant power converter to be used as clock generator in the remainder of a circuit. For example, when the resonant power converter is integrated inside an integrated circuit (further also referred to as IC) which comprises a quartz crystal or ceramic resonator this quartz crystal or ceramic resonator can be used both as inductive element for the resonant power converter and as clock generator. Furthermore, this combined use will reduce the electromagnetic interference (further also referred to as EMI) emitted by the resonant power converter because the resonant power converter drives the switches in phase with the clock signal. In one embodiment of the resonant power converter a duration of the first on- time window and a duration of the second on-time window are fixed. A benefit of this embodiment is that the switch controller can be simplified in that the switch controller only needs to determine the maximum or minimum of the resonant voltage at the first node caused by the resonant current. However, if the duration of the fixed time window is not sufficient to compensate the losses in the resonant circuit, the amplitude of the resonant voltage will be too low and thus the output voltage of the resonant power converter will be too low.
In one embodiment of the resonant power converter the switch controller determines the duration of the first on-time window and/or of the second on-time window by sensing a level of the resonant voltage at the first node or the second node and by comparing the sensed level with a predetermined level. The switch controller, for example, senses a voltage variation at the first node during the first on-time window. When the voltage at the first node is equal to a predetermined voltage, the switch controller ends the first on-time window by opening the first switch. During the second on-time window the switch controller, for example, senses the voltage variation at the first node. If the voltage at the first node is equal to a second predetermined voltage, the switch controller ends the second on-time window by opening the second switch. The duration of the on-time window is adapted to the replenishing time needed to replenish the resonant current at the first node to achieve a predetermined voltage at the first node. A benefit of this embodiment is that the duration of the on-time window can be varied depending on the load of the resonant power converter such that the output voltage, also at higher loads, can be kept at a substantially constant level.
In one embodiment of the resonant power converter the switch controller is coupled to the first node for sensing a level of the resonant voltage at the first node to determine the first instant and the second instant. A benefit of this embodiment is that the first node is at the low- voltage range of the resonant power converter which enables full integration of a sensing circuit of the resonant voltage inside a low voltage IC. The full integration of the sensing circuit typically reduces the number of input and output pins on the IC.
In one embodiment of the resonant power converter the switch controller is designed to disable the switchable means for a duration of a first disable-time window after the first on-time window and to disable the switchable means for the duration of a second disable-time window after the second on-time window. The duration of the first disable-time window and/or the second disable-time window may be fixed or may be variable. The voltage variations at the first node typically comprise disturbances from the sinusoidal shape of the resonant voltage due to the switching of the switchable means. These disturbances from the sinusoidal shape may cause false switching of the switchable means outside first on- time windows and second on-time windows. When the resonant power converter is arranged to disable the switchable means during the first disable-time window and to disable the switchable means during the second disable-time window false switching of the switchable means is prevented. Many alternative circuits can be designed by the person skilled in the art to prevent switching the switchable means outside the on-time windows without departing from the scope of this embodiment.
In one embodiment of the resonant power converter the switch controller is coupled to the second node for sensing a level of the resonant voltage at the second node to determine the first instant and the second instant. A benefit of this embodiment is that the voltage variation at the second node typically is sinusoidal, not disturbed by the switching of the first and the second switch. Although the phase of the sinusoidal signal at the second node typically is shifted 180 degrees, the smooth sinusoidal resonant voltage enables a simple and accurate determination of the first instant and the second instant at which the switch controller drives the first switch and second switch, respectively.
In one embodiment of the resonant power converter the capacitance of the first capacitor is larger than the capacitance of the second capacitor. Amplitudes of the resonant voltage at the first node and the second node substantially depend on a ratio between the first capacitor and the second capacitor and on the resonant current flowing within the resonant circuit. By choosing the first capacitor to be larger than the second capacitor the resonant power converter is an up-converter.
In one embodiment of the resonant power converter the switch controller is designed to generate a drive signal for switching the switchable means and a start-up circuit is designed to sense the drive signal and, when no drive signal is sensed during a predetermined time window, to initiate the resonant current within the resonant circuit by switching the switchable means at a predetermined frequency. The start-up circuit typically is necessary to start a resonant current within the resonant circuit. Typically, the start-up circuit can also be used as a watchdog circuit which, for example, starts to initiate a resonant current within the resonant circuit if none of the first and second switches have switched during the start-up-time window.
These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter. In the drawings:
Fig. 1 shows an embodiment of the known resonant power converter for boosting an input voltage.
Fig. 2 shows an embodiment of the resonant power converter according to the invention, in which the switch controller is coupled to the second node,
Fig. 3 shows an embodiment of the resonant power converter in which the switchable means for sourcing is a first switchable current source and in which the switchable means for sinking is a second switchable current source,
Fig. 4 shows the resonant voltage at the first node, the resonant voltage at the second node and the output voltage across the load against time,
Fig. 5 shows an embodiment of the resonant power converter according to the invention, in which the switch controller is coupled to the first node,
Fig. 6 shows several diagrams showing several signals at several terminals of the switch controller shown in Fig. 4, Fig. 7 shows a start-up circuit for use in the resonant power converter according to the invention, and
Fig. 8 shows a consumer apparatus comprising the resonant power converter according to the invention.
The figures are purely diagrammatic and not drawn to scale. Particularly for clarity, some dimensions are exaggerated strongly. Similar components in the figures are denoted by the same reference numerals as far as possible. Fig. 1 shows one embodiment of the known resonant power converter for boosting an input voltage Vin. A first terminal of a first switch SlO is coupled to an input node for receiving an input voltage Vin and a second terminal of the first switch SlO is coupled to a first terminal of an inductor LlO and to a first terminal of a second switch S20. A second terminal of the second switch S20 is coupled to ground. A second terminal of the inductor LlO is coupled to a first terminal of a capacitor ClO and to a first terminal of a rectifying diode DlO. A second terminal of the capacitor ClO is coupled to ground. A second terminal of the rectifying diode DlO is connected to a first terminal of a further capacitor C20 and to a first terminal of a load RLp. A second terminal of the further capacitor C20 and a second terminal of the load RLp are coupled to ground. The resonant power converter further comprises a controller (not shown) for controlling the first switch SlO and the second switch S20. The controller switches the first switch SlO and the second switch S20 at substantially 50% duty cycle to induce a square-wave input signal (not shown) having a voltage amplitude at the input node equal to the input voltage Vin. The frequency of the induced square-wave signal is close to the resonance frequency of the resonant power converter. The resonant signal causes a sinusoidal voltage variation at the second terminal of the inductor LlO having a voltage amplitude which is typically larger than the input voltage Vin at the input node. The sinusoidal voltage variation is rectified via the rectifying diode DlO and smoothed by the further capacitor C20 to provide a substantially constant output voltage Vout to the load RLp. Of course alternative means for rectifying the sinusoidal voltage variation are possible and well known in the art. The voltage amplitude of the resonant voltage at the second terminal of the inductor LlO typically is dependent on the quality factor of the resonant power converter and on the frequency of the induced square-wave signal.
Fig. 2 shows one embodiment of the resonant power converter PCr according to the invention. The resonant power converter PCr comprises a first switch Sl, a second switch S2, a resonant circuit CR, a rectifying circuit CO and a switch controller SC. The first switch Sl is arranged between an input node at an input potential and a first node A. The second switch S2 is arranged between the first node A and a reference node being ground G. The input voltage Vi is the voltage between the input node and ground G. The resonant circuit CR is arranged between the first node A, a second node B and ground G and consists of a first capacitor Cl arranged between the first node A and ground G, a second capacitor C2 arranged between the second node B and ground G and an inductive element L arranged between the first node A and the second node B. The rectifying circuit CO of the resonant power converter PCr is arranged between the second node B, an output node at an output potential and ground G. The output voltage Vo is the voltage between the output node and ground G. In the embodiment shown in Fig. 2 the rectifying circuit CO comprises a rectifying diode Dl and a third capacitor C3. The rectifying diode Dl is arranged between the second node B and the output node and the third capacitor C3 is arranged between the output node and ground G. Many alternative designs of rectifying circuits CO are known in the art and can be applied by the person skilled in the art without departing from the scope of the invention. A load RL is connected to the output node and is arranged between the output node and ground G. The resonant power converter PCr further comprises a switch controller SC for controlling the output voltage Vo of the resonant power converter PCr. The switch controller SC comprises a input line Li for receiving an input signal and comprises two output lines LoI, Lo2 for driving the first switch Sl and the second switch S2, respectively. The switch controller SC further comprises a comparator cmpl which creates a square- wave signal Vbsq indicating a first instant Tl and a second instant T2 at which the first switch Sl and the second switch S2 must be switched on, respectively. In the embodiment shown in Fig. 2 the input line Li is connected to the second node B via a first resistor Rl and the input line Li is connected to a negative input of the comparator cmpl via a fourth capacitor C4. The negative input of the comparator cmpl is also connected to a first terminal of a second resistor R2. The second terminal of the second resistor R2 is connected to a positive input of the comparator cmpl and is also connected to ground G. A resonant current ir flows within the resonant circuit CR. The resonant current CR causes a resonant voltage Vra, vrb at the first node A and the second node B with respect to ground G. The arrangement of the first capacitor Cl, the inductive element L and the second capacitor C2 within the resonant circuit CR results in a ratio between an amplitude of the resonant voltage vrb at the second node B and an amplitude of the resonant voltage vra at the first node A which is substantially fixed. Furthermore, a phase of the resonant voltage vra at the first node A is shifted 180 degrees with respect to a phase of the resonant voltage vrb at the second node B. Due to the substantially fixed ratio a relatively constant output voltage Vo in the resonant power converter PCr is obtained by controlling the amplitude of the resonant voltage vra at the first node A. In the embodiment of the resonant power converter PCr as shown in Fig. 2, the resonant power converter PCr senses the resonant current ir via the resonant voltage vrb at the second node B. The resonant voltage vrb at the second node B causes a current to flow into the switch controller SC via the first resistor Rl and the fourth capacitor C4. This current is sensed by the comparator cmpl via the second resistor R2 arranged between the positive and negative input of the comparator cmpl. Due to the presence of the fourth capacitor C4 the voltage variation sensed across the second resistor R2 is a differentiated voltage Vdi compared to the resonant voltage vrb at the second node B. The output signal of the comparator cmpl is a square-wave signal VbSq in which the square wave signal VbSq has a negative edge when the differentiated resonant voltage v^ crosses a mid- level Vmid via a positive slope and in which the square-wave signal VbSq has a positive edge when the differentiated resonant voltage v^ crosses the mid- level Vmid via a negative slope. The mid- level Vmid is defined as being between the two extremes of the sinusoidal differentiated resonant voltage v^. The negative slope of the square- wave signal Vbsq indicates a first instant Tl at which the first switch Sl is switched. The positive slope of the square-wave signal VbSq indicates a second instant T2 at which the second switch S2 is switched. The first switch Sl and the second switch S2 are only switched on during a first on-time window TwIa, TwIb (see Fig. 3) and during a second on-time window Tw2 (see Fig. 3), respectively. The duration of both the first on-time window TwIa, TwIb and the second on-time window Tw2 is typically shorter than one- eighth of a period Pr (see Fig. 3) of the resonant voltage vra at the first node A. During the first on-time window TwIa, TwIb and the second on-time window Tw2 the switch controller replenishes the resonant current ir. This is shown in more detail in Fig. 3. The duration of the first on-time window TwIa, TwIb and the second on-time window Tw2 may be fixed and, for example, be determined by a timer (not shown) or the duration may be variable and, for example, depend on the losses which need to be replenished.
Fig. 3 shows an embodiment of the resonant power converter PCr having a first switchable current source JsI for supplying the replenishment current at one of the extreme levels VtIr, Vt2r (see Fig. 4) of the resonant voltage vra at the first node A and having a second switchable current source Js2 for supplying the replenishment current at the other of the two extreme levels Vt2r, VtIr (see Fig. 4) of the resonant voltage vra at the first node A. Supplying the replenishment current being either sourcing the replenishment current or sinking the replenishment current, depending on the polarity of the input node. The switch controller SC now switches the first switchable current source JsI during the first on-time window TwIa, TwIb and switches the second switchable current source Js2 during the second on-time window Tw2.
Fig. 4 shows the resonant voltage vra at the first node A, the resonant voltage Vrb at the second node B and the output voltage Vo across the load RL against time t. The first instant Tl coincides with a minimum Vminb of the resonant voltage vrb at the second node B and thus also coincides with a maximum VtIr of the resonant voltage vra at the first node A. The second instant T2 coincides with a maximum Vmaxb of the resonant voltage vrb at the second node B and thus also coincides with a minimum Vt2r of the resonant voltage vra at the first node A. Typically an amplitude of the resonant voltage vra at the first node A and of the resonant voltage vrb at the second node B caused by the resonant current ir reduces over time due to losses inside the resonant circuit CR and/or due to power supplied to the load RL. During the first on-time window TwIa, TwIb the first switch Sl connects the first node A to the input node at the input potential. At the first instant Tl the resonant voltage vra at the first node A is at its maximum VtIr. However, due to losses in the resonant circuit CR and/or power supplied to the load RL, the maximum voltage VtIr at the first node A typically is lower than the input voltage Vi. When the first switch Sl connects the first node A with the input node, a replenishing current will flow through the first switch Sl trying to increase the maximum amplitude VtIr of the resonant voltage vra at the first node A to be equal to the input voltage Vi. The replenishing current typically is relatively weak because it only needs to replenish losses and/or power supplied by the resonant power converter PCr during half the period Pr of the resonant current ir. In addition, the first switch Sl is closed at a maximum VtIr of the resonant voltage vra at the first node A which results in a small voltage difference across the first switch Sl which also results in a relatively weak replenishing current. During the first on-time window TwIa, TwIb the resonant voltage vra at the first node A is determined by the resonant current ir together with the replenishing current through the first switch Sl. During the second on-time window Tw2 the second switch S2 connects the first node A to the reference node at the reference potential, which is ground G in the embodiment shown. At the second instant T2 the resonant voltage vra at the first node A is at its minimum Vt2r. However, due to losses in the resonant circuit CR and/or power supplied to the load RL, the minimum voltage Vt2r at the first node A typically is higher than the reference potential at ground G. When the second switch S2 connects the first node A with ground G, a replenishing current will flow through the second switch S2 trying to decrease the minimum amplitude Vt2r of the resonant voltage vra at the first node A to be equal to ground G. The replenishing current typically is relatively weak because it only needs to replenish losses and/or power supplied by the resonant power converter PCr during half the period Pr of the resonant current ir. In addition, the second switch S2 is closed at a minimum Vt2r of the resonant voltage vra at the first node A which results in a small voltage difference across the second switch S2 which also results in a relatively weak replenishing current. During the second on-time window Tw2 the resonant voltage vra at the first node A is determined by the resonant current ir together with the replenishing current through the second switch S2. Fig. 4 also shows a first disable-time window Twdl and a second disable-time window Twd2. During the first disable-time window Twdl the first switch Sl is disabled and during the second disable-time window Twd2 the second switch S2 is disabled. The duration of the disable-time windows Twdl, Twd2 can be fixed or can vary, for example, depending on the instant at which the resonant voltage vra at the first node A crosses a predetermined voltage level. The benefit of the disable-time windows Twdl, Twd2 is that they can prevent false switching of the first switch Sl and the second switch S2. Especially when, for example, the first instant Tl and/or the second instant T2 are determined from the resonant voltage vra at the first node A, false switching may occur due to the disturbances in the resonant voltage vra at the first node A caused by the switching of the first switch Sl and the second switch S2.
In contrast to the known resonant power converters, where the switches are conductive with a duty cycle of substantially 50%, the first switch Sl and second switch S2 in the resonant power converter PCr according to the invention are non-conductive during the major part of the period Pr of the resonant current ir and are only conductive during a first on- time window TwIa, TwIb and a second on-time window Tw2, respectively. The combination of the resonant circuit CR comprising the first capacitor Cl, the inductive element L and the second capacitor C2, together with the described switching of the first switch Sl and the second switch S2, maintains the amplitude Ar of the resonant voltage vra at the first node A to be substantially equal to the input voltage Vi. Due to the substantially fixed ratio between the amplitude Ar of the resonant voltage vra at the first node A and an amplitude of the resonant voltage vrb at the second node B, the controlling of the amplitude Ar of the resonant voltage vra at the first node A also controls the amplitude of the resonant voltage Vrb at the second node B. In an additional embodiment of the resonant power converter PCr the duration of the first on-time window TwIa, TwIb and of the second on-time window Tw2 are fixed and are substantially shorter than the period Pr of the resonant current ir. Fixing the duration of the first on-time window TwIa, TwIb and the second on-time window Tw2 will result in a simplification of the switch controller SC. Because the losses and/or power supplied to the load RL are typically small, the time to replenish the resonant current ir at the first node A is typically very short. However, the duration of the first on-time window TwIa, TwIb and of the second on-time window Tw2 should be long enough to ensure enough replenishment time for the typical load RL. If there is not enough time to replenish the losses and/or power supplied to the load RL, the amplitude Ar of the resonant voltage vra at the first node A will be lower than the required amplitude which results in the output voltage Vo being lower.
In a further embodiment, the resonant power converter PCr may, for example, comprise a voltage sensor SV (see Fig. 2) which senses the voltage difference between the first node A and ground G while the first switch Sl or the second switch S2 are closed. The switch controller SC, for example, comprises comparing circuitry CC (see Fig. 2) for comparing the voltage sensed by the voltage sensor SV with a first predetermined voltage Vsetl (see Fig. 2) and, for example, with a second predetermined voltage Vset2 (see Fig. 2). The comparing circuitry CC opens the first switch Sl at an instant after the first instant Tl in which the sensed voltage is equal to a first predetermined voltage Vsetl, thus ending the first on-time window TwIa, TwIb. The comparing circuitry CC opens the second switch S2 at an instant after the second instant T2 in which the sensed voltage is equal to a second predetermined voltage Vset2, thus ending the second on-time window Tw2. Thus the comparing circuitry CC adapts the duration of the first on-time window TwIa, TwIb and of the second on-time window Tw2 depending on the sensed voltage.
Fig. 5 shows an embodiment of the resonant power converter PCr according to the invention, in which the switch controller SC is coupled to the first node A for sensing the resonant voltage vra at the first node A and determining the first instant Tl and the second instant T2. The resonant power converter PCr again comprises an arrangement of the first switch Sl, the second switch S2, the resonant circuit CR the rectifying circuit CO and the switch controller SC as shown in Fig. 2. The major differences between the resonant power converter PCr shown in Fig. 2 and the resonant power converter PCr shown in Fig. 5 are that in Fig. 5 the switch controller SC is coupled to the first node A for sensing the resonant voltage Vra, the switch controller SC further comprises circuitry for disabling the first switch Sl for a duration of the first disable-time window Twdl (see Fig. 4) and for disabling the second switch S2 for a duration of a second disable-time window Twd2 (see Fig. 4), the inductive element in the resonant power converter PCr is a quartz crystal QC or a ceramic resonator QC and ground G has been replaced by a reference node at a reference voltage Vref. The inductive element in the resonant power converter PCr shown in Fig. 5 is a quartz crystal QC or a ceramic resonator QC. In a typical inductive element, for example a coil, the inductance value varies by a few percent from the targeted inductance value due to manufacturing tolerances. Therefore, the resonance frequency of the resonant voltage can vary by a few percent from the targeted resonance frequency. The use of the quartz crystal QC or ceramic resonator QC as inductive element in the resonant power converter PCr results in a well-defined resonance frequency of the resonant current ir, because a typical quartz crystal QC or ceramic resonator QC behaves as an inductive element at a well-defined frequency within a relatively small bandwidth. This results in a resonant power converter PCr having a relatively high quality factor. A further benefit when using a quartz crystal QC or a ceramic resonator QC is that the well-defined frequency of the quartz crystal QC or the ceramic resonator QC enables the resonant power converter PCr also to be used as clock generator in the remainder of a circuit. For example, when the resonant power converter PCr is integrated inside an IC which already comprises a quartz crystal QC or ceramic resonator QC this can be used both as inductive element for the resonant power converter PCr and as clock generator for the IC.
The switch controller SC in the resonant power converter PCr shown in Fig. 5 is coupled to the first node A for sensing the resonant voltage vra at the first node A. A benefit of sensing the resonant voltage vra at the first node A is that the first node A is at a low voltage end of the resonant power converter PCr which enables the input line Li to be directly connected to the first node A, omitting the first resistor Rl (see Fig. 2). A further benefit is that the switch controller SC together with the first switch Sl, the second switch S2 and the input line Li can be integrated in an IC (thus also integrating the first node A). However, the resonant voltage vra at the first node A is typically not a smooth sinusoidal resonant voltage vra but rather is disturbed due to the switching of the first switch Sl and the second switch S2 which may cause false switching of the first switch Sl and/or the second switch S2.
To prevent false switching of the first switch Sl and/or the second switch S2 the switch controller comprises circuitry for disabling the first switch Sl for a duration of the first disable-time window Twdl and for disabling the second switch S2 for a duration of a second disable-time window Twd2. In the embodiment shown in Fig. 5 the disabling is achieved using a second comparator cmp2. The first node A is connected to the positive input of the second comparator cmp2 and a voltage equal to half the input voltage Vi/2 is connected to the negative input of the second comparator cmp2. The output of the second comparator cmp2 is connected to the gate of a third switch being a third switch (PMOS) S3. The source of the third switch (PMOS) S3 is connected to the input voltage Vi and the drain of the third switch (PMOS) S3 is connected to the source of a fourth switch (PMOS) S4. The output of the second comparator cmp2 is also connected to the gate of a sixth switch (NMOS) S6. The source of the sixth switch (NMOS) S6 is connected to the reference voltage Vref and the drain of the sixth switch (NMOS) S6 is connected to the source of a fifth switch (NMOS) S5. The gate of the fourth switch (PMOS) S4 and the gate of the fifth switch (NMOS) S5 are both connected to the output of the first comparator cmpl (see Fig. 2) which creates a square- wave Vasqn depending on the differentiated resonant voltage vadi determined from the resonant voltage vra at the first node A. The drain of the fourth switch (PMOS) S4 is connected to a third node C. The drain of the fifth switch (PMOS) S5, a first terminal of a parasitic capacitance Cpar, an input of a first one-shot trigger TrI, and an input of an inverter invl are also connected to the third node C. The first one-shot trigger TrI, for example, triggers at a positive slope. An output of the inverter invl is connected to an input of a second one-shot trigger Tr2, for example, also triggering at a positive slope. The output of the first one-shot trigger TrI is connected to the second switch S2 and the output of the second one-shot trigger Tr2 is connected to the first switch Sl. A second terminal of the parasitic capacitance Cpar is connected to the reference voltage Vref. The combination of the third switch (PMOS) S3, the fourth switch (PMOS) S4, the fifth switch (NMOS) S5 and the sixth switch (NMOS) S6 together with the parasitic capacitance Cpar substantially behave as a second inverter inv2 of which both supply terminals can be enabled and disabled independently. To explain how the switch controller SC shown in Fig. 5 prevents the false switching of the first switch Sl and the second switch S2, voltages at several terminals of the switch controller SC are shown in Fig. 5. Fig. 6 shows several diagrams showing several signals at several terminals of the switch controller SC shown in Fig. 5. A first diagram, labeled Vra, shows the resonant voltage Vra at the first node A. A second diagram, labeled vrb, shows the resonant voltage vrb at the second node B. A third diagram, labeled vadi, shows a differentiated signal resulting from differentiating the resonant voltage vra at the first node A. A fourth diagram, labeled Vp0I, shows a square-wave at the output of the second comparator cmp2. A fifth diagram, labeled vasq2, shows a square-wave signal vasq2 at the third node C. A sixth diagram, labeled Vasqn, shows the square-wave signal at the output of the first comparator cmpl.
The resonant voltage ^8 at the first node A is differentiated via the fourth capacitor C4 and provided to the negative input of the first comparator cmpl. As indicated in Fig. 2 the output of the first comparator cmpl would be a square- wave signal when the input would be a substantially sinusoidal resonant voltage. However, due to the switching of the first switch Sl and the second switch S2 the differentiated signal vadi resulting from differentiating the resonant voltage vra at the first node is not sinusoidal as can be seen in the third diagram. The differentiated resonant voltage vadi shows typical spikes dl, d2 caused by the switching of the first switch Sl and by the switching of the second switch S2. At the first instant Tl shown in Fig. 6 the differentiated resonant voltage vadi crosses a mid- level via a negative slope. The mid- level is defined between the two extremes of the sinusoidal differentiated resonant voltage vadi (disregarding the spikes dl and d2). When the differentiated resonant voltage vadi crosses the mid- level via a negative slope, the output of the first comparator vasqn creates a positive edge which is inverted by the second inverter inv2 and again by the first inverter invl to provide the positive edge to the second one-shot trigger Tr2 which triggers the first switch Sl. Due to the triggering of the first switch SI a first spike dl occurs at the differentiated resonant voltage vadi which causes the differentiated resonant voltage vacli to again cross the mid- level via a negative slope again creating a positive edge at the output of the first comparator vasqn which again triggers the first switch Sl, and so on, causing a chain of false trigger signals to the first switch Sl. To prevent false triggering of the first switch Sl and the second switch S2 the second comparator cmp2 is used. The second comparator cmp2 disconnects the input voltage Vi or the reference voltage Vref sequentially, thereby disabling the ability of the second inverter inv2 to invert. The parasitic capacitance Cpar keeps the voltage at the third node C constant during the disabling time. The output of the second comparator cmp2 is shown in the fourth diagram of Fig. 6 and results from connecting the resonant voltage vra of the first node A to the positive input of the second comparator cmp2 and comparing the resonant voltage vra at the first node A with half of the input voltage Vi/2 connected to the negative input of the second comparator cmp2. While the resonant voltage vra of the first node A is greater than half the input voltage Vi/2, the output of the second comparator cmp2 will be high and while the resonant voltage vra of the first node A is less than half the input voltage Vi/2 the output of the second resonant voltage is low. Suppose the resonant voltage vra at the first node A has almost reached the maximum level at the first instant Tl . The output of the second comparator cmp2 is high which causes the sixth switch (NMOS) S6 to be conductive and the third switch (PMOS) S3 to be off. The first comparator cmpl creates a positive edge which also causes the fifth switch (NMOS) S5 to be conductive. The voltage at the third node C was still high from a previous switching event and remained high due to the presence of the parasitic capacitance Cpar. Because both the fifth switch (NMOS) S5 and the sixth switch (NMOS) S6 are conducting, the parasitic capacitance Cpar will discharge and the signal vasq2 at the third node C will have a negative edge. The signal vasq2 at the third node C will be inverted by the first inverter invl and the second on-shot trigger Tr2 will trigger the first switch Sl. As soon as the first switch Sl is closed, the output of the first comparator cmpl will immediately have a negative edge and be low again. However, although the fourth switch (PMOS) S4 starts conducting due to the low output of the first comparator cmpl, the signal vasq2 at the third node C will not have a positive edge because the third switch (PMOS) S3 is still off due to the output of the second comparator cmp2. The parasitic capacitance Cpar keeps the signal vasq2 at the third node C low until both the third switch (PMOS) S3 and the fourth switch (PMOS) S4 are conductive. False triggering has been prevented. The next switching event can only take place when the output Vp0I of the second comparator cmp2 is low and the output vasqn of the first comparator cmpl has a negative edge. In the above-described example, the duration of the disable-time window is determined by a point at which the resonant signal vra at the first node A crosses over half of the input voltage Vi/2.
Fig. 7 shows an embodiment of a start-up circuit SU for use in the resonant power converter PCr according to the invention. The start-up circuit SU is, for example, arranged between the switch controller SC and the first switch Sl and the second switch S2. However, the start-up circuit SU may also, for example, be integrated in the switch controller SC. The embodiment of the start-up circuit SU as shown in Fig. 7 comprises two substantially identical timing circuits Til, Ti2 in which the first timing circuit Til is arranged between the first output line LoI of the switch controller SC and the first switch Sl via an inverter inv3 and in which the second timing circuit Ti2 is arranged between the second output line Lo2 of the switch controller SC and the second switch S2. The first timing circuit Til comprises a first current source Jl which supplies a first current Isul to a fourth node El . The first timing circuit Til further comprises a seventh switch (NMOS) S7, a fifth capacitor C5, and a first logical OR-gate ORl. The drain of the seventh switch (NMOS) S7 is connected to the fourth node El and the source is connected to the reference voltage Vref. One terminal of the fifth capacitor C5 is connected to the fourth node El and the other terminal of the fifth capacitor C5 is connected to the reference voltage Vref. One of the two input terminals of the first logical OR-gate ORl is also connected to the fourth node El and the second of the two input terminals of the first logical OR-gate ORl is connected to the first output line LoI of the switch controller SC. The output of the first logical OR-gate ORl is connected to the gate of the seventh switch (NMOS) S7 and to the first switch Sl via the inverter inv3. The second timing circuit Ti2 comprises a second current source J2 which supplies a second current Isu2 into a fifth node E2. The second timing circuit Ti2 further comprises an eighth switch (NMOS) S8, a sixth capacitor C6, and a second logical OR-gate OR2. The drain of the eighth switch (NMOS) S8 is connected to the fifth node E2 and the source is connected to the reference voltage Vref. One terminal of the sixth capacitor C6 is connected to the fifth node E2 and the other terminal of the sixth capacitor C6 is connected to the reference voltage Vref. One of the two input terminals of the second logical OR-gate OR2 is also connected to the fifth node E2 and the second of the two input terminals of the second logical OR-gate OR2 is connected to the second output line Lo2 of the switch controller SC. The output of the second logical OR-gate OR2 is connected to the gate of the eighth switch (NMOS) S8 and to the second switch S2.
At start-up the fifth capacitor C5 and the sixth capacitor C6 are not charged. As long as the first output line LoI and the second output line Lo2 remain low (no switching of the first switch Sl or the second switch S2), the first current source Jl and the second current source J2 will charge the fifth capacitor C5 and the sixth capacitor C6, respectively. After a predetermined time, which depends on the first current Isul together with the fifth capacitor C5 for the first timing circuit Til and which depends on the second current Isu2 together with the sixth capacitor C6 for the second timing circuit Ti2, the voltage at the input of the logical OR-gate ORl, OR2 connected to the fourth node El or the fifth node E2 will be high enough to trigger the logical OR-gate ORl , OR2 which will provide an output which is high. When the output of the logical OR-gate ORl, OR2 is high, the seventh switch (NMOS) S7 and the eighth switch (NMOS) S8 will conduct and discharge the fifth capacitor C5 and sixth capacitor C6, respectively. The voltage at the fourth node El and the fifth node E2 will be low again and the output of the logical OR-gate ORl, OR2 will be low again, resulting in providing a short pulse to the first switch Sl and the second switch S2. If the first output line LoI and second output line Lo2 remain low (thus still switching of the first switch Sl and second switch S2 by the switch controller SW) the sequence will be repeated, sending pulses via the first node A into the resonant circuit CR for starting the resonant current i,-. Typically the timings of the first timing circuit Til and the timings of the second timing circuit Ti2 will differ, which can be influenced by the choice of the current source Jl, J2 and of the capacitors C5, C6. Furthermore, the predetermined time before the start-up circuit Til, Ti2 starts switching the first switch Sl and the second switch S2 typically is longer than the period of the resonant current ir in the resonant circuit CR. During normal operation the first output line LoI and the second output line Lo2 will send pulses to the first switch Sl and the second switch S2, respectively, before the predetermined time is passed. The pulses sent via the first output line LoI and the second output line Lo2 will trigger the logical OR-gate ORl, OR2 which will trigger the first switch Sl and the second switch S2 and which will discharge the fifth capacitor C5 and the sixth capacitor C6 preventing the first timing circuit Til and the second timing circuit Ti2 from (also) triggering the first switch Sl and the second switch S2. The start-up circuit SU shown in Fig. 7 will also function as a watchdog circuit in that the first timing circuit Til and the second timing circuit Ti2 will trigger the first switch Sl and the second switch S2 when, during operation of the resonant power converter PCr, no pulses are sent via the first output line LoI and the second output line Lo2 during a time longer than the predetermined time of the first timing circuit Til and the second timing circuit Ti2.
Fig. 8 shows an electronic apparatus App, for example an optical disk drive, comprising the resonant power converter PCr according to the invention. The apparatus App comprises a laser diode LD for illuminating an optical disk OD via a lens Le. The reflected light is sensed via a photodiode PD which typically requires a reverse voltage of 15 to 30 volts. The apparatus App according to the invention comprises the resonant power converter PCr for supplying the reverse voltage. The resonant power converter PCr comprises an IC which is connected to the input voltage Vi and the reference voltage Vref and which integrates the first switch Sl, the second switch S2 and the switch controller SC. The resonant power converter PCr further comprises the resonant circuit CR and the rectifier circuit CO. In the example shown in Fig. 8 the load of the resonant power converter PCr is the photodiode PD. The second terminal of the photodiode PD is connected to a low- impedance amplifier input of the IC for sensing a light intensity via the photodiode PD. The input voltage Vi of the IC is typically 3.3 volts or less. It should be noted that the abovementioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims.
In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. Use of the verb "comprise" and its conjugations does not exclude the presence of elements or steps other than those stated in a claim. The article "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements. In the device claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Claims

CLAIMS:
1. A resonant power converter (PCr) comprising a switchable means (JsI , Js2; Sl, S2) for sequentially supplying a sourcing current and a sinking current to the first node (A), the resonant power converter (PCr) further comprising a resonant circuit (CR), a rectifier circuit (CO) and a switch controller (SC), the resonant circuit (CR) comprising a first capacitor (Cl) being arranged between the first node (A) and the reference node, a second capacitor (C2) being arranged between a second node (B) and the reference node and an inductive element (L, QC) being arranged between the first node (A) and the second node (B), a resonant current (ir) flowing within the resonant circuit (CR) causing a resonant voltage (vra, vrb) at the first node (A) and at the second node (B), the rectifier circuit (CO) being arranged between the second node (B) and an output node, and the switch controller (SC) being designed to replenish the resonant current (ir) by switching the switchable means (JsI, Js2; Sl, S2) for supplying the sourcing current or the sinking current during a first on-time window (TwIa, TwIb) to change a voltage (VtIr) at the first node (A) to a first predetermined voltage (Vi, Vsetl), the first on-time window (TwIa, TwIb) substantially starting at a first instant (Tl) corresponding to a first one (VtIr) of two extreme levels (VtIr, Vt2r) of the resonant voltage (vra) at the first node (A), and by switching the switchable means (JsI, Js2; Sl, S2) for supplying the sinking current or the sourcing current during a second on-time window (T w2) to change a voltage (Vt2r) at the first node (A), respectively, to a second predetermined voltage (G, Vset2), the second on- time window (T w2) substantially starting at a second instant (T2) corresponding to a second one (Vt2r) of two extreme levels (VtIr, Vt2r) of the resonant voltage (vra) at the first node (A), a duration of both the first on-time window (TwIa, TwIb) and the second on-time window (T w2) being shorter than one-eighth of a period (Pr) of the resonant current (ir).
2. A resonant power converter (PCr) as claimed in claim 1, wherein the switchable means (JsI, Js2; Sl, S2) comprises a first switch (Sl) arranged between the first node (A) and an input node for supplying the sourcing current or the sinking current to the first node (A) and comprises a second switch (S2) arranged between the first node (A) and a reference node for supplying the sinking current or the sourcing current to the first node (A), respectively.
3. A resonant power converter (PCr) as claimed in claim 1, wherein the switchable means (JsI, Js2; Sl, S2) comprises a first switchable current source (JsI) arranged between the first node (A) and an input node for supplying the sourcing current or the sinking current to the first node (A) and comprises a second switchable current source (Js2) arranged between the first node (A) and a reference node for supplying the sinking current or the sourcing current to the first node (A), respectively.
4. A resonant power converter (PCr) as claimed in claim 1, wherein the inductive element (L, QC) is a quartz crystal (QC) or ceramic resonator (QC).
5. A resonant power converter (PCr) as claimed in claim 1, 2 or 3, wherein during the first on-time window (TwIa, TwIb) the resonant voltage (vra) at the first node (A) is changed to the input voltage (Vi) and wherein during the second on-time window (Tw2) the resonant voltage (vra) at the first node (A) is changed to the reference voltage (Vref, G).
6. A resonant power converter (PCr) as claimed in claim 1, wherein a duration of the first on-time window (TwIa, TwIb) and a duration of the second on-time window (T w2) are fixed.
7. A resonant power converter (PCr) as claimed in claim 1, wherein the switch controller (SC) determines the duration of the first on-time window (TwIa, TwIb) and/or of the second on-time window (Tw2) by sensing a level of the resonant voltage (vra, vrb) at the first node (A) or the second node (B) and by comparing the sensed level with a predetermined level (Vsetl, Vset2).
8. A resonant power converter (PCr) as claimed in claim 1, wherein the switch controller (SC) is coupled to the first node (A) for sensing a level of the resonant voltage (vra) at the first node (A) to determine the first instant (Tl) and the second instant (T2).
9. A resonant power converter (PCr) as claimed in claim 1, wherein the switch controller (SC) is designed to disable the switchable means (JsI, Js2; Sl, S2) for a duration of a first disable-time window (Twdl) after the first on-time window (TwIa, TwIb) and to disable the switchable means (JsI, Js2; Sl, S2) for the duration of a second disable-time window (Twd2) after the second on-time window (Tw2).
10. A resonant power converter (PCr) as claimed in claim 1, wherein the switch controller (SC) is coupled to the second node (B) for sensing a level of the resonant voltage (vrb) at the second node (B) to determine the first instant (Tl) and the second instant (T2).
11. A resonant power converter (PCr) as claimed in claim 1 , wherein the capacitance of the first capacitor (Cl) is larger than the capacitance of the second capacitor (C2).
12. A resonant power converter (PCr) as claimed in claim 1, wherein the switch controller (SC) is designed to generate a drive signal for switching the switchable means (JsI, Js2; Sl, S2) and wherein a start-up circuit (SU) is designed to sense the drive signal and, when no drive signal is sensed during a predetermined time window, to initiate the resonant current (ir) within the resonant circuit (CR) by switching the switchable means (JsI, Js2; Sl, S2) at a predetermined frequency.
13. A method of controlling an amplitude (Ar) of a resonant voltage (Sr) in a resonant power converter (PCr), the resonant power converter (PCr) comprising a switchable means (JsI, Js2; Sl, S2) for sequentially supplying a sourcing current and a sinking current to the first node (A), the resonant power converter (PCr) further comprising a resonant circuit (CR), a rectifier circuit (CO) and a switch controller (SC), the resonant circuit (CR) comprising a first capacitor (Cl) being arranged between the first node (A) and the reference node, a second capacitor (C2) being arranged between a second node (B) and the reference node and an inductive element (L, QC) being arranged between the first node (A) and the second node (B), a resonant current (ir) flowing within the resonant circuit (CR) causing a resonant voltage (vra, vrb) at the first node (A) and at the second node (B), the rectifier circuit (CO) being arranged between the second node (B) and an output node, and the switch controller (SC) being designed to replenish the resonant current (ir) by performing the steps of: switching the switchable means (JsI, Js2; Sl, S2) for supplying the sourcing current or the sinking current during a first on-time window (TwIa, TwIb) to change a voltage (VtIr) at the first node (A) to a first predetermined voltage (Vsetl), the first on-time window (TwIa, TwIb) substantially starting at the first instant (Tl) corresponding to a first one (VtIr) of two extreme levels (VtIr, Vt2r) of the resonant voltage (vra) at the first node (A), a duration of the first on-time window (TwIa, TwIb) being shorter than one-eighth of a period (Pr) of the resonant current (ir), and - switching the switchable means (JsI, Js2; Sl, S2) for supplying the sinking current or the sourcing current during a second on-time window (Tw2) to change a voltage (Vt2r) at the first node (A), respectively, to a second predetermined voltage (Vset2), the second on-time window (T w2) substantially starting at the second instant (T2) corresponding to a second one (Vt2r) of two extreme levels (VtIr, Vt2r) of the resonant voltage (vra) at the first node (A), a duration of the second on-time window (Tw2) being shorter than one-eighth of a period (Pr) of the resonant current (ir).
14. An electronic apparatus (App) having a circuit for receiving a power supply current from the output node of a resonant power converter (PCr) as claimed in claim 1 or 2.
PCT/IB2006/052661 2005-08-16 2006-08-03 Resonant power converter WO2007020550A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP05107520 2005-08-16
EP05107520.8 2005-08-16

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WO2007020550A1 true WO2007020550A1 (en) 2007-02-22

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0920118A2 (en) * 1997-11-28 1999-06-02 Kabushiki Kaisha Toshiba Resonance power supply circuit
US20010006342A1 (en) * 1996-10-08 2001-07-05 Matsushita Electric Industrial Co., Ltd. Power supply apparatus and voltage converter
EP1517435A2 (en) * 2003-09-17 2005-03-23 Nihon Dempa Kogyo, Co., Ltd. Crystal oscillator circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010006342A1 (en) * 1996-10-08 2001-07-05 Matsushita Electric Industrial Co., Ltd. Power supply apparatus and voltage converter
EP0920118A2 (en) * 1997-11-28 1999-06-02 Kabushiki Kaisha Toshiba Resonance power supply circuit
EP1517435A2 (en) * 2003-09-17 2005-03-23 Nihon Dempa Kogyo, Co., Ltd. Crystal oscillator circuit

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