WO2006126494A1 - Liquid crystal display - Google Patents

Liquid crystal display Download PDF

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Publication number
WO2006126494A1
WO2006126494A1 PCT/JP2006/310161 JP2006310161W WO2006126494A1 WO 2006126494 A1 WO2006126494 A1 WO 2006126494A1 JP 2006310161 W JP2006310161 W JP 2006310161W WO 2006126494 A1 WO2006126494 A1 WO 2006126494A1
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WIPO (PCT)
Prior art keywords
liquid crystal
crystal display
display device
electrode
pixel electrode
Prior art date
Application number
PCT/JP2006/310161
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French (fr)
Japanese (ja)
Inventor
Kengo Kanii
Original Assignee
Sharp Kabushiki Kaisha
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Publication of WO2006126494A1 publication Critical patent/WO2006126494A1/en

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Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1337Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136213Storage capacitors associated with the pixel electrode
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/50Protective arrangements

Definitions

  • the present invention relates to a liquid crystal display device used for a display unit or the like of an electronic device.
  • liquid crystal display devices have come to be used as television receivers, personal computer monitor devices, and the like. In these applications, a wide viewing angle that allows the display screen to be viewed from all directions is required.
  • an MVA (Multi-domain Vertical Alignment) type liquid crystal display device is known.
  • the MVA liquid crystal display device includes a liquid crystal having negative dielectric anisotropy sealed between a pair of substrates and a vertical alignment film that aligns liquid crystal molecules almost perpendicularly to the substrate surface.
  • An MVA-type liquid crystal display device can provide a wider viewing angle than a conventional TN liquid crystal display device by providing a plurality of regions with different orientation directions of liquid crystal molecules in one pixel.
  • the MVA liquid crystal display device can control the alignment orientation of liquid crystal molecules when a voltage is applied without subjecting the vertical alignment film to rubbing treatment.
  • the phase difference caused by birefringence differs between light traveling in the normal direction of the display screen and light traveling in an oblique direction.
  • the gradation luminance characteristic ( ⁇ characteristic) deviates from the set value for all gradations.
  • the transmittance characteristics ( ⁇ V characteristics) with respect to the voltage applied to the liquid crystal are different between the normal direction and the diagonal direction of the display screen, so even if the ⁇ V characteristic in the screen normal direction is optimally adjusted, the diagonal direction From the viewpoint of ⁇ , there is a phenomenon power S that the V characteristic is distorted and the color of the screen changes whitish. This phenomenon is called “Wash Out”.
  • sub-pixel A having a pixel electrode (direct connection portion) in which a pixel region is electrically connected to a switching element (for example, TFT: thin film transistor), and TFT V subdivided into a sub-pixel B in which a pixel electrode (capacitive coupling part) is formed that forms a capacitance between the TFT source electrode and the control capacitor electrode that is equipotentially insulated.
  • a switching element for example, TFT: thin film transistor
  • TFT V thin film transistor
  • the pixel In a liquid crystal display device using the capacitive coupling HT method, by providing a direct coupling portion and a capacitive coupling portion in the pixel electrode, the pixel has different ⁇ characteristics, so that the phase difference due to birefringence in the oblique direction is different from the front. It becomes possible to suppress the deviation, and it is possible to suppress white mist.
  • FIG. 9 is a diagram for explaining image sticking that occurs in a conventional liquid crystal display device using the capacitive coupling method.
  • Figure 9 (a) shows the black and white checker pattern displayed on the screen during the seizure test. In the burn-in test, immediately after the checker pattern shown in Fig. 9 (a) is continuously displayed for a certain period of time (for example, 48 hours), a halftone of the same gradation (32Z64 gradation) is displayed on the entire screen, and the checker pattern is displayed. Inspect whether the pattern is visually recognized.
  • bZa is defined as the burn-in rate when the luminance of the low luminance region of the checker pattern to be viewed is a and the luminance of the high luminance region is a + b (> a).
  • Fig. 9 (b) shows a screen displaying halftones on a liquid crystal display device that does not use the capacitively coupled HT method
  • Fig. 9 (c) shows a conventional liquid crystal display device that uses the capacitively coupled HT method. Shows a screen displaying halftones.
  • the checker pattern was almost invisible during halftone display.
  • the luminance was measured along the YY 'line in Fig. 9 (b)
  • the luminance had a distribution as shown by the line c in Fig. 9 (d).
  • the seizure rate was only 0-5%.
  • a predetermined potential is written to the pixel electrode of the subpixel A electrically connected to the TFT source electrode for each frame, and the pixel electrode of the subpixel A is extremely different from the SiN film or the liquid crystal layer. Low electrical resistance! ⁇ It is connected to the drain bus line through the TFT operating semiconductor layer. For this reason, the charge charged in the pixel electrode will not be discharged.
  • Patent Document 1 Japanese Patent No. 3076938
  • Patent Document 2 Japanese Patent Laid-Open No. 2003-149647
  • the conventional liquid crystal display device using the capacitively coupled HT method has a problem that although the viewing angle characteristics are improved, seizure occurs, and thus good display characteristics cannot be obtained. .
  • An object of the present invention is to provide a liquid crystal display device capable of obtaining good display quality.
  • the object is to provide a pair of opposed substrates, a liquid crystal layer sandwiched between the pair of substrates, a switching element formed on one of the substrates and formed on the one substrate, and A pixel electrode having a directly coupled portion electrically connected, a capacitive coupling portion electrically insulated from the switching element, and a static coupling between the capacitive coupling portion and electrically connected to the switching element.
  • a control capacitor electrode for forming a capacitance, an alignment film formed on the opposing surfaces of the pair of substrates, and a polymerizable component contained in the liquid crystal layer are polymerized by heat or light to be near the interface with the substrate. And a polymer layer for preventing seizure that covers the entire alignment film on the capacitive coupling portion.
  • the liquid crystal display device of the present invention is characterized in that the alignment film is completely covered with the polymer layer.
  • the polymer layer has a thickness of 130 Am or more.
  • the concentration of the polymerizable component is 0.2% or more.
  • FIG. 1 shows a schematic configuration of the liquid crystal display device according to the present embodiment.
  • a liquid crystal display device includes a gate bus line and a drain bus line that are formed to cross each other with an insulating film interposed therebetween, and a thin film transistor (TFT) and a pixel electrode that are formed for each pixel. It has a TFT substrate 2 provided.
  • the liquid crystal display device includes a counter substrate 4 on which a color filter (CF) and a common electrode are formed and disposed opposite to the TFT substrate 2. Both the substrates 2 and 4 are bonded together via a sealing material formed on the outer peripheral portion of their facing surfaces. Between the substrates 2 and 4, vertically aligned liquid crystal having negative dielectric anisotropy is sealed, and a liquid crystal layer 6 (not shown in FIG. 1) is formed.
  • CF color filter
  • a gate nos drive circuit 80 on which a driver IC for driving a plurality of gate bus lines is mounted, and a drain bus line drive circuit 82 on which a driver IC for driving a plurality of drain nos lines is mounted. And are connected.
  • These drive circuits 80 and 82 are configured to output a scanning signal and a data signal to a predetermined gate bus line or drain bus line based on a predetermined signal output from the control circuit 84.
  • a polarizing plate 87 is disposed on the surface of the TFT substrate 2 opposite to the TFT element forming surface, and a polarizing plate 86 is crossed with respect to the polarizing plate 87 on the surface of the counter substrate 4 opposite to the common electrode forming surface. It is placed in the col.
  • a backlight unit 88 is disposed on the surface of the polarizing plate 87 opposite to the TFT substrate 2.
  • FIG. 2 shows a configuration of one pixel of the liquid crystal display device according to the present embodiment, and FIG. The cross-sectional structure of the liquid crystal display device cut
  • the TFT substrate 2 of the liquid crystal display device includes a plurality of gate bus lines 12 formed on a transparent insulating substrate (for example, a glass substrate) 10 and a gate bus via an insulating film 30. And a plurality of drain bus lines 14 formed so as to intersect the line 12.
  • a storage capacitor bus line 18 extending in parallel with the gate bus line 12 is formed across the pixel region surrounded by the gate bus line 12 and the drain bus line 14.
  • a TFT 20 is formed as a switching element arranged for each pixel.
  • the drain electrode 21 of the TFT 20 is electrically connected to the drain bus line 14.
  • a part of the gate bus line 12 functions as a gate electrode of the TFT 20.
  • a protective film 31 is formed on the entire surface of the substrate on the drain bus line 14 and the TFT 20.
  • an alignment film 50 for aligning liquid crystal molecules almost perpendicularly to the substrate surface is formed.
  • a polymer layer 52 that controls the alignment direction of the liquid crystal molecules is formed.
  • Each pixel region on the protective film 31 has a pixel electrode 16 made of a transparent conductive film such as ITO, for example.
  • each pixel region of the liquid crystal display device includes a sub-pixel A arranged in the center and two sub-pixels B arranged above and below the sub-pixel A in the figure. And have.
  • the ratio of the area of subpixel A and the area of subpixel B (the sum of the areas of two subpixels B) in one pixel is, for example, 5: 5.
  • the first pixel electrode 16 is formed in the subpixel A, and the second pixel electrode 17 in which the pixel electrode 16 force is separated is formed in the subpixel B, for example, in the same layer as the pixel electrode 16 in the same layer. .
  • a control capacitor electrode 26 that is electrically connected to the source electrode 22 and the storage capacitor electrode 19 and extends in the vertical direction in the figure is formed.
  • the control capacitor electrode 26 is disposed to face at least a part of the pixel electrode 17 with an insulating film interposed therebetween.
  • the pixel electrode 16 formed in the sub-pixel A is arranged so as to overlap the storage capacitor bus line 18 and the storage capacitor electrode 19 and extends substantially parallel to the gate bus line 12.
  • the drain electrode 14 And a linear electrode 16b extending substantially in parallel.
  • the pixel electrode 16 is formed between a plurality of linear electrodes 16c that branch obliquely from the linear electrode 16a or 16b and extend in stripes in four orthogonal directions within the subpixel A, and adjacent linear electrodes 16c.
  • a fine slit 16d is formed.
  • the width 1 of the linear electrode 16c is, for example, 6 m
  • the width s of the fine slit 16d is, for example, 3.
  • the pixel electrode 16 is electrically connected to the storage capacitor electrode 19 and the source electrode 22 through the contact hole 25.
  • the pixel electrodes 17 respectively formed on the two subpixels B are arranged so as to overlap the control capacitance electrode 26 via the protective film 31 and extend linearly parallel to the drain bus line 14;
  • a plurality of linear electrodes 17b extending obliquely branched from the linear electrodes 17a and fine slits 17c formed between the adjacent linear electrodes 17b are provided.
  • the widths of the linear electrode 17b and the fine slit 17c are substantially the same as the widths of the linear electrode 16c and the fine slit 16d.
  • the counter substrate 4 has a CF resin layer 40 formed on the glass substrate 11.
  • Each pixel has a CF resin layer 40 of one of red, green, and blue.
  • a common electrode 41 made of a transparent conductive film is formed on the entire surface of the substrate on the CF resin layer 40.
  • an alignment film 51 for aligning the liquid crystal molecules 8 substantially perpendicular to the substrate surface is formed.
  • a polymer layer 53 is formed at the interface between the alignment film 51 and the liquid crystal layer 6 in the same manner as the polymer layer 52 on the TFT substrate 2 side.
  • the polymer layers 52 and 53 are formed, for example, by polymerizing a polymerizable component such as a monomer contained in the liquid crystal from light or heat in a state where a predetermined voltage is applied to the liquid crystal layer 6.
  • FIG. 4 shows an equivalent circuit of one pixel of the liquid crystal display device according to this example.
  • the source electrode 22 (S) of the TFT 20 is electrically connected to the pixel electrode 16, the storage capacitor electrode 19, and the control capacitor electrode 26.
  • a first liquid crystal capacitor Clcl is formed by the pixel electrode 16, the common electrode 41 on the opposite substrate 4 side facing the pixel electrode 16, and the liquid crystal layer 6 sandwiched between the pixel electrode 16 and the common electrode 41.
  • the storage capacitor Cs is composed of the storage capacitor electrode 19, the storage capacitor bus line 18 facing the storage capacitor electrode 19, and the insulating film (insulating film 30) sandwiched between the storage capacitor electrode 19 and the storage capacitor nos line 18. Formed.
  • the control capacitor Cc (control capacitor portion) is composed of the control capacitor electrode 26, the pixel electrode 17 facing the control capacitor electrode 26, and the insulating film (protective film 31) sandwiched between the control capacitor electrode 26 and the pixel electrode 17. ) Is formed. Further, the second liquid crystal capacitor Clc2 is formed by the pixel electrode 17, the common electrode 41 on the counter substrate 4 side facing the pixel electrode 17, and the liquid crystal layer 6 sandwiched between the pixel electrode 17 and the common electrode 41. Has been. In this example, it is shared with the storage capacitor bus line 18. The same potential is applied to the through electrode 41.
  • the second liquid crystal capacitor Clc2 and the control capacitor Cc are connected in series, and these, the first liquid crystal capacitor Clcl, and the storage capacitor Cs.
  • Each has a circuit configuration connected in parallel.
  • the TFT 20 When the TFT 20 is turned on, the potential applied to the drain bus line 14 is applied to the pixel electrode 16, the storage capacitor electrode 19 and the control capacitor electrode 26, while the storage capacitor bus line 18 and the common electrode 41 have a common potential. Applied.
  • the pixel electrode 17 is maintained at a potential lower than the potential applied to the pixel electrode 16 by a predetermined amount. If the voltage applied to the liquid crystal layer 6 of the subpixel A is Vpxl, the voltage Vpx2 applied to the liquid crystal layer 6 of the subpixel B is
  • Vpx2 (Cc / (Clc2 + Cc)) XVpxl
  • the voltage Vpxl applied to the liquid crystal layer 6 of the subpixel A and the voltage Vpx2 applied to the liquid crystal layer 6 of the subpixel B are included in one pixel. You can make them different from each other.
  • different voltages are applied to the liquid crystal layers 6 of the sub-pixels A and B, so that the distortion of the TV characteristics in the oblique direction is dispersed within one pixel. . Therefore, a phenomenon that the image color becomes whitish when viewed from an oblique direction (white-brown) can be suppressed, and a wide viewing angle liquid crystal display device with improved viewing angle characteristics can be obtained. .
  • polymer layer 52 and polymer layer 53 are formed on alignment film 50 and alignment film 51.
  • the orientation direction of liquid crystal molecules is reliably controlled in a direction parallel to the fine slit 16d and the fine slit 17c.
  • the entire upper part of the pixel electrode 17 is covered with the polymer layer 52 via the alignment film 50. Further, the entire upper part of the alignment film 50 is similarly covered with the polymer layer 52.
  • the entire surface of the pixel electrode 17 and the alignment film 50, which are capacitive coupling portions, is completely covered with a polymer layer 52 having a predetermined thickness to prevent charge charging in the capacitive coupling portion and reduce image sticking. Can do. Ma
  • the polymer layer 52 having a predetermined thickness can be formed by setting the concentration of the monomer contained in the liquid crystal to a certain level or more.
  • liquid crystal display device according to the present embodiment will be described more specifically with reference to examples.
  • Example 1 of the present embodiment will be described.
  • Two types of liquid crystal, an n-type liquid crystal containing a monomer (polymerizable component) that can be polymerized by UV light (MJ011412 manufactured by Merck) and an n-type liquid crystal containing a monomer (MJ011412 manufactured by Merck) Prepared.
  • Three types of materials for vertical alignment films (polyimide or polyamic acid) PI1 to PI3 with different electrical characteristics were prepared.
  • the 15-inch TFT substrate 2 and the counter substrate 4 as shown in FIGS. 2 and 3 were produced for 6 panels each.
  • the above three kinds of alignment film materials PI1 to PI3 were printed for two panels each.
  • Both substrates 2 and 4 were heated at 200 ° C. for 10 minutes to fully cure the alignment film material, and alignment films 50 and 51 were formed. As a result, two sets of three types of substrates 2 and 4 were produced.
  • both the substrates 2 and 4 were cleaned, and a sealing material was applied to the entire outer periphery of the TFT substrate 2 without any breaks. Subsequently, two types of liquid crystal were dropped into the regions surrounded by the sealing material of the three types of TFT substrate 2 respectively.
  • the TFT substrate 2 and the counter substrate 4 are bonded together in a vacuum and returned to atmospheric pressure to fill the liquid crystal between the substrates 2 and 4 to form the liquid crystal layer 6, and then heat treatment is performed to seal the sealing material. Cured.
  • an alternating voltage of 17 V was applied to the liquid crystal layer 6 between each pixel electrode 16 and the common electrode 41.
  • an AC voltage of less than 17 V was applied to the liquid crystal layer 6 between each pixel electrode 17 and the common electrode 41. It was irradiated with UV light irradiation energy density LOOOmjZcm 2 to the liquid crystal layer 6 in this state.
  • the monomer contained in the liquid crystal was polymerized to form polymer layers 52 and 53 at the interfaces between the liquid crystal layer 6 and the alignment films 50 and 51, respectively.
  • polarizing plates 86 and 87 were attached to the outer sides of the substrates 2 and 4 in a cross-coll.
  • FIG. 5 is a graph showing the burn-in rate of six types of liquid crystal display panels.
  • the horizontal direction of the graph represents the type of alignment film, and the vertical axis represents the burn-in rate (unit:%) of the liquid crystal display panel.
  • the types of liquid crystal display panels are divided into the alignment film material types PI1 to PI3, and then according to the presence or absence of liquid crystal monomers.
  • each of the alignment films having different electrical characteristics has a burn-in rate of the liquid crystal display panel in which the monomer is polymerized and does not contain the monomer! It is lower than the burn-in rate of the liquid crystal display panel. As a result, seizure is improved.
  • Fig. 6 is an exploded view of the liquid crystal display panel, and the alignment film 50 and its periphery are
  • FIG. 6 (a) is a diagram observing the alignment film 50 of the liquid crystal display panel in which the monomer is polymerized and its peripheral portion
  • FIG. 6 (b) is an alignment film 50 of the liquid crystal display device that does not contain the monomer and It is the figure which observed the peripheral part.
  • the liquid crystal display panel obtained by polymerizing the monomer does not contain the monomer, and the liquid crystal display panel is formed with the polymer layer 52, and the pixel electrode 17 and the alignment film which are capacitive coupling portions. It was confirmed that it covered the entire surface of 50. Further, it has been found that the film thickness of the polymer layer 52 is 130 Am or more, and that the film thickness is 130 Am or more, the formation of the polymer layer 52 improves the image sticking of the liquid crystal display panel.
  • Example 2 of the present embodiment four types of n-type liquid crystals (MJ011412 manufactured by Merck) having monomer concentrations of 0.05%, 0.1%, 0.2%, and 0.3% were prepared. . In addition, nine sets of 15-inch TFT substrate 2 and counter substrate 4 as shown in FIGS. 2 and 3 were produced.
  • n-type liquid crystals MJ011412 manufactured by Merck
  • both the substrates 2 and 4 were cleaned, and a sealing material was applied to the entire outer periphery of the TFT substrate 2 without any breaks.
  • the liquid crystal containing four types of monomers is surrounded by the sealing material of TFT substrate 2. Each was dropped in the area.
  • the TFT substrate 2 and the counter substrate 4 are bonded together in a vacuum and returned to atmospheric pressure to fill the liquid crystal between the substrates 2 and 4 to form the liquid crystal layer 6 and then heat-treat and seal The material was cured.
  • FIG. 7 shows the configuration of one pixel in a liquid crystal display device that does not use the capacitively coupled HT method.
  • the pixel electrode 16 formed in the pixel is electrically directly connected to the source electrode 22 of the TFT 20 via the contact hole 24. Further, the pixel electrode 17 which is a capacitive coupling portion as shown in FIG. 2 is formed.
  • Both substrates 2 and 4 without using the capacitive coupling HT method were cleaned, and a sealing material was applied to the entire outer periphery of the TFT substrate 2 without any gaps. Subsequently, the monomer was contained! /,!, And the liquid crystal was dropped into the area surrounded by the sealing material of the TFT substrate 2. Next, the TFT substrate 2 and the counter substrate 4 are bonded together in a vacuum, and the liquid crystal is filled between the substrates 2 and 4 by returning to atmospheric pressure to form a liquid crystal layer 6, and heat treatment is performed to seal the sealing material. Cured. Polarizers 86 and 87 were attached to the outside of the substrates 2 and 4 in a cross-coll. Through the above process, one liquid crystal display panel was produced.
  • FIG. 8 is a graph showing the image sticking rate of nine liquid crystal display panels in which monomers are polymerized.
  • the horizontal axis of the graph represents the liquid crystal monomer concentration (unit:%), and the vertical axis represents the image sticking ratio (%) of the liquid crystal display panel.
  • the diamond points in Fig. 8 indicate the burn-in rate of each liquid crystal display panel.
  • the dotted line in Fig. 8 shows the burn-in rate (approximately 4.2%) of a liquid crystal display panel using liquid crystal without using the capacitively coupled HT method and containing no monomer.
  • the image sticking ratio of the liquid crystal display panel decreases as the monomer concentration increases.
  • a liquid crystal display panel with a monomer concentration of 0.05% or 0.1% has a seizure rate of 6% or more, does not use the capacitively coupled HT method, and the liquid crystal contains a monomer.
  • the image sticking rate is less than that, and it does not use the capacitively coupled HT method and contains a monomer.
  • Image sticking is improved compared to liquid crystal display panels using liquid crystals. From the above, it was found that image sticking of the liquid crystal display device was improved by using a liquid crystal having a monomer concentration of 0.2% or more.
  • transmissive liquid crystal display device has been described as an example in the above embodiment, the present invention is not limited to this and can be applied to other liquid crystal display devices such as a reflective type and a transflective type.
  • the liquid crystal display device in which the CF resin layer 40 is formed on the counter substrate 4 is taken as an example.
  • the present invention is not limited to this, and the CF substrate on the TFT substrate 2 is used.
  • the present invention can also be applied to a so-called CF-on-TFT liquid crystal display device in which an oil layer is formed.
  • FIG. 1 is a diagram showing a schematic configuration of a liquid crystal display device according to an embodiment of the present invention.
  • FIG. 2 is a diagram showing a configuration of one pixel of a liquid crystal display device according to an embodiment of the present invention.
  • FIG. 3 is a cross-sectional view showing a configuration of a liquid crystal display device according to an embodiment of the present invention.
  • FIG. 4 is a diagram showing an equivalent circuit of one pixel of the liquid crystal display device according to one embodiment of the present invention.
  • FIG. 5 is a graph showing the burn-in rate of each liquid crystal display panel of the liquid crystal display device according to Example 1 of one embodiment of the present invention.
  • FIG. 6 is an enlarged view showing a part of a liquid crystal display panel.
  • FIG. 7 is a diagram showing a configuration of one pixel of a liquid crystal display device according to Example 2 of one embodiment of the present invention.
  • FIG. 8 is a graph showing the burn-in rate of each liquid crystal display panel of the liquid crystal display device according to Example 2 of one embodiment of the present invention.
  • FIG. 9 is a diagram illustrating a seizure phenomenon that occurs in a conventional liquid crystal display device using the capacitively coupled HT method.

Abstract

Disclosed is a liquid crystal display having good display characteristics which is used in a display part of an electronic device. Specifically disclosed is a liquid crystal display comprising a pixel electrode (16) formed on a TFT substrate (2) and electrically connected with a TFT (20) which is also formed on the TFT substrate (2), a pixel electrode (17) electrically insulated from the TFT (20), an alignment film (50) formed on a surface of the TFT substrate (2) facing a counter substrate (4), and a polymer layer (52) for preventing image burn-in which is formed by thermally or optically polymerizing a monomer contained in a liquid crystal layer (6) near the interface with the TFT substrate (2) so as to cover the alignment film (50) on the pixel electrode (17).

Description

明 細 書  Specification
液晶表示装置  Liquid crystal display
技術分野  Technical field
[0001] 本発明は、電子機器の表示部等に用いられる液晶表示装置に関する。  The present invention relates to a liquid crystal display device used for a display unit or the like of an electronic device.
背景技術  Background art
[0002] 近年、液晶表示装置は、テレビ受像機やパーソナル 'コンピュータのモニタ装置等 として用いられるようになつている。これらの用途では、表示画面をあらゆる方向から 見ることのできる広 、視野角が求められて 、る。広視野角の得られる液晶表示装置と して、 MVA(Multi— domain Vertical Alignment:マノレチドメイン垂直配向)方 式の液晶表示装置が知られている。 MVA方式の液晶表示装置は、一対の基板間 に封止された負の誘電率異方性を有する液晶と、液晶分子を基板面にほぼ垂直に 配向させる垂直配向膜とを有している。 MVA方式の液晶表示装置は、液晶分子の 配向方位が互いに異なる複数の領域を 1画素内に設けることにより、従来の TN型液 晶表示装置に比べて広い視野角が得られる。また、 MVA方式の液晶表示装置は垂 直配向膜にラビング処理を施さずに電圧印加時の液晶分子の配向方位を制御する ことができる。  In recent years, liquid crystal display devices have come to be used as television receivers, personal computer monitor devices, and the like. In these applications, a wide viewing angle that allows the display screen to be viewed from all directions is required. As a liquid crystal display device capable of obtaining a wide viewing angle, an MVA (Multi-domain Vertical Alignment) type liquid crystal display device is known. The MVA liquid crystal display device includes a liquid crystal having negative dielectric anisotropy sealed between a pair of substrates and a vertical alignment film that aligns liquid crystal molecules almost perpendicularly to the substrate surface. An MVA-type liquid crystal display device can provide a wider viewing angle than a conventional TN liquid crystal display device by providing a plurality of regions with different orientation directions of liquid crystal molecules in one pixel. In addition, the MVA liquid crystal display device can control the alignment orientation of liquid crystal molecules when a voltage is applied without subjecting the vertical alignment film to rubbing treatment.
[0003] ところで、 MVA方式のように液晶分子を基板に垂直に配向させる垂直配向型の液 晶表示装置では、液晶の複屈折性を主に利用して光のスイッチングが行われる。一 般に垂直配向型の液晶表示装置では、表示画面の法線方向に進む光とそれより斜 めの方向に進む光との間で複屈折により生じる位相差が異なるため、程度の差はあ るが画面の斜め方向では全階調において階調輝度特性( γ特性)が設定値からず れてしまう。したがって、液晶への印加電圧に対する透過率特性 (Τ V特性)は表 示画面の法線方向と斜め方向とで異なるため、画面法線方向の Τ V特性を最適に 調整しても、斜め方向から見ると Τ V特性が歪んで画面の色が白っぽく変化してし まうという現象力 Sある。この現象は白つ茶け (Wash Out)と呼ばれている。  By the way, in the vertical alignment type liquid crystal display device in which liquid crystal molecules are aligned perpendicularly to the substrate as in the MVA method, light switching is performed mainly utilizing the birefringence of the liquid crystal. In general, in a vertically aligned liquid crystal display device, the phase difference caused by birefringence differs between light traveling in the normal direction of the display screen and light traveling in an oblique direction. However, in the diagonal direction of the screen, the gradation luminance characteristic (γ characteristic) deviates from the set value for all gradations. Therefore, the transmittance characteristics (ΤV characteristics) with respect to the voltage applied to the liquid crystal are different between the normal direction and the diagonal direction of the display screen, so even if the ΤV characteristic in the screen normal direction is optimally adjusted, the diagonal direction From the viewpoint of Τ, there is a phenomenon power S that the V characteristic is distorted and the color of the screen changes whitish. This phenomenon is called “Wash Out”.
[0004] 白つ茶けを改善する手段として、画素領域をスイッチング素子 (例えば TFT:薄膜ト ランジスタ)と電気的に接続された画素電極 (直結部)の形成された副画素 Aと、 TFT と電気的に絶縁され、かつ TFTのソース電極と等電位になる制御容量電極との間に 静電容量を形成する画素電極 (容量結合部)の形成された副画素 Bとに分割させた V、わゆる容量結合 HT法 (ハーフトーン ·グレースケール法)が提案されて 、る。容量 結合 HT法を用いた液晶表示装置では、画素電極に直結部と容量結合部とを設ける ことにより、画素内に異なる γ特性を有することで斜め方向での複屈折による位相差 の正面とのズレを抑えることが可能となり、白つ茶けを抑制できる。 [0004] As a means of improving white-out, sub-pixel A having a pixel electrode (direct connection portion) in which a pixel region is electrically connected to a switching element (for example, TFT: thin film transistor), and TFT V subdivided into a sub-pixel B in which a pixel electrode (capacitive coupling part) is formed that forms a capacitance between the TFT source electrode and the control capacitor electrode that is equipotentially insulated. The so-called capacitive coupling HT method (halftone grayscale method) has been proposed. In a liquid crystal display device using the capacitive coupling HT method, by providing a direct coupling portion and a capacitive coupling portion in the pixel electrode, the pixel has different γ characteristics, so that the phase difference due to birefringence in the oblique direction is different from the front. It becomes possible to suppress the deviation, and it is possible to suppress white mist.
[0005] し力しながら、容量結合 ΗΤ法を用いた従来の液晶表示装置は、視角特性が向上 するものの、焼付きが発生するため良好な表示特性が得られないという問題を有して いる。図 9は、容量結合 ΗΤ法を用いた従来の液晶表示装置に生じる焼付きを説明 する図である。図 9 (a)は、焼付き試験の際に画面に表示する白黒のチヱッカパター ンを示している。焼付き試験では、図 9 (a)に示すチェッカパターンを一定時間(例え ば 48時間)連続表示させた直後に画面全体に同階調の中間調 (32Z64階調)を表 示させて、チェッカパターンが視認される力否かを検査する。チェッカパターンが視認 された場合には、画面の輝度をチェッカパターンの一方向に沿って測定し、焼付き率 を算出する。ここで、視認されるチェッカパターンのうち低輝度領域の輝度を aとし高 輝度領域の輝度を a + b ( >a)としたとき、 bZaを焼付き率と定義した。  However, the conventional liquid crystal display device using the capacitive coupling method has a problem that although the viewing angle characteristics are improved, seizure occurs so that good display characteristics cannot be obtained. . FIG. 9 is a diagram for explaining image sticking that occurs in a conventional liquid crystal display device using the capacitive coupling method. Figure 9 (a) shows the black and white checker pattern displayed on the screen during the seizure test. In the burn-in test, immediately after the checker pattern shown in Fig. 9 (a) is continuously displayed for a certain period of time (for example, 48 hours), a halftone of the same gradation (32Z64 gradation) is displayed on the entire screen, and the checker pattern is displayed. Inspect whether the pattern is visually recognized. When the checker pattern is seen, measure the screen brightness along one direction of the checker pattern and calculate the burn-in rate. Here, bZa is defined as the burn-in rate when the luminance of the low luminance region of the checker pattern to be viewed is a and the luminance of the high luminance region is a + b (> a).
[0006] 図 9 (b)は容量結合 HT法を用いていない液晶表示装置に中間調を表示させた画 面を示し、図 9 (c)は容量結合 HT法を用いた従来の液晶表示装置に中間調を表示 させた画面を示している。図 9 (b)に示すように、容量結合 HT法を用いていない液晶 表示装置では、中間調表示の際にチェッカパターンはほとんど視認されな力つた。図 9 (b)の Y—Y'線に沿って輝度を測定したところ、輝度は図 9 (d)の線 cに示すような 分布を有していた。焼付き率は 0〜5%に過ぎな力つた。これに対し、容量結合 HT法 を用いた液晶表示装置では、図 9 (c)に示すようなチェッカパターンが視認された。図 9 (c)の Y—Y'線に沿って輝度を測定したところ、輝度は図 9 (d)の線 dに示すような 分布を有していた。焼付き率は 10%以上であった。このように、容量結合 HT法を用 Vヽて 、な 、液晶表示装置では焼付きがほとんど発生しな 、のに対し、容量結合 HT 法を用いた液晶表示装置では比較的濃 、焼付きが発生する。  [0006] Fig. 9 (b) shows a screen displaying halftones on a liquid crystal display device that does not use the capacitively coupled HT method, and Fig. 9 (c) shows a conventional liquid crystal display device that uses the capacitively coupled HT method. Shows a screen displaying halftones. As shown in Fig. 9 (b), in the liquid crystal display device that does not use the capacitively coupled HT method, the checker pattern was almost invisible during halftone display. When the luminance was measured along the YY 'line in Fig. 9 (b), the luminance had a distribution as shown by the line c in Fig. 9 (d). The seizure rate was only 0-5%. On the other hand, in the liquid crystal display using the capacitively coupled HT method, a checker pattern as shown in Fig. 9 (c) was visually recognized. When the luminance was measured along the YY 'line in Fig. 9 (c), the luminance had a distribution as shown by the line d in Fig. 9 (d). The seizure rate was 10% or more. In this way, when the capacitively coupled HT method is used, liquid crystal display devices hardly cause seizure, whereas liquid crystal display devices using the capacitively coupled HT method exhibit relatively high density and seizure. appear.
[0007] 焼付きが発生した液晶表示装置の画素内の特性分布などを評価して解析した結果 、焼付きは、電気的にフローティング状態の画素電極の形成された副画素 Bで発生し ていることが判明した。副画素 Bの画素電極は、極めて電気抵抗の高いシリコン窒化 膜 (SiN膜)等を介して制御容量電極に接続され、また極めて電気抵抗の高い液晶 層を介して共通電極に接続されている。このため、副画素 Bの画素電極に充電され た電荷は容易に放電されないようになっている。一方、 TFTのソース電極に電気的 に接続された副画素 Aの画素電極にはフレーム毎に所定の電位が書き込まれ、かつ 副画素 Aの画素電極は、 SiN膜や液晶層に比較して極めて電気抵抗の低!ヽ TFTの 動作半導体層を介してドレインバスラインに接続されている。このため、画素電極に 充電された電荷が放電されなくなることはな ヽ。 [0007] Results of evaluation and analysis of characteristic distribution in pixels of liquid crystal display device where burn-in occurred It was found that burn-in occurred in subpixel B where the pixel electrode in the electrically floating state was formed. The pixel electrode of the sub-pixel B is connected to the control capacitor electrode through a silicon nitride film (SiN film) having a very high electric resistance, and is connected to the common electrode through a liquid crystal layer having a very high electric resistance. For this reason, the electric charge charged in the pixel electrode of the sub-pixel B is not easily discharged. On the other hand, a predetermined potential is written to the pixel electrode of the subpixel A electrically connected to the TFT source electrode for each frame, and the pixel electrode of the subpixel A is extremely different from the SiN film or the liquid crystal layer. Low electrical resistance! ヽ It is connected to the drain bus line through the TFT operating semiconductor layer. For this reason, the charge charged in the pixel electrode will not be discharged.
[0008] 特許文献 1:特許第 3076938号公報 [0008] Patent Document 1: Japanese Patent No. 3076938
特許文献 2 :特開 2003— 149647号公報  Patent Document 2: Japanese Patent Laid-Open No. 2003-149647
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0009] 上述のように、容量結合 HT法を用いた従来の液晶表示装置は、視角特性が向上 するものの、焼付きが発生するため良好な表示特性が得られないという問題を有して いる。 [0009] As described above, the conventional liquid crystal display device using the capacitively coupled HT method has a problem that although the viewing angle characteristics are improved, seizure occurs, and thus good display characteristics cannot be obtained. .
[0010] 本発明の目的は、良好な表示品質の得られる液晶表示装置を提供することにある 課題を解決するための手段  An object of the present invention is to provide a liquid crystal display device capable of obtaining good display quality. Means for Solving the Problems
[0011] 上記目的は、対向配置された一対の基板と、前記一対の基板間に挟持された液晶 層と、一方の前記基板上に形成され、前記一方の基板上に形成されたスイッチング 素子と電気的に接続された直結部と、前記スイッチング素子と電気的に絶縁された 容量結合部とを備えた画素電極と、前記スイッチング素子と電気的に接続され、前記 容量結合部との間に静電容量を形成する制御容量電極と、前記一対の基板の対向 面にそれぞれ形成された配向膜と、前記液晶層が含有する重合性成分が熱もしくは 光で重合して前記基板との界面近傍に形成され、前記容量結合部上の配向膜全体 を覆う焼付き防止用のポリマー層とを有することを特徴とする液晶表示装置によって 達成される。 [0012] 上記本発明の液晶表示装置において、前記配向膜が前記ポリマー層によって表 面を完全に覆われて 、ることを特徴とする。 [0011] The object is to provide a pair of opposed substrates, a liquid crystal layer sandwiched between the pair of substrates, a switching element formed on one of the substrates and formed on the one substrate, and A pixel electrode having a directly coupled portion electrically connected, a capacitive coupling portion electrically insulated from the switching element, and a static coupling between the capacitive coupling portion and electrically connected to the switching element. A control capacitor electrode for forming a capacitance, an alignment film formed on the opposing surfaces of the pair of substrates, and a polymerizable component contained in the liquid crystal layer are polymerized by heat or light to be near the interface with the substrate. And a polymer layer for preventing seizure that covers the entire alignment film on the capacitive coupling portion. [0012] The liquid crystal display device of the present invention is characterized in that the alignment film is completely covered with the polymer layer.
[0013] 上記本発明の液晶表示装置において、前記ポリマー層の厚さが 130 Am以上であ ることを特徴とする。 [0013] In the liquid crystal display device of the present invention, the polymer layer has a thickness of 130 Am or more.
[0014] 上記本発明の液晶表示装置において、前記重合性成分の濃度が 0. 2%以上であ ることを特徴とする。  In the liquid crystal display device of the present invention, the concentration of the polymerizable component is 0.2% or more.
発明の効果  The invention's effect
[0015] 本発明によれば、良好な表示品質の得られる液晶表示装置を実現できる。  [0015] According to the present invention, it is possible to realize a liquid crystal display device capable of obtaining good display quality.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0016] 本発明の一実施の形態による液晶表示装置について図 1乃至図 8を用いて説明す る。図 1は、本実施の形態による液晶表示装置の概略構成を示している。図 1に示す ように、液晶表示装置は、絶縁膜を介して互いに交差して形成されたゲートバスライ ンおよびドレインバスラインと、画素毎に形成された薄膜トランジスタ (TFT)および画 素電極とを備えた TFT基板 2を有している。また、液晶表示装置は、カラーフィルタ( CF)や共通電極が形成されて TFT基板 2に対向配置された対向基板 4を有して ヽる 。両基板 2、 4は、それらの対向面の外周部に形成されたシール材を介して貼り合わ されている。両基板 2、 4間には、負の誘電率異方性を有する垂直配向型の液晶が 封止され、液晶層 6 (図 1では図示せず)が形成されている。  A liquid crystal display device according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a schematic configuration of the liquid crystal display device according to the present embodiment. As shown in FIG. 1, a liquid crystal display device includes a gate bus line and a drain bus line that are formed to cross each other with an insulating film interposed therebetween, and a thin film transistor (TFT) and a pixel electrode that are formed for each pixel. It has a TFT substrate 2 provided. In addition, the liquid crystal display device includes a counter substrate 4 on which a color filter (CF) and a common electrode are formed and disposed opposite to the TFT substrate 2. Both the substrates 2 and 4 are bonded together via a sealing material formed on the outer peripheral portion of their facing surfaces. Between the substrates 2 and 4, vertically aligned liquid crystal having negative dielectric anisotropy is sealed, and a liquid crystal layer 6 (not shown in FIG. 1) is formed.
[0017] TFT基板 2には、複数のゲートバスラインを駆動するドライバ ICが実装されたゲート ノ スライン駆動回路 80と、複数のドレインノ スラインを駆動するドライバ ICが実装され たドレインバスライン駆動回路 82とが接続されている。これらの駆動回路 80、 82は、 制御回路 84から出力された所定の信号に基づいて、走査信号やデータ信号を所定 のゲートバスラインあるいはドレインバスラインに出力するようになっている。 TFT基板 2の TFT素子形成面と反対側の面には偏光板 87が配置され、対向基板 4の共通電 極形成面と反対側の面には、偏光板 86が偏光板 87に対しクロス-コルに配置され ている。偏光板 87の TFT基板 2と反対側の面にはバックライトユニット 88が配置され ている。  [0017] On the TFT substrate 2, a gate nos drive circuit 80 on which a driver IC for driving a plurality of gate bus lines is mounted, and a drain bus line drive circuit 82 on which a driver IC for driving a plurality of drain nos lines is mounted. And are connected. These drive circuits 80 and 82 are configured to output a scanning signal and a data signal to a predetermined gate bus line or drain bus line based on a predetermined signal output from the control circuit 84. A polarizing plate 87 is disposed on the surface of the TFT substrate 2 opposite to the TFT element forming surface, and a polarizing plate 86 is crossed with respect to the polarizing plate 87 on the surface of the counter substrate 4 opposite to the common electrode forming surface. It is placed in the col. A backlight unit 88 is disposed on the surface of the polarizing plate 87 opposite to the TFT substrate 2.
[0018] 図 2は本実施の形態による液晶表示装置の 1画素の構成を示し、図 3は図 2の A— A線で切断した液晶表示装置の断面構成を示している。図 2および図 3に示すように 、液晶表示装置の TFT基板 2は、透明絶縁基板 (例えば、ガラス基板) 10上に形成 された複数のゲートバスライン 12と、絶縁膜 30を介してゲートバスライン 12に交差し て形成された複数のドレインバスライン 14とを有している。ゲートバスライン 12および ドレインバスライン 14により囲まれた画素領域を横切って、ゲートバスライン 12に並列 して延びる蓄積容量バスライン 18が形成されている。ゲートバスライン 12およびドレ インバスライン 14の交差位置近傍には、画素毎に配置されるスイッチング素子として TFT20が形成されている。 TFT20のドレイン電極 21は、ドレインバスライン 14に電 気的に接続されている。またゲートバスライン 12の一部は、 TFT20のゲート電極とし て機能している。ドレインバスライン 14上および TFT20上の基板全面には保護膜 31 が形成されている。保護膜 31上の基板前面には液晶分子を基板面にほぼ垂直に配 向させる配向膜 50が形成されている。配向膜 50と液晶層 6との界面には、液晶分子 の配向方位を制御するポリマー層 52が形成されている。 FIG. 2 shows a configuration of one pixel of the liquid crystal display device according to the present embodiment, and FIG. The cross-sectional structure of the liquid crystal display device cut | disconnected by A line is shown. As shown in FIG. 2 and FIG. 3, the TFT substrate 2 of the liquid crystal display device includes a plurality of gate bus lines 12 formed on a transparent insulating substrate (for example, a glass substrate) 10 and a gate bus via an insulating film 30. And a plurality of drain bus lines 14 formed so as to intersect the line 12. A storage capacitor bus line 18 extending in parallel with the gate bus line 12 is formed across the pixel region surrounded by the gate bus line 12 and the drain bus line 14. In the vicinity of the intersection position of the gate bus line 12 and the drain bus line 14, a TFT 20 is formed as a switching element arranged for each pixel. The drain electrode 21 of the TFT 20 is electrically connected to the drain bus line 14. A part of the gate bus line 12 functions as a gate electrode of the TFT 20. A protective film 31 is formed on the entire surface of the substrate on the drain bus line 14 and the TFT 20. On the front surface of the substrate on the protective film 31, an alignment film 50 for aligning liquid crystal molecules almost perpendicularly to the substrate surface is formed. At the interface between the alignment film 50 and the liquid crystal layer 6, a polymer layer 52 that controls the alignment direction of the liquid crystal molecules is formed.
[0019] 保護膜 31上の各画素領域には、例えば ITO等の透明導電膜からなる画素電極 16  [0019] Each pixel region on the protective film 31 has a pixel electrode 16 made of a transparent conductive film such as ITO, for example.
(直結部)と画素電極 17 (容量結合部)が形成されている。図 2に示すように、本実施 の形態による液晶表示装置の各画素領域は、中央部に配置された副画素 Aと、副画 素 Aの図中上下にそれぞれ配置された 2つの副画素 Bとを有している。 1画素内にお ける副画素 Aの面積と副画素 Bの面積(2つの副画素 Bの面積の和)との比は例えば 5 : 5である。副画素 Aには第 1の画素電極 16が形成され、副画素 Bには画素電極 16 力も分離された第 2の画素電極 17が例えば画素電極 16と同一材料で同層に形成さ れている。また画素領域には、ソース電極 22および蓄積容量電極 19に電気的に接 続され、図中上下方向に延びる制御容量電極 26が形成されている。制御容量電極 26は、絶縁膜を介して画素電極 17の少なくとも一部に対向して配置されて 、る。  A (directly connected portion) and a pixel electrode 17 (capacitive coupling portion) are formed. As shown in FIG. 2, each pixel region of the liquid crystal display device according to the present embodiment includes a sub-pixel A arranged in the center and two sub-pixels B arranged above and below the sub-pixel A in the figure. And have. The ratio of the area of subpixel A and the area of subpixel B (the sum of the areas of two subpixels B) in one pixel is, for example, 5: 5. The first pixel electrode 16 is formed in the subpixel A, and the second pixel electrode 17 in which the pixel electrode 16 force is separated is formed in the subpixel B, for example, in the same layer as the pixel electrode 16 in the same layer. . In the pixel region, a control capacitor electrode 26 that is electrically connected to the source electrode 22 and the storage capacitor electrode 19 and extends in the vertical direction in the figure is formed. The control capacitor electrode 26 is disposed to face at least a part of the pixel electrode 17 with an insulating film interposed therebetween.
[0020] 副画素 Aに形成された画素電極 16は、蓄積容量バスライン 18および蓄積容量電 極 19に重なって配置されてゲートバスライン 12にほぼ平行に延びる線状電極 16aと 、ドレインノ スライン 14にほぼ平行に延びる線状電極 16bとを有している。また画素 電極 16は、線状電極 16aまたは 16bから斜めに分岐し、副画素 A内で直交 4方向に ストライプ状に延びる複数の線状電極 16cと、隣り合う線状電極 16c間に形成された 微細スリット 16dとを有している。線状電極 16cの幅 1は例えば 6 mであり、微細スリツ ト 16dの幅 sは例えば 3. である。画素電極 16は、コンタクトホール 25を介して 蓄積容量電極 19およびソース電極 22に電気的に接続されている。 The pixel electrode 16 formed in the sub-pixel A is arranged so as to overlap the storage capacitor bus line 18 and the storage capacitor electrode 19 and extends substantially parallel to the gate bus line 12. The drain electrode 14 And a linear electrode 16b extending substantially in parallel. In addition, the pixel electrode 16 is formed between a plurality of linear electrodes 16c that branch obliquely from the linear electrode 16a or 16b and extend in stripes in four orthogonal directions within the subpixel A, and adjacent linear electrodes 16c. And a fine slit 16d. The width 1 of the linear electrode 16c is, for example, 6 m, and the width s of the fine slit 16d is, for example, 3. The pixel electrode 16 is electrically connected to the storage capacitor electrode 19 and the source electrode 22 through the contact hole 25.
[0021] 2つの副画素 Bにそれぞれ形成された画素電極 17は、保護膜 31を介して制御容 量電極 26に重なって配置されてドレインバスライン 14にほぼ平行に延びる線状電極 17aと、線状電極 17aから斜めに分岐して延びる複数の線状電極 17bと、隣り合う線 状電極 17b間に形成された微細スリット 17cとを有している。線状電極 17bおよび微 細スリット 17cの幅は、線状電極 16cおよび微細スリット 16dの幅とほぼ同じである。  The pixel electrodes 17 respectively formed on the two subpixels B are arranged so as to overlap the control capacitance electrode 26 via the protective film 31 and extend linearly parallel to the drain bus line 14; A plurality of linear electrodes 17b extending obliquely branched from the linear electrodes 17a and fine slits 17c formed between the adjacent linear electrodes 17b are provided. The widths of the linear electrode 17b and the fine slit 17c are substantially the same as the widths of the linear electrode 16c and the fine slit 16d.
[0022] 一方、対向基板 4は、ガラス基板 11上に形成された CF榭脂層 40を有している。各 画素には、赤色、緑色、青色のいずれか 1色の CF榭脂層 40が形成されている。 CF 榭脂層 40上の基板全面には、透明導電膜からなる共通電極 41が形成されている。 共通電極 41上の全面には、液晶分子 8を基板面にほぼ垂直に配向させる配向膜 51 が形成されている。配向膜 51と液晶層 6との界面には、ポリマー層 53が TFT基板 2 側のポリマー層 52と同様に形成されている。ポリマー層 52、 53は、例えば液晶層 6 に所定の電圧を印カロした状態で、液晶が含有するモノマー等の重合性成分を光また は熱〖こより重合させること〖こよって形成される。  On the other hand, the counter substrate 4 has a CF resin layer 40 formed on the glass substrate 11. Each pixel has a CF resin layer 40 of one of red, green, and blue. A common electrode 41 made of a transparent conductive film is formed on the entire surface of the substrate on the CF resin layer 40. On the entire surface of the common electrode 41, an alignment film 51 for aligning the liquid crystal molecules 8 substantially perpendicular to the substrate surface is formed. A polymer layer 53 is formed at the interface between the alignment film 51 and the liquid crystal layer 6 in the same manner as the polymer layer 52 on the TFT substrate 2 side. The polymer layers 52 and 53 are formed, for example, by polymerizing a polymerizable component such as a monomer contained in the liquid crystal from light or heat in a state where a predetermined voltage is applied to the liquid crystal layer 6.
[0023] 図 4は、本実施例による液晶表示装置の 1画素の等価回路を示している。図 4に示 すように、 TFT20のソース電極 22 (S)は、画素電極 16、蓄積容量電極 19および制 御容量電極 26と電気的に接続されている。画素電極 16と、当該画素電極 16に対向 する対向基板 4側の共通電極 41と、画素電極 16および共通電極 41の間に挟まれた 液晶層 6とで第 1の液晶容量 Clclが形成されている。蓄積容量電極 19と、当該蓄積 容量電極 19に対向する蓄積容量バスライン 18と、蓄積容量電極 19および蓄積容量 ノ スライン 18の間に挟まれた絶縁膜 (絶縁膜 30)とで蓄積容量 Csが形成されている 。制御容量電極 26と、当該制御容量電極 26に対向する画素電極 17と、制御容量電 極 26および画素電極 17の間に挟まれた絶縁膜 (保護膜 31)とで制御容量 Cc (制御 容量部)が形成されている。また、画素電極 17と、当該画素電極 17に対向する対向 基板 4側の共通電極 41と、画素電極 17および共通電極 41の間に挟まれた液晶層 6 とで第 2の液晶容量 Clc2が形成されている。本例では、蓄積容量バスライン 18と共 通電極 41とには同電位が印加される構成となっている。 FIG. 4 shows an equivalent circuit of one pixel of the liquid crystal display device according to this example. As shown in FIG. 4, the source electrode 22 (S) of the TFT 20 is electrically connected to the pixel electrode 16, the storage capacitor electrode 19, and the control capacitor electrode 26. A first liquid crystal capacitor Clcl is formed by the pixel electrode 16, the common electrode 41 on the opposite substrate 4 side facing the pixel electrode 16, and the liquid crystal layer 6 sandwiched between the pixel electrode 16 and the common electrode 41. Yes. The storage capacitor Cs is composed of the storage capacitor electrode 19, the storage capacitor bus line 18 facing the storage capacitor electrode 19, and the insulating film (insulating film 30) sandwiched between the storage capacitor electrode 19 and the storage capacitor nos line 18. Formed. The control capacitor Cc (control capacitor portion) is composed of the control capacitor electrode 26, the pixel electrode 17 facing the control capacitor electrode 26, and the insulating film (protective film 31) sandwiched between the control capacitor electrode 26 and the pixel electrode 17. ) Is formed. Further, the second liquid crystal capacitor Clc2 is formed by the pixel electrode 17, the common electrode 41 on the counter substrate 4 side facing the pixel electrode 17, and the liquid crystal layer 6 sandwiched between the pixel electrode 17 and the common electrode 41. Has been. In this example, it is shared with the storage capacitor bus line 18. The same potential is applied to the through electrode 41.
[0024] このように、本実施の形態による液晶表示装置の画素は、第 2の液晶容量 Clc2と制 御容量 Ccとが直列に接続され、これらと、第 1の液晶容量 Clcl、蓄積容量 Csがそれ ぞれ並列に接続された回路構成を有して 、る。 TFT20がオン状態になるとドレイン バスライン 14に印加された電位が画素電極 16、蓄積容量電極 19および制御容量電 極 26に印加され、一方、蓄積容量バスライン 18と共通電極 41には共通電位が印加 される。これにより、画素電極 17は、画素電極 16に印加された電位より所定量だけ 低い電位に維持される。副画素 Aの液晶層 6に印加される電圧を Vpxlとすると、副 画素 Bの液晶層 6に印加される電圧 Vpx2は、 Thus, in the pixel of the liquid crystal display device according to the present embodiment, the second liquid crystal capacitor Clc2 and the control capacitor Cc are connected in series, and these, the first liquid crystal capacitor Clcl, and the storage capacitor Cs. Each has a circuit configuration connected in parallel. When the TFT 20 is turned on, the potential applied to the drain bus line 14 is applied to the pixel electrode 16, the storage capacitor electrode 19 and the control capacitor electrode 26, while the storage capacitor bus line 18 and the common electrode 41 have a common potential. Applied. As a result, the pixel electrode 17 is maintained at a potential lower than the potential applied to the pixel electrode 16 by a predetermined amount. If the voltage applied to the liquid crystal layer 6 of the subpixel A is Vpxl, the voltage Vpx2 applied to the liquid crystal layer 6 of the subpixel B is
Vpx2= (Cc/ (Clc2 + Cc) ) XVpxl  Vpx2 = (Cc / (Clc2 + Cc)) XVpxl
となる。ここで、 0く(CcZ (Clc2 + Cc) )く 1であるため、 Vpxl =Vpx2 = 0以外では 電圧 Vpx2は電圧 Vpxlより大きさ力 /J、さくなる( I Vpx2 | < | Vpxl | )。  It becomes. Here, 0 (CcZ (Clc2 + Cc)) is 1. Therefore, when Vpxl = Vpx2 = 0, the voltage Vpx2 is smaller than the voltage Vpxl by a force / J (I Vpx2 | <|
[0025] このように、本実施の形態による液晶表示装置では、副画素 Aの液晶層 6に印加さ れる電圧 Vpxlと、副画素 Bの液晶層 6に印加される電圧 Vpx2とを 1画素内で互い に異ならせることができる。液晶表示装置を駆動する際に副画素 A、 Bの液晶層 6に はそれぞれ互いに異なる電圧が印加されるため、斜め方向での T—V特性の歪みが 1画素内で分散されることになる。したがって、斜め方向から見たときに画像の色が白 っぽくなる現象(白つ茶け)を抑制でき、視角特性が改善された広視野角の液晶表示 装置が得られるようになって 、る。 Thus, in the liquid crystal display device according to the present embodiment, the voltage Vpxl applied to the liquid crystal layer 6 of the subpixel A and the voltage Vpx2 applied to the liquid crystal layer 6 of the subpixel B are included in one pixel. You can make them different from each other. When the liquid crystal display device is driven, different voltages are applied to the liquid crystal layers 6 of the sub-pixels A and B, so that the distortion of the TV characteristics in the oblique direction is dispersed within one pixel. . Therefore, a phenomenon that the image color becomes whitish when viewed from an oblique direction (white-brown) can be suppressed, and a wide viewing angle liquid crystal display device with improved viewing angle characteristics can be obtained. .
[0026] また、本実施の形態による液晶表示装置では、配向膜 50および配向膜 51上にポリ マー層 52およびポリマー層 53が形成されている。ポリマー層 52およびポリマー層 53 によって液晶分子の配向方位が微細スリット 16dおよび微細スリット 17cと平行な方向 に確実に制御される。 In the liquid crystal display device according to the present embodiment, polymer layer 52 and polymer layer 53 are formed on alignment film 50 and alignment film 51. By the polymer layer 52 and the polymer layer 53, the orientation direction of liquid crystal molecules is reliably controlled in a direction parallel to the fine slit 16d and the fine slit 17c.
[0027] さらに、本実施の形態による液晶表示装置では、図 3に示すように画素電極 17の上 部全体は配向膜 50を介してポリマー層 52によって覆われている。また、配向膜 50の 上部全体も同様にポリマー層 52によって覆われている。容量結合部である画素電極 17および配向膜 50上の全面が所定の厚さを持ったポリマー層 52で完全に覆われる ことによって容量結合部での電荷の充電を防ぎ、焼付きを軽減することができる。ま た液晶が含有するモノマーの濃度を一定以上にすることによって所定厚さを持った ポリマー層 52を形成することができる。 Furthermore, in the liquid crystal display device according to the present embodiment, as shown in FIG. 3, the entire upper part of the pixel electrode 17 is covered with the polymer layer 52 via the alignment film 50. Further, the entire upper part of the alignment film 50 is similarly covered with the polymer layer 52. The entire surface of the pixel electrode 17 and the alignment film 50, which are capacitive coupling portions, is completely covered with a polymer layer 52 having a predetermined thickness to prevent charge charging in the capacitive coupling portion and reduce image sticking. Can do. Ma The polymer layer 52 having a predetermined thickness can be formed by setting the concentration of the monomer contained in the liquid crystal to a certain level or more.
以下、本実施の形態による液晶表示装置について、実施例を用いてより具体的に 説明する。  Hereinafter, the liquid crystal display device according to the present embodiment will be described more specifically with reference to examples.
[0028] (実施例 1) [0028] (Example 1)
まず、本実施の形態の実施例 1について説明する。 UV光により重合可能なモノマ 一(重合性成分)を含有した n型液晶(Merck社製の MJ011412)とモノマーを含有 して ヽな 、n型液晶(Merck社製の MJ011412)の 2種類の液晶を用意した。また、 電気的特性の異なる 3種類の垂直配向膜用材料 (ポリイミドまたはポリアミック酸) PI1 〜PI3を用意した。  First, Example 1 of the present embodiment will be described. Two types of liquid crystal, an n-type liquid crystal containing a monomer (polymerizable component) that can be polymerized by UV light (MJ011412 manufactured by Merck) and an n-type liquid crystal containing a monomer (MJ011412 manufactured by Merck) Prepared. Three types of materials for vertical alignment films (polyimide or polyamic acid) PI1 to PI3 with different electrical characteristics were prepared.
[0029] 次に、図 2および図 3に示したような 15インチの TFT基板 2と、対向基板 4とをそれ ぞれ 6パネル分作製した。両基板 2、 4上に、上記の 3種類の配向膜用材料 PI1〜PI 3をそれぞれ 2パネル分ずつ印刷した。両基板 2、 4を 200°Cで 10分間加熱して配向 膜用材料を本硬化させ、配向膜 50、 51を形成した。これにより、 3種類の基板 2、 4が 2組ずつ作製された。  [0029] Next, the 15-inch TFT substrate 2 and the counter substrate 4 as shown in FIGS. 2 and 3 were produced for 6 panels each. On the two substrates 2 and 4, the above three kinds of alignment film materials PI1 to PI3 were printed for two panels each. Both substrates 2 and 4 were heated at 200 ° C. for 10 minutes to fully cure the alignment film material, and alignment films 50 and 51 were formed. As a result, two sets of three types of substrates 2 and 4 were produced.
[0030] 次に、両基板 2、 4を洗浄し、 TFT基板 2の外周部の全周に切れ目なくシール材を 塗布した。続いて、 2種類の液晶を 3種類の TFT基板 2のシール材で囲まれた領域 内にそれぞれ滴下した。次に、 TFT基板 2と対向基板 4とを真空中で貼り合わせ、大 気圧に戻すことにより両基板 2、 4間に液晶を充填して液晶層 6を形成し、熱処理を行 つてシール材を硬化させた。  Next, both the substrates 2 and 4 were cleaned, and a sealing material was applied to the entire outer periphery of the TFT substrate 2 without any breaks. Subsequently, two types of liquid crystal were dropped into the regions surrounded by the sealing material of the three types of TFT substrate 2 respectively. Next, the TFT substrate 2 and the counter substrate 4 are bonded together in a vacuum and returned to atmospheric pressure to fill the liquid crystal between the substrates 2 and 4 to form the liquid crystal layer 6, and then heat treatment is performed to seal the sealing material. Cured.
[0031] 次に、各画素電極 16と共通電極 41との間の液晶層 6に 17Vの交流電圧を印加し た。また同時に各画素電極 17と共通電極 41との間の液晶層 6に 17V未満の交流電 圧を印加した。この状態で液晶層 6に照射エネルギー密度 lOOOmjZcm2の UV光 を照射した。これにより、液晶が含有するモノマーを重合させ、液晶層 6と配向膜 50、 51との各界面にポリマー層 52、 53をそれぞれ形成した。ポリマー層 52、 53を形成し た後、基板 2、 4の外側に偏光板 86、 87をクロス-コルに貼り付けた。以上の工程を 経て、 3種類の液晶と 2種類の配向膜用材料とを組み合わせた 6種類の液晶表示パ ネルを作製した。 [0032] 6種類の液晶表示パネルを作製後、それぞれの液晶表示パネルに約 2cm X約 5c mの長方形の白黒チェッカパターンを常温にて 48時間連続表示させた直後に画面 全体に同階調の中間調(32Z64階調)を表示させて、液晶表示パネル毎に黒表示 力 中間調を表示させた領域である低輝度領域の輝度および白表示から中間調を 表示させた領域である高輝度領域の輝度を測定し、測定した輝度力 液晶表示パネ ル毎に焼付き率を求めた。 Next, an alternating voltage of 17 V was applied to the liquid crystal layer 6 between each pixel electrode 16 and the common electrode 41. At the same time, an AC voltage of less than 17 V was applied to the liquid crystal layer 6 between each pixel electrode 17 and the common electrode 41. It was irradiated with UV light irradiation energy density LOOOmjZcm 2 to the liquid crystal layer 6 in this state. As a result, the monomer contained in the liquid crystal was polymerized to form polymer layers 52 and 53 at the interfaces between the liquid crystal layer 6 and the alignment films 50 and 51, respectively. After the polymer layers 52 and 53 were formed, polarizing plates 86 and 87 were attached to the outer sides of the substrates 2 and 4 in a cross-coll. Through the above steps, six types of liquid crystal display panels were produced by combining three types of liquid crystals and two types of alignment film materials. [0032] After preparing six types of liquid crystal display panels, a rectangular black and white checker pattern of about 2cm x about 5cm was continuously displayed on each liquid crystal display panel at room temperature for 48 hours. Displays halftone (32Z64 gradation) and displays black for each LCD panel. Brightness of low brightness area, which is the halftone display area, and high brightness area, which is the halftone display area from white display The brightness was measured, and the burn-in rate was determined for each of the measured brightness power liquid crystal display panels.
[0033] 図 5は 6種類の液晶表示パネルの焼付き率を示すグラフである。グラフの横方向は 配向膜の種類を表し、縦軸は液晶表示パネルの焼付き率 (単位は%)を表して 、る。 図 5では液晶表示パネルの種類を配向膜材料の種類 PI1〜PI3毎に分け、次に液晶 のモノマー含有の有無で分けている。図 5に示すように、それぞれ電気的特性の異な る配向膜にぉ 、てモノマーを重合させた液晶表示パネルの焼付き率力 モノマーを 含有しな!、液晶表示パネルの焼付き率よりも低くなつており、焼付きが改善されて 、 る。  FIG. 5 is a graph showing the burn-in rate of six types of liquid crystal display panels. The horizontal direction of the graph represents the type of alignment film, and the vertical axis represents the burn-in rate (unit:%) of the liquid crystal display panel. In Fig. 5, the types of liquid crystal display panels are divided into the alignment film material types PI1 to PI3, and then according to the presence or absence of liquid crystal monomers. As shown in FIG. 5, each of the alignment films having different electrical characteristics has a burn-in rate of the liquid crystal display panel in which the monomer is polymerized and does not contain the monomer! It is lower than the burn-in rate of the liquid crystal display panel. As a result, seizure is improved.
[0034] 図 6は液晶表示パネルを分解し、配向膜 50およびその周辺部を SEM (Scanning  [0034] Fig. 6 is an exploded view of the liquid crystal display panel, and the alignment film 50 and its periphery are
Electron Microscope :走査型電子顕微鏡)を用いて観測した図である。図 6 (a) はモノマーを重合させた液晶表示パネルの配向膜 50およびその周辺部を観測した 図であり、図 6 (b)はモノマーを含有していない液晶表示装置の配向膜 50およびそ の周辺部を観測した図である。図 6に示すように、モノマーを重合させた液晶表示パ ネルではモノマーを含有しな 、液晶表示パネルにはな 、ポリマー層 52が形成されて おり、容量結合部である画素電極 17および配向膜 50上の全面を覆っていることが確 認された。またポリマー層 52の膜厚は 130 Am以上あり、膜厚が 130 Am以上である ポリマー層 52の形成により、液晶表示パネルの焼付きが改善されることが分った。  It is the figure observed using the Electron Microscope (scanning electron microscope). FIG. 6 (a) is a diagram observing the alignment film 50 of the liquid crystal display panel in which the monomer is polymerized and its peripheral portion, and FIG. 6 (b) is an alignment film 50 of the liquid crystal display device that does not contain the monomer and It is the figure which observed the peripheral part. As shown in FIG. 6, the liquid crystal display panel obtained by polymerizing the monomer does not contain the monomer, and the liquid crystal display panel is formed with the polymer layer 52, and the pixel electrode 17 and the alignment film which are capacitive coupling portions. It was confirmed that it covered the entire surface of 50. Further, it has been found that the film thickness of the polymer layer 52 is 130 Am or more, and that the film thickness is 130 Am or more, the formation of the polymer layer 52 improves the image sticking of the liquid crystal display panel.
[0035] (実施例 2)  [0035] (Example 2)
本実施の形態の実施例 2ではモノマーの濃度が 0. 05%、 0. 1%、 0. 2%、 0. 3% である 4種類の n型液晶(Merck社製の MJ011412)を用意した。また、図 2および図 3に示したような 15インチの TFT基板 2と、対向基板 4とを 9組作製した。  In Example 2 of the present embodiment, four types of n-type liquid crystals (MJ011412 manufactured by Merck) having monomer concentrations of 0.05%, 0.1%, 0.2%, and 0.3% were prepared. . In addition, nine sets of 15-inch TFT substrate 2 and counter substrate 4 as shown in FIGS. 2 and 3 were produced.
[0036] 次に、両基板 2、 4を洗浄し、 TFT基板 2の外周部の全周に切れ目なくシール材を 塗布した。続いて、 4種類のモノマーを含有した液晶を TFT基板 2のシール材で囲ま れた領域内にそれぞれ滴下した。次に、 TFT基板 2と対向基板 4とを真空中で貼り合 わせ、大気圧に戻すことにより両基板 2、 4間に液晶を充填して液晶層 6を形成し、熱 処理を行ってシール材を硬化させた。 Next, both the substrates 2 and 4 were cleaned, and a sealing material was applied to the entire outer periphery of the TFT substrate 2 without any breaks. Next, the liquid crystal containing four types of monomers is surrounded by the sealing material of TFT substrate 2. Each was dropped in the area. Next, the TFT substrate 2 and the counter substrate 4 are bonded together in a vacuum and returned to atmospheric pressure to fill the liquid crystal between the substrates 2 and 4 to form the liquid crystal layer 6 and then heat-treat and seal The material was cured.
[0037] 次に、各画素電極 16と共通電極 41との間の液晶層 6に 17Vの交流電圧を印加し た。また同時に各画素電極 17と共通電極 41との間の液晶層 6に 17V未満の交流電 圧を印加した。この状態で液晶層 6に照射エネルギー密度 lOOOmjZcm2の UV光 を照射した。これにより、液晶が含有するモノマーを重合させ、液晶層 6と配向膜 50、 51との各界面にポリマー層 52、 53をそれぞれ形成した。ポリマー層 52、 53を形成し た後、基板 2、 4の外側に偏光板 86、 87をクロス-コルに貼り付けた。以上の工程を 経て、 4種類のモノマー濃度の液晶毎に 2枚 (ただしモノマー濃度が 0. 2%の液晶表 示パネルのみ 3枚)、合わせて 9枚の液晶表示パネルを作製した。 Next, an alternating voltage of 17 V was applied to the liquid crystal layer 6 between each pixel electrode 16 and the common electrode 41. At the same time, an AC voltage of less than 17 V was applied to the liquid crystal layer 6 between each pixel electrode 17 and the common electrode 41. It was irradiated with UV light irradiation energy density LOOOmjZcm 2 to the liquid crystal layer 6 in this state. As a result, the monomer contained in the liquid crystal was polymerized to form polymer layers 52 and 53 at the interfaces between the liquid crystal layer 6 and the alignment films 50 and 51, respectively. After the polymer layers 52 and 53 were formed, polarizing plates 86 and 87 were attached to the outer sides of the substrates 2 and 4 in a cross-coll. Through the above process, nine liquid crystal display panels were produced, two for each liquid crystal with four monomer concentrations (however, only three for liquid crystal display panels with a monomer concentration of 0.2%).
[0038] また本実施例ではモノマーを含有して ヽな 、n型液晶(Merck社製の MJ011412) を用意した。さらに容量結合 HT法を用いない 15インチの TFT基板 2と、対向基板 4 とを 1組作製した。図 7は容量結合 HT法を用いない液晶表示装置の 1画素の構成を 示している。なお、図 7に示す液晶表示装置において図 2に示した液晶表示装置と 同様の機能、作用を奏する構成要素には同一の符号を付して詳細な説明は省略す る。図 7に示すように、画素内に形成された画素電極 16は、 TFT20のソース電極 22 とコンタクトホール 24を介して電気的に直接接続されている。また、図 2に示すような 容量結合部である画素電極 17は形成されて ヽな ヽ。  In this example, an n-type liquid crystal (MJ011412 manufactured by Merck Co., Ltd.) that contains a monomer was prepared. Furthermore, a 15-inch TFT substrate 2 that does not use the capacitively coupled HT method and a counter substrate 4 were produced. Figure 7 shows the configuration of one pixel in a liquid crystal display device that does not use the capacitively coupled HT method. In the liquid crystal display device shown in FIG. 7, components having the same functions and operations as those of the liquid crystal display device shown in FIG. 2 are denoted by the same reference numerals, and detailed description thereof is omitted. As shown in FIG. 7, the pixel electrode 16 formed in the pixel is electrically directly connected to the source electrode 22 of the TFT 20 via the contact hole 24. Further, the pixel electrode 17 which is a capacitive coupling portion as shown in FIG. 2 is formed.
[0039] 容量結合 HT法を用いな ヽ両基板 2、 4を洗浄し、 TFT基板 2の外周部の全周に切 れ目なくシール材を塗布した。続、て、モノマーを含有して!/、な!、液晶を TFT基板 2 のシール材で囲まれた領域内に滴下した。次に、 TFT基板 2と対向基板 4とを真空 中で貼り合わせ、大気圧に戻すことにより両基板 2、 4間に液晶を充填して液晶層 6を 形成し、熱処理を行ってシール材を硬化させた。基板 2、 4の外側に偏光板 86、 87を クロス-コルに貼り付けた。以上の工程を経て、 1枚の液晶表示パネルを作製した。  [0039] Both substrates 2 and 4 without using the capacitive coupling HT method were cleaned, and a sealing material was applied to the entire outer periphery of the TFT substrate 2 without any gaps. Subsequently, the monomer was contained! /,!, And the liquid crystal was dropped into the area surrounded by the sealing material of the TFT substrate 2. Next, the TFT substrate 2 and the counter substrate 4 are bonded together in a vacuum, and the liquid crystal is filled between the substrates 2 and 4 by returning to atmospheric pressure to form a liquid crystal layer 6, and heat treatment is performed to seal the sealing material. Cured. Polarizers 86 and 87 were attached to the outside of the substrates 2 and 4 in a cross-coll. Through the above process, one liquid crystal display panel was produced.
[0040] 容量結合 HT法を用いてかつモノマーを含有した液晶を用いた 9枚の液晶表示パ ネルおよび、容量結合 HT法を用いずかつモノマーを含有して 、な 、液晶を用いた 1 枚の液晶表示パネルを作製後、それぞれの液晶表示パネルに約 2cm X約 5cmの 長方形の白黒チ ッカパターンを常温にて 48時間連続表示させた直後に画面全体 に同階調の中間調(32Z64階調)を表示させて、液晶表示パネル毎に黒表示から 中間調を表示させた領域である低輝度領域の輝度および白表示から中間調を表示 させた領域である高輝度領域の輝度を測定し、測定した輝度カゝら液晶表示パネル毎 に焼付き率を求めた。 [0040] Nine liquid crystal display panels using the liquid crystal containing the capacitive coupling HT method and the monomer, and one sheet using the liquid crystal without using the capacitive coupling HT method and containing the monomer. After making the LCD panel, about 2cm X about 5cm Immediately after displaying the rectangular black and white checker pattern at room temperature for 48 hours, halftones (32Z64 gradations) with the same gradation were displayed on the entire screen, and halftones were displayed from black to each LCD panel. The brightness of the low brightness area, which is the area, and the brightness of the high brightness area, which is the halftone display area, were measured from the white display, and the burn-in rate was determined for each liquid crystal display panel based on the measured brightness.
[0041] 図 8はモノマーを重合させた 9枚の液晶表示パネルの焼付き率を示すグラフである 。グラフの横軸は液晶のモノマー濃度(単位は%)を表し、縦軸は液晶表示パネルの 焼付き率(%)を表して 、る。図 8中ひし形の点が各液晶表示パネルの焼付き率を示 している。図 8中点線は容量結合 HT法を用いておらず、かつモノマーを含有してい な 、液晶を用いた液晶表示パネルの焼付き率 (約 4. 2%)を示して 、る。  FIG. 8 is a graph showing the image sticking rate of nine liquid crystal display panels in which monomers are polymerized. The horizontal axis of the graph represents the liquid crystal monomer concentration (unit:%), and the vertical axis represents the image sticking ratio (%) of the liquid crystal display panel. The diamond points in Fig. 8 indicate the burn-in rate of each liquid crystal display panel. The dotted line in Fig. 8 shows the burn-in rate (approximately 4.2%) of a liquid crystal display panel using liquid crystal without using the capacitively coupled HT method and containing no monomer.
[0042] 容量結合 HT法を用いてかつモノマーを含有した液晶を用いた液晶表示パネルで はモノマー濃度が高くなるほど液晶表示パネルの焼付き率が減少して 、る。モノマー 濃度が 0. 05%、 0. 1%の液晶表示パネルでは焼付き率が 6%以上であり容量結合 HT法を用いずかつ液晶がモノマーを含有して 、な 、液晶表示パネルよりも焼付き は悪ィ匕している力 モノマー濃度が 0. 2%、0. 3%の液晶表示パネルでは焼付き率 力 以下であり、容量結合 HT法を用いずかつモノマーを含有して ヽな 、液晶を用 いた液晶表示パネルよりも焼付きが改善されている。以上のことよりモノマー濃度が 0 . 2%以上の液晶を用いることで液晶表示装置の焼付きが改善されることが分った。  [0042] In the liquid crystal display panel using the capacitive coupling HT method and using a liquid crystal containing a monomer, the image sticking ratio of the liquid crystal display panel decreases as the monomer concentration increases. A liquid crystal display panel with a monomer concentration of 0.05% or 0.1% has a seizure rate of 6% or more, does not use the capacitively coupled HT method, and the liquid crystal contains a monomer. With a liquid crystal display panel with a monomer concentration of 0.2% or 0.3%, the image sticking rate is less than that, and it does not use the capacitively coupled HT method and contains a monomer. Image sticking is improved compared to liquid crystal display panels using liquid crystals. From the above, it was found that image sticking of the liquid crystal display device was improved by using a liquid crystal having a monomer concentration of 0.2% or more.
[0043] 本発明は、上記実施の形態に限らず種々の変形が可能である。  [0043] The present invention is not limited to the above-described embodiment, and various modifications can be made.
例えば、上記実施の形態では透過型の液晶表示装置を例に挙げたが、本発明は これに限らず、反射型や半透過型等の他の液晶表示装置にも適用できる。  For example, although the transmissive liquid crystal display device has been described as an example in the above embodiment, the present invention is not limited to this and can be applied to other liquid crystal display devices such as a reflective type and a transflective type.
[0044] また上記実施の形態では、対向基板 4上に CF榭脂層 40が形成された液晶表示装 置を例に挙げたが、本発明はこれに限らず、 TFT基板 2上に CF榭脂層が形成され た、いわゆる CF— on— TFT構造の液晶表示装置にも適用できる。  In the above embodiment, the liquid crystal display device in which the CF resin layer 40 is formed on the counter substrate 4 is taken as an example. However, the present invention is not limited to this, and the CF substrate on the TFT substrate 2 is used. The present invention can also be applied to a so-called CF-on-TFT liquid crystal display device in which an oil layer is formed.
図面の簡単な説明  Brief Description of Drawings
[0045] [図 1]本発明の一実施の形態による液晶表示装置の概略構成を示す図である。  FIG. 1 is a diagram showing a schematic configuration of a liquid crystal display device according to an embodiment of the present invention.
[図 2]本発明の一実施の形態による液晶表示装置の 1画素の構成を示す図である。  FIG. 2 is a diagram showing a configuration of one pixel of a liquid crystal display device according to an embodiment of the present invention.
[図 3]本発明の一実施の形態による液晶表示装置の構成を示す断面図である。 [図 4]本発明の一実施の形態による液晶表示装置の 1画素の等価回路を示す図であ る。 FIG. 3 is a cross-sectional view showing a configuration of a liquid crystal display device according to an embodiment of the present invention. FIG. 4 is a diagram showing an equivalent circuit of one pixel of the liquid crystal display device according to one embodiment of the present invention.
[図 5]本発明の一実施の形態の実施例 1による液晶表示装置の各液晶表示パネルの 焼付き率を示すグラフである。  FIG. 5 is a graph showing the burn-in rate of each liquid crystal display panel of the liquid crystal display device according to Example 1 of one embodiment of the present invention.
[図 6]液晶表示パネルの一部を拡大して示す図である。  FIG. 6 is an enlarged view showing a part of a liquid crystal display panel.
[図 7]本発明の一実施の形態の実施例 2による液晶表示装置の 1画素の構成を示す 図である。  FIG. 7 is a diagram showing a configuration of one pixel of a liquid crystal display device according to Example 2 of one embodiment of the present invention.
[図 8]本発明の一実施の形態の実施例 2による液晶表示装置の各液晶表示パネルの 焼付き率を示すグラフである。  FIG. 8 is a graph showing the burn-in rate of each liquid crystal display panel of the liquid crystal display device according to Example 2 of one embodiment of the present invention.
[図 9]容量結合 HT法を用いた従来の液晶表示装置に発生する焼付き現象を説明す る図である。  FIG. 9 is a diagram illustrating a seizure phenomenon that occurs in a conventional liquid crystal display device using the capacitively coupled HT method.
符号の説明 Explanation of symbols
2 TFT基板 2 TFT substrate
4 対向基板 4 Counter substrate
6 液晶層 6 Liquid crystal layer
10、 11 ガラス基板 10, 11 Glass substrate
12 ゲートバスライン 12 Gate bus line
14 ドレインバスライン 14 Drain bus line
16、 17 画素電極 16, 17 pixel electrode
16a, 16b、 16c、 17a, 17b 線状電極  16a, 16b, 16c, 17a, 17b linear electrode
16d、 17c 微細スリット  16d, 17c fine slit
18 蓄積容量バスライン  18 Storage capacity bus line
19 蓄積容量電極  19 Storage capacitor electrode
20 TFT  20 TFT
21 ドレイン電極  21 Drain electrode
22 ソース電極  22 Source electrode
24、 25 コンタクトホール  24, 25 contact hole
26 制御容量電極 絶縁膜 26 Control capacitor electrode Insulation film
保護膜  Protective film
CF榭脂層  CF resin layer
共通電極  Common electrode
、 51 配向膜 51 Alignment film
、 53 ポリマー層 , 53 polymer layer
ゲートバスライン駆動回路 ドレインバスライン駆動回路 制御回路  Gate bus line drive circuit Drain bus line drive circuit Control circuit
、 87 偏光板 , 87 Polarizer
ノ ックライトユニット  Knock light unit

Claims

請求の範囲 The scope of the claims
[1] 対向配置された一対の基板と、  [1] a pair of substrates arranged opposite to each other;
前記一対の基板間に挟持された液晶層と、  A liquid crystal layer sandwiched between the pair of substrates;
一方の前記基板上に形成され、前記一方の基板上に形成されたスイッチング素子 と電気的に接続された直結部と、前記スイッチング素子と電気的に絶縁された容量 結合部とを備えた画素電極と、  A pixel electrode formed on one of the substrates, having a direct coupling portion electrically connected to the switching element formed on the one substrate, and a capacitive coupling portion electrically insulated from the switching element When,
前記スイッチング素子と電気的に接続され、前記容量結合部との間に静電容量を 形成する制御容量電極と、  A control capacitance electrode electrically connected to the switching element and forming a capacitance with the capacitive coupling portion;
前記一対の基板の対向面にそれぞれ形成された配向膜と、  An alignment film formed on each of the opposing surfaces of the pair of substrates;
前記液晶層に含有された重合性成分が熱もしくは光で重合して前記基板との界面 近傍に形成され、前記容量結合部上の配向膜全体を覆う焼付き防止用のポリマー 層と  A polymerizable layer contained in the liquid crystal layer is polymerized by heat or light and formed in the vicinity of the interface with the substrate, and a polymer layer for preventing seizure covering the entire alignment film on the capacitive coupling portion;
を有することを特徴とする液晶表示装置。  A liquid crystal display device comprising:
[2] 請求項 1記載の液晶表示装置において、  [2] The liquid crystal display device according to claim 1,
前記配向膜の表面全体が前記ポリマー層によって覆われて 、ること  The entire surface of the alignment film is covered with the polymer layer.
を特徴とする液晶表示装置。  A liquid crystal display device.
[3] 請求項 1又は 2に記載の液晶表示装置において、 [3] In the liquid crystal display device according to claim 1 or 2,
前記ポリマー層は 130 Am以上の厚さを有すること  The polymer layer has a thickness of 130 Am or more.
を特徴とする液晶表示装置。  A liquid crystal display device.
[4] 請求項 1乃至 3のいずれか 1項に記載の液晶表示装置において、 [4] The liquid crystal display device according to any one of claims 1 to 3,
前記重合性成分は 0. 2%以上の濃度を有すること  The polymerizable component has a concentration of 0.2% or more.
を特徴とする液晶表示装置。  A liquid crystal display device.
PCT/JP2006/310161 2005-05-24 2006-05-22 Liquid crystal display WO2006126494A1 (en)

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Citations (4)

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Publication number Priority date Publication date Assignee Title
JPH11109362A (en) * 1997-09-30 1999-04-23 Sanyo Electric Co Ltd Liquid crystal display device and its production
JP2003149647A (en) * 2001-08-31 2003-05-21 Fujitsu Display Technologies Corp Liquid crystal display device and manufacturing method therefor
JP2003228050A (en) * 2002-02-04 2003-08-15 Fujitsu Display Technologies Corp Liquid crystal display device and its manufacturing method
JP2003279946A (en) * 2002-03-19 2003-10-02 Fujitsu Display Technologies Corp Method for manufacturing liquid crystal display device

Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
JPH11109362A (en) * 1997-09-30 1999-04-23 Sanyo Electric Co Ltd Liquid crystal display device and its production
JP2003149647A (en) * 2001-08-31 2003-05-21 Fujitsu Display Technologies Corp Liquid crystal display device and manufacturing method therefor
JP2003228050A (en) * 2002-02-04 2003-08-15 Fujitsu Display Technologies Corp Liquid crystal display device and its manufacturing method
JP2003279946A (en) * 2002-03-19 2003-10-02 Fujitsu Display Technologies Corp Method for manufacturing liquid crystal display device

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