WO2006126269A1

WO2006126269A1 - Receiver apparatus and message symbol detecting method

Info

Publication number: WO2006126269A1
Application number: PCT/JP2005/009663
Authority: WO
Inventors: Soo Eng Yew; Zhan Yu
Original assignee: Matsushita Electric Industrial Co., Ltd.
Priority date: 2005-05-26
Filing date: 2005-05-26
Publication date: 2006-11-30

Abstract

A receiver apparatus wherein a noise suppression effect is introduced to achieve a higher S/N ratio, while improving the characteristic of bit error rate. In this apparatus, an integrator (104) divides a signal received from a multiplier (103) into a number N of intervals to execute an integration process over a symbol frame having a time length in which those intervals are equal to each other. A delay circuit (105) delays, by a time delay (D5), a signal received from the multiplier (103). An integrator (106) divides the signal received from the delay circuit (105) into a number M of intervals to execute an integration process over a symbol frame having a time length in which those intervals are equal to each other. A comparator and selector unit (107) compares the integration results of the integrators (104,106) with each other to select the larger integration result.

Description

Specification

Reception device and message symbol detection method

Technical field

TECHNICAL FIELD [0001] The present invention relates to a receiving apparatus and a message symbol detection method used particularly for impulse radio (hereinafter referred to as “IR”).

Background art

[0002] Recent advances in communications technology are very short! Enables the transmission and reception of time-ratio frequency (RF) pulse sequences, and allows for time durations that are typically less than 1 nanosecond. did. This is called IR. The energy of individual pulses is usually low. Therefore, the low duty cycle of the pulsed waveform results in a very low average power. Various conventional receivers and transmitters have been put into practical use for IR signals. IR transmitters and receivers use amplitude modulation, phase modulation, frequency modulation, pulse position modulation (PPM) (also known as time shift modulation or pulse interval modulation) and many data modulation and demodulation technologies with these M-ray versions Can be used.

[0003] Typically, an IR receiver is a direct conversion receiver having a cross-correlator front end that coherently converts an electromagnetic pulse train into a single stage baseband signal. Some impulse radio systems require precise time synchronization between transmitter and receiver. They must also remain synchronized over time. In the execution of a synchronous receiver, for example, the synchronization must be accurate within the fraction of pulse duration. In order to recover the data in the execution of the synchronous receiver, the high-precision oscillator makes a correlator to capture the pulse energy in the correct time and multiplies the captured energy by the width-controlled template pulse energy. . Since the pulse duration is very short, the synchronization parameter is very strict and often requires a long acquisition period. In addition, the process samples the waveform cross-section at different points, so the receiver does not capture multipath energy efficiently. Multiple correlator rake receivers can also be used to capture multipath energy. However, this receiver is complex and expensive. [0004] A transmission reference (TR) method is known as another conventional implementation of data modulation for radio pulses (eg, Patent Document 1). In the TR method, pulses are transmitted in pairs, of which the first pulse is not modulated and the second pulse is modulated by data. An unmodulated pulse is often referred to as a reference pulse. Separate or delay the pair of nozzles from each other by a time interval or delay known to the recipient. The receiver restores the communication data without requiring acquisition time by delaying the first pulse and correlating it with the second pulse based on a known delay in a finite interval. Therefore, since the pulse pairs are reconstructed by the receiver and correlated with each other, data modulation pulse detection is performed. As a result, TR reception does not require synchronization for individual pulses. Since pulse pairs are transmitted through the same channel, no explicit channel estimation is necessary.

FIG. 1 is a block diagram showing a configuration of a conventional receiving apparatus 10. The receiving device 10 has one integrator 18 for receiving the TR pulse train. The receiver 10 includes a receiving antenna 11, a correlator 12, and an output unit 13. Correlator 12 splits the incoming TR pulse into travel path 14 and delay path 15. The delay path 15 has a delay circuit 16 that delays the incoming TR pulse by a time delay D. Multiplier 17 performs multiplication of delayed and non-delayed pulses.

[0006] The correlator 12 inputs the output of the multiplier 17 to an integrator 18 that executes an integration process over one symbol frame period Tf. Further, the correlator 12 causes the output of the integrator 18 to be input to a threshold comparator 19 that compares it with a predetermined threshold value. Further, the correlator 12 inputs the output of the threshold comparator 19 to the output unit 13. Thus, conventionally, the integration process is performed over the entire symbol frame period, and only one integration result is output from the integrator 18.

Patent Document 1: US Patent Application Publication No. 2001Z0053175

Disclosure of the invention

Problems to be solved by the invention

However, the conventional apparatus captures noise over the pulse interval even in the TR system, and a higher SN ratio (SNR) is required compared to the conventional PPM technology. This is related to the noise contribution in the received reference pulse multiplied by the noise contribution in the data modulation pulse. Due to excessive noise. Therefore, it is necessary to improve the reception of TR-IR pulses in noisy environments. In other words, the time-separated reference pulse and data pulse communicated with the transmission reference pulse train have a problem that the SN ratio is reduced by the value obtained by multiplying the noise contribution in the received reference pulse by the noise contribution in the data modulation pulse. As a result, the noise X-integral term integrated over the time frame is increased, and the bit error rate (BER) characteristics are degraded.

An object of the present invention is to provide a receiving apparatus and a message symbol detection method capable of obtaining a higher SN ratio and improving the bit error rate characteristics by introducing a noise suppression effect. It is to be.

Means for solving the problem

[0009] The receiving device of the present invention includes a first delay means for delaying one reception pulse of the reception pulses separated into two systems for a predetermined time, the other reception pulse of the reception pulses separated into the two systems, and the A multiplying means for multiplying the received pulse delayed by the first delay means, and a second for delaying one received pulse of the received pulses after being multiplied by the multiplying means and separated into two systems for a predetermined time. The delay means and the other received pulse of the received pulse that has been multiplied by the multiplying means and separated into two systems, and one symbol frame of the received pulse delayed by the second delay means are set at regular time intervals. Integration processing means for time-division integration processing at each time interval, and the integration of the one received pulse separated after multiplication based on a comparison result between the amplitude of the integration processing result and a threshold value Processing result And a message symbol is detected from a selection means for selecting one of the integration processing results of the received pulse delayed by the second delay means, and the integration processing result selected by the selection means. And an output means for outputting.

[0010] The message symbol detection method of the present invention includes a step of delaying one reception pulse of reception pulses separated into two systems by a first delay time, and the other reception pulse of the reception pulses separated into the two systems. A step of multiplying the delayed received pulse, a step of delaying one of the received pulses that have been multiplied and separated into two systems by a second delay time; and One symbol frame of the other received pulse separated from the separated received pulse and the received pulse delayed by the second delay time Time-divided into predetermined time intervals and integrating each time interval, and based on a comparison result between the amplitude of the integration processing result and a threshold value, the one of the received pulses separated after the multiplication Selecting one of the integration processing result and the integration processing result of the received pulse delayed by the second delay time; detecting and outputting a message symbol from the selected integration processing result; and It was made to comprise.

The invention's effect

[0011] According to the present invention, by introducing a noise suppression effect, a higher SN ratio can be obtained, and the bit error rate characteristics can be improved.

Brief Description of Drawings

FIG. 1 is a block diagram showing a configuration of a conventional receiving apparatus

FIG. 2 is a block diagram showing a configuration of a receiving apparatus according to Embodiment 1 of the present invention.

FIG. 3 is a diagram showing a TR pulse train according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a TR pulse train according to the first embodiment of the present invention.

FIG. 5 is a flowchart showing the operation of the receiving apparatus according to Embodiment 1 of the present invention.

FIG. 6 is a diagram showing the operation of the parallel integrator according to Embodiment 1 of the present invention.

FIG. 7 is a diagram showing received TR pulse, noise, and parallel integrator output according to Embodiment 1 of the present invention.

FIG. 8 is a block diagram showing a configuration of a receiving apparatus according to Embodiment 2 of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[0014] (Embodiment 1)

FIG. 2 is a block diagram showing a configuration of receiving apparatus 100 according to the first embodiment. The delay circuit 102, the multiplier 103, the integrator 104, the delay circuit 105, the integrator 106, and the comparator and selector unit 107 constitute a correlator 113. The receiving apparatus 100 includes two parallel integrators 104 and 106 for receiving the TR pulse train. In addition, the receiving apparatus 100 is different from the conventional one in that a delay circuit 105, two integrators 104 and 106, and a comparator and selector unit 107 are added. The antenna 101 receives a signal and outputs the signal to the multiplier 103 in the traveling path 109 and the delay circuit 102 in the delay path 110.

[0016] The delay circuit 102 as the first delay means delays the signal input from the antenna 101.

Delayed by D (first delay time) and output to multiplier 103.

The multiplier 103 multiplies the non-delayed pulse signal input from the antenna 101 by the delayed pulse signal input from the delay circuit 102 to multiply the multiplier 104 and the delay path 11 of the traveling path 111.

Output to 2 delay circuit 105.

[0018] An integrator 104 as an integration processing means divides the signal input from the multiplier 103 into N intervals, and performs integration processing over one symbol frame in which each interval has an equal time length. Execute. The integrator 104 outputs the integration result to the comparator and selector unit 107.

[0019] The delay circuit 105, which is the second delay means, converts the signal input from the multiplier 103 into a time delay D

Delayed by 5 (second delay time) and output to integrator 106.

[0020] The integrator 106, which is an integration processing means, divides the signal input from the delay circuit 105 into M intervals and performs integration processing over one symbol frame in which each interval has an equal time length. Execute. The integrator 106 outputs the integration result to the comparator / selector unit 107.

The comparator / selector unit 107 as selection means compares the integration results from both integrators 104 and 106, selects the one with the larger integration result, and outputs it to the output unit 108.

The output unit 108 serving as an output unit detects and outputs a message symbol from the integration result input from the comparator and selector unit 107. The reception timing can be detected by detecting the message symbol.

FIG. 3 shows a typical TR pulse train 300 of 1 bit per symbol communicated between the TR impulse radio transmitter and the receiving device 100. In one typical embodiment, T

The R pulse train 300 includes TR pulse pairs (301, 302). Each TR pulse pair is time delayed

Contains one reference pulse 301 and one data pulse 302 separated by D1

. The reference pulse 301 is a force having a fixed polarity. The data pulse 302 has a modulation polarity based on the input message symbol. Data pulse 3 with the same polarity as reference pulse 301 By modulating 02, bit “0” is transmitted in symbol frame # 303. Bit “1” is transmitted in frame # 304 by modulating a data pulse 302 having a polarity relative to reference pulse 301.

Each symbol frame required time Tf is fixed as Rs = lZTf by a predetermined symbol rate Rs. The two pulse pairs in symbol frames # 303 and # 304 are each separated by a pulse pair interval D2. Depending on the particular code, eg time-hobbing code, the pulse-to-interval D2 can be fixed or varied. The change in pulse-to-interval D2 can occur between symbol frames, or within one time frame if more than one pulse pair is present, or both.

[0025] Furthermore, the data delay time delay D1 can also be fixed or changed by a specific code. The change of Nols vs. interval D2, time delay D1, and the pulse polarity of data pulse 302 by a specific code can also reduce the comb-like line of the force spectrum and achieve channelization. The amplitudes of the reference pulse 301 and the data pulse 302 vary based on a force that matches the predetermined value A shown in FIG. 3 or a certain predetermined amplitude ratio.

[0026] In FIG. 3, only one message bit is transmitted per symbol. By simultaneously modulating the polarity and amplitude of the data pulse 302, or the polarity and time delay of the data pulse 302, or the amplitude and time delay of the data pulse 302, or the polarity, amplitude and time delay of the data pulse 302 It is possible to maintain more than 2 bits per symbol.

[0027] By simultaneously modulating the polarity and time delay of the data pulses, FIG. 4 shows a typical TR pulse train 400 having 2 bits per symbol. Within the symbol, the first bit is to modulate the time delay of the data pulse, where “0” and “1” indicate D3 and D4, respectively. The second bit is to modulate the polarity of the data pulse, where “0” and “1” indicate “same polarity” and “opposite polarity”, respectively. Only one pulse pair per symbol frame can have multiple pulse pairs to represent the force one symbol shown in FIG. When using multiple pulse pairs, the data pulse The time delay is fixed and the pulse-to-interval is changed by a fixed force, or a specific code. The modulation technique for multiple bits per symbol is not limited to the embodiment of FIG.

FIG. 5 is a typical flowchart of the operation in the comparator and selector unit 107. After startup, the comparator and selector unit 107 saves the output from both the integrator 104 and the integrator 106. The comparator and selector unit 107 then compares the stored result from the integrator 104 (step ST501) with a predetermined threshold (step ST502). Greater than threshold! /, Only results are selected and restored and saved (step ST503), and finally all remaining results are summed together to produce output 出力 (step ST504). Similarly, the storage result from the integrator 106 (step ST505) is compared with a predetermined threshold value (step ST506). Only results greater than the threshold are selected, restored and saved (step ST507), and finally all remaining results are summed together to produce output B (step ST508). Output A and output B are compared (step ST509), and the larger value is sent to output section 108 (step ST510), and a message symbol can be detected. In step ST502 and step ST506, if the storage result is not greater than the threshold value, it is discarded without being selected.

[0029] FIG. 6 illustrates the operation of two parallel integrators within one symbol frame Tf.

In the integrator 104, the symbol frame Tf is divided into N equal intervals, and each interval has an equal duration TfZN. Integrator 104 performs integration of signal 601 within each interval and provides the value of integration to comparator and selector unit 107 at the end of each interval. Similarly, in integrator 106, symbol frame T f is divided into M equal internals with equal duration TfZM. The integrator 106 performs integration of the signal 602 from the delay circuit 105, and sends the integration result to the comparator and selector unit 107. The values of N and M are predetermined and can be adjusted according to channel conditions. Time delay D5 is introduced to have a starting time offset in integrator 106. The time delay D5 can be adjusted within the range (0, TfZN).

[0030] Figure 7 shows typical received TR pulses and noise captured within one symbol frame Tf. And the output of two parallel integrators. Signal A has a reference pulse 301, a data pulse 302, and noise 701. Signal B represents the delayed version of signal A.

[0031] Signal C represents the result of multiplication by multiplying signal A by signal B of multiplier 103.

The signal portion 702 is the result of multiplying the signal B data pulse 302 by the signal B reference pulse 301.

[0032] Signal D represents the result of integration in integrator 104. Integration is performed every TfZN, and each output is sampled and sent to the comparator and selector unit 107.

[0033] Signal E represents the result of integration in integrator 106 with time delay D5. The integration period is TfZM, and M is equal to N in Fig.7. Signal D indicates that the integration is performed within the time required for signal portion 702. In this way, the signal power is separated into two adjacent intervals and is therefore separated into two adjacent integration results 704 and 706. It is possible that messages whose amplitudes 704 and 706 are less than the comparator and selector unit 107 threshold will be lost. However, the time delay D5 introduces a time offset before the integrator 106. Thus, signal E has the strongest signal result 708 including full signal power. As a result, the probability of being detected in signal result 708 is much greater than in signal D integration results 704 and 706.

[0034] By dividing the symbol frame Tf into multiple intervals, the noise 701 is also separated into multiple intervals. Therefore, the noise power in integrating the integration results 704, 706 and signal result 708 is much less than the conventional means in which integration is performed over the full symbol frame Tf. Further, if the integration result 704, 706 or the signal result 708 is detected, the timing position of the signal portion can be found. This shows that the correlator with two parallel integrators can operate for TR pulse synchronization. The signal F indicates the integration result 710 in the integrator 18 of the conventional receiver 10 for comparison with the integration results 704 and 706 and the signal result 708. Conventionally, since the integration process is performed over the entire symbol frame period, only a single integration result 710 is obtained.

[0035] Thus, according to the first embodiment, a time interval obtained by equally dividing one symbol frame period. By performing integration processing at the interpal, the noise is separated into a large number of internal noises, so that the noise level can be sufficiently reduced, a higher SN ratio can be obtained, and the bit error rate characteristics can be improved. Can be made. Further, according to the first embodiment, since the two signals of the non-delayed signal and the delayed signal are respectively integrated, even when the integration result of one of the signals is separated into different intervals, either It is highly possible that the integration result of the other signal is not separated into different intervals. In this case, the signal result can be reliably detected, and the timing position can be reliably detected.

[0036] (Embodiment 2)

FIG. 8 is a block diagram showing a configuration of receiving apparatus 800 according to Embodiment 2 of the present invention. Multiplier 103, integrator 104, delay circuit 105, integrator 106, comparator and selector unit 107, addition junction 801, delay circuit 802, delay circuit 803, and gain stage 804 constitute correlator 807. The feedback path includes an addition junction 801, a delay circuit 803, and a gain stage 804.

[0037] The receiving apparatus 800 according to the second embodiment is the same as the receiving apparatus 100 according to the first embodiment shown in FIG. 1, except for the delay circuit 102, as shown in FIG. 802, a delay circuit 803, and a gain stage 804 are added. In FIG. 8, parts having the same configuration as in FIG.

The antenna 101 receives the signal and outputs the signal to the multiplier 103 in the traveling path 805 and the addition junction 801 in the delay path 806.

Addition junction 801 adds the signal input from antenna 101 and the signal input from gain stage 804 and outputs the sum to delay circuit 802.

The delay circuit 802 delays the incoming TR pulse input from the addition junction 801 by the time delay D 1 and outputs the delayed TR pulse to the delay circuit 803 and the multiplier 103.

The delay circuit 803 as the third delay means delays the incoming TR pulse input from the delay circuit 802 by the time delay D 6 and outputs it to the gain stage 804. The delay circuit 803 selects the time delay D6 so as to satisfy the constraint that the time between the time delay D6 and the time delay D1 is equal to the time between two consecutive reference pulses in the TR pulse train. The gain stage 804 as gain control means increases the amplitude of the incoming TR pulse input from the delay circuit 803 by a predetermined gain G, and outputs it to the addition junction 801.

Multiplier 103 multiplies the non-delayed pulse signal input from antenna 101 by the delayed pulse signal input from delay circuit 802 and outputs the result to multiplier 104 in traveling path 111 and delay circuit 105 in delayed path 112. To do. The operation in the comparator and selector unit 107 is the same as that in FIG.

As described above, according to the second embodiment, the noise is separated into a large number of inverters by performing the integration process in the time interval obtained by equally dividing one symbol frame period. Can be made sufficiently small, a higher signal-to-noise ratio can be obtained, and the bit error rate characteristics can be improved. Further, according to the second embodiment, since the two signals of the non-delayed signal and the delayed signal are respectively integrated, even when the integration result of one of the signals is separated into different intervals, either It is highly possible that the integration result of the other signal is not separated into different intervals. In this case, the signal result can be reliably detected, and the timing position can be reliably detected.

Industrial applicability

[0045] The receiving apparatus and the message symbol detection method according to the present invention are suitable for use in impulse radio.

Claims

The scope of the claims

[1] First delay means for delaying one of the received pulses separated into two systems for a predetermined time;

Multiplying means for multiplying the other received pulse of the received pulses separated into the two systems by the received pulse delayed by the first delay means;

Second delay means for delaying one received pulse of the received pulses separated by two systems after being multiplied by the multiplying means for a predetermined time;

L symbol frames of the received pulse that has been multiplied by the multiplying means and then separated into two systems and separated by the second delay means and the received pulse delayed by the second delay means are time-divided into fixed time intervals. Integration processing means for performing integration processing at each time interval, and based on a comparison result between the amplitude of the integration processing result and a threshold value, the integration processing result of the one received pulse separated after multiplication and the second Selection means for selecting one of the integration processing results of the received pulse delayed by the delay means, and output means for detecting and outputting a message symbol from the integration processing result selected by the selection means When,

A receiving apparatus comprising:

[2] Third delay means for delaying one of the received pulses separated into two systems after being delayed by the first delay means;

Gain control means for controlling the gain of the received pulse delayed by the third delay means; Gain control by the one received pulse before being delayed by the first delay means and the gain control means And an addition junction means for adding the received pulses, wherein the first delay means delays the reception pulses added by the addition junction means for a predetermined time,

The multiplying means multiplies the other received pulse of the received pulses separated into two systems by the other received pulse of the received pulse separated into two systems after being delayed by the first delay means. Item 1. The receiving device according to item 1.

[3] The selecting means sums up amplitudes not less than the threshold value among amplitudes of the integration processing results of the one received pulse separated after multiplication, and the second delay means 2. The receiving apparatus according to claim 1, wherein amplitudes equal to or greater than the threshold value are summed out of the amplitudes of the delayed reception pulses, and the sum of the amplitudes is selected.

A step of delaying one of the received pulses separated into two systems by a first delay time;

Multiplying the other received pulse of the received pulses separated into the two systems by the delayed received pulse;

Delaying one received pulse of the received pulses after being multiplied and separated into two systems by a second delay time;

One symbol frame of the other received pulse that has been multiplied and then separated into two systems and the received pulse delayed by the second delay time is divided into time intervals and integrated at each time interval. Processing steps;

Based on the comparison result between the amplitude of the integration processing result and the threshold value, the integration processing result of the one received pulse separated after multiplication and the integration processing result of the received pulse delayed by the second delay time are included. Selecting either one of the following:

Detecting and outputting a message symbol from the selected integration processing result; and

A message symbol detection method comprising: