WO2006082458A8 - Bus arbitration controller with reduced energy consumption - Google Patents

Bus arbitration controller with reduced energy consumption

Info

Publication number
WO2006082458A8
WO2006082458A8 PCT/IB2005/000232 IB2005000232W WO2006082458A8 WO 2006082458 A8 WO2006082458 A8 WO 2006082458A8 IB 2005000232 W IB2005000232 W IB 2005000232W WO 2006082458 A8 WO2006082458 A8 WO 2006082458A8
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
logic
write
energy consumption
reduced energy
Prior art date
Application number
PCT/IB2005/000232
Other languages
French (fr)
Other versions
WO2006082458A1 (en
Inventor
Konstantin Godin
Moshe Anschel
Yacov Efrat
Yacov Rabinovich
Noan Sivan
Ziv Zamsky
Eitan Zmora
Original Assignee
Freescale Semiconductor Inc
Konstantin Godin
Moshe Anschel
Yacov Efrat
Yacov Rabinovich
Noan Sivan
Ziv Zamsky
Eitan Zmora
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc, Konstantin Godin, Moshe Anschel, Yacov Efrat, Yacov Rabinovich, Noan Sivan, Ziv Zamsky, Eitan Zmora filed Critical Freescale Semiconductor Inc
Priority to CNB2005800474416A priority Critical patent/CN100549993C/en
Priority to AT05702383T priority patent/ATE398309T1/en
Priority to DE602005007520T priority patent/DE602005007520D1/en
Priority to PCT/IB2005/000232 priority patent/WO2006082458A1/en
Priority to EP05702383A priority patent/EP1849084B1/en
Priority to US11/815,189 priority patent/US7620760B2/en
Priority to JP2007553719A priority patent/JP2008530647A/en
Priority to TW094145149A priority patent/TW200634539A/en
Publication of WO2006082458A1 publication Critical patent/WO2006082458A1/en
Publication of WO2006082458A8 publication Critical patent/WO2006082458A8/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Bus Control (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

A device that includes: a first bus, connected between a first logic and a first circuit; a group of second buses connected between the first logic and between multiple non-high impedance circuit access logics associated with multiple circuits; wherein each circuit access logic is adapted to: (i) provide to the first logic, a circuit write value during a circuit writing period and during an idle period that follows the circuit writing period and ends when another circuit is allowed to write; and (ii) provide a default value when another circuit is allowed to write; and wherein the first logic is adapted to alter a state of the first bus in response to a change between two consecutive circuit write values.
PCT/IB2005/000232 2005-01-31 2005-01-31 Bus arbitration controller with reduced energy consumption WO2006082458A1 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
CNB2005800474416A CN100549993C (en) 2005-01-31 2005-01-31 Reduce the bus arbitration controller of energy consumption
AT05702383T ATE398309T1 (en) 2005-01-31 2005-01-31 BUS ARBITRATION CONTROL WITH REDUCED ENERGY CONSUMPTION
DE602005007520T DE602005007520D1 (en) 2005-01-31 2005-01-31 BUSARBITRATION CONTROL WITH REDUCED ENERGY CONSUMPTION
PCT/IB2005/000232 WO2006082458A1 (en) 2005-01-31 2005-01-31 Bus arbitration controller with reduced energy consumption
EP05702383A EP1849084B1 (en) 2005-01-31 2005-01-31 Bus arbitration controller with reduced energy consumption
US11/815,189 US7620760B2 (en) 2005-01-31 2005-02-07 Non-high impedence device and method for reducing energy consumption
JP2007553719A JP2008530647A (en) 2005-01-31 2005-02-07 Bus arbitration controller with reduced energy consumption
TW094145149A TW200634539A (en) 2005-01-31 2005-12-19 Non-high impedence device and method for reducing energy consumption

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IB2005/000232 WO2006082458A1 (en) 2005-01-31 2005-01-31 Bus arbitration controller with reduced energy consumption

Publications (2)

Publication Number Publication Date
WO2006082458A1 WO2006082458A1 (en) 2006-08-10
WO2006082458A8 true WO2006082458A8 (en) 2007-09-07

Family

ID=35240905

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2005/000232 WO2006082458A1 (en) 2005-01-31 2005-01-31 Bus arbitration controller with reduced energy consumption

Country Status (8)

Country Link
US (1) US7620760B2 (en)
EP (1) EP1849084B1 (en)
JP (1) JP2008530647A (en)
CN (1) CN100549993C (en)
AT (1) ATE398309T1 (en)
DE (1) DE602005007520D1 (en)
TW (1) TW200634539A (en)
WO (1) WO2006082458A1 (en)

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4375639A (en) * 1981-01-12 1983-03-01 Harris Corporation Synchronous bus arbiter
US4641266A (en) * 1983-11-28 1987-02-03 At&T Bell Laboratories Access-arbitration scheme
US5276886A (en) * 1990-10-11 1994-01-04 Chips And Technologies, Inc. Hardware semaphores in a multi-processor environment
US5148112A (en) * 1991-06-28 1992-09-15 Digital Equipment Corporation Efficient arbiter
US5274785A (en) * 1992-01-15 1993-12-28 Alcatel Network Systems, Inc. Round robin arbiter circuit apparatus
US5555382A (en) * 1992-04-24 1996-09-10 Digital Equipment Corporation Intelligent snoopy bus arbiter
US5875339A (en) * 1993-10-21 1999-02-23 Sun Microsystems, Inc. Asynchronous arbiter using multiple arbiter elements to enhance speed
US5623672A (en) * 1994-12-23 1997-04-22 Cirrus Logic, Inc. Arrangement and method of arbitration for a resource with shared user request signals and dynamic priority assignment
US5651137A (en) * 1995-04-12 1997-07-22 Intel Corporation Scalable cache attributes for an input/output bus
US5692202A (en) * 1995-12-29 1997-11-25 Intel Corporation System, apparatus, and method for managing power in a computer system
FR2797971A1 (en) * 1999-08-31 2001-03-02 Koninkl Philips Electronics Nv ACCESS TO A COLLECTIVE RESOURCE
SE516758C2 (en) * 2000-12-22 2002-02-26 Ericsson Telefon Ab L M Digital bus system
US6952750B2 (en) * 2001-05-04 2005-10-04 Texas Instruments Incoporated Method and device for providing a low power embedded system bus architecture
US6912609B2 (en) * 2002-12-24 2005-06-28 Lsi Logic Corporation Four-phase handshake arbitration

Also Published As

Publication number Publication date
TW200634539A (en) 2006-10-01
CN101111829A (en) 2008-01-23
EP1849084A1 (en) 2007-10-31
WO2006082458A1 (en) 2006-08-10
ATE398309T1 (en) 2008-07-15
US20080140894A1 (en) 2008-06-12
US7620760B2 (en) 2009-11-17
CN100549993C (en) 2009-10-14
DE602005007520D1 (en) 2008-07-24
EP1849084B1 (en) 2008-06-11
JP2008530647A (en) 2008-08-07

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