WO2006077155A1 - Printed circuit board, printed circuit module and method for producing a printed circuit board - Google Patents

Printed circuit board, printed circuit module and method for producing a printed circuit board Download PDF

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Publication number
WO2006077155A1
WO2006077155A1 PCT/EP2006/000567 EP2006000567W WO2006077155A1 WO 2006077155 A1 WO2006077155 A1 WO 2006077155A1 EP 2006000567 W EP2006000567 W EP 2006000567W WO 2006077155 A1 WO2006077155 A1 WO 2006077155A1
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WO
WIPO (PCT)
Prior art keywords
printed circuit
circuit board
metal layer
layers
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2006/000567
Other languages
French (fr)
Inventor
Simon Albert
Jörg KINDERMANN
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Infineon Technologies AG
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Infineon Technologies AG
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Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of WO2006077155A1 publication Critical patent/WO2006077155A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/20Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/183Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components mounted in and supported by recessed areas of the PCBs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/682Shapes or dispositions thereof comprising holes having chips therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/685Shapes or dispositions thereof comprising multiple insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

Definitions

  • the present invention is related to printed circuit boards, in particular to multi-layer printed circuit boards.
  • the present invention is further related to a method for producing such a printed circuit board and a printed circuit module comprising a printed circuit board and an integrated device attached thereon.
  • the propagation of electromagnetic signals on signal lines depends on the dielectric environment of the respective signal line, the signal propagation on signal lines of outer metal layers of a printed circuit board (PCB) is usually faster than the signal propagation of the signal lines of inner metal layers of the printed circuit board.
  • the propagation delay, i.e. skew, of a plurality of signals e.g., in bus systems
  • the length of the signal lines on the outer metal layers has to be designed longer than the signal lines in the inner metal to equalize the propagation delays on different signal lines.
  • a printed circuit board comprising one inner metal layer sandwiched between a first insulating layer and a second insulating layer, wherein the inner metal layer is structured to comprise a conductive path and a bond pad and wherein the first insulating layer includes a recess for receiving an integrated device.
  • the bond pad of the inner metal layer is located in the recess.
  • the printed circuit board comprises a recess which is formed within the first insulating layer so that the bond pad of the inner metal layer is revealed and can be contacted by respective contacting solder balls of an electronic device.
  • the signal paths are completely located within the inner metal layer so that no signal path has to be provided on an outer metal layer of the printed circuit board.
  • At least one outer surface of the printed circuit board carries an outer metal layer.
  • the outer metal layer may be arranged to substantially cover the surface of at least one of the first and the second insolating layers to provide shielding.
  • a connection port to be connected by a supply voltage may be provided on the outer metal layer.
  • a plurality of inner metal layers in the printed circuit board may be provided, each separated by interposing insulating layers, wherein each inner metal layer comprises a conductive path wherein at least one interconnection via between two inner metal layers is provided.
  • a printed circuit board comprising a plurality of printed circuit board elements (PCB elements), each PCB element including an insulating layer having metal layers on both sides, wherein the PCB elements are sandwiched by means of a further insulating layer to form the printed circuit board.
  • At least one of the metal layers is structured to comprise a conductive path and a bond pad wherein the structured metal layer is an inner metal layer of the printed circuit board formed by the PCB elements.
  • a recess is provided in at least one of the outer PCB elements of the printed circuit board which uncovers the bond pad of the structured inner metal layer.
  • a method for producing a printed circuit board comprises providing two insulating layers, providing a metal layer in between the two insulating layers, wherein the metal layer is structured to comprise a conductive path and a bond pad, and structuring at least one of the insulating layers to include a recess in the insulating layer so that the bond pad is uncovered wherein the recess is formed to receive an electronic device.
  • the method may be adapted to produce a printed circuit board wherein the conductive paths are led in an inner metal layer so that the dielectric environment of all conductive paths is similar. This reduces the skew of different signals on different signal paths in the printed circuit board (provided that the signal paths all have the same lengths).
  • At least one of the insolating layers is covered with an outer metal layer as a shielding.
  • a method for producing a printed circuit board comprising providing a first printed circuit board element and a second printed circuit board element, each comprising two metal layers arranged on both sides of an insulating layer, structuring at least one of the metal layers of at least one of the first and second PCB elements to comprise a conductive path and a bond pad, binding the two PCB elements by interposing a further insulating layer such that the structured metal layer is in contact with the interposed further insulation layer, and structuring at least one of the outer surfaces of the bonded PCB elements to include a recess in the insulating layer so that the bond pad of the structured metal layer is revealed.
  • a printed circuit module comprising a printed circuit board having a recess in an insulating layer so that a bond pad of an inner metal layer is revealed and an integrated device having a bond port to provide an electrical connection to an electronic device, wherein the electronic device is introduced into the recess of the printed circuit board and wherein the bond port is electrically connected to the bond pad of the printed circuit board.
  • Figure 1 is a cross-sectional view of a part of a printed circuit board according to one embodiment of the present invention.
  • Figure 2 is a perspective view of a printed circuit board according to one embodiment of the present invention.
  • a multi-layer printed circuit board 1 is depicted.
  • the multi-layer printed circuit board 1 comprises two inner metal layers 2 and two outer metal layers 3 disposed on respective outer surfaces of the printed circuit board 1.
  • Each of the inner and outer metal layers 2, 3 is separated from the other by an insulation layer 4.
  • the insulation layer 4 comprises a material usually used for producing printed circuit boards, such as a resin and the like, providing good dielectric characteristics such as a high resistance.
  • the outer metal layers are usually structured to provide conductive paths and/or bond pads to be connected with integrated or non-integrated electronic devices attached on the printed circuit board.
  • Such a multi-layer printed circuit board 1 can be manufactured by different methods. According to one method, a number of printed circuit board elements (PCB elements) PCB 1 , PCB 2 are manufactured separately which are joined by means of a further insulation layer arranged in between two PCB elements. The PCB element PCBi, PCB 2 can be fixedly joined by laminating, adhering and/or other similar techniques to produce a single body printed circuit board 1.
  • PCB elements printed circuit board elements
  • a first PCB element PCBi is formed by the upper two metal layers and the insulating layer 4 arranged in between and is indicated by the reference PCBi.
  • a second PCB element PCB 2 is formed by the lower two metal layers and the insulating layer arranged in between and is indicated by the reference PCB 2 .
  • a further insulating layer arranged between the first PCB element PCBi and the second PCB element PCB 2 is indicated by the reference IL.
  • PCB elements each comprising a metal layer sandwiched between a first insulating layer and a second insulating layer, are arranged on both surfaces of the intermediate metal layer.
  • a printed circuit board may be formed. It may be useful to arrange a further metal layer between two neighboured PCB elements, but not necessarily.
  • the printed circuit board 1 of Figure 1 has a recess 5, substantially the size of an electronic device, reaching from one outer surface of the printed circuit board 1 to one of the inner metal layers 2.
  • the inner metal layers 2 are structured and normally comprise conductive paths and, at least in the area of the recess, bond pads 6 to be connected by means of a bonding process with an electronic device.
  • the outer surface of the printed circuit board 1 is covered by the outer metal layer 3.
  • the outer metal layer 3 may be structured to not provide a shielding for electromagnetic radiation.
  • a connection element is provided on the outer surface of the printed circuit board 1 to connect the outer metal layer 3, for example, to a pre-determined potential.
  • FIG. 2 a perspective view of the multi-layer printed circuit board 1 is shown. Furthermore, the recess 5 is depicted in a size of an integrated circuit packaged as a Ball Grid Array 7 (BGA) having solder balls 8 on its lower side.
  • the integrated circuit may be received in the recess 5.
  • the recess 5 may be at least the size of the package of the integrated circuit, and the bond pad 6 structured in the inner metal layer 2 revealed by the recess 5 is interconnected with respective conductive paths and/or respective vias to other inner metal layers 2 and arranged so that the solder balls 8 of the integrated circuit package are facing the bond pads 6 provided in the correct orientation of the Ball Grid Array.
  • the signal propagation on the signalling paths may be substantially constant so that the skew between different signals, e.g., in a bus system, may be minimized by providing that the bus lines all have the same length.
  • the propagation delay of the signal path in the inner metal layers 2 is substantially constant per length since the dielectric environment of the signal paths is substantially constant.
  • conductive vias may be provided to connect signal paths on different metal layers, in the latter case, the outer metal layers 3 may be utilized as voltage supply planes, such as a ground plane or a supply voltage VDD plane.
  • the forming of the recess 5 may be performed in the manufacturing process of the bonded circuit boards as the insulating layer between the outer metal layer 3 and the inner metal layer 2 are produced by using an insolating foil, e.g., a prepreg foil on which the metal layers are pressed to fix the metal layers on the surface of the insulation layer.
  • an insolating foil e.g., a prepreg foil on which the metal layers are pressed to fix the metal layers on the surface of the insulation layer.
  • the prepreg foil may be formed, e.g., in a die cutting process, to insert the recesses for the electronic devices to be attached to the printed circuit board.
  • the accuracy of positioning the electronic devices may be further increased, thereby increasing the yield of manufacturing of printed circuit board modules.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

One embodiment of the present invention relates to a printed circuit board comprising one inner metal layer sandwiched between a first and a second insulating layers, wherein the inner metal layer is structured to comprise a conductive path and a bond pad, wherein the first insulating layer includes a recess for receiving an integrated device, wherein the bond pad of the inner metal layer is located in the recess.

Description

PRINTED CIRCUIT BOARD, PRINTED CIRCUIT MODULE AND METHOD FOR
PRODUCING A PRJNTED CIRCUIT BOARD
BACKGROUND OF THE INVENTION Field of the Invention
[0001] The present invention is related to printed circuit boards, in particular to multi-layer printed circuit boards. The present invention is further related to a method for producing such a printed circuit board and a printed circuit module comprising a printed circuit board and an integrated device attached thereon.
Description of the Related Art
[0002] Since the propagation of electromagnetic signals on signal lines depends on the dielectric environment of the respective signal line, the signal propagation on signal lines of outer metal layers of a printed circuit board (PCB) is usually faster than the signal propagation of the signal lines of inner metal layers of the printed circuit board. In printed circuit boards and modules designed for high- frequency signalling, the propagation delay, i.e. skew, of a plurality of signals (e.g., in bus systems) has to be substantially small. To achieve this, the length of the signal lines on the outer metal layers has to be designed longer than the signal lines in the inner metal to equalize the propagation delays on different signal lines. This consumes more space (with constant size of a printed circuit board) and decreases the available area for integrated devices to be attached on the printed circuit board. Furthermore, the electrical characteristics, such as the signal integrity of the printed circuit board, degrade due to an increasing crosstalk of neighboured signal lines.
[0003] As in conventional printed circuit modules in which the outer metal layer provides the contact pads for electrically contacting the integrated devices to be attached thereon, a shift of the signal lines to inner metal layers would substantially increase the number of the required vias in close proximity to the integrated devices and thus increase the number of required metal layers for contacting all device pins or require costly technologies such as the provision of blind or buried vias. [0004] Therefore, there is a need to provide a printed circuit board with improved electrical properties and with a reduced number of conductive vias. Furthermore, there is a need to provide a printed circuit module with improved electrical properties.
SUMMARY OF THE INVENTiON
[0005] According to a first aspect of the present invention, a printed circuit board is provided comprising one inner metal layer sandwiched between a first insulating layer and a second insulating layer, wherein the inner metal layer is structured to comprise a conductive path and a bond pad and wherein the first insulating layer includes a recess for receiving an integrated device. The bond pad of the inner metal layer is located in the recess.
[0006] In one embodiment, the printed circuit board comprises a recess which is formed within the first insulating layer so that the bond pad of the inner metal layer is revealed and can be contacted by respective contacting solder balls of an electronic device. The signal paths are completely located within the inner metal layer so that no signal path has to be provided on an outer metal layer of the printed circuit board. Thus, the skew of a plurality of synchronized signals, e.g., in a bus system, may be decreased just by maintaining identical signal path length as each signal path has the same dielectric environment.
[0007] According to a further embodiment of the present invention, at least one outer surface of the printed circuit board carries an outer metal layer. The outer metal layer may be arranged to substantially cover the surface of at least one of the first and the second insolating layers to provide shielding. Furthermore, a connection port to be connected by a supply voltage may be provided on the outer metal layer.
[0008] A plurality of inner metal layers in the printed circuit board may be provided, each separated by interposing insulating layers, wherein each inner metal layer comprises a conductive path wherein at least one interconnection via between two inner metal layers is provided.
[0009] According to another aspect of the present invention, a printed circuit board is provided comprising a plurality of printed circuit board elements (PCB elements), each PCB element including an insulating layer having metal layers on both sides, wherein the PCB elements are sandwiched by means of a further insulating layer to form the printed circuit board. At least one of the metal layers is structured to comprise a conductive path and a bond pad wherein the structured metal layer is an inner metal layer of the printed circuit board formed by the PCB elements. A recess is provided in at least one of the outer PCB elements of the printed circuit board which uncovers the bond pad of the structured inner metal layer.
[0010] According to another aspect of the present invention, a method for producing a printed circuit board is provided. The method comprises providing two insulating layers, providing a metal layer in between the two insulating layers, wherein the metal layer is structured to comprise a conductive path and a bond pad, and structuring at least one of the insulating layers to include a recess in the insulating layer so that the bond pad is uncovered wherein the recess is formed to receive an electronic device.
[0011] The method may be adapted to produce a printed circuit board wherein the conductive paths are led in an inner metal layer so that the dielectric environment of all conductive paths is similar. This reduces the skew of different signals on different signal paths in the printed circuit board (provided that the signal paths all have the same lengths).
[0012] According to a further embodiment of the present invention, at least one of the insolating layers is covered with an outer metal layer as a shielding.
[0013] According to a further aspect of the present invention, a method for producing a printed circuit board is provided comprising providing a first printed circuit board element and a second printed circuit board element, each comprising two metal layers arranged on both sides of an insulating layer, structuring at least one of the metal layers of at least one of the first and second PCB elements to comprise a conductive path and a bond pad, binding the two PCB elements by interposing a further insulating layer such that the structured metal layer is in contact with the interposed further insulation layer, and structuring at least one of the outer surfaces of the bonded PCB elements to include a recess in the insulating layer so that the bond pad of the structured metal layer is revealed.
[00143 According to another aspect of the present invention, a printed circuit module is provided comprising a printed circuit board having a recess in an insulating layer so that a bond pad of an inner metal layer is revealed and an integrated device having a bond port to provide an electrical connection to an electronic device, wherein the electronic device is introduced into the recess of the printed circuit board and wherein the bond port is electrically connected to the bond pad of the printed circuit board.
BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Preferred embodiments of the present invention are further explained in more detail with reference to the accompanying drawings, in which:
[0016] Figure 1 is a cross-sectional view of a part of a printed circuit board according to one embodiment of the present invention; and
[0017] Figure 2 is a perspective view of a printed circuit board according to one embodiment of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
[0018] In Figure 1 , a multi-layer printed circuit board 1 is depicted. As shown, the multi-layer printed circuit board 1 comprises two inner metal layers 2 and two outer metal layers 3 disposed on respective outer surfaces of the printed circuit board 1. Each of the inner and outer metal layers 2, 3 is separated from the other by an insulation layer 4. The insulation layer 4 comprises a material usually used for producing printed circuit boards, such as a resin and the like, providing good dielectric characteristics such as a high resistance.
[0019] In prior art printed circuit boards, the outer metal layers are usually structured to provide conductive paths and/or bond pads to be connected with integrated or non-integrated electronic devices attached on the printed circuit board. [0020] Such a multi-layer printed circuit board 1 can be manufactured by different methods. According to one method, a number of printed circuit board elements (PCB elements) PCB1, PCB2 are manufactured separately which are joined by means of a further insulation layer arranged in between two PCB elements. The PCB element PCBi, PCB2 can be fixedly joined by laminating, adhering and/or other similar techniques to produce a single body printed circuit board 1.
[0021] As shown in Figure 1 , a first PCB element PCBi is formed by the upper two metal layers and the insulating layer 4 arranged in between and is indicated by the reference PCBi. A second PCB element PCB2 is formed by the lower two metal layers and the insulating layer arranged in between and is indicated by the reference PCB2. A further insulating layer arranged between the first PCB element PCBi and the second PCB element PCB2 is indicated by the reference IL.
[0022] As another method for producing such a multi-layer printed circuit board, PCB elements, each comprising a metal layer sandwiched between a first insulating layer and a second insulating layer, are arranged on both surfaces of the intermediate metal layer. By combining a plurality of such PCB elements, a printed circuit board may be formed. It may be useful to arrange a further metal layer between two neighboured PCB elements, but not necessarily.
[0023] The printed circuit board 1 of Figure 1 has a recess 5, substantially the size of an electronic device, reaching from one outer surface of the printed circuit board 1 to one of the inner metal layers 2. The inner metal layers 2 are structured and normally comprise conductive paths and, at least in the area of the recess, bond pads 6 to be connected by means of a bonding process with an electronic device. According to one embodiment, as shown in Figure 1 , the outer surface of the printed circuit board 1 is covered by the outer metal layer 3. The outer metal layer 3 may be structured to not provide a shielding for electromagnetic radiation. A connection element is provided on the outer surface of the printed circuit board 1 to connect the outer metal layer 3, for example, to a pre-determined potential.
[0024] In Figure 2, a perspective view of the multi-layer printed circuit board 1 is shown. Furthermore, the recess 5 is depicted in a size of an integrated circuit packaged as a Ball Grid Array 7 (BGA) having solder balls 8 on its lower side. The integrated circuit may be received in the recess 5. The recess 5 may be at least the size of the package of the integrated circuit, and the bond pad 6 structured in the inner metal layer 2 revealed by the recess 5 is interconnected with respective conductive paths and/or respective vias to other inner metal layers 2 and arranged so that the solder balls 8 of the integrated circuit package are facing the bond pads 6 provided in the correct orientation of the Ball Grid Array.
[0025] Thereby, all signalling paths to and from the electronic integrated device are located inside of the printed circuit board 1 and formed from the structured inner metal layer 2. In the case of a plurality of signal lines, the signal propagation on the signalling paths may be substantially constant so that the skew between different signals, e.g., in a bus system, may be minimized by providing that the bus lines all have the same length. The propagation delay of the signal path in the inner metal layers 2 is substantially constant per length since the dielectric environment of the signal paths is substantially constant. Between two inner metal layers 2, as well as between one outer metal layer 3 and one inner metal layer 2, conductive vias may be provided to connect signal paths on different metal layers, in the latter case, the outer metal layers 3 may be utilized as voltage supply planes, such as a ground plane or a supply voltage VDD plane.
[0026] The forming of the recess 5 may be performed in the manufacturing process of the bonded circuit boards as the insulating layer between the outer metal layer 3 and the inner metal layer 2 are produced by using an insolating foil, e.g., a prepreg foil on which the metal layers are pressed to fix the metal layers on the surface of the insulation layer. Before pressing the metal layers, the prepreg foil may be formed, e.g., in a die cutting process, to insert the recesses for the electronic devices to be attached to the printed circuit board.
[0027] By means of the preformed recesses 5 for placing the electronic devices, the accuracy of positioning the electronic devices may be further increased, thereby increasing the yield of manufacturing of printed circuit board modules.
[0028] While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

WHAT SS CLAIMED IS:
1. An apparatus, comprising: a printed circuit board comprising an inner metal layer disposed between a first insulating layer and a second insulating layer, wherein the inner metal layer is structured to comprise a conductive path and a bond pad, wherein the first insulating layer includes a recess for receiving an electronic device, and wherein the bond pad of the inner metal layer is located in the recess.
2. The apparatus of claim 1 , further comprising: an outer metal layer disposed on at least one outer surface the printed circuit board.
3. The apparatus of claim 2, wherein the outer metal layer includes a connection port connectable to a supply voltage.
4. The apparatus of claim 2, wherein the outer metal layer is arranged to substantially cover a surface of at least one of the first and second insulating layers to provide shielding.
5. The apparatus of claim 1 , wherein a plurality of inner metal layers are provided, each separated by interposing insulating layers, wherein each of the inner metal layers comprises a respective conductive path.
6. The apparatus of claim 5, further comprising: at least one interconnection via disposed between two neighboured inner metal layers.
7. The apparatus of claim 1 , further comprising: the electronic device having a bond port providing an electrical connection to the electronic device, wherein the electronic device is coupled into the recess of the printed circuit board, wherein the bond port is electrically connected to the bond pad of the printed circuit board, and wherein the printed circuit board and the electronic device together form a printed circuit module.
8. The apparatus of claim 7, further comprising: an outer metal layer disposed on 'at least one outer surface the printed circuit board, wherein the outer metal layer includes a connection port connectable to a supply voltage.
9. The apparatus of claim 7, wherein a plurality of inner metal layers are provided, each separated by interposing insulating layers, wherein each of the inner metal layers comprises a respective conductive path, and further comprising at least one interconnection via disposed between two neighboured inner metal layers.
10. An apparatus, comprising: a printed circuit board comprising: a plurality of PCB elements, each PCB element including an insulating layer having a respective metal layer disposed on both sides of the insulating layer; and a further insulating layer sandwiched between respective adjacent PCB elements; wherein at least one of the metal layers is a structured metal layer comprising a conductive path and a bond pad, the structured metal layer disposed as an inner metal layer of the printed circuit board, and wherein a recess is provided in an outer metal layer of at least one PCB element of the printed circuit board, the recess providing an opening to the bond pad of the structured inner metal layer.
11. The apparatus of claim 10, wherein the outer metal layer includes a connection port connectable to a supply voltage.
12. The apparatus of claim 10, wherein at least one outer metal layer is arranged to substantially cover a surface of the respective insulating layer of the respective PCB element to provide shielding.
13. The apparatus of claim 10, wherein a plurality of inner metal layers are provided, each separated by interposing insulating layers, wherein each of the inner metal layers comprises a respective conductive path.
14. The apparatus of claim 13, further comprising: at least one interconnection via disposed between two neighboured inner metal layers.
15. The apparatus of claim 10, further comprising: an electronic device having a bond port providing an electrical connection to the electronic device, wherein the electronic device is coupled into the recess of the printed circuit board, wherein the bond port is electrically connected to the bond pad of the printed circuit board, and wherein the printed circuit board and the electronic device together form a printed circuit module.
16. A method for producing a printed circuit board, comprising: providing two insulating layers; providing a metal layer between the two insulating layers, wherein the metal layer is structured to comprise a conductive path and a bond pad; and structuring at least one of the insulating layers to include a recess in the insulating layer for receiving an electronic device, wherein the bond pad is uncovered where the recess is formed.
17. The method of claim 16, further comprising: covering at least one of the insulating layers with an outer metal layer as a shielding layer.
18. A method for producing a printed circuit board (PCB), comprising: providing a first PCB element and a second PCB element, each comprising two metal layers arranged respectively on both sides of an insulating layer; structuring at least one of the metal layers of at least one of the first and second PCB elements to comprise a conductive path and a bond pad;; binding the two PCB elements by interposing a further insulating layer, such that the structured metal layer isj in contact with the interposed further insulation layer; and structuring at least one outer surface of the bonded PCB elements to include a recess through a respective outer metal layer and the respective insulating layer such that the bond pad of the structured metal layer is revealed.
19. The method of claim 18, wherein at least one of the insulating layers is provided with a conductive via to interconnect two neighboured metal layers of the printed circuit board.
20. The method of claim 18, wherein the further insulating layer is provided with a conductive via to interconnect two neighboured metal layers of the printed circuit board.
PCT/EP2006/000567 2005-01-24 2006-01-23 Printed circuit board, printed circuit module and method for producing a printed circuit board Ceased WO2006077155A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/041,536 US20060162957A1 (en) 2005-01-24 2005-01-24 Printed circuit board, printed circuit module and method for producing a printed circuit board
US11/041,536 2005-01-24

Publications (1)

Publication Number Publication Date
WO2006077155A1 true WO2006077155A1 (en) 2006-07-27

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PCT/EP2006/000567 Ceased WO2006077155A1 (en) 2005-01-24 2006-01-23 Printed circuit board, printed circuit module and method for producing a printed circuit board

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US (1) US20060162957A1 (en)
TW (1) TW200628038A (en)
WO (1) WO2006077155A1 (en)

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US8007291B1 (en) * 2010-10-15 2011-08-30 International Business Machines Corporation Implementing differential signal circuit board electrical contact
CN102866279A (en) * 2011-07-04 2013-01-09 新科实业有限公司 Current sensor device
US9627739B2 (en) * 2012-06-19 2017-04-18 Alcatel Lucent System for coupling printed circuit boards
KR20160099381A (en) * 2015-02-12 2016-08-22 삼성전기주식회사 Printed circuit board and method of mamufacturing the same
WO2017211402A1 (en) 2016-06-08 2017-12-14 Arcelik Anonim Sirketi An improved printed circuit board surface mount hole connection structure

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US6121679A (en) * 1998-03-10 2000-09-19 Luvara; John J. Structure for printed circuit design
US20030080819A1 (en) * 2001-10-31 2003-05-01 Mekell Jiles Cavity design printed circuit board for a temperature compensated crystal oscillator and a temperature compensated crystal oscillator employing the same
US20040246689A1 (en) * 2003-06-03 2004-12-09 Espinoza-Ibarra Ricardo E. Apparatus and method for mounting a surface mount component in an etched well in a printed circuit board
WO2006042471A1 (en) * 2004-10-20 2006-04-27 Huawei Technologies Co., Ltd. Printed circuit board and method of manufacturing the same

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TW200628038A (en) 2006-08-01

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