WO2006030746A1 - Semiconductor light-emitting element - Google Patents

Abstract

The drive current of a semiconductor light-emitting element is controlled by the depletion region produced in the semiconductor light-emitting element. [MEANS FOR SOLVING PROBLEMS] A semiconductor light-emitting element has at least a substrate crystal (1), an active layer (3), and a junction part (A). The junction part (A) is disposed near the active layer (3) at a distance within, e.g., 3μm. In the junction part (A), a depletion region (B) for limiting the flow of the carriers to the active layer (3) is produced. The junction part (A) is composed of the junction between a gate region (16) of a second conductivity type and a control region (14) of a first conductivity type. When a third electrode (18) is connected to the gate region (16), the magnitude of the drive current can be controlled by the voltage applied to the third electrode.

Description

 Semiconductor light emitting device

 Technical field

 [0001] The present invention relates to a semiconductor light emitting device.

 Background art

 [0002] FIGS. 1A to 1E are diagrams showing a cross-sectional structure of main parts of a conventional semiconductor laser. In the description of these lasers, basically the same reference numerals are assigned to the common elements to simplify the description.

 [0003] (Conventional example 1)

 Figure 1 (a) shows the structure of a semiconductor laser, generally called the buried stripe type, used in the 1.3 m wavelength band. This semiconductor laser includes a substrate crystal 1, a lower cladding layer 2, an active layer 3, and an upper cladding layer 4 as main components. A lower electrode 6 is attached to the lower surface of the substrate crystal 1. An upper electrode 7 is attached to the upper surface of the upper cladding layer 4 via a low resistance layer 5! /.

 In this semiconductor laser, after the active layer 3 is sandwiched between the upper cladding layer 4 and the lower cladding layer 2, it is etched narrowly to a width of 1.8 m or less and about 1.6 m. Thereafter, a current blocking layer 8 is grown on the side surface to concentrate the current in this region and prevent the side surface from being exposed to air. The current blocking layer 8 has a high resistance, or has a pn junction inside, and is devised so that current does not flow inside it!

[0005] In general, the oscillation transverse mode is determined by a waveguide mechanism, and there are a refractive index waveguide and a gain waveguide. This buried stripe type laser is a typical type called a refractive index guided type, and the stripe width must be narrowed to about 1.6 m as described above in order to block higher-order transverse modes. In general, the allowable value of the stripe width is narrow, for example, about ± 0.2 m. For this reason, careful attention and management are required for etching. In addition, since the refractive index changes discontinuously at the interface between the stripe portion and the current blocking layer, the unevenness on the etched side surface greatly affects the light scattering loss, and characteristics such as laser threshold, efficiency, and far-field image. Affects. [0006] The threshold of this type of semiconductor laser is a force that can be sufficiently reduced to about 2mA at room temperature. The operating current is usually about 15 to 25mA, and it is not possible to modulate the semiconductor laser by directly connecting the output of a general digital circuit. I can't. In general, it is necessary to separately drive a drive circuit that combines a S-to-Bip transistor, HBT or GaAs-FET, or a combination of these, and drive it through this.

 [0007] Furthermore, the etched crystal cannot be restored naturally, and the width cannot be adjusted after the device is manufactured. Even if this stripe region, that is, a laser waveguide is branched into a Y-shape to try to give another function, it must first be etched into a ridge before embedding. Etching grooves are difficult to enter on the inside. Even if the part should be two waveguides, a single wide waveguide continues for a while and the space between the two waveguides reaches a certain width. It is normal that etching progresses suddenly and becomes two. This is because, in both resist pattern formation and etching, it is difficult to change the reactive material in a narrow area and the reaction does not proceed, and in many etchings, the reaction rate differs depending on the elements constituting the crystal. This is because the (1,1,1,) plane is easy to appear in terms of the crystal plane index, and this plane is inclined 54.5 degrees with respect to the (1,0,0,) principal plane. The Further, at the stage of the burying growth, the growth of the crotch portion is difficult because the replacement of the gas melt is difficult as in the case of the etching. Relationship between crystal anisotropy during etching and growth mechanism during current block layer growth Especially, to minimize loss, the narrower the crotch angle, the more difficult it was to form a Y branch. .

 [0008] (Conventional example 2)

Figure 1 (b) shows the structure of a laser generally used as the SBA type used in the 0.78 m wavelength band. To obtain this structure, first, a p-GaAs layer having a carrier density of 1 to 4xl0 ¹⁸ cm- ³ is grown on the substrate crystal 1 having n-GaAs force by about 1 μm. Then, the p-GaAs layer is masked and etched into a groove shape having a width of about 2.5 m, whereby the current blocking layer 8 can be obtained. As a result, the top surface of the substrate crystal 1 is exposed at the bottom of the groove as shown in FIG. (B), and an nA aAs layer (lower cladding layer 2) with a carrier density of 2 to 4xl0 ¹⁷ cm- ³ is formed on the upper surface. Layer 3, upper cladding layer 4 made of p-AlGaAs, and low resistance layer 5 made of p ⁺ -GaAs are formed in this order. Thereafter, after forming the upper electrode 7, the substrate crystal 1 is polished to an appropriate thickness to form the lower electrode 6. This wafer After cleaving to form resonant end faces, appropriate dielectric films are deposited on both end faces, and then separated into individual chips and assembled on a suitable header or submount.

 [0009] In this type of laser, if a current is passed with the upper electrode being positive and the lower electrode being negative, a laser oscillation occurs in the active layer 3 in the groove-shaped portion provided in the current blocking layer 8 at a current exceeding the threshold value. Happens. This is because the upper and lower sides of the current blocking layer 8 are n-type layers and are npn when viewed vertically, and the current does not flow because the lower cladding layer 2 and the current blocking layer 8 are in a reverse nose state. The current concentrates in the groove portion without the current blocking layer 8, and the fundamental transverse mode oscillation is exhibited in the active layer 3 at the bottom of the narrow groove.

 [0010] This type of laser can obtain characteristics with an oscillation threshold of about 20 mA in a relatively simple process, and it seems that the threshold can be further lowered by optimizing the end face reflectivity and the resonator length. However, the electrical resistance of the lower cladding layer 2 is relatively low, the leakage current that flows through the lower cladding layer 2 cannot be ignored, the current blocking layer 8 is floating and the groove where laser oscillation occurs Since the current blocking layer 8 absorbs the oscillation light, it is considered that the electrons generated by the absorption reduce the barrier effect of the current blocking layer 8, and that there is a limit to the iso-low threshold value. There was no improvement.

 [0011] (Conventional example 3)

 Figure 1 (c) shows the structure of a semiconductor laser generally used in the 1.3 m wavelength band, commonly called the ridge stripe type. In this laser, the active layer 3 is sandwiched between the upper cladding layer 4 and the lower cladding layer 2, and the upper cladding layer 4 is etched to a width of 1.8 μm or less and about 1.6 m at a position immediately above the active layer 3. After that, after forming the upper electrode 7 and polishing the substrate crystal 1 to an appropriate thickness, after forming the lower electrode 6 and heat-treating the wafer, a resonator end face is formed by cleaving, and the end face is appropriate A dielectric protective film and a dielectric film for reflectance control are formed into a laser chip.

[0012] As described above, the waveguide mechanism includes a refractive index waveguide and a gain waveguide, but this wedge-type laser is another example of a type called a refractive index guided type. In order to block the transverse mode, the ridge width must be narrowed to about 1.6 m as described above. In general, the allowable width of this ridge is also narrow, for example, about ± 0.2 m. For this reason, careful attention and management are required for etching. In addition, as with the embedded stripe type described above, Since the refractive index changes discontinuously at the interface between the wedge and other parts, that is, the air interface, the unevenness on the etched side surface greatly affects the light scattering loss, and the laser threshold, efficiency, far-field image, etc. Affects the characteristics of

 In this type of semiconductor laser, the injection current is diffused and dissipated in the upper cladding layer 4 and the active layer 3 while reaching the active layer 3 from the ridge portion. For this reason, the threshold value is inferior to that of the buried stripe type, but it can still be relatively low at around 6 mA at room temperature. The operating current is normally about 25 to 35 mA, and the need for a separate drive circuit is basically the same as the embedded stripe type. The driving transistor must be able to withstand the higher driving current required! /.

 [0014] Furthermore, the point that it is difficult to form a Y-branch is the same as the above-mentioned embedded stripe type.

[0015] (Conventional example 4)

 Figure 1 (d) shows the cross-sectional structure of an 850-band laser called a surface-emitting type (VCSEL). In this laser, the active layer 3 and the AlAs layer 9 are sandwiched between the upper cladding layer 4 and the lower cladding layer 2, and further sandwiched between the lower DBR (distributed Bragg reflector) 10 and the upper DBR 11. Further, after forming the upper electrode 7 having a window 7a for extracting light, etching is performed around the window 7a, leaving a circular mesa region having a diameter of about, and the lower electrode 6 is formed. By treating the exposed AlAs layer 9 in high-temperature steam and oxidizing it, the peripheral part of the AlAs layer 9 is made insulating and acts as a current restrictor, and the current path has a diameter of 5-10 / ζ πι. The laser is configured by limiting the range.

[0016] In consideration of the electrical resistance of the upper electrode 7 and the window opening process, the larger the diameter of the circular mesa region, the easier the force and the higher the yield. However, when the AlAs layer 9 is also oxidized by the peripheral force, the diameter of the central part that is finally left is about 5 m. For this purpose, if the diameter of the circular mesa region is large, the region to be oxidized becomes wide and control becomes difficult. If the diameter of the circular mesa region is larger than 10 / zm, it is difficult to emit light uniformly in the circular part, and the light emission state becomes a crown shape with strong light emission in the peripheral part. Also, in the processing process, if the AlAs layer 9 is excessively oxidized, the oxidized layer cannot be returned to its original state, resulting in a defective product. In other words, the processing process for this type of laser is poorly controlled. The surface emitting laser (VCSEL) thus produced has an oscillation threshold of about 1.5 mA and an operating current of 5 to 10 mA. The oscillation transverse mode is determined by the shape and size of the light emitting portion. However, as described above, it is difficult to control the size and shape of the light emitting portion with a high yield, and the mode is generally multimode. Therefore, the optical fiber to be used is a multimode fiber with a large core diameter, and coupled with the small output, the transmission distance of the output light is limited to a maximum of about 500 m.

 FIG. 1 (e) shows a structure in which the current aperture of the surface emitting laser described in FIG. 1 (d) is diverted to the ridge stripe laser described in FIG. 1 (c). After the AlAs layer 9 is disposed on the active layer 3 and the ridge formation etching described in the explanation of Fig. (C) is performed, the AlAs layer 9 is placed on the left and right sides of the ridge as described in Fig. The structure is narrower than the ridge width by using a strong acid to narrow the current to the region. For example, the ridge width is set to, and the gap or current path of the oxide current restrictor is set to 1.5 m. The refractive index waveguide width determined by the ridge is 4 m, and the primary and secondary modes are allowed. However, although it is thin, both ends of the AlAs layer 9 are oxidized so that the effective refractive index distribution perceived by the light in the active layer 3 is slightly lower in the refractive index in the peripheral part where the diaphragm is located than in the central part. . That is, it has a function of refractive index guiding. Furthermore, since the current density at a part of the current inlet is high, the carrier density is correspondingly high, and the gain is high accordingly. In other words, it also has a function of gain guiding. Due to these effects, this type of laser can maintain the fundamental mode oscillation even at tens of mW or more.

 [0019] Considering the yield when manufacturing this structure, the yield of ridge etching and the yield of leaving the AlAs layer 9 from the periphery to leave 1.5 ± 0.2 m finally are considered. It is necessary to control the machining process.

 [0020] Furthermore, the crystal once etched cannot be restored naturally, and there is no room for adjusting the width after the device is manufactured. Even if this stripe region, that is, the laser waveguide is branched to give another function, processing inside the crotch of the branch portion during patterning and etching is performed as in the above-described embedded stripe type and ridge stripe type. However, it was difficult to form a branch with a small loss, which was difficult, so it was not possible to form a Y branch.

[0021] Conventional semiconductor lasers, regardless of whether they are edge-emitting or surface-emitting, control the output by controlling the amount of carriers injected into the active layer based on the current value. The oscillation transverse mode is determined by the wave guide mechanism. The waveguide mechanism includes a refractive index waveguide and a gain waveguide. Refractive index guided type Then, when fabricating a semiconductor laser, a waveguide is fabricated by finely processing materials with different refractive indexes so as to block higher-order modes. On the other hand, gain waveguiding realizes single-mode oscillation by adding spatial shading to injected current and the loss of light. In particular, when the fundamental transverse mode oscillation is obtained by completely blocking the higher-order transverse mode using only refractive index guiding, the width of the active region in the active layer is set to 1.8 m or less even when the oscillation wavelength is in the 1.3 μm band. There is a problem that processing becomes difficult. In addition, the means for controlling the external mode of this transverse oscillation mode has heretofore been ineffective.

 [0022] As described above, in any laser structure, all operations are regulated by current, and it was impossible to operate with a general CMOS output. Even in conventional lasers, if the control current is supplied to only a part of the electrode and a constant current is supplied to the rest of the laser, strong oscillation occurs when the control current exceeds a certain value. Below that, the output is below the threshold or extremely low. It is an answer that can realize the state. FIG. 2 is a schematic diagram of the structure of a semiconductor laser considering this point. In the illustrated example, the laser stripe structure is a buried stripe type, and the upper electrode 7 is divided into two parts, a main electrode 7b and a sub-electrode 7c, so that current can flow individually. In use, a current is supplied only to the main electrode 7b to bring it into a state near the laser oscillation threshold. Here, if a current is passed through the sub-electrode 7c, it will oscillate and the light output will have an appropriate value. Oscillation stops when the current of sub-electrode 7c is turned off. It can be easily estimated that a very small amount of current flows through the sub-electrode 7c, and control at 1 mA or less is considered possible. This value can be driven by CMOS. However, depending on the pattern of the signal applied to the sub-electrode, it is presumed that the so-called pattern effect that the initial light intensity has an influence on the subsequent signal is extremely large. Furthermore, in the case of a semiconductor laser in which the threshold value changes with temperature, the optimum condition is limited to a very narrow range, so it seems that it is not practical.

 [0023] In the conventional semiconductor laser, the current must be increased in order to increase the oscillation light intensity. On the other hand, in order to reduce the oscillation light intensity, the current must be reduced. In other words, modulation of the drive current was indispensable for modulation including ON / OFF of the semiconductor laser.

[0024] On the other hand, many signals are digitalized and are double-valued as ON-OFF signals. In digital logic circuits, data is usually processed and output by Si-CMOS circuits. In this Si-CMOS circuit, generally no current can be taken, and the output of this circuit is a semiconductor laser. Cannot be modulated or ON-OFF.

Therefore, in many cases, a drive circuit for a semiconductor laser is formed by a circuit such as a power mirror using a bipolar transistor or a special CMOS circuit that allows current to flow. It must be configured and converted to a current change of several to several tens of mA necessary for the operation of the semiconductor laser, and the semiconductor laser must be modulated or turned on and off through this.

 [0026] In addition, the conventional semiconductor laser requires a drive circuit in addition to the signal line, and these circuits and the individually packaged semiconductor laser are connected by wiring to operate. Then, stray capacitance and stray inductance increase, and the signal waveform becomes dull and deformed, and high-speed components are cut off.

 Furthermore, in the conventional refractive index waveguide type semiconductor laser, at the time of fabrication, materials having different refractive indexes are combined so as to block higher-order modes, and further fine processing is performed. On the other hand, gain waveguiding realizes single-mode oscillation by adding spatial shading to the loss experienced by injected current and light! If the fundamental transverse mode oscillation is obtained by completely blocking the higher-order transverse mode using only the refractive index waveguide, the width of the active region must be 1.8 m or less even when the oscillation wavelength is 1.3 m. Therefore, processing becomes difficult. Also, since there was no means to dynamically control the transverse oscillation mode, the laser function was limited. Furthermore, when branching or merging a waveguide including an active region, in general, a resist pattern is formed and the semiconductor is etched, so a fine resist pattern is formed and etched. To do is an extremely difficult caro work.

 Disclosure of the invention

 Problems to be solved by the invention

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a semiconductor light emitting device capable of solving the above-described problems in principle.

 Means for solving the problem

[0029] The present invention can be expressed as the following items.

The semiconductor light emitting element of item 1 includes a substrate crystal, an active layer, and a junction. The joint portion is disposed in the vicinity of the active layer. Further, the joint portion includes the active layer. In this configuration, a depletion region that restricts the flow of carriers to the substrate is generated.

 [0030] The semiconductor light-emitting element of item 2 is the same as that of item 1, further comprising an upper cladding layer, a lower cladding layer, a first electrode, and a second electrode. The upper cladding layer is disposed adjacent to the upper part of the active layer. The lower cladding layer is disposed adjacent to the lower part of the active layer. The first electrode is electrically connected to the upper cladding layer. The second electrode is electrically connected to the lower cladding layer. This semiconductor light emitting device is configured to send carriers into the active layer by passing a current between the first electrode and the second electrode.

 [0031] Item 3 is a semiconductor light-emitting device according to item 1 or 2, wherein the junction is constituted by a pn junction.

 [0032] Item 4 is a semiconductor light-emitting device according to item 1 or 2, wherein the junction is formed by a metal-semiconductor junction.

 [0033] The semiconductor light-emitting element of item 5 is the semiconductor light-emitting device according to item 1 or 2, wherein the junction is configured by a metal-insulator-semiconductor junction.

 [0034] The semiconductor light-emitting element of item 6 is the semiconductor light-emitting device according to any one of items 1 to 5, wherein the junction is disposed at a distance within 3 μm from the active region in the active layer. It has become.

 [0035] The semiconductor light emitting device of item 7 is the device of item 1, further comprising a control region made of a first conductivity type semiconductor and a gate region made of a second conductivity type semiconductor. Yes. The junction is formed by joining the control region and the gate region. The control region is disposed on a flow path of a current flowing into the active layer.

 [0036] The semiconductor light-emitting device of item 8 is the semiconductor light-emitting device of item 7, wherein the control region is a part of the substrate crystal.

 [0037] The semiconductor light-emitting element of item 9 is the same as that of item 7, further comprising a lower cladding layer. The lower cladding layer is disposed between the substrate crystal and the active layer. The control region is formed between the lower cladding layer and the substrate crystal.

[0038] The semiconductor light emitting element of item 10 is the same as that of item 7, further comprising a lower cladding layer. The lower cladding layer is disposed between the substrate crystal and the active layer. The The control region is formed inside the lower cladding layer.

 [0039] The semiconductor light emitting device of item 11 is the same as that of item 7, further comprising an upper cladding layer. The upper cladding layer is disposed above the active layer. The control region is disposed above the upper cladding layer.

[0040] The semiconductor light emitting device of item 12 is the device of item 7, further comprising an upper cladding layer. The control region is formed inside the upper cladding layer.

[0041] The semiconductor light-emitting element of item 13 is the device according to any one of items 7 to: L1, wherein a third electrode for applying a voltage to the gate region is electrically connected to the gate region. Is connected to.

[0042] Item 14 is a semiconductor light emitting device according to any one of Items 7 to 13, wherein a depletion layer limiting region is disposed between the control region and the gate region and the active layer. Is.

 [0043] The semiconductor light emitting device of item 15 is the semiconductor light emitting device of item 14, wherein the carrier concentration in the depletion layer limiting region is higher than that in the control region.

 [0044] The semiconductor light emitting element of item 16 is the one described in any one of the forces 1 to 15 of item 7, wherein the control region and the gate region are different in material or composition.

 [0045] Item 17 is the semiconductor light-emitting device according to any one of items 7 to 16, wherein the gate region is formed with a slit extending substantially along one direction. A part or all of the control area is disposed inside the slit.

 [0046] The semiconductor light-emitting element of item 18 is the semiconductor light-emitting device of item 17, in which irregularities are formed on the side surface of the gate region facing the slit.

 [0047] Item 19 is a semiconductor light-emitting device according to any one of items 7 to 16, wherein the gate region is formed with a hole continuously arranged substantially along one direction, and the hole A part or all of the control area is arranged inside the.

 [0048] The semiconductor light emitting element of item 20 is the one described in items 7 to 19, wherein the refractive index of the gate region is lower than the refractive index of the control region.

[0049] Item 21 is a semiconductor light-emitting device according to item 7 to 20, wherein the gate region Is made to be absorptive with respect to the wavelength of the generated light.

 [0050] The semiconductor light-emitting element of item 22 is the device according to item 21, wherein the absorptive gate region is formed by adding iron or chromium as an impurity to the semiconductor. It becomes.

[0051] Item 23 is a semiconductor light emitting device according to any one of items 17 to 19

The extension direction of the slit or the hole is branched into two or more.

[0052] The semiconductor light-emitting element of item 24 is for controlling the phase of light traveling along the slit in the gate region along the deviation of the branched slit in the semiconductor light-emitting device of item 23. The fourth electrode is electrically connected.

 The invention's effect

 [0053] According to the semiconductor light emitting device of the present invention, the flow path of the drive current can be regulated by the depletion region generated by the junction. Thereby, the width of the waveguide as the gain waveguide can be narrowed. Furthermore, the width of the waveguide can be dynamically controlled by applying a voltage to the gate region constituting the junction. In other words, laser oscillation can be controlled by voltage.

 In other words, the amount of light emission can be controlled by directly connecting the semiconductor light emitting device according to the present invention to a standard interface whose output is defined by voltage. As a result, the configuration of the laser driving device can be simplified.

 BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, an embodiment in which the semiconductor light emitting device according to the present invention is applied to a laser will be described with reference to the accompanying drawings.

[0056] (First embodiment)

 FIG. 3 shows a first embodiment of the present invention. FIG. 4A is a cross-sectional view taken along a plane that includes an oscillation region and that is perpendicular to the traveling direction of light that is guided therethrough. In the description of the present embodiment, members having the same functions as those of the conventional semiconductor laser already described are denoted by the same reference numerals and description thereof is simplified.

The semiconductor light emitting device of this embodiment includes a substrate crystal 1, a lower cladding layer 2, an active layer 3, an upper cladding layer 4, a low resistance layer 5, a lower electrode (first electrode) 6 And the upper electrode (second electrode) 7. A control region 14 and a gate region 16 are provided.

 In this embodiment, both the substrate crystal 1 and the lower cladding layer 2 are made of a first conductivity type (n-type or P-type) semiconductor. The upper clad layer 24 is made of a second conductivity type (p-type or n-type) semiconductor and has a length of one.

 In this embodiment, the gate region 16 is formed on the upper surface of the substrate crystal 1 (the formation method will be described later). The gate region 16 is of the second conductivity type. The control region 14 is constituted by a part of the substrate crystal 1 in this embodiment. In other words, in this embodiment, a region of the substrate crystal 1 adjacent to the gate region 16 and sandwiched between the left and right gate regions 16 is the control region 14. Like the substrate crystal 1, the control region 14 is of the first conductivity type. The control region 14 is arranged on the movement path of carriers that flow into the active layer 3.

 [0060] Generally, when a p-type semiconductor and an n-type semiconductor are brought into contact with each other, a depletion region is generated near the interface, and this region is referred to as a junction region. In the case of the present invention, near the interface between the control region 14 and the gate region 16, a depletion region is generated across both regions. A region in the vicinity of the junction interface between the control region 14 and the gate region 16 including both the depletion regions is referred to as a junction A. A depletion region included in the control region 14 is referred to as a depletion region B. The depletion region B has a function of restricting the flow of carriers to the active layer 4 and is arranged in the vicinity of the active layer 3 (specifically, for example, within 3 m from the active layer 3). The width of the depletion region depends on the carrier density of each region. Here, since the carrier density of the gate region is larger than the control region, a large depletion region B is generated. That is, the junction A in the present embodiment is configured by a pn junction, and the depletion region B is generated based on the pn junction.

 Further, the upper electrode (first electrode) 7 is electrically connected to the upper cladding layer 4 through the low resistance layer 5. The lower electrode (second electrode) 6 is electrically connected to the lower cladding layer 2 via the substrate crystal 1 and the control region 14. In the present embodiment, carriers are injected into the active layer 3 by passing a current between the upper electrode 7 and the lower electrode 6. In the active layer 3, a region where carriers actually generate injected light is referred to as an active region.

 [0062] (Method for Fabricating Element of First Embodiment)

Next, a specific example of a method for manufacturing the element of the first embodiment will be described. First, the first conductivity type On the upper surface of the substrate crystal 1, a gate region 16 of a high concentration second conductivity type is selectively formed by a diffusion method or an ion implantation method.

[0063] For example, as the substrate crystal 1, an n-type GaAs substrate having a carrier density of lxl0 ¹⁶ cm- ³ is used.

The substrate crystal 1 is masked with a width of 2.0 m, and Be is ion-implanted to form a p region (this region becomes the gate region 16). The carrier density of the p-type gate region 16 is, for example, 2xl0 ¹⁸ cm− ³ . After removing the mask, an n-AlGaAs layer with a carrier density of 5xl0 ¹⁶ cm- ³ is grown as a lower cladding layer 1 m by MOCVD using S as an impurity. Continue

 0.4 0.6

Then, a GaAs layer not doped with impurities is grown as an active layer 3 to a thickness of 0.05 m. Subsequently, a p-Al Ga As layer with Zn as an impurity and a carrier density of 2xl0 ¹⁷ cm- ³ was formed on the upper cladding layer.

 0.4 0.6

Grows as 1 μm. Further, a p-GaAs layer with Zn as an impurity and a carrier density of lxl0 ¹⁹ cm- ³ is grown as a low resistance layer 5 by 0.5 m. After that, vacuum deposition is performed in the order of Ti, Pt, and Au, and the upper electrode 7 is applied.

 [0064] Thereafter, a striped mask having a width of 10 µm was applied, and the upper electrode 7 to the lower cladding layer 2 were selectively removed using a selective etching solution. As a result of this etching, the width of the ridge was reduced to approximately. Next, the substrate crystal 1 is polished and thinned to 100 / zm, and then the lower electrode 6 is formed by vacuum deposition in the order of Au—Ge, Ni, and Au. The entire wafer thus obtained is annealed at about 400 ° C., then cleaved, coated with an end face, and separated into individual chips for assembly as a semiconductor laser.

 The semiconductor laser fabricated in this way has a threshold value of approximately 10 mA, and even if the current is increased to 40 mA or more, it is considered that the optical output vs. current characteristic continues to be a simple increase curve without so-called “kinks”.

 [0066] (Operation of Element of First Embodiment)

As shown in FIG. 3 (b), in the first embodiment of the present invention, the control region 14 is depleted as a barrier against the flow of carriers (currents) inside the substrate crystal 1 and the lower cladding layer 2. Region B is formed. As a result, the current flow path becomes narrow accordingly. Then, the gain concentrates at the center of the ridge width. Then, among the fundamental mode and the primary mode allowed as refractive index guiding, the fundamental mode can obtain a large amount of gain, and oscillation in the fundamental mode is performed. If the width of the control region 14 is 2.0 μm and the width of the depletion region B is about 0.25 μm, the current is 1.5 μm. You will be focused on m. In FIG. 3 (a) of the present embodiment, the second conductivity type gate region 16 is left on the upper surface of the substrate crystal 1, but this is not essential, and when performing a ridge etching using a mask, The gate region 16 together with the lower cladding layer 2 may be etched to reduce the width.

 [0067] According to the present embodiment, even if the width of the control region 14 is wide, the current flow path can be regulated by the depletion region B, so that the process of observing the laser becomes easy. Is

FIG. 4 is a diagram showing the basic concept of the operation of the present embodiment in more detail. However, the direction of current in Fig. 4 (a) is opposite to that in Fig. 3. In the vicinity of the active layer 3 region, there is a control region 14 of the second conductivity type, and adjacent to it is a gate region 16 of the first conductivity type. If the carrier density of the first conductivity type gate region 16 is sufficiently larger than the carrier density of the second conductivity type control region 14, the first conductivity type gate region 16 is added to the second conductivity type control region 14. A much larger depletion region B is formed. However, such carrier density is not essential. The thickness of the depletion region B is approximately proportional to the reciprocal of the square root of the carrier density (that is, impurity concentration or space charge density). Depletion region B limits the width of the current path (see Fig. 4 (b) and (c)). Therefore, it is possible to regulate the light emission amount and the transverse mode of the laser by adjusting the carrier density.

 [0069] (Second Embodiment)

FIG. 5 shows a second embodiment of the present invention. FIG. 2A is a sectional view of the element. In the second embodiment, the substrate crystal 1 of a first conductivity type (composition: n-GaAs, carrier density: 5xl0 ¹⁷ cm- ³⁾ on top of the low concentration by MOCVD (carrier density: 5xl0 ¹⁵ cm- ³⁾ A first conductivity type layer (thickness of 0.2 μm) is formed, a mask with a width of 2 μm is applied, and Be is implanted by ion implantation to selectively form a ρ region. The region that has been ion-implanted and becomes p-type becomes the second conductivity type gate region 16, and the region that remains protected by the mask and remains n-type (first conductivity type) becomes the control region 14. Since the structure and the manufacturing procedure other than those described above in the present embodiment are the same as those in the first embodiment, description thereof will be omitted.

[0070] According to the element of the second embodiment, since the carrier density of the substrate crystal 1 is more general than that of the first embodiment, it is easy to obtain and the carrier density of the control region 14 is electrically Resistance There is an advantage that it can be formed low without worrying about resistance. If the carrier density in the control region 14 is low, the depletion region B will inevitably increase.

 [0071] The threshold value of the semiconductor laser according to the second embodiment is approximately 9 mA, and even if the current is increased to 40 mA or more, the optical output vs. current characteristic continues to be a simple increase curve without a so-called “kink”. it is conceivable that. If such a reduction in threshold value can be achieved, compared to the first embodiment, the carrier density of the substrate crystal 1 can be increased, and the effective current path width becomes narrower by reducing the carrier density of the control region 14. (For example, 1 μm or less).

 FIG. 5 (b) is a schematic diagram showing the operation of the second embodiment described above, and the operating principle is basically the same as that of the first embodiment. However, as compared with the first embodiment, the thickness of the depletion region B is increased by the lower carrier density of the control region 14 of the first conductivity type. For this reason, it becomes possible to narrow the effective current flow path width. Furthermore, in the second embodiment, since the carrier density of the substrate crystal 1 can be increased, there is an advantage in that the electrical resistance is reduced as well as the degree of freedom of selection of the substrate crystal is expanded.

 [0073] (Third embodiment)

FIG. 6 shows a third embodiment of the present invention. FIG. 4A is a cross-sectional view of the main part of the third embodiment. In this embodiment, as in the first embodiment, a substrate crystal 1 of the first conductivity type (composition: n-GaAs, carrier density: 5xl0 ¹⁷ cm- ³ ) is used, and a high concentration (2xl0 ¹⁷ ) is formed thereon by MOCVD. ^A second conductivity type (p-type) P-GaAs layer (thickness 0.2 m) of ¹⁸ cm-3) is formed. This region of the p-GaAs layer becomes the gate region 16. At this time, Mg, which is difficult to diffuse, was used as the p-type impurity. Therefore, the p-GaAs layer was formed while supplying CP2Mg (bis-cyclopentadienyl Mg). After removing the gate region 16 of the second conductivity type over the width of 0.2 μm where the current flow path is desired by etching, the lower cladding layer 2 of the first conductivity type 2 and above is again formed thereon by MOCVD. Each layer is formed. Here, the carrier density of the lower cladding layer 2 was lowered to about lxl0 ¹⁶ cnf ³ . The subsequent layer manufacturing method is the same as in the first embodiment. As shown in Figure (a), the cross-sectional structure of the resulting crystal layer has a slight step reflecting the approximately 0.2 μm deep groove formed by the above etching. A portion of the lower cladding layer 2 adjacent to the gate region 16 is a control region 14.

[0074] The threshold of the semiconductor laser fabricated in this way is approximately 8.5 mA, and the current is increased to 40 mA or more. However, it is considered that there is no “kink” in the optical output vs. current characteristics. Furthermore, the half-value width of the far-field image is considered to be constant without current dependency.

 FIG. 6 (b) is a schematic diagram showing the operation of the third exemplary embodiment of the present invention. The operating principle of this embodiment is basically the same as the previous example. In the third embodiment, since a step is formed in the active layer 3 (see FIG. 6A), this step substantially gives the waveguide width in the refractive index waveguide. Since this waveguide width is a width in which higher-order modes are prohibited, the semiconductor laser of this embodiment is considered to greatly improve the far-field image that is affected by the optical-current characteristics and to improve the threshold value. It is done.

 In addition to these, in the third embodiment, the thickness of the depletion region B is increased by the lower carrier density of the control region 14 of the first conductivity type, and the effective current path width is reduced (for example, 1 μm or less). Then, even if the width of the control region 14 is widened, the current flow path can be narrowed, so that oscillation other than in the basic mode can be prevented, and the device can be easily processed. Furthermore, since the carrier density of the substrate crystal 1 can be increased, not only is the degree of freedom of selection of the substrate crystal 1 widened, but there is also an advantage in that the electrical resistance is reduced.

 [0077] (Fourth embodiment)

FIG. 7 shows a fourth embodiment of the present invention. FIG. 4A is a cross-sectional view of the main part of the fourth embodiment. In this embodiment, n-GaAs having a carrier density of 3xl0 ¹⁸ cm ^{_ 3} is used as the substrate crystal 1 of the first conductivity type, and a carrier density of 2xl0 ¹⁷ cm is formed on the first conductivity type (n-type) by MOCVD. — ³ Al Ga As layer with a thickness of 0.5 / zm, followed by second conductivity type (p-type) carrier density 3x

0.4 0.6

10 ¹⁸ cm— ³ p-GaAs layer (thickness 0.1 m) is formed. At this time, Mg is used as the p-type impurity in the same manner as in the third embodiment. Next, after removing the second conductivity type layer by etching over a width of 2 m where the current flow path is desired, a carrier density of 2xl0 ¹⁷ cm—with the first conductivity type is again formed thereon by MOCVD. ³ Al Ga As layer is formed to a thickness of 0.5 m,

 0.4 0.6

 The lower cladding layer 2 is formed together with the AlGaAs layer of the first conductivity type formed earlier. Subsequent manufacturing method

 0.4 0.6

Is the same as in the first embodiment. When performing MOCVD growth again, a technique such as removing a thin oxide film formed on the surface of the layer by flowing a gas mainly composed of HC1 in the growth apparatus and performing light etching. It is necessary to apply. The cross-sectional structure of the resulting crystal layer should accurately draw the step as shown in Fig. 6 (a), but omit the small step and draw it flat. It was.

 In the present embodiment, the second conductivity type layer formed inside the lower cladding layer 2 corresponds to the gate region 16, and the region adjacent to the gate region 16 corresponds to the control region 14.

 [0079] The threshold of the semiconductor laser fabricated in this way is approximately 8.0 mA, and it is considered that there is no “kink” in the optical output versus current characteristics even when the current is increased to 40 mA or more. Furthermore, the half-value width of the far-field image is considered to be constant with no current dependency.

 FIG. 7B is a schematic diagram showing the operation of the fourth embodiment. The operation principle of this embodiment is basically the same as the previous embodiments. In the fourth embodiment, since the current path constriction is performed at a position close to the active layer 3, carriers can be injected intensively into a narrow region of the active layer 3 where the current spread to the active layer 3 is small, so that the threshold value is further increased. Lower.

 [0081] (Fifth Embodiment)

FIG. 8 is a cross-sectional view of the main part of the fifth embodiment of the present invention. In this embodiment, n-GaAs having a carrier density of 3xl0 ¹⁸ cm— ³ is used as the substrate crystal 1 of the first conductivity type, and a carrier density of 2xl0 ¹⁷ cm—of the first conductivity type (n-type) is formed thereon by MOCVD. ³ Al Ga As layer is formed to a thickness of 1.0 m.

 0.4 0.6

Then, the lower cladding layer 2 is formed, and then the active layer 3 is formed, and an AlGaAs layer having a second conductivity type (p-type) and a carrier density of 2xl0 ¹⁶ cm- ³ is formed to a thickness of 0.5 m. At this time, p-type impurities

 0.4 0.6

In this case, general Zn is used. Subsequently, an n-GaAs layer (thickness: 0.1 m) having a carrier density force of ¾ _X 10 ¹⁸ cm ⁻³ is formed in the first conductivity type (n-type). Common S is used as an additive impurity.

[0082] Thus, the current flow path was formed! /, The first conductivity type layer having a width of 2 μm was removed by etching, and then the second conductivity type was again formed thereon by MOCVD. Then, an Al Ga As layer with a carrier density of 2xl0 ¹⁶ cm- ³ was formed to a thickness of 0.5 / zm, and this was combined with the AlGa As layer of the second conductivity type formed earlier.

0.4 0.6 0.4 0.6 Upper cladding layer 4 Here, the n-GaAs layer (thickness 0.1 μm) with the first conductivity type (n-type) and carrier density 2xl0 ¹⁸ cm- ³ becomes the gate region 16, and the carrier density 2xl0 ¹⁷ cm- ³ with the second conductivity type. A portion of the Al Ga As layer adjacent to the gate region 16 becomes the control region 14. After this, P +

0.4 0.6

-Form a low resistance layer 5 of GaAs. Subsequent electrode formation, cleavage, assembly, and other manufacturing methods are the same as in the previous embodiments. It should be noted that when MOCVD growth is performed again, light etching is performed by flowing a gas mainly composed of HC 1 in the growth apparatus, similar to the above-described fourth embodiment. The threshold of the semiconductor laser fabricated in this way is approximately 8.0 mA, and it is considered that there is no “kink” in the optical output versus current characteristics even when the current is increased to 40 mA or more. Furthermore, the half-value width of the far-field image is considered to be constant with no current dependency.

 The operation principle of the fifth embodiment is basically the same as that of the fourth embodiment except that the control region 14 for constricting the current path is on the active layer 3. Compared to the first, second, and third embodiments, the current path is narrowed at a position close to the active layer 3, so that the current spreading to the active layer 3 is less and the active layer 3 is narrow and concentrated in the region. Since the carrier can be injected, the threshold value is lowered.

 [0085] (Sixth embodiment)

 FIG. 9 is an explanatory diagram of the sixth embodiment of the present invention. In this embodiment, a third electrode 18 for applying a voltage to the gate region 16 is attached to the gate region 16. Hereinafter, a mode in which the third electrode 18 is attached will be described for each specific example.

 [0086] (Example 1)

 In the example of FIG. 9 (a), the third electrode 18 is formed in the second conductivity type gate region 16 shown in the first embodiment. In this example, Ti, Pt, and Au are sequentially deposited, and the force Au-Zn can easily obtain an ohmic electrode, so either of them can be used. If the third electrode 18 is biased more negatively than the lower electrode 6, the oscillation threshold can be slightly lowered. On the contrary, if the voltage between the lower electrode 6 and the upper electrode 7 is kept constant, the light output can be controlled within a certain range by the voltage stored in the third electrode 18.

 [0087] (Example 2)

FIG. 9B shows a configuration in which a third electrode 18 is provided in the gate region 16 in the second embodiment of the present invention. In this embodiment, when the voltage applied to the third electrode 18 is set to a threshold value or less (for example, −2.8 V), the current between the lower electrode 6 and the upper electrode 7 can be cut off, and the light It is thought that the output can be made zero. If the bias voltage applied to the third electrode 18 is gradually increased, the threshold is exceeded at -2.7V, and the light output increases rapidly. This increase in light output is also affected by the voltage applied to the lower electrode 6 and the upper electrode 7. For example, if a voltage of 2.5 V is applied between the lower electrode 6 and the upper electrode 7, the light output becomes about 10 mW when the applied voltage to the third electrode 18 is 2.0 V. If the mask width when forming the gate region 16 is 1.5 m, the third When -1. IV is applied to the electrode 18, the depletion layer is connected to the left and right to become a pinch-oil state, and the current becomes a small constant value that hardly depends on the voltage between the lower electrode 6 and the upper electrode 7. When the applied voltage is -1.0V, the current flows about 3mA, the oscillation threshold is reached when the applied voltage is -0.91V, and the optical output is about 5mW when the applied voltage is -0.5V.

That is, according to this embodiment, the optical output can be modulated at high speed with a voltage change of about 400 mV. Since the voltage applied to the third electrode 18 is in the reverse bias direction in the pn junction that forms the junction, almost no current flows, and the capacitance in the depletion region of this pn junction is charged or discharged. Only a small current flows. This capacitance is about p F and does not hinder the operation. Of course, if the extra depletion region is reduced, it will be possible to cope with digital signals in units of Gbps as well as it is difficult to reduce this capacitance below lpF.

 Similarly to Example 2, the force that can provide the third electrode 18 in the gate region of the laser structure shown in the above-described third embodiment is almost the same as in Example 2, so here Avoid details.

 [0090] (Examples 3 and 4)

 FIG. 9 (c) shows the fourth embodiment, and FIG. 9 (d) shows the third electrode 18 provided in the gate region 16 of the fifth embodiment. The advantages are the same as described above. Figure 10 shows a specific modulation characteristic example of Example 4 shown in Fig. 9 (d). The horizontal axis in FIG. 10 indicates the potential of the third electrode 18 with respect to the upper electrode 7 in V units, and the vertical axis indicates the optical output P in mW units. V is -1.3V

GS GS

 In the following, no oscillation occurs and only spontaneous emission light is seen. -If it exceeds 1.3V, the optical output P will increase suddenly, and the output will be about 8mW at -0.8V.

 Therefore, a voltage signal is applied to the third electrode 18 such that the voltage in the “0” state is −1.3V and the “1” state force) .8V as shown in FIG. When it is received, the corresponding light output can be obtained. Since the optical output of ordinary information equipment is almost this large, the required optical output can be obtained by connecting this semiconductor laser directly to these signal terminals.

 Of course, a constant voltage, here 2.7 V, is applied to the lower electrode 6 and the upper electrode 7. The current flowing between the two electrodes changes with the voltage change of V. With current semiconductor lasers

 GS

If you are going to send a signal of multiple channels by configuring a ray, between the upper and lower electrodes of the array The force that will connect the signal source of the “constant current source” such as a current mirror circuit to the conductor of the other channel from the conductor between the signal source of each channel and each upper electrode. When the signal crosstalks with dynamic mutual induction! There was a problem. In this embodiment, both electrodes only serve to supply power, and the force is expected to be a "constant voltage source". Therefore, the voltage between the upper and lower electrodes is For example, the lower the power supply impedance, the better the decoupling by the capacitor placed closer, so that crosstalk can be avoided.

 [0093] (Seventh embodiment)

 FIG. 11 is a schematic cross-sectional view of an element according to the seventh embodiment of the present invention. In the present embodiment, a third layer 20 having a higher carrier density than the control region 14 in the lower cladding layer 2 is added between the lower cladding layer 2 and the active layer 3 in the fourth embodiment described above. RU

 In the sixth embodiment, when the third electrode 18 is deeply reverse-biased, the depletion region B becomes too thick to reach the active layer 3 and an electric field may be applied to the active layer 3. In this case, electrons and holes in the active layer are separated by this electric field, which causes a problem that the light generation efficiency decreases. In the seventh embodiment, the addition of the third layer 20 can limit the expansion of the depletion region B in the third layer 20, thereby reducing the possibility that the depletion region B reaches the active layer 3. I'll do it.

The carrier density in the third layer 20 does not need to be as strictly controlled as the carrier density in the control region 14, and may be, for example, lxl0 ¹⁷ cm− ^{3 to} lxl0 ¹⁸ cm− ³ . By adding this third layer 20, the reverse bias voltage to the third electrode 18 can be increased (for example, 5 V or more).

 [0096] (Eighth embodiment)

 FIG. 12 is a schematic cross-sectional view of an element according to the eighth embodiment of the present invention. In the present embodiment, a third layer 20 having a carrier density higher than that of the control region 14 of the upper cladding layer 4 is added between the upper cladding layer 4 and the active layer 3 in the fifth embodiment. By applying the third layer 20 to the surface, the third electrode 18 can be deeply reverse-noised as in the seventh embodiment.

As described in each embodiment, in the first and second embodiments, both the gate region 16 and the control region 14 have the same composition of GaAs. In contrast, the third, fourth and In the fifth embodiment, the gate region 16 is GaAs, the control region 14 is Al Ga As,

 0.4 0.6 Different compositions were used. By making the gate region 16 and the control region 14 have different compositions or materials, it becomes possible to employ selective etching of a layer with an etching solution, or to enable lateral mode control described later. Of course, the combination of the compositions is not limited to these. For example, a combination using InP for the gate region 16 and InGaAsP for the control region 14 is also conceivable.

 [0098] (Ninth embodiment)

 FIG. 13 is a schematic diagram showing a ninth embodiment of the present invention. In the ninth embodiment, the gate region 16 and the control region 14 are formed in the upper cladding layer 4 in the same manner as the fourth embodiment (FIG. 9 (d)) of the fifth embodiment and the sixth embodiment described above. Is provided. In the ninth embodiment, the gate region 16 is divided into two parts having a width of 1.5 μm or 2.0 μm, and a slit 22 (see FIG. 13A) is formed between them. FIG. 13A is a plan view showing the shape of the gate region 16. That is, in the present embodiment, the gate region 16 is composed of the two gate regions 16a and 16b sandwiching the slit 22. As shown in FIG. 12 (a), the two gate regions 16a and 16b are connected by a left and right connection portion 16c provided at an appropriate location.

 In the present embodiment, the third electrode 18 is connected to one of the two gate regions 16a and 16b, and the same voltage can be applied to these gate regions. A control region 14 is disposed between the slit 22, that is, between the two gate regions 16 a and 16 b.

 [0100] (Tenth embodiment)

 FIG. 14 shows a tenth embodiment of the present invention. In this example, irregularities having a height of about 0.2 m are formed on the opposing portions of the two gate regions 16a and 16b in the ninth embodiment.

In the ninth embodiment described above, the current path linearly becomes a pinch-oil state with the extension of the depletion region B only by slightly lowering the bias voltage applied to the third electrode 18. After that, when switching from the pinch-oil state to a state with light output, even if the voltage rises and current flows, carriers are accumulated in the active region of the active layer 3 to a density near the threshold. It takes time. In this case, for example, a delay of about Ins occurs at the rising edge of the optical pulse. There is a match. This delay becomes a serious problem in the transmission of high-speed digital signals. To avoid this, if a voltage slightly higher than the pinch-off state is set to "0〃 state", the ratio of the light output corresponding to "0" and 'T (extinction ratio) is set to the specified value. Can be difficult.

[0102] In order to eliminate this drawback, in this tenth embodiment, even if the bias voltage is slightly lowered and the depletion region expands, the pinch-off state does not suddenly occur because there is some space. Since a certain amount of current flows, it is possible to reduce or avoid a delay in the rise of the optical pulse. That is, in the tenth embodiment, the P-V characteristics near the pinch-off state

 GS

 When the smoothness and smoothness are achieved, the “Remote Cut-Off characteristics” can be realized.

 [0103] (Eleventh Embodiment)

 FIG. 15 (a) shows an eleventh embodiment of the present invention. In this example, the height (depth) of the unevenness in the tenth embodiment described above is enlarged to have a substantially comb-like shape in plan view. If the gain is switched sharply at the connection portion between the slit 22 and the gate region 16a or 16b, the “gain waveguide” mechanism may be too strong, resulting in a characteristic that the wavefront is divided into left and right. According to the present embodiment, although the current distribution in the central portion of the slit 22 is large, the peripheral portion also has a gain and does not rapidly become zero. For this reason, it is possible to reduce or eliminate the characteristic that the wavefront is divided into left and right. The uneven shape may be as shown in FIG. 15 (b).

 [0104] (Twelfth embodiment)

 FIG. 16 shows a twelfth embodiment of the present invention. In this embodiment, a plurality of holes 24 are formed at a predetermined pitch along one direction of the gate region 16 where the slits 22 are not formed as in the ninth and tenth embodiments. Examples of the shape of the hole include a circle, an oval, a rectangle, and a polygon, but are not particularly limited.

 As a specific example of this embodiment, when the ridge width is 5.0 μm, an oval (oval) window (hole) having a major axis of 3.5 μm and a minor axis of 1.5 μm is provided at the center in the width direction. ) 24 is formed with a 2.5 μm pitch. In this embodiment, current will pass through the hole 24.

 An example of the operation of the twelfth embodiment is as follows. The voltage (V) of the third electrode 18 is 0

 GS

When V, the rest of the hole 24 becomes a depletion region except for the region with a major axis of 2.8 m and a minor axis of 1.0 m due to the pn junction. The region where current flows when biased to V = -1.0V is It suddenly narrows, and current flows only in the area of major axis 2.0 m and minor axis 0.5 m, V = -1.7

 GS

 In V, it becomes pinch-off state. In the process of moving from each hole 24 toward the active layer 3, the current width increases in the vicinity of the active layer 3 in the upper cladding layer 4, and also slightly expands in the active layer 3 due to diffusion. Since this spread is determined by the diffusion length and is considered to be about 1 to 2 m, the active layer 3 can be excited almost uniformly by narrowing the space between the holes 24 to some extent. In the twelfth embodiment, contrary to the tenth embodiment described above, by extending the depletion region from the periphery of the hole 24, it is possible to bring current into the pinch-off state rapidly.

 [Thirteenth Embodiment]

FIG. 17 shows a thirteenth embodiment of the present invention. Lower clad layer 2 (n-InP), active layer 3, third layer 20 (p-InP, p = 3xl0 ¹⁷ cm-3, thickness 0.1 μm on substrate crystal l (n-InP) by MOCVD m), part of upper cladding layer 4 4a (p-InGaAsP, p = lxl0 ¹⁶ cm— ³ , emission peak wavelength = 1.1 m, thickness 0.3 μm), n-InP layer (n = lxl0 ¹⁸ cm— ³⁾ , Grow thickness 0.2 μm). Here, take out, apply an appropriate mask, and etch the n-InP layer (n = lxl0 ¹⁸ cm— ³ , 0.2 m) into a 1.5 m wide strip in the portion corresponding to the active region in the active layer 3. Remove. The region remaining after this etching is the gate region 16.

[0108] Then, after again growing p-InGaAsP (p = 7xl0 ¹⁵ cm " ³ , thickness 0.2 / zm, emission peak wavelength = 1.1 m) at the position to be the control region 14 by MOCVD, The remaining 4b (p-InP, p = 5xl0 ¹⁶ cm " ³ , thickness 0.5 m) of the upper cladding layer and p + -InGaAs (p = lxl0 ¹⁹ cm" ³ , thickness 0.5 m) as the low resistance layer 5 After that, a striped mask having a width of 7 m is applied, a ridge portion is formed by a selective etching method, an upper electrode 7 and a third electrode 18 are formed, and then the lower electrode 6 is formed by polishing the back surface. Then, after the wafer is cleaved to an appropriate resonator length (250 m), a protective film is formed on the end face and separated into individual chips and assembled in the same manner as in the previous embodiments. .

 Many of the characteristics obtained in the thirteenth embodiment are not different from those of the above-described embodiments. However, in this embodiment, a unimodal far-field image that still exhibits basic single transverse mode oscillation even at 50 mA or more is obtained. It is thought to show. This is a characteristic commonly seen in a refractive index guided laser.

[0110] FIGS. 17B and 17C show an outline of the refractive index distribution. On the left side of Fig. 17 (b), The refractive index distribution of the aa 'part in (a) is shown, and the refractive index distribution of the bb' part is shown on the right side. The effective refractive index (equivalent refractive index) felt by the fundamental mode propagating through the active layer 3 is Na and Nb, respectively. Here, Na in the gate region 16 is smaller than Nb in the upper cladding layer 4 (and the control region 14). For this reason, when the effective refractive index distribution in the transverse direction is drawn across the slit 22 formed in the center of the gate region 16, it is represented as a graph in FIG. As can be seen from the figure, a rigid refractive index guiding mechanism is formed in the lateral direction. In addition, since the higher-order mode is blocked due to the dimensions of the waveguide, oscillation in the basic mode is maintained even if the drive current is increased in this waveguide mechanism.

[0111] In the fifth embodiment described above, the real part of the refractive index distribution is such that the refractive index of GaAs is larger than the refractive index of AlGa As. It can be seen whether there is a relationship. However, the oscillation wavelength is 0.81 nm, and this light is strongly absorbed by GaAs. Therefore, even if the first-order transverse mode occurs, the first-order mode that has an intensity peak in the left and right spread areas is strongly absorbed in the gate region 16 and cannot continue to oscillate. Considering another interpretation, light of this wavelength is generally strongly absorbed by the gate region 16, that is, the imaginary part of the complex refractive index is large. On the other hand, the real part and the imaginary part of the complex refractive index are connected by the Kalmers-Kroi-Chi causality, and the real part is equivalently small. As a result, a shape similar to that in Fig. 17 (d) can be realized effectively, and a single fundamental mode can be oscillated stably.

[0112] However, in the case of the structure described in the fifth embodiment (Fig. 8) or the sixth embodiment (Fig. 9 (d)), the gate region 16 absorbs light and generates an electron'hole pair. . Since junction A is a pn junction, the hole force in the p region increases in the n region. If the gate region 16 is left unconnected anywhere, these carriers accumulate and become forward biased. That is, absorption is reduced and the above effect is reduced. In order to avoid such instability, the potential must be 0 (ground) or an appropriate reverse bias potential via the third electrode 18. On the other hand, if impurities such as Fe, Ni, Cr, etc. that shorten the life of carriers are added to the gate region 16, even if the oscillation light is absorbed and electrons and holes are generated, these impurities are generated. Since recombination occurs due to impurities, accumulation of carriers in the gate region 16 can be suppressed. [0113] (Fourteenth embodiment)

 FIG. 18 is a diagram showing a fourteenth embodiment of the present invention. In this embodiment, the slit 22 is bifurcated. Also in the present embodiment, the control region 14 is disposed inside the slit 22. As a result, the light flow path, that is, the current flow path is divided into two branches, and a laser having a single longitudinal mode is obtained as a composite resonator. This will be described in detail below.

 First, consider the light that travels upward after being reflected by the lower surface of FIG. This light travels while being amplified and splits into branches. For example, light that has traveled to the left branch reflects off the uppermost end surface on the left and travels downward again. Similarly, light that has traveled on the right branch also reflects back. These lights merge at the branch point. At this time, the light with the same phase intensifies and the light with the opposite phase weakens. Therefore, only the wavelength that oscillates satisfies this phase condition. In this way, the vertical mode becomes the single mode.

 [0115] In the existing refractive index guided laser, even if a branching portion is provided in the waveguide, the propagation constant changes abruptly at the branching portion, so that it is difficult to obtain the expected result of strong reflection. However, when the depletion region is formed on the side surface of the waveguide as in this embodiment, the current that is not expected is spread in the lateral direction. Even if the convexity is about the wavelength of the light, it will be leveled out, causing little reflection or scattering. Furthermore, as a characteristic of the gain waveguide, the wave front is divided into left and right with respect to the gain peak. Therefore, in a state where the refractive index waveguide mechanism is suppressed (for example, when there is no difference in material as in the first or second embodiment), gain guiding is mainly performed, and thus light can be easily branched. Thus, the present embodiment in which the gain waveguide mechanism is the main waveguide mechanism is excellent as a laser with branching. If the potential of the gate region 16 in the vicinity of the branch portion can be controlled separately from the other, it is more preferable because a gain waveguide structure suitable for branching can be obtained.

 [0116] (Fifteenth embodiment)

FIG. 19 shows the fifteenth embodiment. In this embodiment, a fourth electrode 26, which is a control electrode different from the third electrode, is added to one branch in addition to the configuration of the fourteenth embodiment. By controlling the voltage applied to the fourth electrode 26, the amplitude and phase of light can be adjusted, so that the oscillation wavelength can be finely adjusted. Also, when focusing attention on the output in the upper part of Fig. 19, light of the same wavelength is output from the two left and right output ends and interferes with each other. Become. In this case, if there is no phase difference in the light at both end faces, the far-field image where the light intensity is maximized in the direction perpendicular to the end face is obtained, but if there is a phase difference, this is reflected from the perpendicular direction. The light intensity peak shifts to the left or right. By controlling the potential of the fourth electrode 26, the peak of the light intensity can be shifted left and right, and a beam scanner can be obtained.

 [0117] (Sixteenth embodiment)

 FIG. 20 is a diagram showing a sixteenth embodiment of the present invention. FIG. 2A is an external view of the element. This type of laser is generally called a surface emitting laser (VCSEL). (B) is a plan view, and (c) is a conceptual drawing of a cross-sectional view.

 [0118] The configuration of this embodiment is basically the same as that of the sixth embodiment shown in Fig. 9 (d). However, in the sixteenth embodiment, since it is a surface emitting type, it is necessary to provide optical resonators at the top and bottom, and therefore, the lower DBR 10 and the upper DBR 11 are formed (FIG. 20 (c )reference). In addition, a circular window 7a is formed in the upper electrode 7 in order to extract light perpendicular to the wafer surface.

 Furthermore, a gate region 16 is formed inside the upper cladding layer 4, and a window 16d is formed in the gate region 16 at a position corresponding to the window 7a. A third electrode 18 is electrically connected to the gate region 16.

 [0120] When a reverse noise is applied to the third electrode 18, the depletion region expands inward relatively rapidly, and the current concentrates near the center of the window 16d in the gate region 16. If the reverse bias is further increased, the pinch-off state can be completely achieved.

 [0121] In the conventional surface emitting laser, as shown in Fig. 1 (d), the current restricting region is AlAs, and after the wafer process is completed, it is treated in high-temperature steam to oxidize A1 from the outer periphery. It is going to be an insulator and the current is concentrated in the center. In this case, since oxidation proceeds from the outer peripheral portion, the shape and diameter of the ridge must be accurately formed in processing the outer peripheral portion. Moreover, unless the acid temperature and time are accurately and strictly controlled, the window diameter cannot be controlled with good yield. To control the transverse oscillation mode to the basic mode, the window must have a diameter of about 5 m! /, But it is easy to start oxidation from 30 μm and proceed to 5 μm. is not. Therefore, the transverse mode is usually multimode, with many windows having a diameter of about 10 m.

On the other hand, in the sixteenth embodiment, controllability is excellent like etching using a mask. It is possible to pay by using the proposed method. Furthermore, in the completed device, the transverse mode can be controlled by an external voltage. Therefore, in the present embodiment, the lateral mode control and the oscillation opening / closing can be performed with the external force voltage.

 In each of the above embodiments, the semiconductor laser has been described as an example. However, the semiconductor light emitting element may be a light emitting diode (LED) or a super luminescent diode (SLD or SLED). Even in this case, light emission can be controlled by the depletion region generated by the junction A. Furthermore, the depletion region can be controlled by voltage. Therefore, the semiconductor light emitting element to which the present invention is applied can be used not only in communication but also in the interface of digital information equipment of various electronic equipment.

 Note that the semiconductor light emitting device of the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

 For example, in each of the embodiments described above, the junction A is configured by a pn junction. However, the present invention is not limited to this. For example, an MS junction (metal-semiconductor junction) or MIS junction (metal insulating material semiconductor junction) is used. The joint A may be configured. For example, the gate region 16 may be made of metal. In short, the junction A may be a junction that generates a depletion region that is not simply a resistive connection, and a material having a carrier concentration and work function necessary for the junction can be selected.

 Brief Description of Drawings

FIG. 1 (a) to (e) are cross-sectional views for explaining a conventional semiconductor laser.

 FIG. 2 is an explanatory diagram for explaining an example of a laser that can be driven by CMOS.

FIG. 3 (a) is a cross-sectional view of the semiconductor laser according to the first embodiment of the present invention, and FIG. (B) is an explanatory diagram for explaining the operation of this laser.

 [FIG. 4] FIG. (A) is an explanatory diagram for explaining the control operation of the current path by the depletion region, and FIG. (B) is a graph showing the relationship between the position in the horizontal direction of the waveguide and the current density. FIG. 5C is a graph showing the relationship between the position in the horizontal direction of the waveguide and the gain.

FIG. 5 (a) is a cross-sectional view of a semiconductor laser according to a second embodiment of the present invention, and FIG. 5 (b) is an explanatory diagram for explaining the operation of this laser. FIG. 6 (a) is a sectional view of a semiconductor laser according to a third embodiment of the present invention, and FIG. (B) is an explanatory diagram for explaining the operation of this laser.

 FIG. 7 (a) is a sectional view of a semiconductor laser according to the fourth embodiment of the present invention.

) Is an explanatory diagram for explaining the operation of the laser.

8] A sectional view of a semiconductor laser according to a fifth embodiment of the present invention.

 FIG. 9A to FIG. 9D are cross-sectional views for explaining semiconductor lasers in Examples 1 to 4 in the sixth embodiment.

[10] This is a graph showing the modulation characteristics of the semiconductor laser in Example 4 of the sixth embodiment.

11] A sectional view of a semiconductor laser according to a seventh embodiment of the invention.

12] A sectional view of a semiconductor laser according to an eighth embodiment of the invention.

 FIG. 13 (a) is a plan view of a gate region portion of a semiconductor laser according to a ninth embodiment of the present invention, and FIG. 13 (b) is a sectional view of this laser.

FIG. 14] A plan view of a gate region portion of a semiconductor laser according to a tenth embodiment of the present invention.

 FIG. 15 (a) is an explanatory view showing an example of a planar shape of a gate region used in the eleventh embodiment of the present invention, and FIG. 15 (b) is an explanatory view showing another example.

FIG. 16 (a) is a plan view of a gate region portion of a semiconductor laser according to a twelfth embodiment of the present invention, and FIG. 16 (b) is a sectional view of this laser.

FIG. 17 (a) is a sectional view of a semiconductor laser according to a thirteenth embodiment of the present invention.

(b) is an explanatory view showing the refractive index distribution in the a-section of this laser, and FIG.

FIG. 8 is an explanatory diagram showing a refractive index distribution in a b-! / Cross section of this laser, and FIG. (D) is an explanatory diagram showing an effective refractive index distribution in a transverse cross section of the waveguide.

FIG. 18 is a plan view of a gate region portion of a semiconductor laser according to a fourteenth embodiment of the present invention.

FIG. 19 is a plan view of a gate region portion of a semiconductor laser according to a fifteenth embodiment of the present invention.

FIG. 20 (a) is a perspective view of a semiconductor laser according to a sixteenth embodiment of the present invention. (b) is a plan view of the laser, and FIG. (C) is a sectional view of the laser.

 A joint

 B depletion region

 1 Substrate crystal

 2 Lower cladding, layer

 3 Active layer

 4 Upper cladding, layer

 4a Part of upper cladding layer

 4b The remainder of the upper cladding layer

 5 Low resistance layer

 6 Lower electrode (first electrode)

 7 Upper electrode (second electrode)

 7a window

 7b Main electrode

 7c Sub electrode

 8 Current blocking layer

 9 AlAs layer

 10 Lower DBR

 11 Top DBR

 14 Control area

 16 · 16a '16b Gate area

 16c left and right connection

 Windows formed in 16d gate region

 18 Third electrode

 20 Third layer

 22 Stripes

24 holes 4th electrode

Claims

The scope of the claims

 [1] It includes a substrate crystal, an active layer, and a joint,

 The junction is disposed in the vicinity of the active layer,

 In addition, the junction is configured to generate a depletion region that restricts the flow of carriers to the active layer.

 A semiconductor light emitting element characterized by the above.

 [2] Furthermore, an upper cladding layer, a lower cladding layer, a first electrode, and a second electrode are provided, and the upper cladding layer is disposed adjacent to an upper portion of the active layer. ,

 The lower cladding layer is disposed adjacent to a lower portion of the active layer;

 The first electrode is electrically connected to the upper cladding layer;

 The second electrode is electrically connected to the lower cladding layer;

 The carrier is sent to the active layer by passing a current between the first electrode and the second electrode.

 The semiconductor light emitting device according to claim 1, wherein:

 [3] The semiconductor light-emitting element according to claim 1 or 2, wherein the junction is configured by a pn junction.

 [4] The semiconductor light-emitting element according to claim 1 or 2, wherein the joining portion is formed of a metal-semiconductor junction.

[5] The semiconductor light-emitting element according to [1] or [2], wherein the junction is configured by a metal-insulator-semiconductor junction.

6. The semiconductor light emitting element according to any one of claims 1 to 5, wherein the junction is disposed at a distance within 3 μm from the active region in the active layer.

[7] Furthermore, a control region composed of a first conductivity type semiconductor and a gate region composed of a second conductivity type semiconductor are provided,

 The said junction part is comprised by junction of the said control area | region and the said gate area | region, The said control area | region is arrange | positioned on the flow path of the electric current which flows in into the said active layer, It is characterized by the above-mentioned. The semiconductor light emitting element as described.

8. The control region according to claim 7, wherein the control region is a part of the substrate crystal. Semiconductor light emitting device.

 [9] It further comprises a lower cladding layer,

 8. The lower clad layer is disposed between the substrate crystal and the active layer, and the control region is formed between the lower clad layer and the substrate crystal. The semiconductor light-emitting device described in 1.

[10] It further comprises a lower cladding layer,

 The lower cladding layer is disposed between the substrate crystal and the active layer, and the control region is formed inside the lower cladding layer.

 The semiconductor light-emitting device according to claim 7.

[11] It further comprises an upper cladding layer,

 The upper cladding layer is disposed above the active layer;

 The control region is disposed above the upper cladding layer.

 The semiconductor light-emitting device according to claim 7.

[12] further comprises an upper cladding layer,

 The control region is formed inside the upper cladding layer.

 The semiconductor light-emitting device according to claim 7.

[13] The deviation according to any one of claims 7 to 11, wherein a third electrode for applying a voltage to the gate region is electrically connected to the gate region. Semiconductor light emitting device.

 14. The semiconductor light emitting device according to claim 7, wherein a depletion layer limiting region is disposed between the control region, the gate region, and the active layer. .

 15. The semiconductor light emitting element according to claim 14, wherein a carrier concentration in the depletion layer limiting region is higher than that in the control region.

16. The semiconductor light emitting element according to any one of claims 7 to 15, wherein the control region and the gate region are different from each other in material or composition.

[17] The gate region is formed with a slit extending substantially along one direction, and a part or all of the control region is disposed inside the slit. The semiconductor light-emitting device according to claim 7.

18. The semiconductor light emitting element according to claim 17, wherein unevenness is formed on a side surface of the gate region facing the slit.

[19] The gate region is formed with a hole that is continuously arranged along substantially one direction.

The semiconductor light emitting element according to claim 7, wherein a part or all of the control region is disposed inside the hole.

20. The semiconductor light emitting device according to claim 7, wherein a refractive index of the gate region is lower than a refractive index of the control region.

21. The semiconductor light emitting element according to claim 7, wherein the material constituting the gate region is absorptive with respect to a wavelength of light generated.

22. The semiconductor light emitting element according to claim 21, wherein the absorptive gate region is configured by adding iron or chromium as an impurity to the semiconductor.

 [23] The semiconductor light emitting element according to any one of claims 17 to 19, wherein an extension direction of the slit or the hole is branched into two or more.

[24] The fourth electrode for controlling the phase of light traveling along the slit is electrically connected to the gate region along the gap of the branched slit. The semiconductor light emitting device according to claim 23.