WO2006022350A1 - Chip antenna and method for manufacturing the same - Google Patents

Chip antenna and method for manufacturing the same Download PDF

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Publication number
WO2006022350A1
WO2006022350A1 PCT/JP2005/015472 JP2005015472W WO2006022350A1 WO 2006022350 A1 WO2006022350 A1 WO 2006022350A1 JP 2005015472 W JP2005015472 W JP 2005015472W WO 2006022350 A1 WO2006022350 A1 WO 2006022350A1
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WO
WIPO (PCT)
Prior art keywords
chip antenna
manufacturing
antenna
conductor
dielectric
Prior art date
Application number
PCT/JP2005/015472
Other languages
French (fr)
Japanese (ja)
Inventor
Tetsuo Shinkai
Original Assignee
Omron Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Corporation filed Critical Omron Corporation
Publication of WO2006022350A1 publication Critical patent/WO2006022350A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/36Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q9/00Electrically-short antennas having dimensions not more than twice the operating wavelength and consisting of conductive active radiating elements
    • H01Q9/04Resonant antennas
    • H01Q9/30Resonant antennas with feed to end of elongated active element, e.g. unipole
    • H01Q9/40Element having extended radiating surface

Definitions

  • the present invention relates to a chip antenna and a manufacturing method thereof, and more particularly to a chip antenna that realizes downsizing of a chip antenna corresponding to a wide frequency band and improvement of productivity and a manufacturing method thereof. .
  • Patent Document 1 Japanese Patent Laid-Open No. 2003-133842 (published on May 9, 2003) proposes a monopole antenna that can be easily reduced in height and facilitates downsizing.
  • the monopole antenna will be described below with reference to FIG.
  • FIG. 17 is a configuration diagram of the monopole antenna 200.
  • the monopole antenna 200 includes a dielectric substrate 20 standing on the ground plane 100, and a radiation conductor 30 provided on the surface of the dielectric substrate 20 along the vertical direction.
  • a wire 40 is connected to the lower end of the radiating conductor 30.
  • a ground electrode portion 50 is provided at the lower end portion of the dielectric substrate 20, and the ground electrode portion 50 is soldered to a ground surface 100 made of a metal plate or the like.
  • the ground electrode unit 50 is connected to an input power source 60, and a high-frequency signal is fed from the input power source 60 to the radiation conductor 30 via the feeder line 40.
  • the radiation conductor 30 has an upper portion 1Z3 far from the ground plane 100 as a wide portion 30a as shown in FIG. 17, and a lower portion 1Z3 near the ground plane 100 as a narrow portion 30b. Between the narrow portion 30b, the width dimension is intermediate between the two.
  • changing the shape of the radiation conductor 30 between the upper side and the lower side of the radiation conductor 30 has the following effects.
  • the upper side of the radiating conductor 30 is a capacitance region where the voltage changes greatly. Since this portion of the monopole antenna 200 is a wide portion 30a, the resonance frequency of the monopole antenna is reduced along with the increase in capacitance on the upper side of the radiating conductor 30.
  • the lower side of the radiating conductor 30 is an inductive region where the current changes greatly. Since the monopole antenna 200 has a narrow portion 30b, the inductance increases. As the inductance increases, the resonance frequency of the monopole antenna 200 decreases.
  • the monopole antenna 200 when compared with a monopole antenna in which a strip-shaped radiation conductor having a constant width is formed on the surface of the dielectric substrate, the monopole antenna 200 has the same height dimension as that of the radiation conductor 30. If the resonant frequency force S is reduced, and therefore the resonance is performed at a desired frequency, a band-shaped radiation conductor having a constant width is formed, and the height dimension can be reduced as compared with the monopole antenna.
  • FIG. 18 shows a plan view of an antenna having a shape generally called a tapered slot shape.
  • the tapered slot shape is a shape shown in the radiation conductor 300 of FIG. 18, and the radiation conductor 300 corresponds to the radiation conductor 30 shown in FIG.
  • the tapered slot-shaped antenna can obtain the same effect as the monopole antenna 200 including the radiating conductor 30 described above.
  • the graph of Fig. 19 shows the VSWR (Voltage Standing Wave Ratio) measurement results of the tapered slot antenna shown in Fig. 18.
  • VSWR Voltage Standing Wave Ratio
  • “1” indicates no reflection, which is the best antenna characteristic.
  • the higher the VSWR the greater the reflection.
  • the lower the VSWR the better the antenna characteristics!
  • the VSWR value can be used as an index indicating the antenna characteristics.
  • the graph in Fig. 19 shows the maximum value of VSWR.
  • this tapered slot antenna has a relatively low VSWR value for radio waves in the frequency band 3.1 to 10.6 GHz, so it has a wide frequency band of 3.1 to 10.6 GHz. It can be seen that it can be used to send and receive radio waves.
  • the antenna as shown in the above prior art has the following problems regarding mass productivity.
  • a material having a relatively high relative dielectric constant such as FR-4 (for example, ⁇ r is about 4.8) is used as the dielectric substrate 20. Since FR-4 is inexpensive, it can contribute to the cost reduction of the monopole antenna 200.
  • the force that can be reduced in terms of cost by using an inexpensive material such as FR-4 while the force is FR-4 is a material having a relative dielectric constant of about 4.8. It is difficult to reduce the size further.
  • the taper slot-shaped wideband antenna has a relatively low VSWR value in the frequency band 3.1 to 10.6 GHz. And in the frequency band around 7-8GHz (especially in the frequency band 7-8GHz), VSWR
  • the present invention has been made in view of the above-described problems, and an object of the present invention is to realize a chip antenna that is easy to manufacture and has a wide antenna characteristic while realizing downsizing. It is in providing the manufacturing method of.
  • a method for manufacturing a chip antenna of the present invention includes a dielectric substrate made of a dielectric material, a terminal portion having a power feeding terminal, and a conductor portion that is electrically connected to the terminal portion.
  • the dielectric substrate is preferably a resin.
  • the dielectric substrate and the feed conductor are integrally formed by insert molding.
  • the power supply conductor having the terminal portion and the conductor portion is sandwiched, and at least a part of the conductor portion of the power supply conductor is dielectric.
  • the dielectric substrate is integrally formed with the power supply conductor by insert molding so as to be covered with the dielectric material of the body substrate.
  • a general chip antenna manufacturing method requires many steps as described above.
  • the chip antenna manufacturing method according to the present invention includes, as described above, integrally molding the dielectric substrate and the power supply conductor by insert molding, so that the above-described mask processing step and the mask are performed. It can be manufactured by a simple method without requiring a step of removing by partial etching.
  • a resin can be used as the dielectric material of the dielectric substrate.
  • the mass productivity of the chip antenna can be improved.
  • the cost associated with the chip antenna can be reduced, so that a low-cost chip antenna can be provided.
  • the conductor portion of the power supply conductor is insert-molded so as to be covered with the dielectric material, the portion of the conductor portion covered with the dielectric material is not exposed to the outside. Therefore, the conductor portion can be protected from the external environment such as oxidation.
  • insert molding means that a metal material such as a power supply conductor is placed in the mold using a mold, and further a dielectric material is placed in the mold. By introducing, a metal material such as a power supply conductor and a dielectric material are integrally formed.
  • the chip antenna manufactured by the chip antenna manufacturing method of the present invention has a chip shape, it is a thin antenna whose height from the ground plane is lower than that of a conventional monopole antenna. Can be provided.
  • the dielectric substrate has at least two dielectric material forces having different dielectric constants, and each dielectric material is in contact with the conductor portion.
  • the conductor part has a line-symmetric shape with respect to an axis of symmetry including the power supply terminal, and the dielectric substrate has a dielectric constant stepped toward a side farther from the side force closer to the axis of symmetry. It is preferable to be molded so as to be large. Specifically, it is preferable that at least one of the above-mentioned dielectric materials is rosin.
  • the conventional broadband antenna having a tapered slot shape has an increased VSWR value in a specific frequency band. This is due to the reflection of electromagnetic waves propagating to the radiation conductor. Specifically, electromagnetic waves are reflected at the interface where the dielectric constant changes, such as the outer surface of the dielectric substrate.
  • the boundary surface is, for example, the boundary between the outer surface of the dielectric substrate and the external space where electromagnetic waves are radiated.
  • the conventional taper slot shaped broadband antenna and the monopole antenna described in Patent Document 1 each have a single-layer dielectric substrate as shown in the figure.
  • each substrate material is configured to be in contact with at least the conductor portion, and the substrate materials have different dielectric constants. Thereby, the electromagnetic wave propagating from the feed line to the feed conductor inside the dielectric substrate is reflected on the boundary surface of each substrate material and the outer surface of the dielectric substrate according to the difference in the dielectric constant. It will be.
  • the chip antenna manufacturing method of the present invention can make the dielectric substrate multi-layered, and even when multi-layered, each dielectric can be easily formed by insert molding.
  • the material and the power supply conductor can be integrally formed.
  • the feeding conductor is disposed in the mold with reference to a positioning region provided in the chip-shaped mold, and the dielectric substrate and the insert are inserted. It is preferable to integrally mold by molding.
  • a chip antenna with high manufacturing accuracy can be manufactured.
  • a positioning region is provided in advance at a predetermined position of a mold used for insert molding.
  • the power supply conductor can be arranged in the mold with reference to the positioning region.
  • the feeding conductor and the dielectric substrate can be accurately integrally formed.
  • the chip antenna manufacturing method of the present invention can be formed integrally with the feeding conductor and the dielectric substrate more accurately than simply with the conventional method. Compared with the conventional method, the manufacturing accuracy is high.
  • the feeding conductor is formed by pressing a lead frame in accordance with a cut die.
  • the manufacturing method of the chip antenna of the present invention can be simplified, and a conductor portion having a desired shape can be easily formed.
  • the feed conductor (the conductor portion of the feed conductor)
  • a number of steps were required, such as a step of masking the dielectric substrate, a metal material corresponding to the power supply conductor, and finally removing the mask portion by etching. Therefore, the chip antenna manufacturing method of the present invention can form the power feeding conductor by press-carrying the lead frame in accordance with the cut mold, so that the conductor is very easily compared with the conventional method. The part can be formed.
  • the conductor portion has a tapered slot shape.
  • the chip antenna manufactured by the manufacturing method of the present invention can be used for transmission / reception of radio waves in the wide frequency band 3.1 to: LO. 6 GHz.
  • the terminal portion is bent after the dielectric substrate and the feed conductor are integrally formed by insert molding.
  • the chip antenna manufactured by the chip antenna manufacturing method of the present invention can be formed into a surface-mounted shape.
  • the monopole antenna in the prior art has a structure that stands up with respect to the ground plane, it is difficult to automatically mount the ground pole on the ground plane as described above.
  • the terminal portion is bent after the dielectric substrate and the feed conductor are integrated by insert molding. Since the terminal portion is bent, the chip antenna manufactured by the chip antenna manufacturing method of the present invention is a surface mount type.
  • the surface mount type refers to a state in which the surface of the power supply conductor of the chip antenna is configured to be horizontal with respect to the installation surface of the apparatus or device on which the chip antenna according to the present invention is mounted. It is.
  • this is a surface-mounted chip antenna, Rather than a standing structure, it can be surface mounted. As a result, it is possible to improve the productivity of devices equipped with chip antennas.
  • the resin is a polyether sulfone or a liquid crystal polymer.
  • Polyethersulfone or liquid crystal polymer has a characteristic of having a high dielectric constant among rosins.
  • the feed conductor can be reduced in size due to the wavelength shortening effect. Therefore, it is possible to further reduce the size of the chip antenna manufactured by the chip antenna manufacturing method of the present invention.
  • FIG. 1 is a perspective view showing the shape of a chip antenna in an embodiment according to the present invention.
  • FIG. 2 is a perspective view showing the configuration of the chip antenna in the embodiment according to the present invention.
  • FIG. 3 is a cross-sectional view of the chip antenna shown in FIG. 1 cut along line AA ′.
  • FIG. 4 is a cross-sectional view of the chip antenna shown in FIG. 1 cut along a line BB ′.
  • FIG. 5 (a) is a plan view showing a structure of a feed conductor composed of a feed electrode portion and a feed terminal portion provided in the chip antenna according to the embodiment of the present invention.
  • FIG. 5 (b) is a perspective view of the feed conductor shown in FIG. 5 (a).
  • FIG. 6 is a schematic diagram showing a method for manufacturing a chip antenna according to an embodiment of the present invention, and in particular, a method for manufacturing a chip antenna when a dielectric substrate is made of one type of substrate material.
  • FIG. 7 is a schematic diagram showing a method for manufacturing a chip antenna according to an embodiment of the present invention, and in particular, a method for manufacturing a chip antenna when the dielectric substrate is made of two types of substrate materials.
  • FIG. 8 is a perspective view showing a modification of the structure of the chip antenna according to the embodiment of the present invention.
  • FIG. 9 As a characteristic evaluation of the chip antenna in the embodiment according to the present invention, 3.1 ⁇ : LO. It is a graph which shows the measurement result which measured VSWR in a 6GHz band.
  • FIG. 10 Cross-sectional view showing the structure of a general tapered slot antenna and a graph showing the measurement results of VSWR in the 3.1 to 10.6 GHz band for each dielectric constant of the dielectric substrate. is there.
  • FIG. 11 (a) is a cross-sectional view showing a configuration of a chip antenna according to an embodiment of the present invention.
  • FIG. 11 (b) is a graph showing measurement results obtained by measuring VSWR in the 3.1 to 10.6 GHz band of the chip antenna shown in FIG. 11 (a).
  • FIG. 12 is a perspective view showing a modification of the structure of the chip antenna according to the embodiment of the present invention.
  • FIG. 13 (a) is a perspective view showing a modification of the configuration of the chip antenna according to the embodiment of the present invention.
  • FIG. 13 (b) is a cross-sectional view of the chip antenna shown in FIG. 13 (a) cut along line CC ′.
  • FIG. 14 is a sectional view showing a modification of the configuration of the chip antenna shown in FIG.
  • FIG. 15 is a cross-sectional view showing the configuration of the chip antenna used in this example.
  • FIG. 16 is a graph showing the measurement results of measuring VSWR in the 3.1 to: LO. 6 GHz band as a characteristic evaluation of the chip antenna used in this example.
  • FIG. 17 is a configuration diagram showing a configuration of a monopole antenna in the prior art.
  • FIG. 18 is a cross-sectional view showing a configuration of a general tapered slot antenna.
  • FIGS. 1 to 14 Embodiments according to the present invention will be described with reference to FIGS. 1 to 14 as follows.
  • FIG. 1 is a perspective view showing the shape of chip antenna 1 in the present embodiment.
  • chip antenna 1 is a chip-shaped antenna whose outer shape is dielectric.
  • the body substrate 3 is formed.
  • dielectric substrate 3 is composed of two types of substrate materials, substrate materials 3a and 3b.
  • the present invention is not limited to this. Even when the dielectric substrate 3 is composed of only one kind of substrate material, it is possible to construct two or more kinds of substrate material forces. It may be.
  • the dielectric constant of the substrate materials 3a and 3b of the dielectric substrate 3 with respect to the dielectric constant ⁇ 0 in the space (external space, usually the air layer) from which the electromagnetic waves are radiated from the chip antenna 1 The ratio of ⁇ 1 ⁇ 1 / ⁇ 0 is defined as the relative dielectric constant of dielectric substrate 3 (substrate materials 3a and 3b).
  • FIG. 2 is a perspective view of the chip antenna 1 illustrated in FIG. In FIG. 2, the substrate materials 3a and 3b of the dielectric substrate 3 are omitted for convenience of explanation.
  • the chip antenna 1 includes a feeding conductor 2, a dielectric substrate 3, and ground electrodes 4a and 4b.
  • the power supply conductor 2 includes a power supply electrode portion 5 (conductor portion) and a power supply terminal portion 6 (terminal portion). As shown in FIG. 2, the power supply conductor 2 is sandwiched between the dielectric substrates 3. In particular, the power supply electrode portion 5 is completely covered with the dielectric substrate 3. A part of the power feeding terminal 6 is exposed to the outside of the dielectric substrate 3, and has a power feeding terminal 7 at the end of the exposed power feeding terminal 6.
  • FIG. 3 is a cross-sectional view showing a state where the chip antenna 1 is cut along a line segment AA ′ in FIG. As shown in FIG. 3, the feed conductor 2 has a line-symmetric shape with respect to the symmetry axis S.
  • the feeding electrode portion 5 is an electrode made of a conductor, and this shape is generally called a taper slot shape.
  • the feeding electrode portion 5 is connected to the feeding terminal portion 6 in the region V.
  • the power supply terminal portion 6 is a terminal made of a conductor, and the shape thereof is a flat plate.
  • the power feeding terminal portion 6 is disposed between the ground electrodes 4a and 4b so as to be separated from each other, and is electrically insulated from the ground electrodes 4a and 4b by being separated.
  • One of the opposing ends of the feeding terminal portion 6 is connected to the region V of the feeding electrode portion 5. And electrically connected to the feeding electrode portion 5.
  • a power supply terminal 7 is provided and connected to a power supply line (not shown).
  • the power supply terminal 7 of the power supply terminal portion 6 is exposed to the outside of the dielectric substrate 3, and the exposed portion is shown in FIG. 1 and FIG. It is bent like this. Since the feeding terminal 7 portion of the feeding terminal portion 6 is bent, the chip antenna i of the present embodiment is suitable for surface mounting.
  • the power supply terminal portion 6 can be made of, for example, a metal material.
  • the monopole antenna 200 As shown in FIG. 17, the monopole antenna 200 according to the prior art has a structure in which the monopole antenna 200 stands up on the ground plane 100. In its manufacture, the monopole antenna 200 is self-supported on the ground plane 100. That is, it is difficult to automatically mount the monopole antenna 200 on the ground plane 100. Therefore, in order to stand on the ground plane 100, it is necessary to perform soldering manually. Therefore, the monopole antenna 200 is compared with a monopole antenna in which a strip-shaped radiation conductor having a constant width is formed. Although it can be downsized, mounting on mounting devices was complicated. Further, as described above, the monopole antenna 200 is configured to stand on the ground plane 100, and thus has a predetermined height in the height direction.
  • the monopole antenna 200 is mounted on a thin device such as a mopile device. It is difficult to let on the other hand, the chip antenna 1 according to the present embodiment has a structure suitable for surface mounting by bending the feeding terminal 7 portion of the feeding terminal portion 6, so that the mass productivity of the chip antenna is improved. Thus, it is possible to improve the mass productivity of the mounting device on which the chip antenna is mounted.
  • the ground electrodes 4a and 4b are electrodes made of a conductor, and the shape thereof is a flat plate.
  • the ground electrodes 4a and 4b are perpendicular to the symmetry axis S formed by the feed electrode section 5, and the ground electrode 4a and the ground electrode 4a are arranged so that the feed terminal section 6 is spaced from the ground electrodes 4a and 4b. And it is arranged at a certain distance from 4b.
  • the ground electrodes 4a and 4b can be made of, for example, a metal plate material.
  • Dielectric substrate 3 is made of a dielectric material, and is interposed between feeding electrode portion 5 and ground electrodes 4a and 4b, and fills between feeding electrode portion 5 and ground electrodes 4a and 4b. It is a member.
  • the outer shape of the dielectric substrate 3 corresponds to the outer shape of the chip antenna 1, and as shown in FIG. It has a shape.
  • the dielectric substrate 3 is composed of substrate materials 3a and 3b. The substrate materials 3a and 3b will be described in detail below based on FIG.
  • FIG. 4 is a cross-sectional view showing a state where the chip antenna 1 is cut along the line BB ′ in FIG.
  • the dielectric substrate 3 is composed of substrate materials 3a and 3b, and both are configured to be in contact with the feeding electrode portion 5.
  • the substrate material 3a is arranged in a region including the symmetry axis S of the feeder conductor 2
  • the substrate material 3b is arranged in a region far from the symmetry axis S without including the symmetry axis S. !
  • the substrate materials 3a and 3b are dielectrics having dielectric constants ⁇ 3a and ⁇ 3b, respectively, and their relative dielectric constant forces S are adjusted so as to increase in this order. Specifically, the substrate material 3b has a higher dielectric constant than the substrate material 3a so that the relative dielectric constant increases as the distance from the symmetry axis S increases.
  • the dielectric constant of each substrate material is not particularly limited as long as such a condition is satisfied.
  • a resin is preferable as a substrate material having such a dielectric constant.
  • the chip antenna according to the present invention is manufactured by integrally molding the feeding conductor 2 and the dielectric substrate 3 by insert molding. Therefore, a resin having thermoplasticity, that is, a thermoplastic cured resin is preferable.
  • the resin examples include polyethersulfone (PPS), liquid crystal polymer (LCP), syndiotactic polystyrene (SPS), polycarbonate (PC), polyethylene terephthalate (PET), epoxy resin (EP ), Polyimide resin (PI), polyetherimide resin (PEI), phenol resin (PF), and the like.
  • PPS polyethersulfone
  • LCP liquid crystal polymer
  • SPS syndiotactic polystyrene
  • PC polycarbonate
  • PET polyethylene terephthalate
  • EP epoxy resin
  • PI Polyimide resin
  • PEI polyetherimide resin
  • PF phenol resin
  • PPS or LCP is particularly preferable because it can have a high dielectric constant among the resins.
  • the specific forming width W of the substrate material 3a is appropriately determined depending on the size of the chip antenna. Can be set.
  • the area of the cross section corresponding to the cross section shown in FIG. In the case of a chip antenna of m ⁇ 15 mm and a thickness of lmm, the forming width W of the substrate material 3a can be set in the range of 7 mm to: L lmm, and is preferably about 9 mm. In the following description, a case where the forming width W is 9 mm will be described.
  • the maximum value of VSWR in the frequency band of 3.1 to 10.6 GHz is shown on the vertical axis as shown in FIG.
  • a cable such as a coaxial cable (not shown) is connected to the center of the chip antenna 1 from the ground electrode 4a side.
  • the inner conductor (core wire) of the coaxial cable is connected to the feeding terminal 7, and the outer conductor (shield) of the coaxial cable is connected between the ground electrodes 4a and 4b.
  • the ground electrodes 4a and 4b are provided with connectors (not shown) for connection to the coaxial cable.
  • a coaxial cable without a connector may be directly attached to the ground electrodes 4a and 4b.
  • the chip antenna 1 in the present embodiment shown in FIGS. 1 to 3 is configured to include ground electrodes 4a and 4b.
  • the present invention is not limited to this. Absent. That is, the ground electrode may be provided on the substrate side on which the chip antenna 1 is mounted. In the following description of the manufacturing method of the chip antenna 1 according to the present embodiment, the description will be given based on a configuration not provided with the ground electrodes 4a and 4b for convenience of explanation.
  • the ground electrode is provided on the substrate side on which the chip antenna 1 is mounted, when the ground electrode is prepared in advance on the substrate side to be mounted and the coaxial cable is connected, the internal conductor Connect the (core wire) in the same way as above, and connect the outer conductor (shield) of the coaxial cable to the ground electrode fabricated on the board side.
  • a dielectric substrate is used.
  • the case where only the force S i of the substrate material is also described will be described, and then the manufacturing method of the chip antenna 1 in this embodiment having the substrate materials 3a and 3b on the dielectric substrate will be described.
  • the member numbers in FIGS. 1 to 4 are used as they are for the convenience of explanation also when the case where the dielectric substrate is made of only one kind of substrate material is described.
  • the power supply electrode portion 5 can be formed into a taper slot-shaped power supply electrode portion 5 as shown in FIG. 5 (a) by placing a lead frame in a taper slot-shaped cut die and pressing it. it can. For example, gold, silver, copper, or the like can be used as a material constituting the feeding electrode portion 5.
  • the power feeding terminal portion 6 is formed by soldering. Since the feeding electrode unit 5 and the feeding terminal unit 6 are electrically connected, the feeding terminal 7 can be electrically connected to the feeding electrode unit 5.
  • FIG. 5 (b) is a perspective view of the power supply conductor 2 in which the connection portion of the power supply terminal portion 6 is cut from the structure in the state of FIG. 5 (a).
  • the power supply conductor 2 manufactured as described above is used to be integrally formed with the dielectric substrate 3 by insert molding to form a chip antenna.
  • FIG. 6 (a) is a perspective view showing the shape of the first mold 8.
  • FIG. 6A shows only one side of the first mold 8. Therefore, when the substrate material is introduced, the first metal mold 8 on the other side is also used so that the power supply conductor 2 is sandwiched from both sides.
  • the first mold 8 is provided with a first positioning region 8a at a predetermined position.
  • the first positioning region 8a include those in which a depression is formed in the shape of the power supply terminal portion 6 of the power supply conductor 2 as in the first positioning region 8a.
  • the feeding terminal portion 6 can be fitted into the depression and the feeding conductor 2 can be aligned.
  • the power supply conductor 2 shown in FIG. 5 (b) has the first positioning region 8a. 1 can be accurately placed in the mold 8 and the feeding conductor 2 and the dielectric substrate 3 can be integrally formed with high accuracy.
  • FIG. 6B is a perspective view showing a state in which the power supply conductor 2 is arranged in the first mold 8.
  • (c) is a schematic view showing a state in which the feeding conductor 2 is sandwiched between the first molds 8 on both sides.
  • the dielectric substrate 3 and the feed conductor 2 are integrated by introducing the substrate material of the dielectric substrate 3 having thermoplasticity into the first mold 8 from an introduction port (not shown) and insert molding. To do.
  • FIG. 6 (d) shows the chip antenna 1 after insert molding.
  • the substrate material of the dielectric substrate 3 is formed integrally with the power supply conductor 2 so as to completely cover the surface of the power supply electrode portion 5 of the power supply conductor 2.
  • the integrally formed chip antenna 1 is cut with the length of the feeding terminal portion 6 shortened as shown in FIG. 6 (e). Next, as shown in FIG. 6 (f), the feeding terminal portion 6 exposed to the outside of the dielectric substrate 3 is bent.
  • each substrate material only needs to have different thermoplasticity.
  • the number of molds corresponding to the type of substrate material can be used to sequentially change the molds.
  • FIG. 7 is a schematic diagram for explaining a manufacturing method of the chip antenna 1. Since the manufacturing method of the feeding conductor 2 is the same as described above, the description thereof is omitted.
  • FIG. 7 (a) is a perspective view showing the shape of the second mold 9.
  • FIG. 7 (a) shows the shape of the second mold 9. Only one side is shown. Therefore, when introducing the substrate material,
  • the metal mold 9 of 2 is also used so that the feeder conductor 2 is sandwiched from both sides.
  • the second mold 9 is also provided with a second positioning region 9a at a predetermined position.
  • the feeding conductor 2 manufactured by the above method can be aligned based on the second positioning region 9a, and can be accurately placed in the second mold 9.
  • FIG. 7B is a perspective view showing a state in which the power supply conductor 2 is arranged in the second mold 9.
  • FIG. 7 (c) is a schematic diagram showing a state in which the feeding conductor 2 is sandwiched between the second molds 9 on both sides.
  • the substrate material 3a of the dielectric substrate 3 having thermoplasticity is introduced into the second mold 9 from an introduction port (not shown), and insert molding is performed to integrally mold the substrate material 3a and the power supply conductor 2. .
  • FIG. 7 (d) is a perspective view showing a state in which the substrate material 3a and the feed conductor 2 integrally formed in the first mold 8 are arranged.
  • FIG. 7 (e) is a schematic diagram showing a state in which the feeding conductor 2 is sandwiched between the first molds 8 on both sides.
  • a substrate material 3b having thermoplasticity is introduced into the first mold 8 through an introduction port (not shown), and insert molding is performed.
  • FIG. 7 (f) is a perspective view showing a state in which the substrate material 3a, the power supply conductor 2, and the substrate material 3b are integrally formed.
  • the chip antenna 1 shown in FIGS. 1 to 3 has a configuration in which the ground electrodes 4a and 4b are provided.
  • the manufacturing method is as shown in FIG. 7 (b), in which a positioning region for arranging the ground electrodes 4a and 4b is provided in the second mold 9, Together with the conductor 2, the substrate material 3 a of the dielectric substrate 3 having thermoplasticity and insert molding are performed.
  • FIG. 7 (d) a positioning region for arranging the ground electrodes 4a and 4b is provided in the first mold 8, and the substrate material 3b having thermoplasticity and the substrate material 3a are fed.
  • Conductor 2 and ground electrodes 4a and 4b are insert-molded.
  • the chip antenna 1 including the dielectric substrate 3 having the two types of substrate materials shown in FIGS. 1 and 3 can be manufactured.
  • the chip antenna 1 can be manufactured using two or more kinds of substrate materials.
  • FIG. 8 is a perspective view showing a state in which the power supply conductor 2 having the structure shown in FIG. 5 (a) is integrally formed by insert molding with the power supply conductor 2, the dielectric substrate 3, and the like. . In this way, it can also be manufactured using the feed conductor having the structure shown in FIG.
  • the chip antenna manufacturing method according to the present embodiment is formed by integrally forming the dielectric substrate 3 and the feed conductor 2 by insert molding. In comparison, manufacturing is facilitated.
  • the prior art monopole antenna 200 has a radiating conductor 30 connected to a feeding line 40 such as a coaxial cable provided on the surface of the dielectric substrate 20. ⁇ . That is, the radiation conductor 30 is exposed to the outside. For this reason, the radiation conductor 30 has poor resistance to the external environment such as oxidation, and as a result, the durability of the monopole antenna 200 with respect to the external environment has occurred.
  • the chip antenna manufacturing method according to the present embodiment since the feeding electrode portion 5 is covered with the substrate materials 3a and 3b, the above-described problem of resistance to the external environment can be solved. Therefore, the chip antenna 1 having high durability can be provided.
  • the chip antenna 1 can be used for both electromagnetic wave transmission and reception.
  • the chip antenna 1 is used to transmit a high frequency band of 3.1 to 10.6 GHz, which corresponds to the frequency band of UWB communication.
  • the antenna can be downsized by providing the dielectric substrate.
  • the dielectric substrate 3 is This is because a wavelength shortening effect is obtained by providing them. Therefore, for example, an electromagnetic wave having a longer wavelength, that is, an electromagnetic wave having a lower frequency can be transmitted as compared with a chip antenna of the same size without a dielectric substrate.
  • chip antenna 1 is larger in size than a chip antenna without a dielectric substrate.
  • FIG. 9 shows the antenna characteristics of the chip antenna 1 according to this embodiment as 3.1 to 10.
  • the forming width of a is 9mm.
  • FIG. 9 for comparison, the measurement result of a chip antenna having a dielectric substrate made up of only one type of substrate material and having a tapered slot-shaped power supply electrode is shown by a broken line.
  • the increase in the maximum VSWR value is reduced in the vicinity of the frequency of 3.1 GHz and in the frequency region of 7 to 8 GHz. I can tell you.
  • the reason why the chip antenna 1 of the present embodiment was able to reduce the increase in the VSWR maximum value in the vicinity of the frequency of 3.1 GHz and the frequency of 7 to 8 GHz is as follows. It can be considered.
  • is the length of the antenna
  • C is the speed of light
  • f is the frequency
  • ⁇ eff is the effective dielectric constant
  • Figure 10 shows a plan view of a tapered slot antenna with a dielectric substrate consisting of one type of substrate material, and the maximum value of VSWR in the antenna frequency band 3.1 to 10.6 GHz. It is the graph which measured.
  • This antenna has a chip shape as in the present embodiment.
  • the frequency band of each of the three types of tapered slot chip antennas is changed for this antenna by changing the relative dielectric constant of the substrate material to high, medium, and low, respectively. 10. Measure the maximum value of VSWR at 6GHz.
  • the one-dot chain line has a high dielectric constant, a chip antenna formed by using a substrate material, the solid line has a chip antenna formed by using a substrate material having an intermediate dielectric constant, and the two-dot chain line is electrically charged.
  • a low-rate chip antenna formed using a substrate material is shown.
  • chip antennas with tapered slot-shaped feed conductors usually have poor VSWR near 3.1 GHz and between 3.1 and 10.6 GHz. That is, the maximum value of VSWR tends to increase or become unstable.
  • the tapered slot antenna has an antenna structure that lowers the VSWR maximum value over a wide band. If the antenna has the same size, the larger the dielectric constant of the base material, the shorter the wavelength. The maximum frequency tends to decrease.
  • the VSWR maximum value in the frequency range where the intermediate VSWR maximum value is bad is also shifted to the upper limit frequency side of 10.6 GHz, and depending on the conditions, the VSWR maximum value is higher than 10.6 GHz as shown in the figure. Shifting to a higher frequency side can solve the above-mentioned problem regarding the adverse effect of the intermediate maximum VSWR value.
  • the chip antenna 1 of the present embodiment has the advantages described based on the graph of FIG.
  • FIG. 11 (a) is a schematic diagram showing the relationship between the frequency and the antenna length in the chip antenna 1 of the present embodiment.
  • the length of the antenna corresponding to the length a defines the upper limit frequency.
  • the length of the antenna corresponding to length b defines the lower limit frequency. 3. 1 ⁇ : LO.
  • the upper limit frequency is 10.6 GHz
  • the lower limit frequency is 3.1 GHz. This relationship between the frequency and the antenna length applies not only to the chip antenna 1 but also to all tapered slot antennas.
  • the chip antenna of the present invention may have a configuration in which the ground electrode is not provided but the ground electrode is provided on the substrate side on which the chip antenna is mounted.
  • the length a of the antenna that defines the upper limit frequency is the length of the boundary portion of the chip antenna with the mounting substrate, and the length b of the antenna that defines the lower limit frequency is similarly mounted on the chip antenna. The length is from the boundary with the substrate.
  • the chip antenna 1 of the present embodiment increases the dielectric constant of the substrate material 3b of the dielectric substrate 3 corresponding to the length b of the antenna length that defines the lower limit frequency.
  • the dielectric material corresponding to the antenna length corresponding to the portion of the substrate material 3a of the dielectric substrate 3 corresponding to the length a of the antenna length that defines the limiting frequency and the VSWR maximum value in the middle of the above band is bad. It is considered that the advantages shown in the graph of Fig. 10 could be achieved by making the dielectric constant higher than that of the substrate 3 part. Specifically, the graph shown in FIG.
  • FIG. 11 (b) is a graph obtained by measuring the maximum value of the VSWR of the chip antenna 1 in the frequency range of 3.1 to 10.6 GHz band. .
  • the measurement result of the maximum value of VSWR of chip antenna 1 is shown by a solid line, and for comparison, the VSWR of the chip antenna with an intermediate dielectric constant shown in the graph of Fig. 10 is shown.
  • the measurement result of the maximum value is shown as a broken line.
  • the chip antenna 1 of the present embodiment has the dielectric constant ⁇ on the dielectric substrate 3.
  • the VSWR maximum value of the chip antenna 1 of this embodiment is 3.1 ⁇ : LO. Since the dielectric substrate corresponding to the length b, that is, the substrate material 3b, has a high relative dielectric constant, the maximum VS WR value on the lower limit frequency side corresponding to 3.1 GHz is It will be lower than the maximum VSWR value shown in.
  • the maximum VSWR value of the chip antenna 1 of this embodiment is 3.1 to: LO.
  • the upper limit frequency is defined in the frequency region of 6 GHz band.
  • the relative dielectric constant of the substrate material 3a of the dielectric substrate corresponding to the antenna length length a is high, and the antenna length corresponding to the portion where the VSWR maximum value has increased in the middle of the above band
  • the relative dielectric constant of the corresponding dielectric substrate is high. Therefore, the increase in the maximum VSWR value that occurred in the middle part of the above band shifts to the higher frequency side from the upper limit frequency side (10.6 GHz side) and disappears from the 3.1 to 10.6 GHz band.
  • the chip antenna 1 of the present embodiment can stabilize the VSWR as a whole by making use of wavelength shortening on the lower limit frequency side and not performing wavelength shortening on the middle to upper limit frequency side. It is possible and considered.
  • the chip antenna 1 includes the dielectric substrate 3 having the substrate materials 3a and 3b having different relative dielectric constants, whereby the above-described antenna characteristics can be obtained.
  • the chip antenna manufacturing method of the present invention it is possible to perform insert molding.
  • the feeding conductor 2 and the dielectric substrate 3 are integrally formed.
  • the dielectric substrate 3 is composed of two substrate materials 3a and 3b having different thermoplasticity, and the substrate materials 3a and 3b are in contact with the surface of the conductor portion. Has been.
  • the dielectric substrate is composed of a plurality of substrate materials, these substrate materials have thermoplasticity different from each other.
  • the feeding conductor can be integrally formed.
  • the substrate materials 3a and 3b have different relative dielectric constants, the maximum value of VSWR can be kept small, and a wider frequency band can be handled.
  • a chip antenna can be provided.
  • the substrate materials 3a and 3b constituting the dielectric substrate have different relative dielectric constants, the locations where the electromagnetic waves are reflected are dispersed.
  • the reflected wave of the frequency is also dispersed. Therefore, it is possible to avoid the problem that a reflected wave with strong intensity is generated concentrated on a predetermined frequency and the VSWR value at that frequency rises.
  • the dielectric substrate 3 has a relative dielectric constant that increases stepwise toward the symmetrical axis S, toward the side, and toward the side. It is shaped like this. Specifically, the dielectric constant of the substrate material 3b of the dielectric substrate 3 corresponding to the antenna length length b that defines the lower limit frequency is defined as the dielectric substrate 3 corresponding to the antenna length length a that defines the upper limit frequency. It is higher than the substrate material 3a.
  • the VSWR can be stabilized as a whole by making use of the wavelength reduction on the lower limit frequency side and not performing the wavelength reduction on the middle to upper limit frequency side.
  • the chip antenna manufacturing method of the present invention it is easy to manufacture.
  • the feed electrode portion 5 of the feed conductor 2 is insert-molded so as to be covered with the substrate materials 3a and 3b, the conductor feed electrode portion 5 Is not exposed to the outside. For this reason, contact of the power supply electrode portion 5 with the external environment can be avoided.
  • the durability of the power feeding electrode portion 5 with respect to the external environment and the durability of the entire chip antenna 1 with respect to the external environment can be improved.
  • the present invention is not limited to this, and for example, a structure in which a part of the feeding electrode portion 5 is exposed to the outside may be used.
  • the chip antenna 1 has a chip shape, it can provide a thin antenna having a lower height from the ground plane than a conventional monopole antenna. It can be suitably used for thin devices such as various mopile devices that are actively used.
  • the feed electrode portion 5 can be formed by pressing a lead frame in accordance with a cut mold.
  • the manufacturing method of the chip antenna 1 can be further facilitated. That is, in the conventional manufacturing method, as described above, in order to form the conductor portion of the power supply conductor, the process of masking the dielectric substrate and the metal material corresponding to the power supply conductor are measured, and finally, Required many processes such as etching to remove the mask portion. Therefore, according to the method for manufacturing a chip antenna of the present invention, the power supply electrode portion 5 is formed by pressing a lead frame, so that the power supply electrode portion 5 can be manufactured more easily than in the past. .
  • the feeding electrode portion 5 having a desired shape. Therefore, it is possible to form the feeding electrode portion 5 having a desired shape by changing the shape of the cut mold. Therefore, it is possible to provide a chip antenna 1 having a shape suitable for an apparatus or device on which the chip antenna 1 manufactured by the manufacturing method of the present invention is mounted.
  • the feed electrode portion 5 is tapered.
  • the chip antenna 1 can be used for transmission / reception of radio waves in a wide frequency band of 3.1 to: LO. 6 GHz.
  • the feed terminal 2 is bent after the feed conductor 2 and the dielectric substrate 3 are integrally formed by insert molding.
  • the chip antenna 1 can be formed into a surface-mounted shape. That is, the chip antenna 1 manufactured by the method for manufacturing a chip antenna of the present invention can cope with surface mounting that does not have a structure that stands up with respect to a device on which the chip antenna is to be mounted. Therefore, the difficulty of standing up and manufacturing which has been a problem in the past does not occur in the chip antenna manufacturing method of the present invention, and the chip antenna 1 can be automatically mounted.
  • PPS or LCP has a special property that it can have a higher dielectric constant than conventionally known resins.
  • the feed conductor can be downsized due to the wavelength shortening effect, and as a result, the chip antenna 1 itself can be downsized.
  • the chip antenna 1 having a rectangular parallelepiped shape has been described.
  • the present invention is not limited to this, and is not limited to a rectangular parallelepiped shape as long as it can be surface-mounted as described above.
  • the shape shown in FIG. 12 may be used. That is, in the chip antenna 1 shown in FIG. 12, the width of the dielectric substrate 3 increases from the feeding electrode portion 5 of the feeding conductor 2 toward the feeding terminal portion 6, and as a whole, the chip antenna 1 has a trapezoidal shape. Is in shape
  • the dielectric substrate 3 whose dielectric constant changes stepwise has been described in the present embodiment, the dielectric substrate 3 may be one whose dielectric constant changes continuously.
  • Fig. 13 (a) is a perspective view showing the chip antenna 1 in which the ceramic 33a is used as the substrate material of the dielectric substrate 3, and Fig. 13 (b) shows the chip antenna 1 shown in Fig. 13 (a) as a line segment. It is sectional drawing which showed the state cut
  • the chip antenna 1 using ceramic may be a chip antenna having a cross-sectional structure as shown in FIG.
  • PPS having a dielectric constant of 16 was used for the substrate material 3a of the dielectric substrate 3, and PPS having a dielectric constant of 16 was used for the substrate material 3b.
  • the shape of the chip antenna 1 is such that the cross-sectional area corresponding to the cross-sectional view shown in FIG. 3 is 14 mm ⁇ l 5 mm, and the thickness is lmm.
  • a conductive material eg For example, ground electrodes 4a and 4b made of a copper alloy thin plate material are formed.
  • a tapered slot-shaped power supply conductor 4 having a power supply terminal portion 6 made of a conductive material (for example, a copper alloy thin plate material) and having a width of 2 mm is separated from each of the ground electrodes 4a and 4b by 1.1 mm. Is formed.
  • the feed electrode portion 5 of the feed conductor 2 has a tapered slot shape, and is formed by pressing a lead frame made of a conductive material (for example, a copper alloy thin plate material).
  • the feeding electrode part 5 and the feeding terminal part 6 were connected by silver paste.
  • the ground electrodes 4a and 4b have a length of lmm along a side having a length of 15mm.
  • the molding width W of the substrate material 3a of the dielectric substrate 3 is appropriately changed, and the antenna characteristics are set to the VSWR maximum value in each case.
  • Figures 16 (a) and (b) are: 3.1-: LO.
  • the measurement results for the seven types of chip antennas are shown in two parts in FIGS. 16 (a) and 16 (b).
  • W 3
  • the forming width of the substrate material 3b is 9 mm
  • the increase in the maximum VSWR near the frequency of 10.6 GHz, as seen when W Omm, can be reduced.
  • the chip antenna according to the present invention includes a dielectric substrate made of substrate materials having different relative dielectric constants, and therefore, compared with a general tapered slot antenna, 3.1 to : LO. It is possible to provide a chip antenna with good and stable antenna characteristics by reducing the deterioration of antenna characteristics, which has been a problem when dealing with a broadband of 6 GHz.
  • the chip antenna manufacturing method according to the present invention can be easily manufactured because the dielectric substrate and the feed conductor can be integrally formed by insert molding.
  • the chip antenna to be manufactured is a surface-mount type chip that can cope well with a wide band of LO. 6 GHz by constructing a dielectric substrate from substrate materials with different relative dielectric constants. An antenna can be provided.

Abstract

In a chip antenna (1), a power supply conductor (2) and a dielectric board (3) are integrally formed by insert-forming a taper slot shaped power supply electrode part (5) to be covered with board materials (3a, 3b), which constitute the dielectric board (3) and have different specific inductive capacities. Thus, a method for manufacturing the chip antenna which is small but can be easily manufactured, has excellent antenna characteristics and applicable to wide band is provided.

Description

明 細 書  Specification
チップアンテナおよびその製造方法  Chip antenna and manufacturing method thereof
技術分野  Technical field
[0001] 本発明は、チップアンテナおよびその製造方法に関し、より詳細には、広い周波数 帯域に対応したチップアンテナの小型化およびその生産性の向上を実現するチップ アンテナおよびその製造方法に関するものである。  TECHNICAL FIELD [0001] The present invention relates to a chip antenna and a manufacturing method thereof, and more particularly to a chip antenna that realizes downsizing of a chip antenna corresponding to a wide frequency band and improvement of productivity and a manufacturing method thereof. .
背景技術  Background art
[0002] 近年、無線通信機能を備えた携帯型の情報処理装置の普及がめざま 、。このよ うな情報処理装置における無線通信には、該情報処理装置へのアンテナの搭載が 必須である。このような携帯型の情報処理装置の小型軽量ィ匕に伴って、小型のアン テナの開発が重要である。  In recent years, portable information processing devices having a wireless communication function have been popularized. For wireless communication in such an information processing apparatus, it is essential to mount an antenna in the information processing apparatus. With the small size and light weight of such portable information processing devices, it is important to develop a small antenna.
[0003] そこで、小型化の要求に対応して様々なアンテナが提案されて 、る。例えば、特許 文献 1 (特開 2003— 133842号公報(2003年 5月 9日公開))には、高さ寸法の短縮 が容易で小型化を促進できるモノポールアンテナが提案されている。以下に、図 17 に基づいて、このモノポールアンテナを説明する。  Accordingly, various antennas have been proposed in response to the demand for miniaturization. For example, Patent Document 1 (Japanese Patent Laid-Open No. 2003-133842 (published on May 9, 2003)) proposes a monopole antenna that can be easily reduced in height and facilitates downsizing. The monopole antenna will be described below with reference to FIG.
[0004] 図 17は、このモノポールアンテナ 200の構成図である。モノポールアンテナ 200は 、接地面 100上で起立する誘電体基板 20と、この誘電体基板 20の表面に上下方向 に沿って設けられた放射導体 30とによって構成されており、同軸ケーブル等の給電 線 40が放射導体 30の下端部に接続されている。また、誘電体基板 20の下端部には 接地電極部 50が設けられており、この接地電極部 50が、金属板等からなる接地面 1 00に半田付けされている。  FIG. 17 is a configuration diagram of the monopole antenna 200. The monopole antenna 200 includes a dielectric substrate 20 standing on the ground plane 100, and a radiation conductor 30 provided on the surface of the dielectric substrate 20 along the vertical direction. A wire 40 is connected to the lower end of the radiating conductor 30. In addition, a ground electrode portion 50 is provided at the lower end portion of the dielectric substrate 20, and the ground electrode portion 50 is soldered to a ground surface 100 made of a metal plate or the like.
[0005] 接地電極部 50は、入力電源 60に接続されており、この入力電源 60から給電線 40 を経て放射導体 30に高周波信号が給電されるようになっている。また、放射導体 30 は、接地面 100から遠い上部 1Z3程度が図 17に示すように幅広部 30a、接地面 10 0に近い下部 1Z3程度が幅狭部 30bとなっており、これら幅広部 30aと幅狭部 30bの 間は両者の中間の幅寸法となっている。このように、放射導体 30の形状を放射導体 30の上部側と下部側とで変化させることにより、以下の効果がある。 [0006] 放射導体 30の上部側は、電圧が大きく変化する容量領域である。モノポールアン テナ 200は、この部分が幅広部 30aとなっているため、放射導体 30の上部側はキヤ パシタンスが大きぐそれに伴いモノポールアンテナの共振周波数は小さくなつてい る。 [0005] The ground electrode unit 50 is connected to an input power source 60, and a high-frequency signal is fed from the input power source 60 to the radiation conductor 30 via the feeder line 40. In addition, the radiation conductor 30 has an upper portion 1Z3 far from the ground plane 100 as a wide portion 30a as shown in FIG. 17, and a lower portion 1Z3 near the ground plane 100 as a narrow portion 30b. Between the narrow portion 30b, the width dimension is intermediate between the two. As described above, changing the shape of the radiation conductor 30 between the upper side and the lower side of the radiation conductor 30 has the following effects. [0006] The upper side of the radiating conductor 30 is a capacitance region where the voltage changes greatly. Since this portion of the monopole antenna 200 is a wide portion 30a, the resonance frequency of the monopole antenna is reduced along with the increase in capacitance on the upper side of the radiating conductor 30.
[0007] 放射導体 30の下部側は、電流が大きく変化する誘導領域である。モノポールアン テナ 200は、この部分が幅狭部 30bとなっているため、インダクタンスが大きくなる。ィ ンダクタンスが大きくなるのに伴い、モノポールアンテナ 200の共振周波数は小さくな る。  [0007] The lower side of the radiating conductor 30 is an inductive region where the current changes greatly. Since the monopole antenna 200 has a narrow portion 30b, the inductance increases. As the inductance increases, the resonance frequency of the monopole antenna 200 decreases.
[0008] すなわち、誘電体基板の表面に一定幅の帯状の放射導体が形成されているモノポ 一ルアンテナと比べた場合に、モノポールアンテナ 200は、放射導体 30の高さ寸法 が同等であれば共振する周波数力 S小さくなり、それゆえ所望の周波数に共振させる 場合であれば、一定幅の帯状の放射導体が形成されて!、るモノポールアンテナより も高さ寸法を低減することができる。  That is, when compared with a monopole antenna in which a strip-shaped radiation conductor having a constant width is formed on the surface of the dielectric substrate, the monopole antenna 200 has the same height dimension as that of the radiation conductor 30. If the resonant frequency force S is reduced, and therefore the resonance is performed at a desired frequency, a band-shaped radiation conductor having a constant width is formed, and the height dimension can be reduced as compared with the monopole antenna.
[0009] また、図 18には、一般的に、テーパースロット形状と呼ばれる形状のアンテナの平 面図を示す。テーパースロット形状とは、図 18の放射導体 300に示す形状であり、放 射導体 300は図 17に示した放射導体 30に相当するものである。テーパースロット形 状のアンテナは、このような放射導体 300を有することによって、上記した放射導体 3 0を備えたモノポールアンテナ 200と同様の効果が得られる。  FIG. 18 shows a plan view of an antenna having a shape generally called a tapered slot shape. The tapered slot shape is a shape shown in the radiation conductor 300 of FIG. 18, and the radiation conductor 300 corresponds to the radiation conductor 30 shown in FIG. By having such a radiating conductor 300, the tapered slot-shaped antenna can obtain the same effect as the monopole antenna 200 including the radiating conductor 30 described above.
[0010] 図 18に示したテーパースロット形状のアンテナの VSWR (Voltage Standing Wave Ratio :電圧定在波比)の測定結果を図 19のグラフに示す。 VSWRとは、反射の度合 いを示す値であり、「1」が反射がない状態を示し、アンテナ特性として最良な状態で あるといえる。反対に、 VSWRが高くなればなるほど反射が大きくなることを示す。す なわち、 VSWRが低 、ほど良好なアンテナ特性を有して 、ると!/、える。  [0010] The graph of Fig. 19 shows the VSWR (Voltage Standing Wave Ratio) measurement results of the tapered slot antenna shown in Fig. 18. VSWR is a value indicating the degree of reflection. “1” indicates no reflection, which is the best antenna characteristic. In contrast, the higher the VSWR, the greater the reflection. In other words, the lower the VSWR, the better the antenna characteristics!
[0011] このように、 VSWR値は、アンテナ特性を示す指標として用いることができる。なお、 図 19のグラフは、 VSWRの最大値について示している。  As described above, the VSWR value can be used as an index indicating the antenna characteristics. The graph in Fig. 19 shows the maximum value of VSWR.
[0012] 図 19のグラフから、このテーパースロット形状のアンテナは、周波数帯域 3. 1〜10 . 6GHzの広帯域の電波に対する VSWR値が比較的低いため、周波数帯域 3. 1〜 10. 6GHzの広帯域の電波の送受信に使用することができることがわかる。 [0013] 以上のようなアンテナを製造するためには、一般的に、誘電体基板を所定の形状 にダイシングする工程と、該誘電体基板表面にマスク加工する工程と、続いて、給電 導体に相当する金属材料を誘電体基板表面にメツキする工程と、最後にエッチング によって上記マスク部分を除いて給電導体を誘電体基板上に形成する工程とを含ん だ製造方法が用いられる。 [0012] From the graph of FIG. 19, this tapered slot antenna has a relatively low VSWR value for radio waves in the frequency band 3.1 to 10.6 GHz, so it has a wide frequency band of 3.1 to 10.6 GHz. It can be seen that it can be used to send and receive radio waves. [0013] In order to manufacture the antenna as described above, generally, a process of dicing a dielectric substrate into a predetermined shape, a process of masking the surface of the dielectric substrate, A manufacturing method including a step of plating a corresponding metal material on the surface of the dielectric substrate and a step of finally forming the power supply conductor on the dielectric substrate by etching to remove the mask portion is used.
[0014] し力しながら、上記の従来技術に示すようなアンテナには、量産性に関して以下の ような問題がある。  However, the antenna as shown in the above prior art has the following problems regarding mass productivity.
[0015] すなわち、モノポールアンテナ 200を含め、一般的に用いられるアンテナの製造方 法は、上述したように、工程が複雑であり、アンテナの量産性および実装機器の量産 [0015] That is, as described above, generally used antenna manufacturing methods including the monopole antenna 200 have complicated processes, and the mass productivity of the antenna and the mass production of the mounted equipment are difficult.
'性の向上を困難にしている。 'It is difficult to improve sex.
[0016] また、上記モノポールアンテナ 200では、誘電体基板 20として、 FR— 4等の比誘電 率がやや高い材料 (例えば ε rが 4. 8程度)が用いられている。 FR— 4は、安価であ ることから、モノポールアンテナ 200のコスト低減に寄与することができる。 In the monopole antenna 200, a material having a relatively high relative dielectric constant such as FR-4 (for example, ε r is about 4.8) is used as the dielectric substrate 20. Since FR-4 is inexpensive, it can contribute to the cost reduction of the monopole antenna 200.
[0017] し力しながら、 FR— 4等の安価な材料を用いることにより、コストに関しては低減でき る力 FR— 4は比誘電率が 4. 8程度の材料であるため、モノポールアンテナ 200を これ以上の小型化することは困難である。 [0017] However, the force that can be reduced in terms of cost by using an inexpensive material such as FR-4 while the force is FR-4 is a material having a relative dielectric constant of about 4.8. It is difficult to reduce the size further.
[0018] さらに、テーパースロット形状の広帯域アンテナは、図 19に示したように、 VSWR値 が周波数帯域 3. 1〜10. 6GHzの間で比較的低いが、実際のところ、 3. 1GHz付 近および、周波数帯域 7〜8GHz付近 (特に、周波数帯域 7〜8GHz)において VSFurthermore, as shown in FIG. 19, the taper slot-shaped wideband antenna has a relatively low VSWR value in the frequency band 3.1 to 10.6 GHz. And in the frequency band around 7-8GHz (especially in the frequency band 7-8GHz), VS
WRが上昇しており、アンテナ特性が悪くなる傾向がある。 WR is rising and antenna characteristics tend to deteriorate.
[0019] そこで、本発明は、上記の問題点に鑑みてなされたものであり、その目的は、小型 化を実現しつつ、製造が容易で、かつ、アンテナ特性の良い広帯域に対応するチッ プアンテナの製造方法を提供することにある。 Accordingly, the present invention has been made in view of the above-described problems, and an object of the present invention is to realize a chip antenna that is easy to manufacture and has a wide antenna characteristic while realizing downsizing. It is in providing the manufacturing method of.
発明の開示  Disclosure of the invention
[0020] 本発明のチップアンテナの製造方法は、上記課題を解決するために、誘電材料か らなる誘電体基板と、給電端子を有する端子部と該端子部に導通した導体部とを有 する給電導体とを備えたチップアンテナの製造方法であって、上記導体部の少なくと も一部を上記誘電材料によって被覆するように、上記誘電体基板と上記給電導体と を、インサート成形によって一体成形することを特徴としている。具体的には、上記誘 電体基板は、榭脂であることが好ましい。 In order to solve the above problems, a method for manufacturing a chip antenna of the present invention includes a dielectric substrate made of a dielectric material, a terminal portion having a power feeding terminal, and a conductor portion that is electrically connected to the terminal portion. A method of manufacturing a chip antenna including a power supply conductor, wherein the dielectric substrate and the power supply conductor are arranged so that at least a part of the conductor portion is covered with the dielectric material. Is characterized by being integrally formed by insert molding. Specifically, the dielectric substrate is preferably a resin.
[0021] 上記の構成によれば、本発明に係るチップアンテナの製造方法は、インサート成形 によって上記誘電体基板と給電導体とを一体成形している。  [0021] According to the above configuration, in the chip antenna manufacturing method according to the present invention, the dielectric substrate and the feed conductor are integrally formed by insert molding.
[0022] これにより、従来までのアンテナの製造方法と比較して、製造が容易になる。したが つて、量産性を向上することができ、低価格のチップアンテナを提供することができる [0022] Thereby, the manufacturing becomes easier as compared with the conventional manufacturing method of the antenna. Therefore, mass productivity can be improved and a low-cost chip antenna can be provided.
[0023] 具体的には、本発明に係るチップアンテナの製造方法は、上記端子部および導体 部を有する給電導体を挟持するように、かつ、上記給電導体の導体部の少なくとも一 部が、誘電体基板の誘電材料によって被覆されるように、インサート成形によって、上 記誘電体基板を、該給電導体とを一体成形する。 [0023] Specifically, in the method for manufacturing a chip antenna according to the present invention, the power supply conductor having the terminal portion and the conductor portion is sandwiched, and at least a part of the conductor portion of the power supply conductor is dielectric. The dielectric substrate is integrally formed with the power supply conductor by insert molding so as to be covered with the dielectric material of the body substrate.
[0024] 一般的なチップアンテナの製造方法は、上述したように多くの工程が必要となる。  A general chip antenna manufacturing method requires many steps as described above.
そのため、チップアンテナの生産効率を向上させることが困難である。そこで、本発 明に係るチップアンテナの製造方法は、上記のように、インサート成形によって、上記 誘電体基板を、該給電導体とを一体成形することから、上述したマスク加工する工程 や、上記マスク部分エッチングによって除く工程を必要とせず、簡易な方法によって 製造することができる。上記誘電体基板の誘電材料としては、榭脂を用いることがで きる。  Therefore, it is difficult to improve the production efficiency of the chip antenna. Therefore, the chip antenna manufacturing method according to the present invention includes, as described above, integrally molding the dielectric substrate and the power supply conductor by insert molding, so that the above-described mask processing step and the mask are performed. It can be manufactured by a simple method without requiring a step of removing by partial etching. As the dielectric material of the dielectric substrate, a resin can be used.
[0025] すなわち、本発明に係るチップアンテナの製造方法によれば、チップアンテナの量 産性を向上することができる。  That is, according to the chip antenna manufacturing method of the present invention, the mass productivity of the chip antenna can be improved.
[0026] さらに、量産性の向上に伴って、チップアンテナに係るコストを低減させることができ ることから低価格のチップアンテナを提供することができる。 [0026] Further, as the mass productivity is improved, the cost associated with the chip antenna can be reduced, so that a low-cost chip antenna can be provided.
[0027] また、上記給電導体の導体部の少なくとも一部を、上記誘電材料によって被覆する ようにインサート成形するため、該導体部における誘電材料によって被覆された部分 は外部に露出しない。そのため、該導体部を酸化等の外部環境から保護することが できる。 [0027] Further, since at least a part of the conductor portion of the power supply conductor is insert-molded so as to be covered with the dielectric material, the portion of the conductor portion covered with the dielectric material is not exposed to the outside. Therefore, the conductor portion can be protected from the external environment such as oxidation.
[0028] したがって、上記導体部の外部環境に対する耐久性および、チップアンテナ全体 の外部環境に対する耐久性を向上させることができる。 [0029] なお、本明細書中における「インサート成形」とは、金型を用いて、該金型内に、給 電導体等の金属材料を設置し、さらに、該金型内に誘電材料を導入することによって 、給電導体等の金属材料と、誘電材料とを一体成形することをいう。 Accordingly, the durability of the conductor portion with respect to the external environment and the durability of the entire chip antenna with respect to the external environment can be improved. [0029] In the present specification, "insert molding" means that a metal material such as a power supply conductor is placed in the mold using a mold, and further a dielectric material is placed in the mold. By introducing, a metal material such as a power supply conductor and a dielectric material are integrally formed.
[0030] また、本発明のチップアンテナの製造方法によって製造されるチップアンテナは、 チップ形状であることから、従来のモノポールアンテナと比較して、接地面からの高さ が低ぐ薄型のアンテナを提供することができる。  [0030] Further, since the chip antenna manufactured by the chip antenna manufacturing method of the present invention has a chip shape, it is a thin antenna whose height from the ground plane is lower than that of a conventional monopole antenna. Can be provided.
[0031] これにより、近年、開発が盛んに行われている各種モパイル機器等の薄型機器に 好適に用いることができる。  [0031] Thus, it can be suitably used for thin devices such as various mopile devices that have been actively developed in recent years.
[0032] また、本発明のチップアンテナの製造方法は、上記誘電体基板は、誘電率が異な る少なくとも 2つの誘電材料力 なり、各該誘電材料は、上記導体部と接触しているこ とが好ましい。具体的には、上記導体部は、上記給電端子を含む対称軸に対して線 対称な形状であり、上記誘電体基板は、上記対称軸に近い側力 遠い側に向けて、 誘電率が段階的に大きくなるように成形されることが好ましい。具体的には、上記誘 電材料の少なくとも 1つは、榭脂であることが好ま 、。  [0032] Further, in the method for manufacturing a chip antenna according to the present invention, the dielectric substrate has at least two dielectric material forces having different dielectric constants, and each dielectric material is in contact with the conductor portion. Is preferred. Specifically, the conductor part has a line-symmetric shape with respect to an axis of symmetry including the power supply terminal, and the dielectric substrate has a dielectric constant stepped toward a side farther from the side force closer to the axis of symmetry. It is preferable to be molded so as to be large. Specifically, it is preferable that at least one of the above-mentioned dielectric materials is rosin.
[0033] 上記の構成とすることにより、上記の効果に加えて、 VSWRの最大値を小さく抑え つつ、より広 、周波数帯域に対応できるチップアンテナを提供することができる。  By adopting the above configuration, in addition to the above effects, it is possible to provide a chip antenna that can cope with a wider frequency band while keeping the maximum value of VSWR small.
[0034] 従来のテーパースロット形状の広帯域アンテナは、上述したように、特定の周波数 帯域において VSWR値の上昇がみられた。これは、放射導体に伝搬する電磁波の 反射に原因がある。具体的には、誘電体基板の外面などのように、誘電率が変化す る境界面においては、電磁波の反射が生じる。ここで、上記境界面とは、例えば、誘 電体基板の外面と電磁波が放射される外部空間との境界のことである。従来のテー パースロット形状の広帯域アンテナや、特許文献 1に記載のモノポールアンテナは、 それぞれ図示したように、誘電体基板が単層である。誘電体基板が単層である場合 、電磁波の反射の発生箇所は、誘電体基板の外面と電磁波が放射される外部空間 との境界面のみになり、所定の周波数に集中して強度の強い反射波が発生してしま う。これにより、 VSWR値が上昇してしまう。そこで、本発明のチップアンテナの製造 方法によれば、各該基板材料が少なくとも上記導体部に接触するように構成されて おり、かつ、各該基板材料は、誘電率が互いに異なっている。 [0035] これにより、誘電体基板の内部において上記給電線から上記給電導体に伝搬する 電磁波は、上記誘電率の違いに応じて各基板材料の境界面および誘電体基板の外 面において反射されることになる。 [0034] As described above, the conventional broadband antenna having a tapered slot shape has an increased VSWR value in a specific frequency band. This is due to the reflection of electromagnetic waves propagating to the radiation conductor. Specifically, electromagnetic waves are reflected at the interface where the dielectric constant changes, such as the outer surface of the dielectric substrate. Here, the boundary surface is, for example, the boundary between the outer surface of the dielectric substrate and the external space where electromagnetic waves are radiated. The conventional taper slot shaped broadband antenna and the monopole antenna described in Patent Document 1 each have a single-layer dielectric substrate as shown in the figure. When the dielectric substrate is a single layer, the location where electromagnetic waves are reflected is only the boundary surface between the outer surface of the dielectric substrate and the external space where the electromagnetic waves are radiated. Waves will be generated. This increases the VSWR value. Therefore, according to the method for manufacturing a chip antenna of the present invention, each substrate material is configured to be in contact with at least the conductor portion, and the substrate materials have different dielectric constants. Thereby, the electromagnetic wave propagating from the feed line to the feed conductor inside the dielectric substrate is reflected on the boundary surface of each substrate material and the outer surface of the dielectric substrate according to the difference in the dielectric constant. It will be.
[0036] すなわち、上記の構成では、誘電体基板を構成する少なくとも 2つの基板材料が、 互いに異なる誘電率を有する基板基材であるため、電磁波の反射の発生箇所が分 散することになり、これに伴って、それぞれの周波数の反射波も分散する。したがって 、所定の周波数に集中して強度の強い反射波が発生し、その周波数における VSW R値が上昇する、という不具合を回避することができる。  [0036] That is, in the above configuration, since at least two substrate materials constituting the dielectric substrate are substrate base materials having different dielectric constants, locations where electromagnetic waves are reflected are dispersed. Along with this, the reflected waves of the respective frequencies are also dispersed. Therefore, it is possible to avoid a problem that a reflected wave having a high intensity is generated concentrated on a predetermined frequency and the VSWR value at that frequency is increased.
[0037] また、このように、本発明のチップアンテナの製造方法は、上記誘電体基板を多層 化することができるとともに、多層化する場合であっても、インサート成形によって、容 易に各誘電材料と上記給電導体とを一体成形することができる。  [0037] In addition, as described above, the chip antenna manufacturing method of the present invention can make the dielectric substrate multi-layered, and even when multi-layered, each dielectric can be easily formed by insert molding. The material and the power supply conductor can be integrally formed.
[0038] したがって、製造が容易であるとともに、広帯域の周波数 (電波)にも対応することが できるチップアンテナを提供することができる。  [0038] Therefore, it is possible to provide a chip antenna that is easy to manufacture and that can handle a wide range of frequencies (radio waves).
[0039] また、本発明のチップアンテナの製造方法は、上記給電導体を、チップ形状の金 型に設けられた位置決め領域を基準にして該金型内に配置し、上記誘電体基板とィ ンサート成形によって一体成形することが好まし 、。  [0039] Further, in the method for manufacturing a chip antenna of the present invention, the feeding conductor is disposed in the mold with reference to a positioning region provided in the chip-shaped mold, and the dielectric substrate and the insert are inserted. It is preferable to integrally mold by molding.
[0040] 上記の構成によれば、製造精度の高いチップアンテナを製造することができる。具 体的には、インサート成形に用いる金型の所定の位置に予め位置決め領域を設けて おく。これにより、上記給電導体を、この位置決め領域を基準にして金型内に配置す ることができる。上記給電導体と誘電体基板とを正確に一体成形することができる。  [0040] According to the above configuration, a chip antenna with high manufacturing accuracy can be manufactured. Specifically, a positioning region is provided in advance at a predetermined position of a mold used for insert molding. Thereby, the power supply conductor can be arranged in the mold with reference to the positioning region. The feeding conductor and the dielectric substrate can be accurately integrally formed.
[0041] これにより、本発明のチップアンテナの製造方法は、従来の方法と比較して容易な だけでなぐより正確に上記給電導体と上記誘電体基板とを一体成形することができ ることから、従来の方法と比較して製造精度も高い。  [0041] Thus, the chip antenna manufacturing method of the present invention can be formed integrally with the feeding conductor and the dielectric substrate more accurately than simply with the conventional method. Compared with the conventional method, the manufacturing accuracy is high.
[0042] また、本発明のチップアンテナの製造方法は、上記給電導体が、カット型に合わせ てリードフレームをプレス加工して形成されることが好ましい。  [0042] In the method for manufacturing a chip antenna of the present invention, it is preferable that the feeding conductor is formed by pressing a lead frame in accordance with a cut die.
[0043] 上記の構成とすることにより、本発明のチップアンテナの製造方法をより簡易化する ことができるとともに、容易に所望の形状の導体部を形成することができる。  [0043] With the above-described configuration, the manufacturing method of the chip antenna of the present invention can be simplified, and a conductor portion having a desired shape can be easily formed.
[0044] すなわち、従来の製造方法では、上述したように、給電導体 (給電導体の導体部) を形成するためには、上記誘電体基板をマスクする工程や、給電導体に相当する金 属材料をメツキし、最後にはエッチングによって上記マスク部分を除ぐといった多数 の工程を必要としていた。そこで、本発明のチップアンテナの製造方法は、カット型に 合わせてリードフレームをプレスカ卩ェすることによって上記給電導体を形成することが できることから、従来の方法と比較して非常に簡易に該導体部を形成すること可能と なる。 That is, in the conventional manufacturing method, as described above, the feed conductor (the conductor portion of the feed conductor) In order to form the film, a number of steps were required, such as a step of masking the dielectric substrate, a metal material corresponding to the power supply conductor, and finally removing the mask portion by etching. Therefore, the chip antenna manufacturing method of the present invention can form the power feeding conductor by press-carrying the lead frame in accordance with the cut mold, so that the conductor is very easily compared with the conventional method. The part can be formed.
[0045] さらに、上記カット型の形を変えることにより、所望の形状の給電導体を形成するこ と可能となる。そのため、本発明の製造方法によって製造したチップアンテナを搭載 する装置や機器に好適な形状のチップアンテナを提供することができる。  [0045] Further, by changing the shape of the cut mold, it is possible to form a feed conductor having a desired shape. Therefore, it is possible to provide a chip antenna having a shape suitable for an apparatus or device on which the chip antenna manufactured by the manufacturing method of the present invention is mounted.
[0046] また、本発明のチップアンテナの製造方法は、上記導体部が、テーパースロット形 状であることが好ましい。  In the method for manufacturing a chip antenna of the present invention, it is preferable that the conductor portion has a tapered slot shape.
[0047] 上記の構成とすることにより、本発明の製造方法によって製造されたチップアンテナ は、周波数帯域 3. 1〜: LO. 6GHzの広帯域の電波の送受信に使用することができる  [0047] With the above configuration, the chip antenna manufactured by the manufacturing method of the present invention can be used for transmission / reception of radio waves in the wide frequency band 3.1 to: LO. 6 GHz.
[0048] 本発明のチップアンテナの製造方法は、上記誘電体基板と給電導体とをインサート 成形によって一体成形した後に、上記端子部を屈曲させることが好ましい。 [0048] In the method for manufacturing a chip antenna of the present invention, it is preferable that the terminal portion is bent after the dielectric substrate and the feed conductor are integrally formed by insert molding.
[0049] 上記の構成とすることにより、本発明のチップアンテナの製造方法によって製造さ れるチップアンテナを表面実装形状にすることが可能となる。  With the above configuration, the chip antenna manufactured by the chip antenna manufacturing method of the present invention can be formed into a surface-mounted shape.
[0050] 従来技術におけるモノポールアンテナは、接地面に対して起立させた構造であるた め、上述したように、接地面への設置を自動的に実装することは困難である。これに 対し、本発明のチップアンテナの製造方法では、上記誘電体基板と給電導体とをィ ンサート成形によって一体化した後に、上記端子部を屈曲させる。上記端子部を屈 曲させていることから、本発明のチップアンテナの製造方法によって製造されるチッ プアンテナは、表面実装型である。  [0050] Since the monopole antenna in the prior art has a structure that stands up with respect to the ground plane, it is difficult to automatically mount the ground pole on the ground plane as described above. On the other hand, in the chip antenna manufacturing method of the present invention, the terminal portion is bent after the dielectric substrate and the feed conductor are integrated by insert molding. Since the terminal portion is bent, the chip antenna manufactured by the chip antenna manufacturing method of the present invention is a surface mount type.
[0051] なお、表面実装型とは、本発明に係るチップアンテナを搭載する装置や機器の設 置面に対して、該チップアンテナの給電導体の表面が水平に構成されて 、る状態の ことである。  [0051] Note that the surface mount type refers to a state in which the surface of the power supply conductor of the chip antenna is configured to be horizontal with respect to the installation surface of the apparatus or device on which the chip antenna according to the present invention is mounted. It is.
[0052] 表面実装型のチップアンテナであるため、チップアンテナを搭載しょうとする機器に 対して起立した構造ではなく表面実装することができる。これにより、チップアンテナ を搭載する機器の生産性の向上を実現することができる。 [0052] Since this is a surface-mounted chip antenna, Rather than a standing structure, it can be surface mounted. As a result, it is possible to improve the productivity of devices equipped with chip antennas.
[0053] また、本発明のチップアンテナの製造方法は、上記榭脂が、ポリエーテルサルフォ ンまたは液晶ポリマーであることが好ま 、。  [0053] In the method for manufacturing a chip antenna of the present invention, it is preferable that the resin is a polyether sulfone or a liquid crystal polymer.
[0054] ポリエーテルサルフォンまたは液晶ポリマーは、榭脂の中でも高い誘電率を有する 特性を有している。高い誘電率を有する材料を誘電体基板に構成すると、波長短縮 効果により、給電導体を小型化することができる。したがって、本発明のチップアンテ ナの製造方法によって製造されるチップアンテナをより小型化することが可能となる。  [0054] Polyethersulfone or liquid crystal polymer has a characteristic of having a high dielectric constant among rosins. When a material having a high dielectric constant is formed on the dielectric substrate, the feed conductor can be reduced in size due to the wavelength shortening effect. Therefore, it is possible to further reduce the size of the chip antenna manufactured by the chip antenna manufacturing method of the present invention.
[0055] 本発明のさらに他の目的、特徴、および優れた点は、以下に示す記載によって十 分判るであろう。また、本発明の利益は、添付図面を参照した次の説明で明白になる であろう。  [0055] Still other objects, features, and advantages of the present invention will be fully understood from the following description. The benefits of the present invention will become apparent from the following description with reference to the accompanying drawings.
図面の簡単な説明  Brief Description of Drawings
[0056] [図 1]本発明に係る実施の形態におけチップアンテナの形状を示した斜視図である。  FIG. 1 is a perspective view showing the shape of a chip antenna in an embodiment according to the present invention.
[図 2]本発明に係る実施の形態におけチップアンテナの構成を示す透視図である。  FIG. 2 is a perspective view showing the configuration of the chip antenna in the embodiment according to the present invention.
[図 3]図 1に示したチップアンテナを線分 A—A'にて切断した断面図である。  FIG. 3 is a cross-sectional view of the chip antenna shown in FIG. 1 cut along line AA ′.
[図 4]図 1に示したチップアンテナを線分 B— B 'にて切断した断面図である。  4 is a cross-sectional view of the chip antenna shown in FIG. 1 cut along a line BB ′.
[図 5(a)]本発明に係る実施の形態におけチップアンテナに備えられた給電電極部と、 給電端子部とから構成される給電導体の構造を示した平面図である。  FIG. 5 (a) is a plan view showing a structure of a feed conductor composed of a feed electrode portion and a feed terminal portion provided in the chip antenna according to the embodiment of the present invention.
[図 5(b)]図 5 (a)において示した給電導体の斜視図である。  FIG. 5 (b) is a perspective view of the feed conductor shown in FIG. 5 (a).
[図 6]本発明に係る実施の形態におけチップアンテナの製造方法を示し、特に、誘電 体基板が 1種類の基板材料カゝらなる場合におけるチップアンテナの製造方法を示す 概略図である。  FIG. 6 is a schematic diagram showing a method for manufacturing a chip antenna according to an embodiment of the present invention, and in particular, a method for manufacturing a chip antenna when a dielectric substrate is made of one type of substrate material.
[図 7]本発明に係る実施の形態におけチップアンテナの製造方法を示し、特に、誘電 体基板が 2種類の基板材料カゝらなる場合におけるチップアンテナの製造方法を示す 概略図である。  FIG. 7 is a schematic diagram showing a method for manufacturing a chip antenna according to an embodiment of the present invention, and in particular, a method for manufacturing a chip antenna when the dielectric substrate is made of two types of substrate materials.
[図 8]本発明に係る実施の形態におけるチップアンテナの構造の変形例を示した斜 視図である。  FIG. 8 is a perspective view showing a modification of the structure of the chip antenna according to the embodiment of the present invention.
[図 9]本発明に係る実施の形態におけるチップアンテナの特性評価として 3. 1〜: LO. 6GHz帯域における VSWRを測定した測定結果を示すグラフ図である。 [FIG. 9] As a characteristic evaluation of the chip antenna in the embodiment according to the present invention, 3.1˜: LO. It is a graph which shows the measurement result which measured VSWR in a 6GHz band.
[図 10]—般的なテーパースロット形状のアンテナの構成を示す断面図と、誘電体基 板の各誘電率について 3. 1〜10. 6GHz帯域における VSWRを測定した測定結果 を示すグラフ図である。  [Fig. 10] —Cross-sectional view showing the structure of a general tapered slot antenna and a graph showing the measurement results of VSWR in the 3.1 to 10.6 GHz band for each dielectric constant of the dielectric substrate. is there.
[図 11(a)]本発明に係る実施の形態におけるチップアンテナの構成を示す断面図で ある。  FIG. 11 (a) is a cross-sectional view showing a configuration of a chip antenna according to an embodiment of the present invention.
[図 11(b)]図 11 (a)に示したチップアンテナの 3. 1〜10. 6GHz帯域における VSWR を測定した測定結果を示すグラフ図である。  [FIG. 11 (b)] FIG. 11 (b) is a graph showing measurement results obtained by measuring VSWR in the 3.1 to 10.6 GHz band of the chip antenna shown in FIG. 11 (a).
[図 12]本発明に係る実施の形態におけるチップアンテナの構造の変形例を示した斜 視図である。  FIG. 12 is a perspective view showing a modification of the structure of the chip antenna according to the embodiment of the present invention.
[図 13(a)]本発明に係る実施の形態におけるチップアンテナの構成の変形例を示した 斜視図である。  FIG. 13 (a) is a perspective view showing a modification of the configuration of the chip antenna according to the embodiment of the present invention.
[図 13(b)]図 13 (a)に示したチップアンテナを線分 C— C'にて切断した断面図である  [FIG. 13 (b)] is a cross-sectional view of the chip antenna shown in FIG. 13 (a) cut along line CC ′.
[図 14]図 13に示したチップアンテナの構成における変形例を示した断面図である。 14 is a sectional view showing a modification of the configuration of the chip antenna shown in FIG.
[図 15]本実施例に用いたチップアンテナの構成を示す断面図である。  FIG. 15 is a cross-sectional view showing the configuration of the chip antenna used in this example.
[図 16]本実施例に用いたチップアンテナの特性評価として、 3. 1〜: LO. 6GHz帯域 における VSWRを測定した測定結果を示すグラフ図である。  FIG. 16 is a graph showing the measurement results of measuring VSWR in the 3.1 to: LO. 6 GHz band as a characteristic evaluation of the chip antenna used in this example.
[図 17]従来技術におけるモノポールアンテナの構成を示す構成図である。  FIG. 17 is a configuration diagram showing a configuration of a monopole antenna in the prior art.
[図 18]—般的なテーパースロット形状のアンテナの構成を示す断面図である。  FIG. 18 is a cross-sectional view showing a configuration of a general tapered slot antenna.
[図 19]一般的なテーパースロット形状のアンテナの特性評価として、 3. 1〜10. 6G [Fig.19] 3.1-10.6G as characteristics evaluation of general tapered slot antenna
Hz帯域における VSWRを測定した測定結果を示すグラフ図である。 It is a graph which shows the measurement result which measured VSWR in the Hz band.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0057] 〔実施の形態 1〕 [Embodiment 1]
本発明に係る実施の形態について、図 1〜図 14に基づいて説明すれば以下のと おりである。  Embodiments according to the present invention will be described with reference to FIGS. 1 to 14 as follows.
[0058] 図 1は、本実施の形態におけるチップアンテナ 1の形状を示した斜視図である。図 1 に示すように、チップアンテナ 1は、チップ形状のアンテナであり、その外形は、誘電 体基板 3によって形成されている。 FIG. 1 is a perspective view showing the shape of chip antenna 1 in the present embodiment. As shown in Fig. 1, chip antenna 1 is a chip-shaped antenna whose outer shape is dielectric. The body substrate 3 is formed.
[0059] なお本実施の形態では、図 1に示すように、誘電体基板 3は、基板材料 3aおよび 3 bの 2種類の基板材料から構成されている。しカゝしながら、本発明はこれに限定される ものではなぐ誘電体基板 3が 1種類の基板材料のみから構成される場合であっても よぐ 2種類以上の基板材料力も構成されるものであってもよい。  In the present embodiment, as shown in FIG. 1, dielectric substrate 3 is composed of two types of substrate materials, substrate materials 3a and 3b. However, the present invention is not limited to this. Even when the dielectric substrate 3 is composed of only one kind of substrate material, it is possible to construct two or more kinds of substrate material forces. It may be.
[0060] なお、本明細書においては、チップアンテナ 1から電磁波が放射される空間(外部 空間、通常は空気層)を誘電率 ε 0に対する、誘電体基板 3の基板材料 3aおよび 3b の誘電率 ε 1の比 ε 1/ ε 0を、誘電体基板 3 (基板材料 3aおよび 3b)の比誘電率と 定義する。  In the present specification, the dielectric constant of the substrate materials 3a and 3b of the dielectric substrate 3 with respect to the dielectric constant ε 0 in the space (external space, usually the air layer) from which the electromagnetic waves are radiated from the chip antenna 1 The ratio of ε 1 ε 1 / ε 0 is defined as the relative dielectric constant of dielectric substrate 3 (substrate materials 3a and 3b).
[0061] 図 2は、図 1において図示したチップアンテナ 1の透視図である。なお、図 2では、説 明の便宜上、誘電体基板 3の基板材料 3aおよび 3bについては、省略している。  FIG. 2 is a perspective view of the chip antenna 1 illustrated in FIG. In FIG. 2, the substrate materials 3a and 3b of the dielectric substrate 3 are omitted for convenience of explanation.
[0062] 図 2に示すように、チップアンテナ 1は、給電導体 2と、誘電体基板 3と、接地電極 4a および 4bを備えている。  As shown in FIG. 2, the chip antenna 1 includes a feeding conductor 2, a dielectric substrate 3, and ground electrodes 4a and 4b.
[0063] 上記給電導体 2は、給電電極部 5 (導体部)および給電端子部 6 (端子部)を備えて いる。図 2に示すように、給電導体 2は、誘電体基板 3によって狭持された構成となつ ており、特に、給電電極部 5は誘電体基板 3によって完全に被覆されている。給電端 子部 6は、その一部が誘電体基板 3外部に露出しており、露出した給電端子部 6の端 部に給電端子 7を有して 、る。  The power supply conductor 2 includes a power supply electrode portion 5 (conductor portion) and a power supply terminal portion 6 (terminal portion). As shown in FIG. 2, the power supply conductor 2 is sandwiched between the dielectric substrates 3. In particular, the power supply electrode portion 5 is completely covered with the dielectric substrate 3. A part of the power feeding terminal 6 is exposed to the outside of the dielectric substrate 3, and has a power feeding terminal 7 at the end of the exposed power feeding terminal 6.
[0064] 図 3は、図 1における線分 A—A'でチップアンテナ 1を切断した状態を示した断面 図である。上記給電導体 2は、図 3に示すように、対称軸 Sに対して線対称の形状で ある。  FIG. 3 is a cross-sectional view showing a state where the chip antenna 1 is cut along a line segment AA ′ in FIG. As shown in FIG. 3, the feed conductor 2 has a line-symmetric shape with respect to the symmetry axis S.
[0065] 上記給電電極部 5は、導体からなる電極であり、この形状は、一般に、テーパースロ ット形状と呼ばれている。給電電極部 5は、領域 Vにおいて、上記給電端子部 6と連 結している。  The feeding electrode portion 5 is an electrode made of a conductor, and this shape is generally called a taper slot shape. The feeding electrode portion 5 is connected to the feeding terminal portion 6 in the region V.
[0066] 上記給電端子部 6は、導体からなる端子であり、その形状は平板である。上記給電 端子部 6は、接地電極 4aおよび 4bの間に、それぞれから離間するように配置されて おり、離間することによって接地電極 4aおよび 4bとは電気的に絶縁されている。給電 端子部 6における対向する両端のうち、一端は、上記給電電極部 5の領域 Vに連結し ており、給電電極部 5と電気的に接続されている。他端には、給電端子 7が備えられ ており、図示しない給電線に接続されている。 [0066] The power supply terminal portion 6 is a terminal made of a conductor, and the shape thereof is a flat plate. The power feeding terminal portion 6 is disposed between the ground electrodes 4a and 4b so as to be separated from each other, and is electrically insulated from the ground electrodes 4a and 4b by being separated. One of the opposing ends of the feeding terminal portion 6 is connected to the region V of the feeding electrode portion 5. And electrically connected to the feeding electrode portion 5. At the other end, a power supply terminal 7 is provided and connected to a power supply line (not shown).
[0067] 上記給電端子部 6の給電端子 7が備えられて 、る部分は、上述したように、誘電体 基板 3外部に露出しており、さらに、露出部分は、図 1および図 2に示すように屈曲し ている。上記給電端子部 6の給電端子 7部分が屈曲していることにより、本実施の形 態のチップアンテナ iは、表面実装に適している。給電端子部 6は、例えば、金属材 料によって構成することができる。  [0067] As described above, the power supply terminal 7 of the power supply terminal portion 6 is exposed to the outside of the dielectric substrate 3, and the exposed portion is shown in FIG. 1 and FIG. It is bent like this. Since the feeding terminal 7 portion of the feeding terminal portion 6 is bent, the chip antenna i of the present embodiment is suitable for surface mounting. The power supply terminal portion 6 can be made of, for example, a metal material.
[0068] 従来技術におけるモノポールアンテナ 200は、図 17に示したように、接地面 100上 に起立した構成となっている力 その製造において、該モノポールアンテナ 200を接 地面 100上に自立させる、すなわち、自動的に接地面 100上に該モノポールアンテ ナ 200を実装することは困難である。そのため、接地面 100上に起立させるためには 、手動によって半田付けする必要があつたため、上記モノポールアンテナ 200は、一 定幅の帯状の放射導体が形成されているモノポールアンテナと比較して小型化でき る反面、実装機器等への実装が煩雑であった。また、上述したように、上記モノポー ルアンテナ 200は、接地面 100上で起立した構成であるため、高さ方向に所定の高 さを有していることから、モパイル機器等の薄型の機器に搭載させることが困難である 。これに対し、本実施形態におけるチップアンテナ 1は、上記給電端子部 6の給電端 子 7部分を屈曲させることによって、表面実装に適した構造としていることから、チップ アンテナの量産性の向上に伴って、該チップアンテナを実装する実装機器の量産性 の向上も実現することができる。  As shown in FIG. 17, the monopole antenna 200 according to the prior art has a structure in which the monopole antenna 200 stands up on the ground plane 100. In its manufacture, the monopole antenna 200 is self-supported on the ground plane 100. That is, it is difficult to automatically mount the monopole antenna 200 on the ground plane 100. Therefore, in order to stand on the ground plane 100, it is necessary to perform soldering manually. Therefore, the monopole antenna 200 is compared with a monopole antenna in which a strip-shaped radiation conductor having a constant width is formed. Although it can be downsized, mounting on mounting devices was complicated. Further, as described above, the monopole antenna 200 is configured to stand on the ground plane 100, and thus has a predetermined height in the height direction. Therefore, the monopole antenna 200 is mounted on a thin device such as a mopile device. It is difficult to let On the other hand, the chip antenna 1 according to the present embodiment has a structure suitable for surface mounting by bending the feeding terminal 7 portion of the feeding terminal portion 6, so that the mass productivity of the chip antenna is improved. Thus, it is possible to improve the mass productivity of the mounting device on which the chip antenna is mounted.
[0069] 接地電極 4aおよび 4bは、導体からなる電極であり、その形状は平板である。接地 電極 4aおよび 4bは、給電電極部 5がなす対称軸 Sに対して垂直となり、かつ、接地 電極 4aおよび 4bの間に給電端子部 6が離間して配置されるように、接地電極 4aおよ び 4bとの間は所定の距離をなして配置されている。接地電極 4aおよび 4bは、例えば 、金属の板材によって構成することができる。  [0069] The ground electrodes 4a and 4b are electrodes made of a conductor, and the shape thereof is a flat plate. The ground electrodes 4a and 4b are perpendicular to the symmetry axis S formed by the feed electrode section 5, and the ground electrode 4a and the ground electrode 4a are arranged so that the feed terminal section 6 is spaced from the ground electrodes 4a and 4b. And it is arranged at a certain distance from 4b. The ground electrodes 4a and 4b can be made of, for example, a metal plate material.
[0070] 誘電体基板 3は、誘電体カゝらなり、給電電極部 5と接地電極 4aおよび 4bとの間に介 在して、給電電極部 5と接地電極 4aおよび 4bとの間を埋める部材である。この誘電 体基板 3の外形は、チップアンテナ 1の外形に相当し、図 1に示すように、直方体の 形状をなしている。誘電体基板 3は、基板材料 3aおよび 3bから構成されている。基 板材料 3aおよび 3bについて、図 4に基づいて以下に詳細に説明する。 [0070] Dielectric substrate 3 is made of a dielectric material, and is interposed between feeding electrode portion 5 and ground electrodes 4a and 4b, and fills between feeding electrode portion 5 and ground electrodes 4a and 4b. It is a member. The outer shape of the dielectric substrate 3 corresponds to the outer shape of the chip antenna 1, and as shown in FIG. It has a shape. The dielectric substrate 3 is composed of substrate materials 3a and 3b. The substrate materials 3a and 3b will be described in detail below based on FIG.
[0071] 図 4は、図 1における線分 B— B'で、上記チップアンテナ 1を切断した状態を示した 断面図である。図 4に示すように、誘電体基板 3は、基板材料 3aおよび 3bから構成さ れており、ともに、上記給電電極部 5に接触するように構成されている。具体的には、 基板材料 3aは上記給電導体 2の対称軸 Sを含んだ領域に配置しており、基板材料 3 bは対称軸 Sを含まず、対称軸 Sから遠 ヽ領域に配置されて!ヽる。  FIG. 4 is a cross-sectional view showing a state where the chip antenna 1 is cut along the line BB ′ in FIG. As shown in FIG. 4, the dielectric substrate 3 is composed of substrate materials 3a and 3b, and both are configured to be in contact with the feeding electrode portion 5. Specifically, the substrate material 3a is arranged in a region including the symmetry axis S of the feeder conductor 2, and the substrate material 3b is arranged in a region far from the symmetry axis S without including the symmetry axis S. !
[0072] 上記基板材料 3aおよび 3bは、それぞれ誘電率 ε 3aおよび ε 3bを有した誘電体で あり、それぞれの比誘電率力 Sこの順に大きくなるように誘電率が調整されている。具 体的には、対称軸 Sから遠くなるにつれて比誘電率が高くなるように、基板材料 3bは 、基板材料 3aよりも高い誘電率を有している。  [0072] The substrate materials 3a and 3b are dielectrics having dielectric constants ε3a and ε3b, respectively, and their relative dielectric constant forces S are adjusted so as to increase in this order. Specifically, the substrate material 3b has a higher dielectric constant than the substrate material 3a so that the relative dielectric constant increases as the distance from the symmetry axis S increases.
[0073] 各基板材料の誘電率は、このような条件を満たすものであれば、特に限定されるも のではない。例えば、誘電率 ε =4である基板材料 3aと、誘電率 ε = 16である基板 材料 3bとを用いることができる。以下の説明は、誘電率 ε =4である基板材料 3aと、 誘電率 ε = 16である基板材料 3bを用いた場合について説明する。  [0073] The dielectric constant of each substrate material is not particularly limited as long as such a condition is satisfied. For example, a substrate material 3a having a dielectric constant ε = 4 and a substrate material 3b having a dielectric constant ε = 16 can be used. In the following description, a case where the substrate material 3a having a dielectric constant ε = 4 and the substrate material 3b having a dielectric constant ε = 16 is used will be described.
[0074] このような誘電率を有する基板材料としては、榭脂が好ましい。その理由は、後述 するように、本発明に係るチップアンテナは、インサート成形によって、上記給電導体 2と誘電体基板 3とを一体成形して製造するためである。そのため、熱可塑性を有す る榭脂、すなわち、熱可塑性硬化榭脂であることが好ましい。  [0074] As a substrate material having such a dielectric constant, a resin is preferable. The reason is that, as will be described later, the chip antenna according to the present invention is manufactured by integrally molding the feeding conductor 2 and the dielectric substrate 3 by insert molding. Therefore, a resin having thermoplasticity, that is, a thermoplastic cured resin is preferable.
[0075] 上記榭脂としては、例えば、ポリエーテルサルフォン (PPS)、液晶ポリマー(LCP) 、シンジオタクチックポリスチレン(SPS)、ポリカーボネート(PC)、ポリエチレンテレフ タレート(PET)、エポキシ榭脂 (EP)、ポリイミド榭脂(PI)、ポリエーテルイミド榭脂(P EI)、フエノール榭脂(PF)などを用いることができる。  [0075] Examples of the resin include polyethersulfone (PPS), liquid crystal polymer (LCP), syndiotactic polystyrene (SPS), polycarbonate (PC), polyethylene terephthalate (PET), epoxy resin (EP ), Polyimide resin (PI), polyetherimide resin (PEI), phenol resin (PF), and the like.
[0076] 上記榭脂の中でも、 PPSまたは LCPは、榭脂の中でも高い誘電率を有することが できるため、特に好ましい。  [0076] Among the above resins, PPS or LCP is particularly preferable because it can have a high dielectric constant among the resins.
[0077] 具体的な上記基板材料 3aの成形幅 W、すなわち、図 3に図示した対称軸 Sに対し て垂直となる方向の基板材料 3aの成形幅 Wとしては、チップアンテナの大きさにより 適宜設定することができる。例えば、図 3に示した断面図にあたる断面の面積が 14m m X 15mmであり、厚みが lmmであるチップアンテナの場合、上記基板材料 3aの成 形幅 Wは、 7mm〜: L lmmの範囲で設定されすることができ、 9mm程度であることが 好ましい。以下の説明では、成形幅 Wが 9mmである場合について説明する。 [0077] The specific forming width W of the substrate material 3a, that is, the forming width W of the substrate material 3a in the direction perpendicular to the symmetry axis S shown in FIG. 3, is appropriately determined depending on the size of the chip antenna. Can be set. For example, the area of the cross section corresponding to the cross section shown in FIG. In the case of a chip antenna of m × 15 mm and a thickness of lmm, the forming width W of the substrate material 3a can be set in the range of 7 mm to: L lmm, and is preferably about 9 mm. In the following description, a case where the forming width W is 9 mm will be described.
[0078] 上記した範囲の成形幅とすることによって、アンテナの特性を示す指標として、 3. 1 〜10. 6GHzの周波数帯域における VSWRの最大値を縦軸にとった場合に、図 19 に示した一般的なテーパースロット形状の広帯域アンテナにおいて生じた VSWR最 大値の上昇を低減することができ、かつ、 VSWR最大値力 3. 1〜10. 6GHzの周 波数帯域で安定化させることができる。  [0078] By setting the molding width in the above range, as an index indicating the antenna characteristics, the maximum value of VSWR in the frequency band of 3.1 to 10.6 GHz is shown on the vertical axis as shown in FIG. In addition, it is possible to reduce the increase in the VSWR maximum value that occurs in a wide band antenna with a general tapered slot shape, and to stabilize the VSWR maximum value in the frequency band from 3.1 to 10.6 GHz. .
[0079] このチップアンテナ 1を用いて電磁波の送受信を行う場合には、このチップアンテナ 1の中心に、接地電極 4a側から同軸ケーブル(図示せず)などのケーブルが接続さ れる。このとき、同軸ケーブルの内部導体 (芯線)を給電端子 7と接続し、同軸ケープ ルの外部導体 (シールド)を接地電極 4aおよび 4bの間付近に接続する。そのために 、接地電極 4aおよび 4bには、同軸ケーブルと接続するためのコネクタ(図示せず)が 設けられる。なお、コネクタを設けることなぐ同軸ケーブルを接地電極 4aおよび 4bに 直接取り付けてもよい。  When electromagnetic waves are transmitted / received using the chip antenna 1, a cable such as a coaxial cable (not shown) is connected to the center of the chip antenna 1 from the ground electrode 4a side. At this time, the inner conductor (core wire) of the coaxial cable is connected to the feeding terminal 7, and the outer conductor (shield) of the coaxial cable is connected between the ground electrodes 4a and 4b. For this purpose, the ground electrodes 4a and 4b are provided with connectors (not shown) for connection to the coaxial cable. A coaxial cable without a connector may be directly attached to the ground electrodes 4a and 4b.
[0080] なお、図 1ないし図 3に図示した本実施の形態におけるチップアンテナ 1は、接地電 極 4aおよび 4bが備えられた構成となっている力 本発明はこれに限定されるもので はない。すなわち、接地電極が、チップアンテナ 1を実装する基板側に設けられた構 成であってもよい。なお、以下に説明する本実施の形態のチップアンテナ 1の製造方 法では、説明の便宜上、上記接地電極 4aおよび 4bを備えていない構成に基づいて 説明する。  It should be noted that the chip antenna 1 in the present embodiment shown in FIGS. 1 to 3 is configured to include ground electrodes 4a and 4b. The present invention is not limited to this. Absent. That is, the ground electrode may be provided on the substrate side on which the chip antenna 1 is mounted. In the following description of the manufacturing method of the chip antenna 1 according to the present embodiment, the description will be given based on a configuration not provided with the ground electrodes 4a and 4b for convenience of explanation.
[0081] なお、接地電極が、チップアンテナ 1を実装する基板側に設けられた構成の場合、 実装される基板側に接地電極を予め作製しておき、同軸ケーブルを接続するときは 、内部導体 (芯線)は上記同様に接続し、同軸ケーブルの外部導体 (シールド)は基 板側に作製した接地電極に接続する。  [0081] When the ground electrode is provided on the substrate side on which the chip antenna 1 is mounted, when the ground electrode is prepared in advance on the substrate side to be mounted and the coaxial cable is connected, the internal conductor Connect the (core wire) in the same way as above, and connect the outer conductor (shield) of the coaxial cable to the ground electrode fabricated on the board side.
[0082] 次に、図 5〜図 8に基づいて、以上のような構成を備えたチップアンテナ 1の製造方 法について説明する。  Next, a method for manufacturing the chip antenna 1 having the above configuration will be described with reference to FIGS.
[0083] まず、本発明のチップアンテナの製造方法の概略を説明するために、誘電体基板 力 S i種類の基板材料のみ力もなる場合について説明し、続いて、誘電体基板に基板 材料 3aおよび 3bを有する本実施の形態におけるチップアンテナ 1の製造方法を説 明する。なお、誘電体基板が 1種類の基板材料のみからなる場合について説明する 場合も、説明の便宜上、図 1〜図 4における部材番号をそのまま用いる。 [0083] First, in order to explain the outline of the manufacturing method of the chip antenna of the present invention, a dielectric substrate is used. The case where only the force S i of the substrate material is also described will be described, and then the manufacturing method of the chip antenna 1 in this embodiment having the substrate materials 3a and 3b on the dielectric substrate will be described. Note that the member numbers in FIGS. 1 to 4 are used as they are for the convenience of explanation also when the case where the dielectric substrate is made of only one kind of substrate material is described.
[0084] まず、給電導体 2の製造方法について、図 5 (a)および (b)に基づいて説明する。  First, a method for manufacturing the feed conductor 2 will be described with reference to FIGS. 5 (a) and 5 (b).
[0085] 給電電極部 5は、テーパースロット形状のカット型にリードフレームを設置し、プレス 加工することによって、図 5 (a)に示すようなテーパースロット形状の給電電極部 5を 形成することができる。給電電極部 5を構成する材料としては、例えば、金、銀、銅な どを用いることができる。給電端子部 6は、半田メツキによって形成される。給電電極 部 5と給電端子部 6とは導通しているため、給電端子 7は、給電電極部 5と電気的に 接続できる。図 5 (b)は、図 5 (a)の状態の構造から給電端子部 6の接続部分を切断 した給電導体 2の斜視図である。  The power supply electrode portion 5 can be formed into a taper slot-shaped power supply electrode portion 5 as shown in FIG. 5 (a) by placing a lead frame in a taper slot-shaped cut die and pressing it. it can. For example, gold, silver, copper, or the like can be used as a material constituting the feeding electrode portion 5. The power feeding terminal portion 6 is formed by soldering. Since the feeding electrode unit 5 and the feeding terminal unit 6 are electrically connected, the feeding terminal 7 can be electrically connected to the feeding electrode unit 5. FIG. 5 (b) is a perspective view of the power supply conductor 2 in which the connection portion of the power supply terminal portion 6 is cut from the structure in the state of FIG. 5 (a).
[0086] 次に、上記で製造した給電導体 2を用いて、インサート成形により、誘電体基板 3と 一体成形させ、チップアンテナを形成する。  Next, the power supply conductor 2 manufactured as described above is used to be integrally formed with the dielectric substrate 3 by insert molding to form a chip antenna.
[0087] インサート成形によるチップアンテナの製造方法にっ 、て、図 6 (a)〜 (f)に基づ ヽ て説明すれば以下の通りである。  A method for manufacturing a chip antenna by insert molding will be described below with reference to FIGS. 6 (a) to 6 (f).
[0088] インサート成形によるチップアンテナの製造は、チップの形状をなした第 1の金型 8 を用いてインサート成形する。図 6 (a)は、第 1の金型 8の形状を示した斜視図である 。なお、説明の便宜上、図 6 (a)には、第 1の金型 8のうち片側のみを図示している。し たがって、基板材料を導入する際は、もう一方側の第 1の金型 8も用いて、両側から 給電導体 2を挟持するように設置される。  [0088] The chip antenna is manufactured by insert molding by insert molding using the first die 8 having a chip shape. FIG. 6 (a) is a perspective view showing the shape of the first mold 8. For convenience of explanation, FIG. 6A shows only one side of the first mold 8. Therefore, when the substrate material is introduced, the first metal mold 8 on the other side is also used so that the power supply conductor 2 is sandwiched from both sides.
[0089] 図 6 (a)に示すように、第 1の金型 8には所定の位置に第 1の位置決め領域 8aが設 けられている。第 1の位置決め領域 8aとしては、第 1の位置決め領域 8aのように、給 電導体 2の給電端子部 6の形状に窪みを形成するものが挙げられる。窪みを形成す ることによって、その窪みに該給電端子部 6をはめ込み、給電導体 2を位置合わせす ることができる。そのほかにも、所定の位置に棒状の突起部が形成され、その突起部 に該給電端子部 6を接触させることによって位置合わせするものであってもよぐ給電 導体 2を位置合わせすることができるものであれば特に限定されない。 [0090] このように、第 1の金型 8には第 1の位置決め領域 8aが設けられているため、図 5 (b )に示した給電導体 2は、この第 1の位置決め領域 8aによって第 1の金型 8内に正確 に設置することができ、給電導体 2と誘電体基板 3とを精度よく一体成形することがで きる。 [0089] As shown in FIG. 6 (a), the first mold 8 is provided with a first positioning region 8a at a predetermined position. Examples of the first positioning region 8a include those in which a depression is formed in the shape of the power supply terminal portion 6 of the power supply conductor 2 as in the first positioning region 8a. By forming the depression, the feeding terminal portion 6 can be fitted into the depression and the feeding conductor 2 can be aligned. In addition, it is possible to align the feed conductor 2 even if a rod-like projection is formed at a predetermined position and the feed terminal 6 is brought into contact with the projection. If it is a thing, it will not specifically limit. As described above, since the first mold 8 is provided with the first positioning region 8a, the power supply conductor 2 shown in FIG. 5 (b) has the first positioning region 8a. 1 can be accurately placed in the mold 8 and the feeding conductor 2 and the dielectric substrate 3 can be integrally formed with high accuracy.
[0091] 図 6 (b)は、第 1の金型 8に給電導体 2が配置された状態を示す斜視図である。図 6  FIG. 6B is a perspective view showing a state in which the power supply conductor 2 is arranged in the first mold 8. Fig 6
(c)は、両側の第 1の金型 8によって給電導体 2が挟持された状態を示した模式図で ある。この第 1の金型 8内に、熱可塑性を有する誘電体基板 3の基板材料を図示しな い導入口より導入し、インサート成形することによって、誘電体基板 3と給電導体 2とを 一体化する。  (c) is a schematic view showing a state in which the feeding conductor 2 is sandwiched between the first molds 8 on both sides. The dielectric substrate 3 and the feed conductor 2 are integrated by introducing the substrate material of the dielectric substrate 3 having thermoplasticity into the first mold 8 from an introduction port (not shown) and insert molding. To do.
[0092] 図 6 (d)には、インサート成形後のチップアンテナ 1を示している。図 6 (d)に示した ように、誘電体基板 3の基板材料は、上記給電導体 2のうち給電電極部 5の表面を完 全に被覆するように、給電導体 2と一体成形する。  FIG. 6 (d) shows the chip antenna 1 after insert molding. As shown in FIG. 6 (d), the substrate material of the dielectric substrate 3 is formed integrally with the power supply conductor 2 so as to completely cover the surface of the power supply electrode portion 5 of the power supply conductor 2.
[0093] 一体成形したチップアンテナ 1は、図 6 (e)のように、給電端子部 6の長さを短くカツ トされる。次に、図 6 (f)に示すように、誘電体基板 3の外部に露出した給電端子部 6 を屈曲させる。 The integrally formed chip antenna 1 is cut with the length of the feeding terminal portion 6 shortened as shown in FIG. 6 (e). Next, as shown in FIG. 6 (f), the feeding terminal portion 6 exposed to the outside of the dielectric substrate 3 is bent.
[0094] 以上のような方法によって、誘電体基板 3の基板材料が 1種類の場合のチップアン テナを製造することができる。  [0094] By the method as described above, a chip antenna in the case where the dielectric substrate 3 has one type of substrate material can be manufactured.
[0095] 本実施の形態におけるチップアンテナ 1のように 2種類以上の基板材料を用いて製 造する場合は、各基板材料が、互いに異なる熱可塑性を有するものであればよい。こ の場合、上記とは異なり、基板材料の種類に対応する数の金型を用いて、順次、金 型を変えて形成することができる。 In the case of manufacturing using two or more kinds of substrate materials as in the chip antenna 1 in the present embodiment, each substrate material only needs to have different thermoplasticity. In this case, unlike the above, the number of molds corresponding to the type of substrate material can be used to sequentially change the molds.
[0096] そこで、次に、図 1および図 3に示した基板材料 3aおよび 3bによって構成される誘 電体基板 3を備えたチップアンテナ 1の製造方法を図 7に基づいて説明する。 [0096] Next, a manufacturing method of the chip antenna 1 including the dielectric substrate 3 composed of the substrate materials 3a and 3b shown in FIGS. 1 and 3 will be described with reference to FIG.
[0097] 図 7は、チップアンテナ 1の製造方法を説明した概略図である。上記給電導体 2の 製造方法は、上記と同一であるため、説明は省略する。 FIG. 7 is a schematic diagram for explaining a manufacturing method of the chip antenna 1. Since the manufacturing method of the feeding conductor 2 is the same as described above, the description thereof is omitted.
[0098] 具体的には、図 1ないし図 3に示したチップアンテナ 1の場合の製造方法では、まずSpecifically, in the manufacturing method in the case of the chip antenna 1 shown in FIGS.
、基板材料 3aの大きさに形成された第 2の金型 9を用いる。図 7 (a)は、第 2の金型 9 の形状を示した斜視図である。なお、説明の便宜上、図 7 (a)には、第 2の金型 9のう ち片側のみを図示している。したがって、基板材料を導入する際は、もう一方側の第Then, the second mold 9 formed in the size of the substrate material 3a is used. FIG. 7 (a) is a perspective view showing the shape of the second mold 9. For convenience of explanation, FIG. 7 (a) shows the shape of the second mold 9. Only one side is shown. Therefore, when introducing the substrate material,
2の金型 9も用いて、両側から給電導体 2を挟持するように設置される。 The metal mold 9 of 2 is also used so that the feeder conductor 2 is sandwiched from both sides.
[0099] 上記第 2の金型 9にも、上記第 1の金型 8と同様に、所定の位置に第 2の位置決め 領域 9aが設けられている。上記の方法によって製造した給電導体 2は、第 2の位置 決め領域 9aに基づいて位置合わせすることができ、第 2の金型 9内に正確に設置す ることができる。図 7 (b)は、第 2の金型 9に給電導体 2が配置された状態を示す斜視 図である。図 7 (c)は、両側の第 2の金型 9によって給電導体 2が挟持された状態を示 した模式図である。この第 2の金型 9内に、熱可塑性を有する誘電体基板 3の基板材 料 3aを図示しない導入口より導入し、インサート成形することによって、基板材料 3aと 給電導体 2とを一体成形する。  [0099] As with the first mold 8, the second mold 9 is also provided with a second positioning region 9a at a predetermined position. The feeding conductor 2 manufactured by the above method can be aligned based on the second positioning region 9a, and can be accurately placed in the second mold 9. FIG. 7B is a perspective view showing a state in which the power supply conductor 2 is arranged in the second mold 9. FIG. 7 (c) is a schematic diagram showing a state in which the feeding conductor 2 is sandwiched between the second molds 9 on both sides. The substrate material 3a of the dielectric substrate 3 having thermoplasticity is introduced into the second mold 9 from an introduction port (not shown), and insert molding is performed to integrally mold the substrate material 3a and the power supply conductor 2. .
[0100] 次に、一体成形された基板材料 3aと給電導体 2とを第 2の金型 9から取り出し、これ を、基板材料 3bに対応する金型、すなわち誘電体基板 3の大きさの第 1の金型 8の 第 1の位置決め領域 8aに基づいて、第 1の金型 8内に設置する。図 7 (d)は、第 1の 金型 8内に一体成形された基板材料 3aおよび給電導体 2が配置された状態を示す 斜視図である。図 7 (e)は、両側の第 1の金型 8によって給電導体 2が挟持された状態 を示した模式図である。この第 1の金型 8内に、熱可塑性を有する基板材料 3bを図 示しない導入口より導入し、インサート成形する。図 7 (f)は、基板材料 3aおよび給電 導体 2と、基板材料 3bとが一体成形された状態を示す斜視図である。  [0100] Next, the integrally formed substrate material 3a and the feeding conductor 2 are taken out from the second mold 9, and this is taken out of the mold corresponding to the substrate material 3b, that is, the first size of the dielectric substrate 3. Based on the first positioning region 8 a of the first mold 8, the first mold 8 is installed in the first mold 8. FIG. 7 (d) is a perspective view showing a state in which the substrate material 3a and the feed conductor 2 integrally formed in the first mold 8 are arranged. FIG. 7 (e) is a schematic diagram showing a state in which the feeding conductor 2 is sandwiched between the first molds 8 on both sides. A substrate material 3b having thermoplasticity is introduced into the first mold 8 through an introduction port (not shown), and insert molding is performed. FIG. 7 (f) is a perspective view showing a state in which the substrate material 3a, the power supply conductor 2, and the substrate material 3b are integrally formed.
[0101] なお、上述したように、図 1ないし図 3に図示したチップアンテナ 1には、接地電極 4 aおよび 4bが備えられた構成となって 、る。接地電極 4aおよび 4bが備えられた構成 の場合の製造方法は、図 7 (b)において、第 2の金型 9に接地電極 4aおよび 4bを配 置するための位置決め領域を設けておき、給電導体 2とともに、熱可塑性を有する誘 電体基板 3の基板材料 3aと、インサート成形する。また、図 7 (d)においても同様に、 第 1の金型 8に接地電極 4aおよび 4bを配置するための位置決め領域を設けておき、 熱可塑性を有する基板材料 3bと、基板材料 3aと給電導体 2と接地電極 4aおよび 4b とをインサート成形する。  Note that, as described above, the chip antenna 1 shown in FIGS. 1 to 3 has a configuration in which the ground electrodes 4a and 4b are provided. In the case of the configuration in which the ground electrodes 4a and 4b are provided, the manufacturing method is as shown in FIG. 7 (b), in which a positioning region for arranging the ground electrodes 4a and 4b is provided in the second mold 9, Together with the conductor 2, the substrate material 3 a of the dielectric substrate 3 having thermoplasticity and insert molding are performed. Similarly, in FIG. 7 (d), a positioning region for arranging the ground electrodes 4a and 4b is provided in the first mold 8, and the substrate material 3b having thermoplasticity and the substrate material 3a are fed. Conductor 2 and ground electrodes 4a and 4b are insert-molded.
[0102] 以上の方法によって、図 1および図 3に示した 2種類の基板材料を有する誘電体基 板 3を備えたチップアンテナ 1を製造することができる。 [0103] このように、それぞれの基板材料に対応する金型を用いれば、 2種類以上の基板材 料を用いてチップアンテナ 1を製造することができる。 [0102] By the above method, the chip antenna 1 including the dielectric substrate 3 having the two types of substrate materials shown in FIGS. 1 and 3 can be manufactured. [0103] As described above, if the molds corresponding to the respective substrate materials are used, the chip antenna 1 can be manufactured using two or more kinds of substrate materials.
[0104] なお、上記した製造方法では、給電導体 2に図 5 (b)に図示した構造のものを用い て!、るが、本発明はこれに限定されるものではな!/、。  [0104] In the above manufacturing method, the feeder conductor 2 having the structure shown in Fig. 5 (b) is used! However, the present invention is not limited to this! /.
[0105] すなわち、図 8は、図 5 (a)に示した構造の給電導体 2を用いて、該給電導体 2と誘 電体基板 3とインサート成形により一体成形した状態を示す斜視図である。このように 、図 5 (a)に示した構造の給電導体を用いて製造することもできる。  That is, FIG. 8 is a perspective view showing a state in which the power supply conductor 2 having the structure shown in FIG. 5 (a) is integrally formed by insert molding with the power supply conductor 2, the dielectric substrate 3, and the like. . In this way, it can also be manufactured using the feed conductor having the structure shown in FIG.
[0106] 以上のように、本実施の形態におけるチップアンテナの製造方法は、インサート成 形によって上記誘電体基板 3と給電導体 2とを一体成形することから、従来までのァ ンテナの製造方法と比較して、製造が容易になる。  [0106] As described above, the chip antenna manufacturing method according to the present embodiment is formed by integrally forming the dielectric substrate 3 and the feed conductor 2 by insert molding. In comparison, manufacturing is facilitated.
[0107] また、図 17に示したように、従来技術のモノポールアンテナ 200は、同軸ケ—ブル 等の給電線 40が接続された放射導体 30が、誘電体基板 20の表面に設けられて ヽ る。すなわち、放射導体 30が外部に露出している。そのため、放射導体 30が酸化等 の外部環境に対する耐性に乏しぐそのため、結果として、モノポールアンテナ 200 の外部環境に対する耐久性に問題が生じていた。これに対し、本実施の形態におけ るチップアンテナの製造方法では、給電電極部 5が基板材料 3aおよび 3bによって被 覆されていることから、上述した外部環境に対する耐性の問題を解消することができ 、高い耐久性を備えたチップアンテナ 1を提供することができる。  In addition, as shown in FIG. 17, the prior art monopole antenna 200 has a radiating conductor 30 connected to a feeding line 40 such as a coaxial cable provided on the surface of the dielectric substrate 20.ヽ. That is, the radiation conductor 30 is exposed to the outside. For this reason, the radiation conductor 30 has poor resistance to the external environment such as oxidation, and as a result, the durability of the monopole antenna 200 with respect to the external environment has occurred. On the other hand, in the chip antenna manufacturing method according to the present embodiment, since the feeding electrode portion 5 is covered with the substrate materials 3a and 3b, the above-described problem of resistance to the external environment can be solved. Therefore, the chip antenna 1 having high durability can be provided.
[0108] 次に、図 7に基づいて説明した製造方法によって製造したチップアンテナ 1の特性 等について説明する。  Next, characteristics and the like of the chip antenna 1 manufactured by the manufacturing method described with reference to FIG. 7 will be described.
[0109] なお、以下では、説明の便宜上、チップアンテナ 1を用いて電磁波を送信する場合 を想定して、チップアンテナの特性等について説明する力 この特性等は、チップァ ンテナ 1を用いて電磁波を受信する場合についてもほぼ同様に成り立つ。すなわち、 チップアンテナ 1は、電磁波の送信用にも受信用にも使用することができる。  In the following, for convenience of explanation, it is assumed that electromagnetic waves are transmitted using the chip antenna 1, and the force for explaining the characteristics of the chip antenna, etc. The same holds true for reception. That is, the chip antenna 1 can be used for both electromagnetic wave transmission and reception.
[0110] また、以下においては、チップアンテナ 1を用いて、 UWB通信の周波数帯域にほ ぼ相当する 3. 1〜10. 6GHz帯域の高周波を送信する場合を想定する。  [0110] In the following, it is assumed that the chip antenna 1 is used to transmit a high frequency band of 3.1 to 10.6 GHz, which corresponds to the frequency band of UWB communication.
[0111] 本実施の形態のチップアンテナ 1では、上述したように、誘電体基板を設けることに よってアンテナの小型化を実現することができる。その理由としては、誘電体基板 3を 設けることによって、波長短縮効果を得るためである。したがって、例えば、誘電体基 板を設けない同一サイズのチップアンテナと比較して、より長波長の電磁波、すなわ ち、より周波数の低い電磁波を送信することができる。逆に、低周波数側の限界を同 一とすると、チップアンテナ 1は、誘電体基板を設けないチップアンテナよりもサイズを[0111] In the chip antenna 1 of the present embodiment, as described above, the antenna can be downsized by providing the dielectric substrate. The reason is that the dielectric substrate 3 is This is because a wavelength shortening effect is obtained by providing them. Therefore, for example, an electromagnetic wave having a longer wavelength, that is, an electromagnetic wave having a lower frequency can be transmitted as compared with a chip antenna of the same size without a dielectric substrate. On the other hand, if the limits on the low frequency side are the same, chip antenna 1 is larger in size than a chip antenna without a dielectric substrate.
/J、さくすることができる。 / J, you can do it.
[0112] また、本実施の形態では、図 2に示したように、テーパースロット形状の給電電極部 5を設けることによって、周波数帯域の広帯域ィ匕を実現することができる。  Further, in the present embodiment, as shown in FIG. 2, by providing the feeding electrode portion 5 having a tapered slot shape, a wide band in a frequency band can be realized.
[0113] そこで、上述した製造方法によって製造されたチップアンテナ 1について、図 9およ び図 11に基づいて、誘電体基板 3に比誘電率の異なる基板材料を用い、かつ、その 配置を上記のように設定することによるアンテナ特性への影響について具体的に説 明する。  [0113] Therefore, for the chip antenna 1 manufactured by the above-described manufacturing method, based on FIGS. 9 and 11, a substrate material having a different dielectric constant is used for the dielectric substrate 3, and the arrangement thereof is described above. The effect on the antenna characteristics by setting as above will be explained in detail.
[0114] 図 9は、本実施の形態におけるチップアンテナ 1のアンテナ特性として、 3. 1〜10.  FIG. 9 shows the antenna characteristics of the chip antenna 1 according to this embodiment as 3.1 to 10.
6GHz帯域の周波数領域における VSWRを測定し、その最大値をグラフにしたもの である。上述したように、本実施の形態のチップアンテナ 1は、誘電体基板 3に、誘電 率 ε =4の基板材料 3aと、誘電率 ε = 16の基板材料 3bとを用いており、基板材料 3 aの成形幅は 9mmである。また、図 9には、比較として、テーパースロット形状の給電 電極を有し、 1種類の基板材料のみで構成された誘電体基板を有するチップアンテ ナの測定結果を破線によって示している。なお、このチップアンテナの基板材料は、 誘電率 ε = 16のものを用いている。  VSWR is measured in the frequency region of the 6GHz band, and the maximum value is graphed. As described above, the chip antenna 1 of the present embodiment uses the substrate material 3a having the dielectric constant ε = 4 and the substrate material 3b having the dielectric constant ε = 16 as the dielectric substrate 3. The forming width of a is 9mm. Further, in FIG. 9, for comparison, the measurement result of a chip antenna having a dielectric substrate made up of only one type of substrate material and having a tapered slot-shaped power supply electrode is shown by a broken line. The substrate material for this chip antenna is one with a dielectric constant ε = 16.
[0115] 図 9に示すように、誘電体基板に誘電率 ε = 16の基板材料のみを用いて形成した チップアンテナ(一般的なテーパースロット形状アンテナ)の VSWRは、周波数 3. 1 GHz付近と、周波数帯域 7〜8GHzの領域とにおける VSWR最大値が悪くなつてい る、すなわち、 VSWR最大値が上昇していることがわかる。  [0115] As shown in Fig. 9, the VSWR of the chip antenna (general tapered slot antenna) formed using only the substrate material with dielectric constant ε = 16 on the dielectric substrate is around 3.1 GHz frequency. It can be seen that the VSWR maximum value in the frequency band of 7 to 8 GHz is getting worse, that is, the VSWR maximum value is rising.
[0116] これに対し、図 9において実線で示した本実施の形態のチップアンテナ 1では、周 波数 3. 1GHz付近と、周波数 7〜8GHzの領域とにおける VSWR最大値の上昇が 低減していることがわ力る。  [0116] On the other hand, in the chip antenna 1 of the present embodiment shown by the solid line in FIG. 9, the increase in the maximum VSWR value is reduced in the vicinity of the frequency of 3.1 GHz and in the frequency region of 7 to 8 GHz. I can tell you.
[0117] 本実施の形態のチップアンテナ 1が、周波数 3. 1GHz付近と、周波数 7〜8GHzの 領域における VSWR最大値の上昇を低減することができた理由としては、以下のよう なことが考えられる。 [0117] The reason why the chip antenna 1 of the present embodiment was able to reduce the increase in the VSWR maximum value in the vicinity of the frequency of 3.1 GHz and the frequency of 7 to 8 GHz is as follows. It can be considered.
[0118] 一般に、アンテナの長さと、誘電率と、周波数との関係は、下記の式があてはまる傾 I口」にある。  [0118] In general, the relationship between the length of the antenna, the dielectric constant, and the frequency is in the "tilt I port where the following equation applies".
λ =C/if ε eff  λ = C / if ε eff
なお、 λはアンテナの長さを示し、 Cは光速を示し、 fは周波数を示し、 ε effは実効 比誘電率を示す。  Where λ is the length of the antenna, C is the speed of light, f is the frequency, and ε eff is the effective dielectric constant.
[0119] 図 10は、 1種類の基板材料カゝらなる誘電体基板を備えたテーパースロット形状のァ ンテナの平面図と、アンテナの周波数帯域 3. 1〜10. 6GHzにおける VSWRの最 大値を測定したグラフである。このアンテナは、本実施の形態と同じくチップ形状であ る。以下では、このアンテナについて、基板材料の比誘電率を、高いもの、中間のも の、低いものにそれぞれ変えて、 3種類のテーパースロット形状のチップアンテナそ れぞれの周波数帯域 3. 1〜10. 6GHzにおける VSWRの最大値を測定する。図 10 のグラフ中、 1点鎖線が誘電率の高 、基板材料を用いて形成されたチップアンテナ、 実線が誘電率の中間の基板材料を用いて形成されたチップアンテナ、 2点鎖線が誘 電率の低 、基板材料を用いて形成されたチップアンテナを示して 、る。  [0119] Figure 10 shows a plan view of a tapered slot antenna with a dielectric substrate consisting of one type of substrate material, and the maximum value of VSWR in the antenna frequency band 3.1 to 10.6 GHz. It is the graph which measured. This antenna has a chip shape as in the present embodiment. In the following, the frequency band of each of the three types of tapered slot chip antennas is changed for this antenna by changing the relative dielectric constant of the substrate material to high, medium, and low, respectively. 10. Measure the maximum value of VSWR at 6GHz. In the graph of FIG. 10, the one-dot chain line has a high dielectric constant, a chip antenna formed by using a substrate material, the solid line has a chip antenna formed by using a substrate material having an intermediate dielectric constant, and the two-dot chain line is electrically charged. A low-rate chip antenna formed using a substrate material is shown.
[0120] テーパースロット形状の給電導体を備えたチップアンテナは、通常、図 10 (b)に示 すように、 3. 1GHz付近および、 3. 1〜10. 6GHz帯域の中間部分で VSWRが悪く なる、すなわち、 VSWRの最大値が上昇または不安定になる傾向がある。  [0120] As shown in Fig. 10 (b), chip antennas with tapered slot-shaped feed conductors usually have poor VSWR near 3.1 GHz and between 3.1 and 10.6 GHz. That is, the maximum value of VSWR tends to increase or become unstable.
[0121] そこで、図 10のグラフ中の 1点鎖線で示したように、誘電率を高くすると、上記の式 によれば、波長短縮効果により、同じ大きさのアンテナであれば、下限周波数が小さ くなるため、 3.1GHzの VSWR最大値は低くなる。  [0121] Therefore, as shown by the alternate long and short dash line in the graph of FIG. 10, when the dielectric constant is increased, the lower limit frequency is lower for the same size antenna due to the wavelength shortening effect according to the above equation. Since it becomes smaller, the maximum VSWR at 3.1 GHz will be lower.
[0122] ところで、テーパースロットアンテナは広帯域に渡って VSWR最大値を低くするアン テナ構造であり、同じ大きさのアンテナであれば、基材の誘電率が大きいほど波長短 縮効果があり、 VSWR最大値の周波数が下がる傾向がある。  [0122] By the way, the tapered slot antenna has an antenna structure that lowers the VSWR maximum value over a wide band. If the antenna has the same size, the larger the dielectric constant of the base material, the shorter the wavelength. The maximum frequency tends to decrease.
[0123] そのため、図 10のグラフ中の 1点鎖線で示したように誘電率を高くすると、 3. 1GH zである下限周波数側の VSWR最大値は低くなる力 その反面、このようなテーパー スロット形状のアンテナの特性上、 3. 1〜10. 6GHz帯域における上限周波数(10. 6GHz)を越える VSWRが高い部分も波長が下限周波数側に短縮されるため、上限 周波数側の VSWRが悪くなる傾向がある。 [0123] Therefore, as shown by the dashed line in the graph of Fig. 10, when the dielectric constant is increased, the VSWR maximum value on the lower frequency side, which is 3.1 GHz, decreases. On the other hand, such a tapered slot Due to the shape of the antenna, the upper limit frequency (10.6 GHz) in the 3.1 to 10.6 GHz band is exceeded. The VSWR on the frequency side tends to deteriorate.
[0124] 反対に、図 10のグラフ中の 2点鎖線で示したように、誘電率が低い程、上記の式に よれば、波長短縮効果により、同じ大きさのアンテナであれば、下限周波数が大きく なるため、 3. 1GHzの VSWR最大値は高くなる。しかしながら、中間の VSWR最大 値の悪カゝつた周波数領域の VSWR最大値も、 10. 6GHzである上限周波数側にシ フトし、条件によっては、図示したように VSWR最大値が 10. 6GHzよりもより高周波 数側にシフトし、上記の中間の VSWR最大値が悪力つた点に関しての問題を解消す ることがでさる。 [0124] On the contrary, as indicated by the two-dot chain line in the graph of FIG. 10, the lower the dielectric constant, the lower the lower limit frequency for the same size antenna due to the wavelength shortening effect according to the above equation. Therefore, the maximum VSWR value at 1 GHz is high. However, the VSWR maximum value in the frequency range where the intermediate VSWR maximum value is bad is also shifted to the upper limit frequency side of 10.6 GHz, and depending on the conditions, the VSWR maximum value is higher than 10.6 GHz as shown in the figure. Shifting to a higher frequency side can solve the above-mentioned problem regarding the adverse effect of the intermediate maximum VSWR value.
[0125] 本実施の形態のチップアンテナ 1は、図 10のグラフに基づいて説明したそれぞれ の利点を併せもっている。  [0125] The chip antenna 1 of the present embodiment has the advantages described based on the graph of FIG.
[0126] 図 11 (a)には、本実施の形態のチップアンテナ 1における周波数とアンテナの長さ との関係を示した模式図を示す。図 11 (a)では、長さ aに相当するアンテナの長さが 、上限周波数を規定する。また、長さ bに相当するアンテナの長さが、下限周波数を 規定する。 3. 1〜: LO. 6GHz帯域の周波数領域で言えば、上限周波数とは 10. 6G Hzのことであり、下限周波数とは 3. 1GHzのことである。なお、この周波数とアンテナ 長との関係は、チップアンテナ 1に限らず、全てのテーパースロット形状のアンテナに 対してあてはまることである。  FIG. 11 (a) is a schematic diagram showing the relationship between the frequency and the antenna length in the chip antenna 1 of the present embodiment. In Fig. 11 (a), the length of the antenna corresponding to the length a defines the upper limit frequency. The length of the antenna corresponding to length b defines the lower limit frequency. 3. 1 ~: LO. In the frequency region of the 6 GHz band, the upper limit frequency is 10.6 GHz, and the lower limit frequency is 3.1 GHz. This relationship between the frequency and the antenna length applies not only to the chip antenna 1 but also to all tapered slot antennas.
[0127] なお、上述したように、本発明のチップアンテナは、接地電極 4aおよび 4bを備えず 、チップアンテナを実装する基板側に接地電極を設けた構成であってもよい。この場 合、上限周波数を規定するアンテナの長さ aは、チップアンテナにおける実装基板と の境界部分力もの長さになり、下限周波数を規定するアンテナの長さ bも同様に、チ ップアンテナにおける実装基板との境界部分からの長さになる。  [0127] As described above, the chip antenna of the present invention may have a configuration in which the ground electrode is not provided but the ground electrode is provided on the substrate side on which the chip antenna is mounted. In this case, the length a of the antenna that defines the upper limit frequency is the length of the boundary portion of the chip antenna with the mounting substrate, and the length b of the antenna that defines the lower limit frequency is similarly mounted on the chip antenna. The length is from the boundary with the substrate.
[0128] 本実施の形態のチップアンテナ 1は、この図 10のグラフに基づけば、下限周波数を 規定するアンテナ長の長さ bに相当する誘電体基板 3の基板材料 3bの誘電率を、上 限周波数を規定するアンテナ長の長さ aに相当する誘電体基板 3の基板材料 3aおよ び、上記の帯域の中間の VSWR最大値が悪 、部分に相当するアンテナ長に相当す る誘電体基板 3の部分の誘電率に比べて高くすることにより、図 10のグラフで示した 利点を併せもつことができたと考えられる。 [0129] 具体的に説明すれば、図 11 (b)に示したグラフは、 3. 1〜10. 6GHz帯域の周波 数領域での、チップアンテナ 1の VSWRの最大値を測定したグラフである。図 1 1 (b) では、チップアンテナ 1の VSWRの最大値の測定結果を実線で示すとともに、比較 のため、図 10のグラフにおいて示した誘電率が中間のものを備えたチップアンテナ の VSWRの最大値の測定結果を破線として示して 、る。 [0128] Based on the graph of Fig. 10, the chip antenna 1 of the present embodiment increases the dielectric constant of the substrate material 3b of the dielectric substrate 3 corresponding to the length b of the antenna length that defines the lower limit frequency. The dielectric material corresponding to the antenna length corresponding to the portion of the substrate material 3a of the dielectric substrate 3 corresponding to the length a of the antenna length that defines the limiting frequency and the VSWR maximum value in the middle of the above band is bad. It is considered that the advantages shown in the graph of Fig. 10 could be achieved by making the dielectric constant higher than that of the substrate 3 part. Specifically, the graph shown in FIG. 11 (b) is a graph obtained by measuring the maximum value of the VSWR of the chip antenna 1 in the frequency range of 3.1 to 10.6 GHz band. . In Fig. 11 (b), the measurement result of the maximum value of VSWR of chip antenna 1 is shown by a solid line, and for comparison, the VSWR of the chip antenna with an intermediate dielectric constant shown in the graph of Fig. 10 is shown. The measurement result of the maximum value is shown as a broken line.
[0130] 本実施の形態のチップアンテナ 1は、上述したように、誘電体基板 3に、誘電率 ε  [0130] As described above, the chip antenna 1 of the present embodiment has the dielectric constant ε on the dielectric substrate 3.
=4の基板材料 3aと誘電率 ε = 16の基板材料 3bとを用いている。  = 4 substrate material 3a and dielectric constant ε = 16 substrate material 3b.
[0131] 図 11 (b)の実線で示すように、本実施の形態のチップアンテナ 1の VSWR最大値 は、 3. 1〜: LO. 6GHz帯域の周波数領域において、下限周波数を規定するアンテナ の長さ bに対応する誘電体基板が、すなわち基板材料 3bが、比誘電率が高いため、 波長が下限周波数側に短縮することにより、 3. 1GHzにあたる下限周波数側の VS WR最大値が、破線で示した VSWR最大値よりも低くなつて 、る。  [0131] As shown by the solid line in Fig. 11 (b), the VSWR maximum value of the chip antenna 1 of this embodiment is 3.1 ~: LO. Since the dielectric substrate corresponding to the length b, that is, the substrate material 3b, has a high relative dielectric constant, the maximum VS WR value on the lower limit frequency side corresponding to 3.1 GHz is It will be lower than the maximum VSWR value shown in.
[0132] また、図 11 (b)の実線で示すように、本実施の形態のチップアンテナ 1の VSWR最 大値は、 3. 1〜: LO. 6GHz帯域の周波数領域において、上限周波数を規定するァ ンテナ長の長さ aに対応する誘電体基板の基板材料 3aの比誘電率が高ぐまた、上 記の帯域の中間にお 、て VSWR最大値が上昇した部分に相当するアンテナ長に対 応する誘電体基板の比誘電率が高い。そのため、上記の帯域の中間部分において 生じていた VSWR最大値の上昇は、上限周波数側(10. 6GHz側)よりも高周波数 側にシフトし、 3. 1〜10. 6GHz帯域内からなくなる。  [0132] As shown by the solid line in Fig. 11 (b), the maximum VSWR value of the chip antenna 1 of this embodiment is 3.1 to: LO. The upper limit frequency is defined in the frequency region of 6 GHz band. The relative dielectric constant of the substrate material 3a of the dielectric substrate corresponding to the antenna length length a is high, and the antenna length corresponding to the portion where the VSWR maximum value has increased in the middle of the above band The relative dielectric constant of the corresponding dielectric substrate is high. Therefore, the increase in the maximum VSWR value that occurred in the middle part of the above band shifts to the higher frequency side from the upper limit frequency side (10.6 GHz side) and disappears from the 3.1 to 10.6 GHz band.
[0133] すなわち、本実施の形態のチップアンテナ 1は、下限周波数側では波長短縮を生 かし、中間から上限周波数側では波長短縮を行わないようにして、全体的に VSWR を安定させることができて 、るものと考えられる。  That is, the chip antenna 1 of the present embodiment can stabilize the VSWR as a whole by making use of wavelength shortening on the lower limit frequency side and not performing wavelength shortening on the middle to upper limit frequency side. It is possible and considered.
[0134] このように、チップアンテナ 1は、比誘電率の異なる基板材料 3aおよび 3bを有した 誘電体基板 3を備えていることにより、上述したアンテナ特性を得ることができる。  As described above, the chip antenna 1 includes the dielectric substrate 3 having the substrate materials 3a and 3b having different relative dielectric constants, whereby the above-described antenna characteristics can be obtained.
[0135] 後述する実施例には、チップアンテナ 1と同じ構成のチップアンテナを用い、基板 材料 3aの成形幅 Wを変化させて、それぞれにつ 、て VSWR値を測定することによつ て上述した特性の評価を行って 、る。  In the examples to be described later, a chip antenna having the same configuration as the chip antenna 1 is used, the molding width W of the substrate material 3a is changed, and the VSWR value is measured for each of them. We will evaluate the characteristics.
[0136] 以上のように、本発明のチップアンテナの製造方法によれば、インサート成形によつ て上記給電導体 2と誘電体基板 3とを一体成形している。 [0136] As described above, according to the chip antenna manufacturing method of the present invention, it is possible to perform insert molding. Thus, the feeding conductor 2 and the dielectric substrate 3 are integrally formed.
[0137] これにより、従来までのチップアンテナの製造方法と比較して、製造を容易に行うこ とがでさる。 [0137] This makes it easier to manufacture as compared with conventional chip antenna manufacturing methods.
[0138] したがって、量産性を向上することができ、量産性の向上に伴って、チップアンテナ に係るコストを低減させることができることから低価格のチップアンテナを提供すること ができる。  [0138] Accordingly, mass productivity can be improved, and the cost associated with the chip antenna can be reduced along with the improvement of mass productivity, so that a low-cost chip antenna can be provided.
[0139] また、上記誘電体基板 3が、互いに異なる熱可塑性を有する 2つの基板材料 3aお よび 3bからなり、かつ、各該基板材料 3aおよび 3bが上記導体部の表面に接触する ように構成されている。  [0139] The dielectric substrate 3 is composed of two substrate materials 3a and 3b having different thermoplasticity, and the substrate materials 3a and 3b are in contact with the surface of the conductor portion. Has been.
[0140] このように、上記誘電体基板を複数の基板材料から構成するような場合であっても 、これらの基板材料が互いに異なる熱可塑性を有することから、インサート成形によつ て、容易に上記給電導体と一体成形することができる。  [0140] As described above, even when the dielectric substrate is composed of a plurality of substrate materials, these substrate materials have thermoplasticity different from each other. The feeding conductor can be integrally formed.
[0141] また、本発明のチップアンテナの製造方法によれば、上記基板材料 3aおよび 3bが 、比誘電率が異なっているため、 VSWRの最大値を小さく抑えつつ、より広い周波数 帯域に対応できるチップアンテナを提供することができる。  [0141] Also, according to the method for manufacturing a chip antenna of the present invention, since the substrate materials 3a and 3b have different relative dielectric constants, the maximum value of VSWR can be kept small, and a wider frequency band can be handled. A chip antenna can be provided.
[0142] すなわち、誘電体基板を構成する基板材料 3aおよび 3bが、互いに異なる比誘電 率を有するため、電磁波の反射の発生箇所が分散することになり、これに伴って、そ れぞれの周波数の反射波も分散する。したがって、所定の周波数に集中して強度の 強い反射波が発生し、その周波数における VSWR値が上昇する、という不具合を回 避することができる。  [0142] That is, since the substrate materials 3a and 3b constituting the dielectric substrate have different relative dielectric constants, the locations where the electromagnetic waves are reflected are dispersed. The reflected wave of the frequency is also dispersed. Therefore, it is possible to avoid the problem that a reflected wave with strong intensity is generated concentrated on a predetermined frequency and the VSWR value at that frequency rises.
[0143] また、本発明のチップアンテナの製造方法によれば、上記誘電体基板 3が、上記対 称軸 Sに近 、側力 遠 、側に向けて、比誘電率が段階的に大きくなるように成形され ている。具体的には、下限周波数を規定するアンテナ長の長さ bに相当する誘電体 基板 3の基板材料 3bの誘電率を、上限周波数を規定するアンテナ長の長さ aに相当 する誘電体基板 3の基板材料 3aに比べて高くしている。  [0143] Also, according to the method for manufacturing a chip antenna of the present invention, the dielectric substrate 3 has a relative dielectric constant that increases stepwise toward the symmetrical axis S, toward the side, and toward the side. It is shaped like this. Specifically, the dielectric constant of the substrate material 3b of the dielectric substrate 3 corresponding to the antenna length length b that defines the lower limit frequency is defined as the dielectric substrate 3 corresponding to the antenna length length a that defines the upper limit frequency. It is higher than the substrate material 3a.
[0144] これにより、下限周波数側では波長短縮を生かし、中間から上限周波数側では波 長短縮を行わな 、ようにして、全体的に VSWRを安定させることができる。  [0144] Thus, the VSWR can be stabilized as a whole by making use of the wavelength reduction on the lower limit frequency side and not performing the wavelength reduction on the middle to upper limit frequency side.
[0145] すなわち、本発明のチップアンテナの製造方法によれば、製造が容易であるととも に、広帯域の周波数 (電波)〖こも十分に対応することができるチップアンテナを製造 することができる。 That is, according to the chip antenna manufacturing method of the present invention, it is easy to manufacture. In addition, it is possible to manufacture a chip antenna that can sufficiently handle a wide range of frequencies (radio waves).
[0146] また、本発明のチップアンテナの製造方法によれば、上記給電導体 2の給電電極 部 5を、上記基板材料 3aおよび 3bによって被覆するようにインサート成形するため、 該導体給電電極部 5が外部に露出しない。そのため、外部環境への該給電電極部 5 の接触を回避することができる。  [0146] Also, according to the method for manufacturing a chip antenna of the present invention, since the feed electrode portion 5 of the feed conductor 2 is insert-molded so as to be covered with the substrate materials 3a and 3b, the conductor feed electrode portion 5 Is not exposed to the outside. For this reason, contact of the power supply electrode portion 5 with the external environment can be avoided.
[0147] したがって、上記給電電極部 5の外部環境に対する耐久性および、チップアンテナ 1全体の外部環境に対する耐久性を向上させることができる。  Therefore, the durability of the power feeding electrode portion 5 with respect to the external environment and the durability of the entire chip antenna 1 with respect to the external environment can be improved.
[0148] し力しながら、本発明はこれに限定されるものではなぐ例えば上記給電電極部 5の 一部が外部に露出した構造であってもよい。  However, the present invention is not limited to this, and for example, a structure in which a part of the feeding electrode portion 5 is exposed to the outside may be used.
[0149] また、チップアンテナ 1は、チップ形状であることから、従来のモノポールアンテナと 比較して接地面からの高さが低ぐ薄型のアンテナを提供することができため、近年、 開発が盛んに行われている各種モパイル機器等の薄型機器に好適に用いることが できる。  [0149] Further, since the chip antenna 1 has a chip shape, it can provide a thin antenna having a lower height from the ground plane than a conventional monopole antenna. It can be suitably used for thin devices such as various mopile devices that are actively used.
[0150] また、本発明のチップアンテナの製造方法によれば、カット型に合わせてリードフレ ームをプレス加工して上記給電電極部 5を形成することができる。  [0150] Further, according to the method for manufacturing a chip antenna of the present invention, the feed electrode portion 5 can be formed by pressing a lead frame in accordance with a cut mold.
[0151] これにより、チップアンテナ 1の製造方法をより一層容易にすることができる。すなわ ち、従来の製造方法では、上述したように、給電導体の導体部を形成するためには、 上記誘電体基板をマスクする工程や、給電導体に相当する金属材料をメツキし、最 後にはエッチングによって上記マスク部分を除ぐといった多数の工程を必要として いた。そこで、本発明のチップアンテナの製造方法によれば、リードフレームをプレス 加工することによって上記給電電極部 5を形成するため、従来と比較して容易に上記 給電電極部 5を製造することができる。  Thereby, the manufacturing method of the chip antenna 1 can be further facilitated. That is, in the conventional manufacturing method, as described above, in order to form the conductor portion of the power supply conductor, the process of masking the dielectric substrate and the metal material corresponding to the power supply conductor are measured, and finally, Required many processes such as etching to remove the mask portion. Therefore, according to the method for manufacturing a chip antenna of the present invention, the power supply electrode portion 5 is formed by pressing a lead frame, so that the power supply electrode portion 5 can be manufactured more easily than in the past. .
[0152] また、容易に、所望の形状の給電電極部 5を形成することができる。したがって、上 記カット型の形を変えることにより、所望の形状の給電電極部 5を形成することが可能 となる。そのため、本発明の製造方法によって製造したチップアンテナ 1を搭載する 装置や機器に好適な形状のチップアンテナ 1を提供することができる。  [0152] Further, it is possible to easily form the feeding electrode portion 5 having a desired shape. Therefore, it is possible to form the feeding electrode portion 5 having a desired shape by changing the shape of the cut mold. Therefore, it is possible to provide a chip antenna 1 having a shape suitable for an apparatus or device on which the chip antenna 1 manufactured by the manufacturing method of the present invention is mounted.
[0153] また、本発明のチップアンテナの製造方法によれば、給電電極部 5をテーパースロ ット形状に形成することから、チップアンテナ 1は、周波数帯域 3. 1〜: LO. 6GHzの広 帯域の電波の送受信に使用することができる。 [0153] Also, according to the manufacturing method of the chip antenna of the present invention, the feed electrode portion 5 is tapered. The chip antenna 1 can be used for transmission / reception of radio waves in a wide frequency band of 3.1 to: LO. 6 GHz.
[0154] また、本発明のチップアンテナの製造方法によれば、インサート成形によって給電 導体 2と誘電体基板 3とを一体形成した後に、上記給電端子部 6を屈曲させる。  [0154] Also, according to the method for manufacturing a chip antenna of the present invention, the feed terminal 2 is bent after the feed conductor 2 and the dielectric substrate 3 are integrally formed by insert molding.
[0155] これにより、チップアンテナ 1を表面実装形状にすることができる。すなわち、本発明 のチップアンテナの製造方法によって製造されるチップアンテナ 1は、チップアンテ ナを搭載しょうとする機器に対して起立した構造ではなぐ表面実装に対応すること ができる。したがって、従来問題となっていた起立させて製造することの困難性は、本 発明のチップアンテナの製造方法では生じず、チップアンテナ 1は自動実装すること ができる。  [0155] Thereby, the chip antenna 1 can be formed into a surface-mounted shape. That is, the chip antenna 1 manufactured by the method for manufacturing a chip antenna of the present invention can cope with surface mounting that does not have a structure that stands up with respect to a device on which the chip antenna is to be mounted. Therefore, the difficulty of standing up and manufacturing which has been a problem in the past does not occur in the chip antenna manufacturing method of the present invention, and the chip antenna 1 can be automatically mounted.
[0156] これにより、チップアンテナを搭載しょうとする機器の生産性の向上も実現すること ができる。  [0156] As a result, it is possible to improve the productivity of a device to be mounted with a chip antenna.
[0157] また、本発明のチップアンテナの製造方法によれば、チップアンテナ 1の誘電体基 板 3の基板材料に PPSまたは LCPを用いることが好ましい。 PPSまたは LCPは、従 来公知の榭脂と比べ、高い比誘電率を備えることができるという特殊な性質を有して いる。高い比誘電率を有する材料を誘電体基板に構成すると、波長短縮効果により 、給電導体を小型化することができ、結果として、チップアンテナ 1自体の小型化を可 能にする。  In addition, according to the method for manufacturing a chip antenna of the present invention, it is preferable to use PPS or LCP as the substrate material of the dielectric substrate 3 of the chip antenna 1. PPS or LCP has a special property that it can have a higher dielectric constant than conventionally known resins. When a material having a high relative dielectric constant is formed on the dielectric substrate, the feed conductor can be downsized due to the wavelength shortening effect, and as a result, the chip antenna 1 itself can be downsized.
[0158] なお、本実施の形態では、直方体の形状を有したチップアンテナ 1につ 、て説明し た。し力しながら、本発明はこれに限定されるものではなぐ上述したように表面実装 することが可能な形状であれば、直方体の形状に限定されるものではな 、。  [0158] In the present embodiment, the chip antenna 1 having a rectangular parallelepiped shape has been described. However, the present invention is not limited to this, and is not limited to a rectangular parallelepiped shape as long as it can be surface-mounted as described above.
[0159] 具体的には、図 12に示すような形状であってもよい。すなわち、図 12に示すチップ アンテナ 1は、誘電体基板 3が、上記給電導体 2の給電電極部 5から給電端子部 6〖こ 向かって幅が広がっており、全体として、チップアンテナ 1が台形の形状になっている  Specifically, the shape shown in FIG. 12 may be used. That is, in the chip antenna 1 shown in FIG. 12, the width of the dielectric substrate 3 increases from the feeding electrode portion 5 of the feeding conductor 2 toward the feeding terminal portion 6, and as a whole, the chip antenna 1 has a trapezoidal shape. Is in shape
[0160] なお、本実施の形態では、誘電率が段階的に変化する誘電体基板 3について説明 したが、誘電体基板 3は、比誘電率が連続的に変化するものであってもよい。 [0160] Although the dielectric substrate 3 whose dielectric constant changes stepwise has been described in the present embodiment, the dielectric substrate 3 may be one whose dielectric constant changes continuously.
[0161] また、本発明のチップアンテナの製造方法は、誘電体基板 3の基板材料に、セラミ ックを用いた場合であっても適用することができる。セラミックを用いた場合について、 以下に説明する。図 13 (a)は誘電体基板 3の基板材料にセラミック 33aが用いられた チップアンテナ 1を示す斜視図であり、図 13 (b)は図 13 (a)に示したチップアンテナ 1 を線分 C— C'で切断した状態を示した断面図である。セラミック 33aが用いられた場 合であっても、図 13 (b)に示すような配置とすれば、セラミック 33aの周囲には上述し たような熱可塑性を有する基板材料 (例えば、榭脂)が構成されることから、上記と同 じょうに、インサート成形によって給電導体 2と一体成形することができる。 [0161] In addition, in the method for manufacturing a chip antenna of the present invention, ceramic is applied to the substrate material of the dielectric substrate 3. Even when a rack is used, it can be applied. The case where ceramic is used will be described below. Fig. 13 (a) is a perspective view showing the chip antenna 1 in which the ceramic 33a is used as the substrate material of the dielectric substrate 3, and Fig. 13 (b) shows the chip antenna 1 shown in Fig. 13 (a) as a line segment. It is sectional drawing which showed the state cut | disconnected by CC '. Even when the ceramic 33a is used, if the arrangement shown in FIG. 13 (b) is adopted, the substrate material having thermoplasticity as described above (for example, resin) is disposed around the ceramic 33a. Therefore, it is possible to integrally form the feeder conductor 2 by insert molding as described above.
[0162] セラミックは、上記樹脂と比較して非常に高い誘電率 ε =80程度を有する。したが つて、このようなセラミックが構成されていることにより、上述したように、波長短縮効果 をもたらし、給電導体 5をさらに小型化することができる。したがって、チップアンテナ 1自体のさらなる小型化を実現することができる。なお、セラミックを用いたチップアン テナ 1としては、図 14に示すような断面構造を有するチップアンテナであってもよい。  [0162] Ceramic has a very high dielectric constant ε = about 80 compared to the above resin. Therefore, such a ceramic is configured to provide a wavelength shortening effect and further reduce the size of the feed conductor 5 as described above. Therefore, further miniaturization of the chip antenna 1 itself can be realized. The chip antenna 1 using ceramic may be a chip antenna having a cross-sectional structure as shown in FIG.
[0163] なお、本発明は上述した各実施の形態に限定されるものではなぐ請求項に示した 範囲で種々の変更が可能であり、異なる実施形態にそれぞれ開示された技術的手 段を適宜組み合わせて得られる実施形態についても本発明の技術的範囲に含まれ る。  [0163] It should be noted that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the claims, and the technical means disclosed in the different embodiments can be appropriately used. Embodiments obtained by combining are also included in the technical scope of the present invention.
[0164] 以下に、本発明を実施例に基づいて詳細に説明するが、本発明はこれに限定され るものではない。  [0164] Hereinafter, the present invention will be described in detail based on examples, but the present invention is not limited thereto.
[0165] 〔実施例〕 [Example]
以下の説明は、本発明のチップアンテナの製造方法によって製造したチップアンテ ナについて説明する。  In the following description, a chip antenna manufactured by the chip antenna manufacturing method of the present invention will be described.
[0166] 本実施例では、上述した実施の形態中の図 3と同じチップアンテナ 1の構成を備え る。本実施例のチップアンテナについて図 15に基づいて説明すれば以下の通りであ る。  In this example, the same configuration of the chip antenna 1 as in FIG. 3 in the above-described embodiment is provided. The chip antenna of this example will be described as follows based on FIG.
[0167] 図 15に示すように、チップアンテナ 1の構成において、誘電体基板 3の基板材料 3a には誘電率 16の PPSを用い、基板材料 3bには誘電率 16の PPSを用いた。  As shown in FIG. 15, in the configuration of the chip antenna 1, PPS having a dielectric constant of 16 was used for the substrate material 3a of the dielectric substrate 3, and PPS having a dielectric constant of 16 was used for the substrate material 3b.
[0168] チップアンテナ 1の形状は、図 3に図示した断面図にあたる断面面積が 14mm X l 5mmであり、厚みは lmmである。 14mmの長さを有する側の 1辺に、導電材料(例 えば銅合金薄板材料)からなる接地電極 4aおよび 4bが形成されている。さら〖こ、該 接地電極 4aおよび 4bのそれぞれから 1. 1mmの距離を隔てて、導電材料(例えば 銅合金薄板材料)からなる幅 2mmの給電端子部 6を有したテーパースロット形状の 給電導体 4が形成されている。給電導体 2の給電電極部 5は、テーパースロット形状 であり、導電材料 (例えば銅合金薄板材料)カゝらなるリードフレームをプレス加工する ことによって形成した。給電電極部 5と給電端子部 6とは、銀ペーストによって連結し た。また、接地電極 4aおよび 4bは、 15mmの長さを有する辺に沿って lmmの長さを 有している。 The shape of the chip antenna 1 is such that the cross-sectional area corresponding to the cross-sectional view shown in FIG. 3 is 14 mm × l 5 mm, and the thickness is lmm. A conductive material (eg For example, ground electrodes 4a and 4b made of a copper alloy thin plate material are formed. Furthermore, a tapered slot-shaped power supply conductor 4 having a power supply terminal portion 6 made of a conductive material (for example, a copper alloy thin plate material) and having a width of 2 mm is separated from each of the ground electrodes 4a and 4b by 1.1 mm. Is formed. The feed electrode portion 5 of the feed conductor 2 has a tapered slot shape, and is formed by pressing a lead frame made of a conductive material (for example, a copper alloy thin plate material). The feeding electrode part 5 and the feeding terminal part 6 were connected by silver paste. The ground electrodes 4a and 4b have a length of lmm along a side having a length of 15mm.
[0169] 以上のような形状および材質力も構成されたチップアンテナ 1を用いて、誘電体基 板 3の基板材料 3aの成形幅 Wを適宜変化させ、それぞれの場合について、アンテナ 特性を VSWR最大値を測定することによって評価した。基板材料 3bの成形幅 Wとし て ίま、 W=0, 3, 5, 7, 9, 11, 13mmの 7種類【こつ!ヽて視 IJ定した。なお、 W=Omm のチップアンテナとは、基板材料 3aがなぐ基板材料 3bの誘電率 16の PPSによって のみ構成された誘電体基板を備えたチップアンテナのことであり、一般的なテーパー スロット形状のアンテナに相当するものである。  [0169] Using the chip antenna 1 having the above-mentioned shape and material strength, the molding width W of the substrate material 3a of the dielectric substrate 3 is appropriately changed, and the antenna characteristics are set to the VSWR maximum value in each case. Was evaluated by measuring. Substrate material 3b forming width W is ί, W = 0, 3, 5, 7, 9, 11, 13mm. A chip antenna of W = Omm is a chip antenna having a dielectric substrate composed only of PPS with a dielectric constant of 16 of the substrate material 3b formed by the substrate material 3a. It corresponds to an antenna.
[0170] 図 16 (a)および (b)は、 3. 1〜: LO. 6GHzの周波数帯域における、種々の基板材 料 3bの成形幅 W(W=0, 3, 5, 7, 9, 11, 13mm)を有したチップアンテナの VSW R最大値の測定結果を示すグラフである。なお、説明の便宜上、 7種類のチップアン テナの測定結果を、図 16 (a)および (b)の 2つに分けて示している。図 16 (a)および( b)には、 W=0のチップアンテナ(一般的なテーパースロット形状アンテナ)の測定結 果を指標として破線によってグラフ中に示している。図 16 (a)には、 W= 7, 9, 11m mおよび指標となる W=0のテーパースロット形状アンテナの VSWR最大値の測定 結果を示し、図 16 (b)には、 W= 3, 5, 13mmおよび指標となる W=0のチップアン テナの VSWR最大値の測定結果を示した。  [0170] Figures 16 (a) and (b) are: 3.1-: LO. Forming width W of various substrate materials 3b in the frequency band of 6 GHz (W = 0, 3, 5, 7, 9, 11 and 13 mm are graphs showing the measurement results of the maximum value of VSW R of a chip antenna having a diameter of 13 mm. For convenience of explanation, the measurement results for the seven types of chip antennas are shown in two parts in FIGS. 16 (a) and 16 (b). In Figs. 16 (a) and (b), the measurement results of a chip antenna with W = 0 (general tapered slot antenna) are shown in the graph with broken lines as an index. Fig. 16 (a) shows the measurement results of the maximum VSWR value of the tapered slot antenna with W = 7, 9, 11 mm and the index W = 0. In Fig. 16 (b), W = 3, The measurement results of the maximum VSWR value of the tip antenna with 5 and 13 mm and the index W = 0 were shown.
[0171] 図 16 (a)および (b)に示した測定結果より、本実施例のチップアンテナは、 3. 1〜1 0. 6GHzの周波数帯域において、基板材料 3bの成形幅 W= 7, 9, 11mmを有する 場合(図 16 (a) )に、 W=Ommの場合にみられる周波数 3. 1GHz付近と周波数帯域 7〜8GHz付近の VSWR最大値の上昇を低減させ、かつ、 VSWR最大値が安定し ていることがわかる。特に、周波数帯域 7〜8GHz付近の VSWR最大値の上昇が効 果的に低減されている。さらに、基板材料 3bの成形幅 W= 9mmの場合、 W=Omm の場合にみられる周波数 10. 6GHz付近の VSWR最大値の上昇も低減させることが できていることがわかる。なお、基板材料 3bの成形幅 W= 3, 5, 13mmを有する場 合(図 16 (b) )は、 W=Ommの場合にみられる周波数 3. 1GHz付近と周波数帯域 7 〜8GHz付近の VSWR最大値の上昇を低減させることができな力つた。 [0171] From the measurement results shown in FIGS. 16 (a) and 16 (b), the chip antenna of this example has a molding width W = 7 of the substrate material 3b in the frequency band of 3.1 to 10.6 GHz. 9 and 11mm (Fig. 16 (a)), the increase in the VSWR maximum value near the frequency 3.1 GHz and the frequency band 7 to 8 GHz is reduced and the VSWR maximum value is observed when W = Omm. Is stable You can see that In particular, the increase in the maximum VSWR value in the frequency band of 7 to 8 GHz is effectively reduced. Furthermore, it can be seen that when the forming width of the substrate material 3b is 9 mm, the increase in the maximum VSWR near the frequency of 10.6 GHz, as seen when W = Omm, can be reduced. When the substrate material 3b has a forming width W = 3, 5, 13 mm (Fig. 16 (b)), the VSWR with a frequency of around 3.1 GHz and a frequency band of 7 to 8 GHz is seen when W = Omm. The force that could not reduce the rise in the maximum value.
[0172] したがって、本実施例の測定結果の中では、基板材料 3bの成形幅 W= 7〜: L lmm を有するチップアンテナが好ましぐ成形幅 W= 9mmを有するチップアンテナ力 上 記のようにアンテナ特性が最も良 、ため、より好ま U、ことがわかる。  Therefore, among the measurement results of the present example, the chip antenna force having the molding width W = 9 mm, which is preferable for the chip antenna having the molding width W = 7˜: L lmm of the substrate material 3b, as described above. It is clear that the antenna characteristics are the best, so it is more preferable.
[0173] このように、本発明に係るチップアンテナは、比誘電率の異なる基板材料から誘電 体基板を構成していることにより、一般的なテーパースロット形状アンテナと比較して 、 3. 1〜: LO. 6GHzの広帯域に対応させる場合に問題となっていたアンテナ特性の 悪化を低減させ、良好かつ安定なアンテナ特性を備えたチップアンテナを提供する ことができる。  [0173] As described above, the chip antenna according to the present invention includes a dielectric substrate made of substrate materials having different relative dielectric constants, and therefore, compared with a general tapered slot antenna, 3.1 to : LO. It is possible to provide a chip antenna with good and stable antenna characteristics by reducing the deterioration of antenna characteristics, which has been a problem when dealing with a broadband of 6 GHz.
産業上の利用の可能性  Industrial applicability
[0174] 本発明に係るチップアンテナの製造方法は、インサート成形によって誘電体基板と 給電導体とを一体成形させることができるため、容易に製造することが可能である。ま た、製造されるチップアンテナは、比誘電率の異なる基板材料から誘電体基板を構 成していることにより、 3. 1〜: LO. 6GHzの広帯域に良好に対応できる表面実装型の チップアンテナを提供することができる。 The chip antenna manufacturing method according to the present invention can be easily manufactured because the dielectric substrate and the feed conductor can be integrally formed by insert molding. In addition, the chip antenna to be manufactured is a surface-mount type chip that can cope well with a wide band of LO. 6 GHz by constructing a dielectric substrate from substrate materials with different relative dielectric constants. An antenna can be provided.
[0175] したがって、例えば、携帯電話、 PDA等の情報端末や PCカード型無線機、 CF (コ ンパクトフラッシュ (登録商標) )型無線機、 IEEE1394型無線機等の薄型機器に広く 適用することができる。 [0175] Therefore, for example, it can be widely applied to thin terminals such as information terminals such as mobile phones and PDAs, PC card type radios, CF (compact flash (registered trademark)) type radios, IEEE1394 type radios, etc. it can.

Claims

請求の範囲 The scope of the claims
[1] 誘電材料からなる誘電体基板と、  [1] a dielectric substrate made of a dielectric material;
給電端子を有する端子部と該端子部に導通した導体部とを有する給電導体とを備 えたチップアンテナの製造方法であって、  A method of manufacturing a chip antenna comprising a power supply conductor having a terminal portion having a power supply terminal and a conductor portion conducted to the terminal portion,
上記導体部の少なくとも一部を上記誘電材料によって被覆するように、上記誘電体 基板と上記給電導体とをインサート成形によって一体成形することを特徴とするチッ プアンテナの製造方法。  A method for manufacturing a chip antenna, wherein the dielectric substrate and the feed conductor are integrally formed by insert molding so that at least a part of the conductor portion is covered with the dielectric material.
[2] 上記誘電体基板は、誘電率が異なる少なくとも 2つの誘電材料からなり、各該誘電 材料は、上記導体部と接触して ヽることを特徴とする請求項 1に記載のチップアンテ ナの製造方法。  [2] The chip antenna according to [1], wherein the dielectric substrate is made of at least two dielectric materials having different dielectric constants, and the dielectric materials are in contact with the conductor portion. Manufacturing method.
[3] 上記導体部は、上記給電端子を含む対称軸に対して線対称な形状であり、  [3] The conductor portion has a line-symmetric shape with respect to an axis of symmetry including the feeding terminal,
上記誘電体基板は、上記対称軸に近い側から遠い側に向けて、誘電率が段階的 に大きくなるように成形されることを特徴とする請求項 2に記載のチップアンテナの製 造方法。  3. The method for manufacturing a chip antenna according to claim 2, wherein the dielectric substrate is shaped so that a dielectric constant increases stepwise from a side closer to the axis of symmetry to a side farther from the side.
[4] 上記給電導体を、チップ形状の金型に設けられた位置決め領域を基準にして該金 型内に配置し、上記給電導体と上記誘電体基板とをインサート成形によって一体成 形することを特徴とする請求項 1に記載のチップアンテナの製造方法。  [4] The feed conductor is disposed in the mold with reference to a positioning region provided in the chip-shaped mold, and the feed conductor and the dielectric substrate are integrally formed by insert molding. 2. The method for manufacturing a chip antenna according to claim 1, wherein:
[5] 上記給電導体は、カット型に合わせてリードフレームをプレス加工して形成されるこ とを特徴とする請求項 1に記載のチップアンテナの製造方法。  5. The chip antenna manufacturing method according to claim 1, wherein the feed conductor is formed by pressing a lead frame in accordance with a cut die.
[6] 上記誘電体基板と給電導体とをインサート成形によって一体化した後に、上記端子 部を屈曲させることを特徴とする請求項 1に記載のチップアンテナの製造方法。  6. The method for manufacturing a chip antenna according to claim 1, wherein the terminal portion is bent after the dielectric substrate and the feed conductor are integrated by insert molding.
[7] 上記誘電体基板は、榭脂であることを特徴とする請求項 1に記載のチップアンテナ の製造方法。  7. The method for manufacturing a chip antenna according to claim 1, wherein the dielectric substrate is a resin.
[8] 上記誘電材料の少なくとも 1つは、榭脂であることを特徴とする請求項 2に記載のチ ップアンテナの製造方法。  [8] The method for manufacturing a chip antenna according to [2], wherein at least one of the dielectric materials is a resin.
[9] 上記榭脂は、ポリエーテルサルフォンまたは液晶ポリマーであることを特徴とする請 求項 7または 8に記載のチップアンテナの製造方法。 [9] The method for manufacturing a chip antenna according to claim 7 or 8, wherein the resin is polyether sulfone or a liquid crystal polymer.
[10] 上記導体部は、テーパースロット形状であることを特徴とする請求項 1に記載のチッ プアンテナの製造方法。 10. The chip according to claim 1, wherein the conductor portion has a tapered slot shape. A method of manufacturing a antenna.
[11] 請求項 1から 10の何れか 1項に記載のチップアンテナの製造方法によって製造さ れるチップアンテナ。  [11] A chip antenna manufactured by the chip antenna manufacturing method according to any one of [1] to [10].
[12] 上記チップアンテナは、表面実装型であることを特徴とする請求項 11に記載のチッ プアンテナ。  12. The chip antenna according to claim 11, wherein the chip antenna is a surface mount type.
PCT/JP2005/015472 2004-08-26 2005-08-25 Chip antenna and method for manufacturing the same WO2006022350A1 (en)

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