WO2006005304A2 - Semiconductor component with a semiconductor chip and electric connecting elements for connecting to a conductor structure - Google Patents

Semiconductor component with a semiconductor chip and electric connecting elements for connecting to a conductor structure Download PDF

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Publication number
WO2006005304A2
WO2006005304A2 PCT/DE2005/001172 DE2005001172W WO2006005304A2 WO 2006005304 A2 WO2006005304 A2 WO 2006005304A2 DE 2005001172 W DE2005001172 W DE 2005001172W WO 2006005304 A2 WO2006005304 A2 WO 2006005304A2
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WO
WIPO (PCT)
Prior art keywords
plastic film
conductor structure
chip
semiconductor
filled
Prior art date
Application number
PCT/DE2005/001172
Other languages
German (de)
French (fr)
Other versions
WO2006005304A3 (en
Inventor
Joachim Mahler
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Priority to US11/571,667 priority Critical patent/US9082706B2/en
Publication of WO2006005304A2 publication Critical patent/WO2006005304A2/en
Publication of WO2006005304A3 publication Critical patent/WO2006005304A3/en

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    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Definitions

  • the invention relates to a semiconductor device with a semiconductor chip and electrical connection elements to form a conductor structure.
  • the adhesion-promoting coating mentioned under 2 is carried out either before the semiconductor chips are mounted on the chip carrier, which requires a multiplicity of recesses in the adhesion-improving coating for the semiconductor chip and the electrical connections to the semiconductor chip to be applied, so that a " Complete coverage with an anchor coating is not feasible, especially Tole ⁇ ranz Schemee around the semiconductor chip on the chip island and the connection areas for the connecting elements may not be coated be ⁇ .
  • the object of the invention is to overcome the abovementioned disadvantages in the prior art and to provide a semiconductor device that requires fewer components and simplifies the mounting of semiconductor chips and connecting elements on a conductor structure of a system carrier. It is a further object of the invention to improve both the thermal and the electrical connection of a semiconductor chip to the conductor structure and to simplify the electrical connection of connecting elements.
  • a semiconductor component with a semiconductor chip and electrical connecting elements is created to form a conductor structure.
  • the conductor structure has a Chipin ⁇ sel and contact pads. These are coplanar an ⁇ arranged.
  • the conductor structure is selectively coated by a filled plastic film. Both the semiconductor chip and the electrical connection elements are mechanically fixed and / or electrically connected by means of the film-covered chip island or the foil-covered contact terminals, wherein the film cover simultaneously constitutes an adhesion-promoting coating to a surrounding plastic housing composition.
  • This semiconductor device has the advantage that the above-mentioned problems are solved with a single, completely covering, electrically conductive or alternatively electrically insulating but highly thermally conductive organic layer.
  • This organic layer of a filled plastic film serves as a die attach material.
  • the filled plastic film as a coating of the conductor structure, the adhesive strength of the plastic molding compound.
  • the layer in the form of the filled plastic film serves to dissipate the resulting heat during operation, wherein it can also be used for plastic substrates and ceramic substrates on which the conductor structure can be arranged. It overcomes the above-mentioned problem of insufficient coverage for different chip sizes due to the tolerances which must be adhered to in adhesion-improving coatings in order to enable wire bonding on the contact connection surfaces.
  • the semiconductor device has the advantage that the film filled with particles has a corrosion-inhibiting effect with metallic surfaces of the conductor structure and thus stabilizes the metallic surfaces of the conductor structure.
  • the selective coating of the Porter ⁇ structure with the filled plastic film can be done by geeig ⁇ ned process selection.
  • the filled plastic film are applied over the entire surface and anschlie ⁇ HYd followed a selective detachment with solvents, laser ablation or by means of mechanical removal with previous targeted masking of the entire surface coating.
  • a filled plastic film is also understood as meaning a filled adhesive film or other adhesive organic coatings on the conductor structure.
  • this filled coating or filled adhesive film or this filled adhesive film can be made electrically conductive or electrically insulating.
  • the chip is on an initially not fully cured or fully reacted layer, which is caused by the filled film, reliably fixed by a combined pressure-temperature method.
  • This temporary state of incomplete curing or incomplete crosslinking, the layer formed from the filled plastic film additionally leads to a marked improvement in adhesion compared with the plastic molding compound applied to the conductor structure or a system carrier is.
  • the plastic adhesive film is preferably applied to the substrate carrier, which is then either pre-reacted by the chip attachment step and then subsequently completely cured together with a molding process, or which melts on the surface during the molding process and thus intensive anchoring or shrinkage .Crosslinking with the Gezzaus ⁇ press mass is received.
  • This semi-conductor component structure is particularly suitable for semiconductor modules in which a plurality of semiconductor chips can be mounted on a conductor structure in a single process step.
  • the filled plastic film for mechanical fixing and for thermal coupling, both of the semiconductor chip and the surrounding plastic housing composition has insulating particles as filling material.
  • insulating particles are preferably ceramic particles and, among the known ceramic particles, in particular aluminum nitrite, aluminum oxide, silicon nitride, silicon carbide, diamond and / or boron nitride, owing to their high thermal conductivity with simultaneous electrical insulation.
  • the plastic film as a filler conductive metal particles, preferably from the group aluminum, copper, silver, gold, palladium, nickel or alloys thereof, on.
  • a plastic film filled with such metal particles has the advantage that it is not only electrically conductive, but at the same time forms intensive crosslinking with the plastic molding compound in the molding process and finally can dissipate heat loss due to the high thermal conductivity of the metal particles.
  • the semiconductor chips are firmly bonded to chip islands via the plastic film with a wiring substrate of a BGA or LGA housing.
  • the conductor structure is applied as a thin metal coating on the wiring substrate, while the external contacts of the semiconductor component are arranged in the form of solder balls on the underside of the wiring substrate.
  • This embodiment of the invention also has the advantage that the wiring substrate has a completely planar conductor structure on which the filled plastic film can be applied without problems.
  • the semiconductor chips are firmly bonded to chip islands via the filled plastic film with flat conductors of a housing in flat conductor technology.
  • the leadframe has a flat surface at least in the area of the chip island and the contact pads.
  • the filled plastic film can be selectively applied to the entire coplanar region of the conductor pattern in an advantageous manner.
  • the connecting elements are flip-chip contacts. These flip-chip contacts can be advantageously connected via the electrically conductive plastic film with contact pads of a wiring structure.
  • the electrically conductive plastic film is applied in separate regions on the contact terminal surfaces of the wiring structure, so that a connection to the wiring structure of a carrier substrate is produced by simply pressing the flip-chip contacts into the electrically conductive plastic film regions in the viscous state can be.
  • the carrier substrate can be an insulating ceramic plate or an insulating plastic plate, which are coated with a structured metal layer as a wiring structure. Through via contacts through the insulating carrier substrate, the contact pads are connected to external contacts of a semiconductor device with an internal flip chip.
  • the connecting elements are bonding wires, which are connected via separate portions of an electrically conductive plastic film with Maisan ⁇ closing surfaces of a conductor structure by the bonding wire ends are pressed into the viscous plastic film mass.
  • This has the advantage that a plurality of bond wire ends can be easily introduced into the electrically conductive plastic film on the contact pads after appropriate alignment, with the aid of a punch.
  • these connections can be loaded with a higher current density, since the contacting surface substantially larger and more intense precipitates between the bonding ends and the electrically conductive plastic film than in the conventional bonding technique.
  • a method for producing a semiconductor component from component components having a semiconductor chip and electrical connecting elements to form a conductor structure has the following method steps.
  • a conductor structure with a chip island and contact pads is provided, the chip island and the contact pads being arranged coplanar.
  • the conductor structure is covered with a plastic film filled with particles while structuring the plastic film congruently with the line structure. This results in a filled adhesive film or a filled coating on the conductor structure which at the same time replaces several functions of different components of conventional technologies.
  • the filled plastic film After the filled plastic film has been applied, it is preheated, with precrosslinking of the plastic molecule chains of the filled plastic film, to a viscous coating which covers the conductor structure. At least one semiconductor chip and connecting elements are applied to this coating, wherein the semiconductor chip in areas of
  • Chip island of the conductor pattern and the connecting elements are applied in areas of contact pads. Subsequently, the viscous mass can cool down, whereby the semiconductor chip and the connecting elements are fixed and / or electrically connected on the chip island or the contact pads. Thereafter, packaging of the component components in a plastic housing composition with crosslinking of the plastic housing composition with the filled plastic film on the conductor structure and curing of the filled plastic film can be carried out.
  • This method has the advantage that, with a few procedural steps, a large number of method steps are involved in the Conventional production of semiconductor devices, in particular in the conventional fixation of semiconductor chips on semiconductor islands or of connecting elements on Maisan ⁇ closing surfaces of a conductor structure can be replaced.
  • the method has the advantage that the manufac turing times for semiconductor devices can be shortened.
  • the method has the advantage that bonding of the semiconductor chip or of the connecting elements on the conductor structure can be carried out more reliably than with conventional production methods for semiconductor components.
  • the preheating is carried out with precrosslinking of the plastic molecule chains of the filled plastic film to a viscous, the conductor structure covering coating at 130 0 C to 180 0 C.
  • This is a temperature range in which the plastic of the plastic film is not completely crosslinked and a sufficient period of time is available to terminate the crosslinking in the case of a viscous, viscous state of the plastic film.
  • the connecting elements can subsequently be applied to the conductor structure by impressing, for example, flip-chip contacts into the viscous mass of the conductive material filled with conductive film material on corresponding contact surfaces of the conductor structure.
  • this can only be carried out if the semiconductor chip is in flip-chip technology. A fastening of the semiconductor chip on a semiconductor chip island is omitted in this embodiment of the invention.
  • the application of connecting elements to the conductor structure is achieved by pressing in bonding wire ends into the viscous, viscous mass With conductive particles filled foil material on Kon ⁇ contact pads of the conductor structure is carried out.
  • conductive particles filled foil material on Kon ⁇ contact pads of the conductor structure.
  • the crosslinking of the Kunststofffo ⁇ lie with the plastic housing composition in a temperature range between 160 ° C and 200 0 C is performed.
  • This increased temperature range corresponds to the processing temperature of the plastic housing composition, wherein at the same time the surface areas of the filled plastic film are converted into a viscous, viscous state, whereby intensive crosslinking with the plastic housing composition becomes possible.
  • the plastic film is further crosslinked and cured at elevated temperature after application of the plastic housing composition.
  • This elevated temperature is in the tempera ture range for the application of the plastic housing composition or slightly below. This subsequent curing has the advantage that the service life and reliability of the semiconductor component is further increased.
  • FIG. 1 shows a schematic cross section through a semiconductor component of a first embodiment of the invention
  • FIG. 2 shows a schematic representation of the adhesive strengths in relation to a semiconductor chip of a plastic film filled with conductive particles in comparison to a plastic film filled with ceramic particles, referred to an adhesive surface in square centimeters;
  • FIGS. 3 to 7 show schematic cross sections through semiconducting device components in the manufacture of a semiconductor component of a second embodiment of the invention
  • Figure 3 shows a schematic cross section through a
  • FIG. 4 shows a schematic cross section through the partial region of the leadframe according to FIG. 3 after pre-adjustment of a semiconductor chip with respect to a chip island of the leadframe;
  • FIG. 5 shows a schematic cross section through the partial region of the leadframe according to FIG. 4 after the semiconductor chip has been pressed into the viscous, filled coating of the chip island;
  • FIG. 6 shows a schematic cross section through the partial region of the leadframe according to FIG. 5 Applying electrical connection elements between the semiconductor chip and the conductor structure;
  • FIG. 7 shows a schematic cross section through the partial region of the leadframe according to FIG. 6
  • FIG. 8 shows a schematic cross section through a semiconductor component of a third embodiment of the invention.
  • FIG. 1 shows a schematic cross section through a semiconductor component 1 of a first embodiment of the invention.
  • the reference numeral 3 denotes a semiconductor chip which is fixed with its rear side 14 on a chip island 6 of a Porter ⁇ structure 5 via a filled plastic film 8 and electrically connected to the chip island 6 due to the conductive metal particles of the filled plastic film 8.
  • This chip island 6 is part of an inner flat conductor 16 which merges into a flat conductor 9 accessible from the outside of the housing 10.
  • the filled with conductive particles plastic film 8 covers not only the area of the chip island 6, but also the area of the inner flat conductor 16.
  • the filled plastic film 8 is arranged on the conductor structure 5, wherein the contact pads 7 via inner flat conductor 16 in corresponding flat conductor 9 go over the outside of the semiconductor component 1.
  • Inner flat conductors 16 are connected via electrical connection elements 4 with contact surfaces 17 on the active upper side 15 of the semiconductor chip 3.
  • These connecting elements 4 are in this embodiment of the invention from Bonddräh ⁇ th 11th
  • the bonding wires 11 are mounted on the upper side 15 of the semiconductor chip 1 on the corresponding contact surfaces 17, the bonding wires 11 are bonded with their free ends 13 on the corresponding contact pads 7, which are free of the filled plastic film 8.
  • the semiconductor chip 3 Prior to bonding of the bonding wires 11, the semiconductor chip 3 is pressed into the highly viscous mass of the filled plastic film 8 at a Tem ⁇ temperature between 130 0 C and 18O 0 C.
  • the inner flat conductors 16 with the contact pads 7 and the chip island 6 are arranged coplanar, so that they span an ebene surface on which the filled plastic film 8 can be easily arranged.
  • the conductor structure 5 and the plastic film 8 are preheated in the range between 13O 0 C and 180 0 C, wherein the plastic molecule chains of the filled plastic film 8 pre-crosslink to a tough viscous, the conductor structure 5 covering coating.
  • the ge entire top of the conductor structure 5 is covered under control systems of the contact pads 7 with the filled plastic film 8, particularly since this film has the property that they are with the plastic package molding compound 12 during the mold process, which at 160 0 C to 200 0 C is performed, connects, so that a reliable anchoring of the plastic housing material 12, so far as it is arranged in the region of the conductor structure 5, is created.
  • FIG. 2 shows a schematic representation of the adhesion strength related to a stick surface in square centimeters.
  • a and B with respect to a semiconductor chip filled with lei ⁇ border particles (A) plastic film compared to an adhesive with ceramic particles (B) adhesive film. This test was followed by a Mold process at 175 0 C for 90 seconds and a post-curing of the molded component at
  • the degree of filling can be set between 30 and 80% by volume and, in this test, is 50% by volume of particle fraction in the plastic mass of the plastic film.
  • FIGS. 3 to 7 show schematic cross sections through semiconductor device components during the production of a semiconductor device of a second embodiment of the invention.
  • FIG. 3 shows a schematic cross section through a partial region of a leadframe 18 with applied filled plastic foil 8. For this purpose, the subregion of the
  • Flat conductor frame 18 at least one contact pad 7 and a chip island 6, which listen ge to a conductor structure 5, which in the area of the contact surface 7 and the Chipin- be aligned 6 coplanar is.
  • both inner flat conductor 16 and the contact surfaces 7 and the chip island 6 are aligned coplanar and completely covered by a correspondingly arranged filled plastic film 8.
  • the plastic film 8 is filled with metal particles up to 80% by volume, in order to realize a high conductivity.
  • Figure 4 shows a schematic cross section through the partial area of the leadframe 18 according to figure 3 according to pre- adjusted days of a semiconductor chip 3 with respect to a chip island 6 of the leadframe 18.
  • the semiconductor chip is' 3 is not only rotated, but also in the direction of the arrow D ver ⁇ pushed before it is pressed in the direction of arrow C on the preheated filled plastic film 8.
  • This preheating was carried out in this embodiment of the invention at 130 0 C, wherein the plastic film 8 merges into a viscous coating of the inner flat conductor 16, the chip island 6 and the contact surface 7.
  • FIG. 5 shows a schematic cross section through the partial region of the leadframe 18 according to FIG. 4 after the semiconductor chip 3 has been impressed into the viscous, filled coating 8 of the chip island 6. After this arrangement, shown in FIG Semiconductor chip on the chip island 6 fixed on the filled plastic coating, so now in a next step Bondverbindun ⁇ conditions can be introduced.
  • FIG. 6 shows a schematic cross section through the partial region of the leadframe 18 according to FIG. 5 after applying electrical connecting elements 4 between the semiconductor chip 3 and the conductor structure 5.
  • conventional bonding of the bonding wires 11 to the contact surfaces 17 of the active upper side 15 of the semiconductor chip 3 takes place, while the free ends 13 of the bonding wires 11 are initially arranged freely floating over contact connection surfaces 7.
  • FIG. 7 shows a schematic cross section through a partial region of the leadframe 18 according to FIG. 6 after packaging of the semiconductor device components into a plastic compound 12.
  • the components of the semiconductor component 2 are again heated to an elevated temperature, namely the temperature of the mold process , heated so that on the one hand the crosslinking of the plastic chain molecules of the plastic film progresses further and on the other hand the molding compound has the possibility to completely embed the semi-conductor components in an injection mold except for the outer flat conductors 9 in plastic housing composition 12. Since the MoId process is extremely short, as already discussed in FIG. 2, by post-curing for a long time at elevated temperature, for example 180 ° C., as shown by the example of FIG Plastic housing composition as well as the filled Kunststofffo- lie, which has become in the meantime to a filled plastic coating can be achieved.
  • FIG. 8 shows a schematic cross section through a semiconductor component 20 of a third embodiment of the invention.
  • Components having the same functions as in the previous figures are identified by the same reference numerals and will not be discussed separately.
  • the third embodiment of the invention of a semiconductor component 20 according to FIG. 8 differs from the first two embodiments according to FIG. 1 and FIG. 2 in that in the plastic housing composition 12 the semiconductor chip 3 is not arranged with its rear side on a filled plastic film 8, but rather completely surrounded by the Kunststoffgeophuse ⁇ mass 12.
  • the active upper side 15 of the semiconductor chip has flip-chip contacts 19 as connecting elements 4 with electrically conductive particles of the filled plastic film 8.
  • This plastic film 8 filled with electrically conductive particles only covers contact connection surfaces 7 of a wiring substrate 25, so that in the manufacture of this semiconductor component 3 the semiconductor chip 3 after heating the support substrate 22 with the contact connection surfaces 7 and regions of the filled plastic film 8 with its Flipchip contacts 19 in the viscous viscous mass of the filled plastic film 8 ein ⁇ can be pressed without an additional soldering process is required. This simplifies the manufacture and manufacture of such a semiconductor device.
  • a carrier substrate 22 is formed with a ceramic plate instead of a Lei ⁇ ter Modell of flat conductors.
  • Through contacts 23 through the ceramic plate ensure that external contacts 21, which are larger in their dimensions by about one order of magnitude than the electrical connection elements 4 in the form of flip-chip contacts 19, can be arranged on the underside of the ceramic plate.
  • These external contacts 21 in the form of solder balls are mounted on external contact surfaces 24, which are connected to the contact pads 7 of the carrier substrate via the through-contacts 23 and electrically via the wiring structure 25 with the flip-chip contacts over regions of the filled plastic film 8 are connected.
  • the plastic film filled with electrical particles can be used in a great variety of variations in semiconductor technology and in semiconductor component manufacturing to shorten the process sequence.
  • carrier foil 22 and plastic housing composition 12 may be covered with a filled plastic film 8 in order to improve the adhesion of plastic housing composition 12 to carrier substrate 22.
  • a filled plastic film 8 with insulating ceramic particles is used for this function.

Abstract

The invention relates to a semiconductor component (1) with a semiconductor chip (3) and with electric connecting elements (4) for connecting to a conductor structure (5), and to a method for producing this semiconductor component. To this end, the conductor structure (5) comprises a chip island (6) and contact terminal pads (7) that are arranged coplaner to one another. The semiconductor structure (5) is selectively coated with a filled plastic film (8). Both the semiconductor chip (3) as well as the electric connecting elements (4) are mechanically fixed and electrically connected by means of the film-covered chip island (6) or by the film-covered contact terminal pads (7). The filled plastic film (8) depicts an adhesion-promoting coating to a surrounding plastic housing material.

Description

Beschreibung description
Halbleiterbauteil mit einem Halbleiterchip und elektrischen Verbindungselementen zu einer LeiterstrukturSemiconductor component with a semiconductor chip and electrical connection elements to a conductor structure
Die Erfindung betrifft ein Halbleiterbauteil mit einem Halb¬ leiterchip und elektrischen Verbindungselementen zu einer Leiterstruktur.The invention relates to a semiconductor device with a semiconductor chip and electrical connection elements to form a conductor structure.
Bei derartigen Halbleiterbauteilen ist ein noch nicht gelös¬ tes Problem, zumal wenn man teure eutektische Lotverbindungen mit einer Goldbeschichtung auf -einer Chipinsel einer Leiter¬ struktur eines Trägermaterials vermeiden will, die Chipanbin- dung an die Leiterstruktur. Ein weiteres Problem ist die Ver- ankerύng einer Kunststoffpressmasse auf einer derartigenIn the case of such semiconductor components, a problem that has not yet been solved, especially if expensive eutectic solder connections with a gold coating on a chip island of a conductor structure of a carrier material are to be avoided, is the chip connection to the conductor structure. Another problem is the Ankerύng a plastic molding compound on such
Struktur. Und schließlich ist die Wärmeableitung der entste¬ henden Verlustleistung des in die Kunststoffmasse eingebette¬ ten Halbleiterchips über die Chipinsel eine ständige techni¬ sche Herausforderung und Ursache von Fehlfunktionen und ver- minderte Zuverlässigkeit der aus einer Vielzahl von unter¬ schiedlichen Materialien hergestellten Halbleiterbauteile.Structure. Finally, the heat dissipation of the resulting power dissipation of the semiconductor chip embedded in the plastics material via the chip island is a constant technical challenge and cause of malfunctions and reduced reliability of the semiconductor components produced from a multiplicity of different materials.
Für die oben erwähnten drei Problemkreise, verbunden mit dem Anbringen eines Halbleiterchips auf einer Leiterstruktur wer- den im Stand der Technik drei verschiedene Komponenten einge¬ setzt, nämiichFor the three problem areas mentioned above, associated with the mounting of a semiconductor chip on a conductor structure, three different components are used in the prior art, namely
1. eine spezielle Materialkomponente, verbunden mit Spezi¬ alverfahren zur Chipanbindung auf einer Chipinsel auf einer Leiterstruktur eines Systemträgers; 2. eine spezielle haftverbessernde und galvanisch abge¬ schiedene Beschichtung auf der Leiterstruktur und falls bereits der Halbleiterchip montiert ist, auf der verbleibenden Leiterstruktur zur Verankerung einer Kunststoffgehäusemasse auf der Leiterstruktur eines Trä- germaterials eines Systemträgers;1. a special material component, associated with Spezi¬ alverfahren for chip connection on a chip island on a conductor structure of a system carrier; 2. a special adhesion-enhancing and galvanically deposited coating on the conductor structure and if the semiconductor chip is already mounted, on the remaining conductor structure for anchoring a Plastic housing composition on the conductor structure of a carrier material of a system carrier;
3. Vorsehen einer zusätzlichen Wärmesenke verbunden .mit der Chipinsel oder der Leiterstruktur zur Ableitung der Ver- lustwärme.3. Provision of an additional heat sink connected with the chip island or the conductor structure for dissipating the heat loss.
Die unter 2. genannte haftverbessernde Beschichtung wird ent¬ weder vor dem Anbringen der Halbleiterchips auf dem Chipträ¬ ger durchgeführt, was eine Vielzahl von Aussparungen in der haftverbessernden Beschichtung für den Halbleiterchip und die anzubringenden elektrischen Verbindungen zu dem Halbleiter¬ chip erfordert, sodass eine "komplette" Abdeckung mit einer Verankerungsbeschichtung nicht realisierbar ist, zumal Tole¬ ranzbereiche um den Halbleiterchip auf der Chipinsel und um die Verbindungsbereiche für die Verbindungselemente nicht be¬ schichtet werden dürfen.The adhesion-promoting coating mentioned under 2 is carried out either before the semiconductor chips are mounted on the chip carrier, which requires a multiplicity of recesses in the adhesion-improving coating for the semiconductor chip and the electrical connections to the semiconductor chip to be applied, so that a " Complete coverage with an anchor coating is not feasible, especially Tole¬ ranzbereiche around the semiconductor chip on the chip island and the connection areas for the connecting elements may not be coated be¬.
Ein Aufbringen der unter 2. genannten haftverbessernden Be¬ schichtung nach der Halbleiterchipmontage auf der Chipinsel und nach dem Verdrahten des Halbleiterchips' mit der Leiter¬ struktur des Systemträgers ergibt ebenso keine "vollständige" Verankerungsschicht, zumal die galvanisch aufgebrachten Haft¬ vermittler auf Kunststoffoberflächen und/oder Keramikoberflä¬ chen nicht haften.One application of said under the second adhesion-promoting Be¬ coating to the semiconductor chip mounted on the chip island and after wiring of the semiconductor chip 'with the conductor structure of the system carrier also does not provide "complete" anchoring layer, especially since the electrodeposited adhesion promoters on plastic surfaces and / or Keramikoberflä¬ chen not adhere.
Für das Anbringen von Bondverbindungen zwischen dem Halblei¬ terchip und der Leiterstruktur eines Systemträgers sind eben¬ falls aufwendige Techniken zur Präparation der zu bondenden Oberflächenbereiche der Leiterstruktur erforderlich, sodass ein Bedarf für ein vereinfachtes System besteht, das diese unterschiedlichen Verfahren und Komponenten überflüssig wer¬ den lässt. Aufgabe der Erfindung ist es, die oben erwähnten Nachteile im Stand der Technik zu überwinden und ein Halbleiterbauteil zu schaffen, dass weniger Komponenten benötigt und das Anbringen von Halbleiterchips und Verbindungselementen auf eine Leiter- struktur eines Systemträgers vereinfacht. Ferner ist es Auf¬ gabe der Erfindung, sowohl die thermische als auch die elekt¬ rische Anbindung eines Halbleiterchips auf die Leiterstruktur zu verbessern und die elektrische Anbindung von Verbindungs¬ elementen zu vereinfachen.Equally costly techniques for the preparation of the surface regions of the conductor structure to be bonded are required for the attachment of bond connections between the semiconductor chip and the conductor structure of a system carrier, so that there is a need for a simplified system which makes these different methods and components unnecessary leaves. The object of the invention is to overcome the abovementioned disadvantages in the prior art and to provide a semiconductor device that requires fewer components and simplifies the mounting of semiconductor chips and connecting elements on a conductor structure of a system carrier. It is a further object of the invention to improve both the thermal and the electrical connection of a semiconductor chip to the conductor structure and to simplify the electrical connection of connecting elements.
Diese Aufgabe wird mit dem Gegenstand der unabhängigen An¬ sprüche gelöst. Vorteilhafte Weiterbildungen der Erfindung ergeben sich aus den abhängigen Ansprüchen.This object is achieved by the subject matter of the independent claims. Advantageous developments of the invention will become apparent from the dependent claims.
Erfindungsgemäß wird ein Halbleiterbauteil mit einem Halblei¬ terchip und elektrischen Verbindungselementen zu einer Lei¬ terstruktur geschaffen. Die Leiterstruktur weist eine Chipin¬ sel und Kontaktanschlussflächen auf. Diese sind koplanar an¬ geordnet. Dabei ist die Leiterstruktur von einer gefüllten Kunststofffolie selektiv beschichtet. Sowohl der Halbleiter¬ chip als auch die elektrischen Verbindungselemente sind mit¬ tels der folienbedeckten Chipinsel bzw. den folienbedeckten Kontaktanschlüssen mechanisch fixiert und/oder elektrisch verbunden, wobei die Folienbedeckung gleichzeitig eine haft- vermittelnde Beschichtung zu einer umgebenden Kunststoffge- häusemasse darstellt.According to the invention, a semiconductor component with a semiconductor chip and electrical connecting elements is created to form a conductor structure. The conductor structure has a Chipin¬ sel and contact pads. These are coplanar an¬ arranged. The conductor structure is selectively coated by a filled plastic film. Both the semiconductor chip and the electrical connection elements are mechanically fixed and / or electrically connected by means of the film-covered chip island or the foil-covered contact terminals, wherein the film cover simultaneously constitutes an adhesion-promoting coating to a surrounding plastic housing composition.
Dieses Halbleiterbauteil hat den Vorteil, dass mit einer ein¬ zigen komplett abdeckenden elektrisch leitfähigen oder alter- nativ elektrisch isolierenden aber thermisch hoch leitfähigen organischen Schicht die oben erwähnten Probleme gelöst wer¬ den. Diese organische Schicht einer gefüllten Kunststofffolie dient als Chipbefestigungsmaterial. Ferner verbessert die ge- füllte Kunststofffolie als Beschichtung der Leiterstruktur die Haftfestigkeit der Kunststoffpressmasse. Schließlich dient die Schicht in Form der gefüllten Kunststofffolie zur Abfuhr der entstehenden Wärme im Betrieb, wobei sie auch für Kunststoffsubstrate und Keramiksubstrate, auf denen die Lei¬ terstruktur angeordnet sein kann, einsetzbar ist. Dabei über¬ windet sie das oben erwähnte Problem der unzureichenden Bede¬ ckung bei unterschiedlichen Chipgrößen, aufgrund der Toleran¬ zen, die bei haftverbessernden Beschichtungen eingehalten werden müssen, um ein Drahtbonden auf den Kontaktanschluss¬ flächen zu ermöglichen.This semiconductor device has the advantage that the above-mentioned problems are solved with a single, completely covering, electrically conductive or alternatively electrically insulating but highly thermally conductive organic layer. This organic layer of a filled plastic film serves as a die attach material. Furthermore, the filled plastic film as a coating of the conductor structure, the adhesive strength of the plastic molding compound. Finally, the layer in the form of the filled plastic film serves to dissipate the resulting heat during operation, wherein it can also be used for plastic substrates and ceramic substrates on which the conductor structure can be arranged. It overcomes the above-mentioned problem of insufficient coverage for different chip sizes due to the tolerances which must be adhered to in adhesion-improving coatings in order to enable wire bonding on the contact connection surfaces.
Darüber hinaus hat das Halbleiterbauteil den Vorteil, dass die mit Partikeln gefüllte Folie eine korrosionshemmende Wir- kung mit metallischen Oberflächen der Leiterstruktur dar¬ stellt und somit die metallischen Oberflächen der Leiter¬ struktur stabilisiert. Das selektive Beschichten der Leiter¬ struktur mit der gefüllten Kunststofffolie kann durch geeig¬ nete Prozesswahl erfolgen. So kann z.B. zunächst die gefüllte Kunststofffolie ganzflächig aufgebracht werden und anschlie¬ ßend ein selektives Ablösen mit Lösungsmitteln, Laserablation oder mithilfe von mechanischem Entfernen bei vorhergehender gezielter Maskierung der ganzflächigen Beschichtung erfolgen. In diesem Zusammenhang wird unter einer gefüllten Kunststoff- folie auch ein gefüllter Klebstofffilm oder andere klebefähi¬ ge organische Beschichtungen auf der Leiterstruktur verstan¬ den.In addition, the semiconductor device has the advantage that the film filled with particles has a corrosion-inhibiting effect with metallic surfaces of the conductor structure and thus stabilizes the metallic surfaces of the conductor structure. The selective coating of the Leiter¬ structure with the filled plastic film can be done by geeig¬ ned process selection. Thus, e.g. First, the filled plastic film are applied over the entire surface and anschlie¬ ßend followed a selective detachment with solvents, laser ablation or by means of mechanical removal with previous targeted masking of the entire surface coating. In this context, a filled plastic film is also understood as meaning a filled adhesive film or other adhesive organic coatings on the conductor structure.
Je nach Bedarf kann diese gefüllte Beschichtung oder gefüllte Klebstofffolie oder dieser gefüllte Klebstofffilm elektrisch leitfähig oder elektrisch isolierend ausgeführt werden. In diesem Halbleiterbauteil ist der Chip auf einer zunächst noch nicht vollständig ausgehärteten bzw. ausreagierten Schicht, die durch die gefüllte Folie entstanden ist, durch ein kombi¬ niertes Druck-Temperaturverfahren zuverlässig befestigt. Die¬ ser vorübergehende Zustand der nichtvollständigen Aushärtung bzw. der nicht vollständigen Vernetzung, der aus der gefüll- ten Kunststofffolie entstandenen Schicht, führt zudem zu ei¬ ner deutlichen Haftverbesserung gegenüber der Kunststoff¬ pressmasse, die auf die Leiterstruktur bzw. einem Systemträ¬ ger aufzubringen ist.Depending on requirements, this filled coating or filled adhesive film or this filled adhesive film can be made electrically conductive or electrically insulating. In this semiconductor device, the chip is on an initially not fully cured or fully reacted layer, which is caused by the filled film, reliably fixed by a combined pressure-temperature method. This temporary state of incomplete curing or incomplete crosslinking, the layer formed from the filled plastic film, additionally leads to a marked improvement in adhesion compared with the plastic molding compound applied to the conductor structure or a system carrier is.
Dazu wird vorzugsweise die Kunststoffklebefolie auf dem Sub¬ stratträger aufgebracht, die dann entweder durch den Chipbe¬ festigungsschritt vorreagiert und dann anschließend zusammen mit einem Mold-Verfahren komplett aushärtet, oder die an der Oberfläche während des Mold-Verfahrens anschmilzt und somit eine intensive Verankerung bzw. Vernetzung mit der Gehäuse¬ pressmasse eingeht. Besonders geeignet ist dieser Halbleiter¬ bauteilaufbau für Halbleitermodule, bei denen mehrere Halb¬ leiterchips auf einer Leiterstruktur in einem einzigen Pro¬ zessschritt zu befestigen sind.For this purpose, the plastic adhesive film is preferably applied to the substrate carrier, which is then either pre-reacted by the chip attachment step and then subsequently completely cured together with a molding process, or which melts on the surface during the molding process and thus intensive anchoring or shrinkage .Crosslinking with the Gehäus¬ press mass is received. This semi-conductor component structure is particularly suitable for semiconductor modules in which a plurality of semiconductor chips can be mounted on a conductor structure in a single process step.
In einer bevorzugten Ausführungsform der Erfindung weist die gefüllte Kunststofffolie für ein mechanisches Fixieren und für ein thermisches Koppeln, sowohl des Halbleiterchips als auch der umgebenden Kunststoffgehäusemasse isolierende Parti- kel als Füllmaterial auf. Derartige isolierende Partikel sind vorzugsweise Keramikpartikel und unter den bekannten Keramik¬ partikeln insbesondere Aluminiumnitrit, Aluminiumoxid, SiIi- ciumnitrid, Siliciumkarbid, Diamant und/oder Bornitrit, auf¬ grund ihrer hohen thermischen Leitfähigkeit bei gleichzeiti- ger elektrischer Isolation.In a preferred embodiment of the invention, the filled plastic film for mechanical fixing and for thermal coupling, both of the semiconductor chip and the surrounding plastic housing composition, has insulating particles as filling material. Such insulating particles are preferably ceramic particles and, among the known ceramic particles, in particular aluminum nitrite, aluminum oxide, silicon nitride, silicon carbide, diamond and / or boron nitride, owing to their high thermal conductivity with simultaneous electrical insulation.
Für eine leitfähige Verbindung zwischen Halbleiterchip und Leiterstruktur, sowie zwischen Bonddrahtenden und Kontaktan- schlussflächen der Leiterstruktur weist die Kunststofffolie als Füllstoff leitfähige Metallpartikel, vorzugsweise aus der Gruppe Aluminium, Kupfer, Silber, Gold, Palladium, Nickel o- der Legierungen derselben, auf. Eine mit derartigen Metall- partikeln gefüllte Kunststofffolie hat den Vorteil, dass sie nicht nur elektrisch leitfähig ist, sondern gleichzeitig mit der Kunststoffpressmasse beim Mold-Verfahren eine intensive Vernetzung eingeht und schließlich aufgrund der hohen thermi¬ schen Leitfähigkeit der Metallpartikel Verlustwärme ableiten kann.For a conductive connection between semiconductor chip and conductor structure, as well as between bond wire ends and contact End surfaces of the conductor structure, the plastic film as a filler conductive metal particles, preferably from the group aluminum, copper, silver, gold, palladium, nickel or alloys thereof, on. A plastic film filled with such metal particles has the advantage that it is not only electrically conductive, but at the same time forms intensive crosslinking with the plastic molding compound in the molding process and finally can dissipate heat loss due to the high thermal conductivity of the metal particles.
In einer weiteren Ausführungsform der Erfindung sind die Halbleiterchips stoffschlüssig auf Chipinseln über die Kunst¬ stofffolie mit einem Verdrahtungssubstrat eines BGA- oder LGA-Gehäuses fixiert. Dabei ist die Leiterstruktur als dünne Metallbeschichtung auf dem Verdrahtungssubstrat aufgebracht, während die Außenkontakte des Halbleiterbauteils in Form von Lotkugeln auf der Unterseite des Verdrahtungssubstrats ange¬ ordnet sind. Diese Ausführungsform der Erfindung hat darüber hinaus den Vorteil, dass das Verdrahtungssubstrat eine voll¬ kommen ebene Leiterstruktur aufweist, auf der die gefüllte Kunststofffolie ohne Probleme aufgebracht werden kann.In a further embodiment of the invention, the semiconductor chips are firmly bonded to chip islands via the plastic film with a wiring substrate of a BGA or LGA housing. In this case, the conductor structure is applied as a thin metal coating on the wiring substrate, while the external contacts of the semiconductor component are arranged in the form of solder balls on the underside of the wiring substrate. This embodiment of the invention also has the advantage that the wiring substrate has a completely planar conductor structure on which the filled plastic film can be applied without problems.
In einer weiteren bevorzugten Ausführungsform sind die HaIb- leiterchips stoffschlüssig auf Chipinseln über die gefüllte Kunststofffolie mit Flachleitern eines Gehäuses in Flachlei¬ tertechnik fixiert. Bei dieser Flachleitertechnik muss jedoch gewährleistet werden, dass der Flachleiterrahmen mindestens im Bereich der Chipinsel und der Kontaktanschlussflächen eine ebene Fläche aufweist. In dem Fall kann die gefüllte Kunst- stofffolie selektiv in vorteilhafter Weise auf dem gesamten koplanaren Bereich der Leiterstruktur aufgebracht werden. In einer weiteren Ausführungsform der Erfindung sind die Ver¬ bindungselemente Flipchip-Kontakte. Diese Flipchip-Kontakte können über die elektrisch leitende Kunststofffolie mit Kon¬ taktanschlussflächen einer Verdrahtungsstruktur vorteilhaft verbunden sein. Dabei ist die elektrisch leitende Kunststoff¬ folie in voneinander getrennte Bereiche auf den Kontaktan¬ schlussflächen der Verdrahtungsstruktur aufgebracht, sodass durch einfaches Eindrücken der Flipchip-Kontakte in die e- lektrisch leitfähigen Kunststofffolienbereiche im zäh visko- sen Zustand eine Verbindung zu der Verdrahtungsstruktur eines Trägersubstrats hergestellt werden kann. Dabei kann das Trä¬ gersubstrat eine isolierende Keramikplatte oder eine isolie¬ rende Kunststoffplatte sein, die mit einer strukturierten Me¬ tallschicht als Verdrahtungsstruktur beschichtet sind. Über Durchkontakte durch das isolierende Trägersubstrat sind dabei die Kontaktanschlussflächen mit Außenkontakten eines Halblei¬ terbauteils mit einem internen Flipchip verbunden.In a further preferred embodiment, the semiconductor chips are firmly bonded to chip islands via the filled plastic film with flat conductors of a housing in flat conductor technology. In this flat conductor technology, however, it must be ensured that the leadframe has a flat surface at least in the area of the chip island and the contact pads. In that case, the filled plastic film can be selectively applied to the entire coplanar region of the conductor pattern in an advantageous manner. In a further embodiment of the invention, the connecting elements are flip-chip contacts. These flip-chip contacts can be advantageously connected via the electrically conductive plastic film with contact pads of a wiring structure. In this case, the electrically conductive plastic film is applied in separate regions on the contact terminal surfaces of the wiring structure, so that a connection to the wiring structure of a carrier substrate is produced by simply pressing the flip-chip contacts into the electrically conductive plastic film regions in the viscous state can be. In this case, the carrier substrate can be an insulating ceramic plate or an insulating plastic plate, which are coated with a structured metal layer as a wiring structure. Through via contacts through the insulating carrier substrate, the contact pads are connected to external contacts of a semiconductor device with an internal flip chip.
In einer weiteren Ausführungsform der Erfindung sind die Ver- bindungselemente Bonddrähte, die über getrennte Teilbereiche einer elektrisch leitenden Kunststofffolie mit Kontaktan¬ schlussflächen einer Leiterstruktur verbunden sind, indem die Bonddrahtenden in die zäh viskose Kunststofffolienmasse ein- gepresst sind. Dies hat den Vorteil, dass auf einfache Weise eine Vielzahl von Bonddrahtenden nach entsprechender Ausrich¬ tung, mithilfe eines Stempels, in die elektrisch leitende Kunststofffolie auf den Kontaktanschlussflächen eingebracht werden können. Außerdem sind diese Verbindungen mit einer hö¬ heren Stromdichte belastbar, da die Kontaktierungsflache we- sentlich größer und intensiver zwischen den Bondenden und der elektrisch leitenden Kunststofffolie ausfällt als bei der herkömmlichen Bondtechnik. Ein Verfahren zur Herstellung eines Halbleiterbauteils aus Bauteilkomponenten mit einem Halbleiterchip und elektrischen Verbindungselementen zu einer Leiterstruktur weist die nach¬ folgenden Verfahrensschritte auf. Zunächst wird eine Leiter- struktur mit einer Chipinsel und Kontaktanschlussflächen her¬ gestellt, wobei die Chipinsel und die Kontaktanschlussflächen koplanar angeordnet werden. Anschließend wird die Leiter¬ struktur mit einer von Partikeln gefüllten Kunststofffolie unter Strukturieren der Kunststofffolie kongruent zu der Lei- tungsstruktur bedeckt. Damit entsteht auf der Leiterstruktur ein gefüllter Klebstofffilm oder eine gefüllte Beschichtung, die gleichzeitig mehrere Funktionen unterschiedlicher Kompo¬ nenten herkömmlicher Technologien ersetzt.In a further embodiment of the invention, the connecting elements are bonding wires, which are connected via separate portions of an electrically conductive plastic film with Kontaktan¬ closing surfaces of a conductor structure by the bonding wire ends are pressed into the viscous plastic film mass. This has the advantage that a plurality of bond wire ends can be easily introduced into the electrically conductive plastic film on the contact pads after appropriate alignment, with the aid of a punch. In addition, these connections can be loaded with a higher current density, since the contacting surface substantially larger and more intense precipitates between the bonding ends and the electrically conductive plastic film than in the conventional bonding technique. A method for producing a semiconductor component from component components having a semiconductor chip and electrical connecting elements to form a conductor structure has the following method steps. First, a conductor structure with a chip island and contact pads is provided, the chip island and the contact pads being arranged coplanar. Subsequently, the conductor structure is covered with a plastic film filled with particles while structuring the plastic film congruently with the line structure. This results in a filled adhesive film or a filled coating on the conductor structure which at the same time replaces several functions of different components of conventional technologies.
Nach dem Aufbringen der gefüllten Kunststofffolie wird diese vorgewärmt unter Vorvernetzen der Kunststoffmolekülketten der gefüllten Kunststofffolie zu einer zäh viskosen, die Leiter- struktur bedeckenden Beschichtung. Auf diese Beschichtung werden mindestens ein Halbleiterchip und Verbindungselemente aufgebracht, wobei der Halbleiterchip in Bereichen einerAfter the filled plastic film has been applied, it is preheated, with precrosslinking of the plastic molecule chains of the filled plastic film, to a viscous coating which covers the conductor structure. At least one semiconductor chip and connecting elements are applied to this coating, wherein the semiconductor chip in areas of
Chipinsel der Leiterstruktur und die Verbindungselemente in Bereichen von Kontaktanschlussflächen aufgebracht werden. An¬ schließend kann die zäh viskose Masse abkühlen, wobei der Halbleiterchip und die Verbindungselemente fixiert und/oder elektrisch verbunden werden und zwar auf der Chipinsel bzw. den Kontaktanschlussflächen. Danach kann ein Verpacken der Bauteilkomponenten in einer Kunststoffgehäusemasse unter Ver¬ netzen der Kunststoffgehäusemasse mit der gefüllten Kunst¬ stofffolie auf der Leiterstruktur und unter Aushärten der ge- füllten Kunststofffolie durchgeführt werden.Chip island of the conductor pattern and the connecting elements are applied in areas of contact pads. Subsequently, the viscous mass can cool down, whereby the semiconductor chip and the connecting elements are fixed and / or electrically connected on the chip island or the contact pads. Thereafter, packaging of the component components in a plastic housing composition with crosslinking of the plastic housing composition with the filled plastic film on the conductor structure and curing of the filled plastic film can be carried out.
Dieses Verfahren hat den Vorteil, dass mit wenigen Verfah¬ rensschritten eine Vielzahl von Verfahrensschritten bei der herkömmlichen Herstellung von Halbleiterbauteilen, insbeson¬ dere bei der herkömmlichen Fixierung von Halbleiterchips auf Halbleiterinseln bzw. von Verbindungselementen auf Kontaktan¬ schlussflächen einer Leiterstruktur ersetzt werden können. Darüber hinaus hat das Verfahren den Vorteil, dass die Ferti¬ gungszeiten für Halbleiterbauteile verkürzt werden können. Schließlich hat das Verfahren den Vorteil, dass ein Anbinden des Halbleiterchips bzw. der Verbindungselemente auf der Lei¬ terstruktur zuverlässiger erfolgen kann als bei herkömmlichen Fertigungsverfahren für Halbleiterbauteile.This method has the advantage that, with a few procedural steps, a large number of method steps are involved in the Conventional production of semiconductor devices, in particular in the conventional fixation of semiconductor chips on semiconductor islands or of connecting elements on Kontaktan¬ closing surfaces of a conductor structure can be replaced. In addition, the method has the advantage that the manufac turing times for semiconductor devices can be shortened. Finally, the method has the advantage that bonding of the semiconductor chip or of the connecting elements on the conductor structure can be carried out more reliably than with conventional production methods for semiconductor components.
In einer bevorzugten Durchführungsform des Verfahrens wird das Vorwärmen unter Vorvernetzen der Kunststoffmolekülketten der gefüllten Kunststofffolie zu einer zäh viskosen, die Lei- terstruktur bedeckenden Beschichtung bei 1300C bis 1800C durchgeführt. Dieses ist ein Temperaturbereich, in dem der Kunststoff der Kunststofffolie nicht vollständig vernetzt und eine ausreichende Zeitspanne zur Verfügung steht, um die Ver¬ netzung bei einem zäh viskosen Zustand der Kunststofffolie zu beenden. In diesem Zustand können anschließend die Verbin¬ dungselemente auf die Leiterstruktur durch Eindrücken bei¬ spielsweise von Flipchip-Kontakten in die zäh viskose Masse des mit leitenden Partikeln gefüllten Folienmaterials auf entsprechenden Kontaktflächen der Leiterstruktur aufgebracht werden. Dieses kann jedoch nur dann durchgeführt werden, wenn der Halbleiterchip in Flipchip-Technik vorliegt. Ein Befesti¬ gen des Halbleiterchips auf einer Halbleiterchipinsel ent¬ fällt bei dieser Durchführungsform der Erfindung.In a preferred embodiment of the method, the preheating is carried out with precrosslinking of the plastic molecule chains of the filled plastic film to a viscous, the conductor structure covering coating at 130 0 C to 180 0 C. This is a temperature range in which the plastic of the plastic film is not completely crosslinked and a sufficient period of time is available to terminate the crosslinking in the case of a viscous, viscous state of the plastic film. In this state, the connecting elements can subsequently be applied to the conductor structure by impressing, for example, flip-chip contacts into the viscous mass of the conductive material filled with conductive film material on corresponding contact surfaces of the conductor structure. However, this can only be carried out if the semiconductor chip is in flip-chip technology. A fastening of the semiconductor chip on a semiconductor chip island is omitted in this embodiment of the invention.
In einer weiteren bevorzugten Durchführungsform des erfin¬ dungsgemäßen Verfahrens ist es vorgesehen, dass das Aufbrin¬ gen von Verbindungselementen auf die Leiterstruktur durch Eindrücken von Bonddrahtenden in die zäh viskose Masse des mit leitenden Partikeln gefüllten Folienmaterials auf Kon¬ taktanschlussflächen der Leiterstruktur erfolgt. In diesem Fall wird vorausgesetzt, dass ein Halbleiterchip vorliegt, der auf seiner aktiven Oberseite Kontaktanschlussflächen auf- weist, die bereits mit einem Bonddraht versehen sind, und dass die freien Enden der Bonddrähte zur Verfügung stehen, um in die gefüllte Kunststofffolie im zäh viskosen Zustand der Folie eingedrückt werden zu können.In a further preferred embodiment of the method according to the invention, it is provided that the application of connecting elements to the conductor structure is achieved by pressing in bonding wire ends into the viscous, viscous mass With conductive particles filled foil material on Kon¬ contact pads of the conductor structure is carried out. In this case, it is assumed that there is a semiconductor chip having on its active top contact pads, which are already provided with a bonding wire, and that the free ends of the bonding wires are available to be in the filled plastic film in the viscous viscous state of the To be pressed foil.
In einer weiteren bevorzugten Durchführungsform des Verfah¬ rens ist es vorgesehen, dass die Vernetzung der Kunststofffo¬ lie mit der Kunststoffgehäusemasse in einem Temperaturbereich zwischen 160°C und 2000C durchgeführt wird. Dieser erhöhte Temperaturbereich entspricht der Verarbeitungstemperatur der Kunststoffgehäusemasse, wobei gleichzeitig die oberflächenna¬ hen Bereiche der gefüllten Kunststofffolie in einen zäh vis¬ kosen Zustand überführt werden, womit ein intensives Vernet¬ zen mit der Kunststoffgehäusemasse möglich wird.In a further preferred form of implementation of the Verfah proceedings, it is provided that the crosslinking of the Kunststofffo¬ lie with the plastic housing composition in a temperature range between 160 ° C and 200 0 C is performed. This increased temperature range corresponds to the processing temperature of the plastic housing composition, wherein at the same time the surface areas of the filled plastic film are converted into a viscous, viscous state, whereby intensive crosslinking with the plastic housing composition becomes possible.
In einer weiteren bevorzugten Durchführungsform des Verfah¬ rens wird die Kunststofffolie nach Aufbringen der Kunststoff¬ gehäusemasse weiterhin bei erhöhter Temperatur vernetzt und ausgehärtet. Diese erhöhte Temperatur liegt in dem Tempera¬ turbereich für das Aufbringen der Kunststoffgehäusemasse oder geringfügig darunter. Dieses nachträgliche Aushärten hat den Vorteil, dass die Lebensdauer und Zuverlässigkeit des HaIb- leiterbauteils weiter erhöht wird.In a further preferred embodiment of the method, the plastic film is further crosslinked and cured at elevated temperature after application of the plastic housing composition. This elevated temperature is in the tempera ture range for the application of the plastic housing composition or slightly below. This subsequent curing has the advantage that the service life and reliability of the semiconductor component is further increased.
Die Erfindung wird nun anhand der beigefügten Figuren näher erläutert. Figur 1 zeigt einen schematischen Querschnitt durch ein Halb¬ leiterbauteil einer ersten Ausführungsform der Erfin¬ dung;The invention will now be explained in more detail with reference to the accompanying figures. FIG. 1 shows a schematic cross section through a semiconductor component of a first embodiment of the invention;
Figur 2 zeigt eine schematische Darstellung der auf eine Kle¬ befläche in Quadratzentimetern bezogenen Adhäsions¬ festigkeiten in Bezug auf einen Halbleiterchip einer mit leitenden Partikeln gefüllten Kunststofffolie im Vergleich zu einer mit Keramikpartikeln gefüllten Kunststofffolie;FIG. 2 shows a schematic representation of the adhesive strengths in relation to a semiconductor chip of a plastic film filled with conductive particles in comparison to a plastic film filled with ceramic particles, referred to an adhesive surface in square centimeters;
Figuren 3 bis 7 zeigen schematische Querschnitte durch Halb¬ leiterbauteilkomponenten bei der Herstellung eines Halbleiterbauteils einer zweiten Ausführungsform der Erfindung;FIGS. 3 to 7 show schematic cross sections through semiconducting device components in the manufacture of a semiconductor component of a second embodiment of the invention;
Figur 3 zeigt einen schematischen Querschnitt durch einenFigure 3 shows a schematic cross section through a
Teilbereich eines Flachleiterrahmens mit aufgebrach¬ ter gefüllter Kunststofffolie;Subarea of a leadframe with aufgerach¬ ter filled plastic film;
Figur 4 zeigt einen schematischen Querschnitt durch den Teil¬ bereich des Flachleiterrahmens gemäß Figur 3 nach Vorjustage eines Halbleiterchips in Bezug auf eine Chipinsel des Flachleiterrahmens;FIG. 4 shows a schematic cross section through the partial region of the leadframe according to FIG. 3 after pre-adjustment of a semiconductor chip with respect to a chip island of the leadframe;
Figur 5 zeigt einen schematischen Querschnitt durch den Teil¬ bereich des Flachleiterrahmens gemäß Figur 4 nach Eindrücken des Halbleiterchips in die zäh viskose, gefüllte Beschichtung der Chipinsel;FIG. 5 shows a schematic cross section through the partial region of the leadframe according to FIG. 4 after the semiconductor chip has been pressed into the viscous, filled coating of the chip island;
Figur 6 zeigt einen schematischen Querschnitt durch den Teil¬ bereich des Flachleiterrahmens gemäß Figur 5 nach Aufbringen von .elektrischen Verbindungselementen zwi¬ schen Halbleiterchip und Leiterstruktur;FIG. 6 shows a schematic cross section through the partial region of the leadframe according to FIG. 5 Applying electrical connection elements between the semiconductor chip and the conductor structure;
Figur 7 zeigt einen schematischen Querschnitt durch den Teil- bereich des Flachleiterrahmens gemäß Figur 6 nachFIG. 7 shows a schematic cross section through the partial region of the leadframe according to FIG. 6
Verpacken der Halbleiterbauteilkomponenten in einer Kunststoffgehäusemasse;Packaging the semiconductor device components in a plastic package;
Figur 8 zeigt einen schematischen Querschnitt durch ein HaIb- leiterbauteil einer dritten Ausführungsform der Er¬ findung.FIG. 8 shows a schematic cross section through a semiconductor component of a third embodiment of the invention.
Figur 1 zeigt einen schematischen Querschnitt durch ein Halb¬ leiterbauteil 1 einer ersten Ausführungsform der Erfindung. Das Bezugszeichen 3 kennzeichnet einen Halbleiterchip, der mit seiner Rückseite 14 auf einer Chipinsel 6 einer Leiter¬ struktur 5 über eine gefüllte Kunststofffolie 8 fixiert ist und aufgrund der leitenden Metallpartikel der gefüllten Kunststofffolie 8 mit der Chipinsel 6 elektrisch verbunden ist. Diese Chipinsel 6 ist Teil eines Innenflachleiters 16, der in einen von außen des Gehäuses 10 zugänglichen Flachlei¬ ter 9 übergeht.FIG. 1 shows a schematic cross section through a semiconductor component 1 of a first embodiment of the invention. The reference numeral 3 denotes a semiconductor chip which is fixed with its rear side 14 on a chip island 6 of a Leiter¬ structure 5 via a filled plastic film 8 and electrically connected to the chip island 6 due to the conductive metal particles of the filled plastic film 8. This chip island 6 is part of an inner flat conductor 16 which merges into a flat conductor 9 accessible from the outside of the housing 10.
Die mit leitenden Partikeln gefüllte Kunststofffolie 8 be- deckt nicht nur den Bereich der Chipinsel 6, sondern auch den Bereich des Innenflachleiters 16. Außerdem ist die gefüllte Kunststofffolie 8 auf der Leiterstruktur 5 angeordnet, wobei die Kontaktanschlussflächen 7 über Innenflachleiter 16 in entsprechende Flachleiter 9 auf der Außenseite des Halblei- terbauteils 1 übergehen. Die Kontaktanschlussflächen 7 derThe filled with conductive particles plastic film 8 covers not only the area of the chip island 6, but also the area of the inner flat conductor 16. In addition, the filled plastic film 8 is arranged on the conductor structure 5, wherein the contact pads 7 via inner flat conductor 16 in corresponding flat conductor 9 go over the outside of the semiconductor component 1. The contact pads 7 of
Innenflachleiter 16 sind über elektrische Verbindungselemente 4 mit Kontaktflächen 17 auf der aktiven Oberseite 15 des Halbleiterchips 3 verbunden. Diese Verbindungselemente 4 be- stehen in dieser Ausführungsform der Erfindung aus Bonddräh¬ ten 11.Inner flat conductors 16 are connected via electrical connection elements 4 with contact surfaces 17 on the active upper side 15 of the semiconductor chip 3. These connecting elements 4 are in this embodiment of the invention from Bonddräh¬ th 11th
Während die Bonddrähte 11 auf der Oberseite 15 des Halblei- terchips 1 auf den entsprechenden Kontaktflächen 17 aufgebon- det sind,- werden die Bonddrähte 11 mit ihren freien Enden 13 auf den entsprechenden Kontaktanschlussflächen 7, die frei von der gefüllten Kunststofffolie 8 sind, gebondet. Vor dem Bonden der Bonddrähte 11 wird der Halbleiterchip 3 in die zäh viskose Masse der gefüllten Kunststofffolie 8 bei einer Tem¬ peratur zwischen 1300C und 18O0C eingedrückt.While the bonding wires 11 are mounted on the upper side 15 of the semiconductor chip 1 on the corresponding contact surfaces 17, the bonding wires 11 are bonded with their free ends 13 on the corresponding contact pads 7, which are free of the filled plastic film 8. Prior to bonding of the bonding wires 11, the semiconductor chip 3 is pressed into the highly viscous mass of the filled plastic film 8 at a Tem¬ temperature between 130 0 C and 18O 0 C.
Die Innenflachleiter 16 mit den Kontaktanschlussflächen 7 und der Chipinsel 6 sind koplanar angeordnet, sodass sie eine e- bene Fläche aufspannen, auf der die gefüllte Kunststofffolie 8 problemlos angeordnet werden kann. Um diese gefüllte Kunst¬ stofffolie 8 mit den Oberseiten der Leiterstruktur 5 zu ver¬ binden, wird die Leiterstruktur 5 und die Kunststofffolie 8 im Bereich zwischen 13O0C und 1800C vorgewärmt, wobei die Kunststoffmolekülketten der gefüllten Kunststofffolie 8 sich vorvernetzen zu einer zäh viskosen, die Leiterstruktur 5 be¬ deckenden Beschichtung. Dazu ist es vorgesehen, dass die ge¬ samte Oberseite der Leiterstruktur 5 unter Freihaltung der Kontaktanschlussflächen 7 mit der gefüllten Kunststofffolie 8 bedeckt wird, zumal diese Folie die Eigenschaft hat, dass sie sich mit der Kunststoffgehäusemasse 12 beim Mold-Vorgang, der bei 1600C bis 2000C durchgeführt wird, verbindet, sodass eine zuverlässige Verankerung der Kunststoffgehäusemasse 12, so¬ weit sie im Bereich der Leiterstruktur 5 angeordnet ist, ge- schaffen wird.The inner flat conductors 16 with the contact pads 7 and the chip island 6 are arranged coplanar, so that they span an ebene surface on which the filled plastic film 8 can be easily arranged. In order to bind this filled plastic film 8 to the upper sides of the conductor structure 5, the conductor structure 5 and the plastic film 8 are preheated in the range between 13O 0 C and 180 0 C, wherein the plastic molecule chains of the filled plastic film 8 pre-crosslink to a tough viscous, the conductor structure 5 covering coating. For this purpose, it is provided that the ge entire top of the conductor structure 5 is covered under control systems of the contact pads 7 with the filled plastic film 8, particularly since this film has the property that they are with the plastic package molding compound 12 during the mold process, which at 160 0 C to 200 0 C is performed, connects, so that a reliable anchoring of the plastic housing material 12, so far as it is arranged in the region of the conductor structure 5, is created.
Figur 2 zeigt eine schematische Darstellung der auf eine Kle¬ befläche in Quadratzentimetern bezogenen Adhäsionsfestigkei- ten A und B in Bezug auf einen Halbleiterchip einer mit lei¬ tenden Partikeln (A) gefüllten Kunststofffolie im Vergleich zu einer mit Keramikpartikeln (B) gefüllten Klebstofffolie. Dieser Test wurde nach einem Mold-Verfahren bei 1750C für 90 Sekunden und einem Nachhärten des gemoldeten Bauteils beiFIG. 2 shows a schematic representation of the adhesion strength related to a stick surface in square centimeters. A and B with respect to a semiconductor chip filled with lei¬ border particles (A) plastic film compared to an adhesive with ceramic particles (B) adhesive film. This test was followed by a Mold process at 175 0 C for 90 seconds and a post-curing of the molded component at
18O0C für vier Stunden gemessen, nachdem die gemoldete Kunst¬ stoffgehäusemasse von dem zu testenden Halbleiterbauteil ab¬ geätzt wurde. Zur Feststellung der Adhäsionsscherfestigkeiten in kg/qcm zwischen dem Halbleiterchip auf der gefüllten Kunststofffolie in dem Chipinselbereich wurde die Kraft in kg in Scherrichtung seitlich auf den Halbleiterchip ausgeübt. Die Berührungsfläche zwischen der Rückseite des Halbleiter¬ chips und der gefüllten Kunststofffolie wurde zur Normierung der Adhäsionsfestigkeit herangezogen. Im Ergebnis unterschei- den sich die Materialien A und B der Kunststofffolien mit ei¬ nerseits elektrischen Partikeln und andererseits Isolations¬ partikeln nicht wesentlich voneinander. Doch ist entschei¬ dend, dass diese Untersuchungen bei gleichem Füllstoffgrad durchgeführt werden. Der Füllstoffgrad kann zwischen 30 und 80 Vol% eingestellt werden und liegt bei diesem Test bei 50 Vo1% Partikelanteil in der Kunststoffmasse der Kunststofffo¬ lie.18O 0 C measured for four hours after the molded plastic housing composition was etched off the semiconductor device to be tested ab¬. In order to establish the adhesion shear strengths in kg / cm 2 between the semiconductor chip on the filled plastic film in the chip island region, the force in kg was exerted laterally on the semiconductor chip in the shear direction. The contact area between the back side of the semiconductor chip and the filled plastic film was used to normalize the adhesion strength. As a result, the materials A and B of the plastic films do not differ significantly from one another with electrical particles on the one hand and insulating particles on the other hand. However, it is crucial that these investigations are carried out with the same degree of filler. The degree of filling can be set between 30 and 80% by volume and, in this test, is 50% by volume of particle fraction in the plastic mass of the plastic film.
Die Figuren 3 bis 7 zeigen schematische Querschnitte durch Halbleiterbauteilkomponenten bei der Herstellung eines Halb¬ leiterbauteils einer zweiten Ausführungsform der Erfindung.FIGS. 3 to 7 show schematic cross sections through semiconductor device components during the production of a semiconductor device of a second embodiment of the invention.
Figur 3 zeigt einen schematischen Querschnitt durch einen Teilbereich eines Flachleiterrahmens 18 mit aufgebrachter ge- füllter Kunststofffolie 8. Dazu weist der Teilbereich desFIG. 3 shows a schematic cross section through a partial region of a leadframe 18 with applied filled plastic foil 8. For this purpose, the subregion of the
Flachleiterrahmens 18 mindestens eine Kontaktanschlussfläche 7 und eine Chipinsel 6 auf, die zu einer Leiterstruktur 5 ge¬ hören, welche im Bereich der Kontaktfläche 7 und der Chipin- sei 6 koplanar ausrichtet ist. Dabei sind sowohl Innenflach- leiter 16 als auch die Kontaktflächen 7 und die Chipinsel 6 koplanar ausgerichtet und von einer entsprechend angeordneten gefüllten Kunststofffolie 8 vollständig bedeckt. In dieser Ausführungsform der Erfindung ist die Kunststofffolie 8 bis zu 80 Vol% mit Metallpartikeln gefüllt, um eine hohe Leitfä¬ higkeit zu realisieren.Flat conductor frame 18 at least one contact pad 7 and a chip island 6, which listen ge to a conductor structure 5, which in the area of the contact surface 7 and the Chipin- be aligned 6 coplanar is. In this case, both inner flat conductor 16 and the contact surfaces 7 and the chip island 6 are aligned coplanar and completely covered by a correspondingly arranged filled plastic film 8. In this embodiment of the invention, the plastic film 8 is filled with metal particles up to 80% by volume, in order to realize a high conductivity.
Figur 4 zeigt einen schematischen Querschnitt durch den Teil- bereich des Flachleiterrahmens 18 gemäß Figur 3 nach Vorjus- tage eines Halbleiterchips 3 in Bezug auf eine Chipinsel 6 des Flachleiterrahmens 18. Dazu wird' der Halbleiterchip 3 nicht nur gedreht, sondern auch in der Pfeilrichtung D ver¬ schoben, bevor er in Pfeilrichtung C auf die vorgewärmte ge- füllte Kunststofffolie 8 aufgedrückt wird. Diese Vorwärmung wurde in dieser Äusführungsform der Erfindung bei 1300C durchgeführt, wobei die Kunststofffolie 8 in eine zäh viskose Beschichtung der Innenflachleiter 16, der Chipinsel 6 und der Kontaktfläche 7 übergeht.Figure 4 shows a schematic cross section through the partial area of the leadframe 18 according to figure 3 according to pre- adjusted days of a semiconductor chip 3 with respect to a chip island 6 of the leadframe 18. For this purpose, the semiconductor chip is' 3 is not only rotated, but also in the direction of the arrow D ver¬ pushed before it is pressed in the direction of arrow C on the preheated filled plastic film 8. This preheating was carried out in this embodiment of the invention at 130 0 C, wherein the plastic film 8 merges into a viscous coating of the inner flat conductor 16, the chip island 6 and the contact surface 7.
Figur 5 zeigt einen schematischen Querschnitt durch den Teil¬ bereich des Flachleiterrahmens 18 gemäß Figur 4 nach Eindrü¬ cken des Halbleiterchips 3 in die zäh viskose, gefüllte Be¬ schichtung 8 der Chipinsel 6. Nach Abkühlen dieser in Figur 5 gezeigten Anordnung auf Raumtemperatur ist der Halbleiterchip auf der Chipinsel 6 über die gefüllte Kunststoffbeschichtung fixiert, sodass nun in einem nächsten Schritt Bondverbindun¬ gen eingebracht werden können.FIG. 5 shows a schematic cross section through the partial region of the leadframe 18 according to FIG. 4 after the semiconductor chip 3 has been impressed into the viscous, filled coating 8 of the chip island 6. After this arrangement, shown in FIG Semiconductor chip on the chip island 6 fixed on the filled plastic coating, so now in a next step Bondverbindun¬ conditions can be introduced.
Figur 6 zeigt einen schematischen Querschnitt durch den Teil¬ bereich des Flachleiterrahmens 18 gemäß Figur 5 nach Aufbrin¬ gen von elektrischen Verbindungselementen 4 zwischen Halblei¬ terchip 3 und der Leiterstruktur 5. Dabei kann bei Raumtempe- ratur zunächst ein konventionelles Bonden der Bonddrähte 11 auf den Kontaktflächen 17 der aktiven Oberseite 15 des Halb¬ leiterchips 3 erfolgen, während die freien Enden 13 der Bond¬ drähte 11 zunächst frei schwebend über Kontaktanschlussflä- chen 7 angeordnet werden.FIG. 6 shows a schematic cross section through the partial region of the leadframe 18 according to FIG. 5 after applying electrical connecting elements 4 between the semiconductor chip 3 and the conductor structure 5. In the first instance conventional bonding of the bonding wires 11 to the contact surfaces 17 of the active upper side 15 of the semiconductor chip 3 takes place, while the free ends 13 of the bonding wires 11 are initially arranged freely floating over contact connection surfaces 7.
Bei einem erneuten Aufwärmen der in Figur 6 gezeigten Kompo¬ nenten auf eine Vorwärmtemperatur der gefüllten Beschichtung 8 kann diese erneut in einen zäh viskosen Zustand versetzt werden und die vorbereiteten Bondenden 13 in die leitende zäh viskose Kunststoffbeschichtung eingedrückt werden. Dieses kann gleichzeitig für eine Vielzahl von Bonddrähten eines Halbleiterchips durchgeführt werden, sodass damit die Ferti¬ gung rationalisiert werden kann. In der hier gezeigten Äus- führungsform enden zwei Bonddrähte 11 auf einer gemeinsamen Kontaktanschlussfläche 7, um eine erhöhte Stromzuführung zu dem Halbleiterchip 3 zu ermöglichen.Upon renewed warming of the components shown in FIG. 6 to a preheating temperature of the filled coating 8, it can again be set in a viscous state and the prepared bonding ends 13 can be pressed into the conductive viscous, viscous plastic coating. This can be carried out at the same time for a multiplicity of bonding wires of a semiconductor chip, so that the production can thereby be rationalized. In the embodiment shown here, two bonding wires 11 terminate on a common contact pad 7 in order to allow an increased current supply to the semiconductor chip 3.
Figur 7 zeigt einen schematischen Querschnitt durch einen Teilbereich des Flachleiterrahmens 18 gemäß Figur 6 nach Ver¬ packen der Halbleiterbauteilkomponenten in eine Kunststoffge¬ häusemasse 12. Dabei werden erneut die Komponenten des HaIb- leiterbauteils 2 auf eine erhöhte Temperatur, nämlich der Temperatur des Mold-Verfahrens, aufgeheizt, sodass einerseits die Vernetzung der Kunststoffkettenmoleküle der Kunststofffo- lie weiter fortschreitet und andererseits die Moldmasse die Möglichkeit hat, in einer Spritzgussform die Halbleiterbau¬ teilkomponenten bis auf die Außenflachleiter 9 vollständig in Kunststoffgehäusemasse 12 einzubetten. Da der MoId-Vorgang äußerst kurz ist, wie es bereits bei Figur 2 erörtert wurde, kann durch ein Nachhärten für eine längere Zeit bei erhöhter Temperatur beispielsweise 180°C, wie es das Beispiel gemäß Figur 2 zeigt, ein vollständiges Durchhärten, sowohl der Kunststoffgehäusemasse als auch der gefüllten Kunststofffo- lie, die zwischenzeitlich zu einer gefüllten Kunststoffbe- schichtung geworden ist, erreicht werden.FIG. 7 shows a schematic cross section through a partial region of the leadframe 18 according to FIG. 6 after packaging of the semiconductor device components into a plastic compound 12. In this case, the components of the semiconductor component 2 are again heated to an elevated temperature, namely the temperature of the mold process , heated so that on the one hand the crosslinking of the plastic chain molecules of the plastic film progresses further and on the other hand the molding compound has the possibility to completely embed the semi-conductor components in an injection mold except for the outer flat conductors 9 in plastic housing composition 12. Since the MoId process is extremely short, as already discussed in FIG. 2, by post-curing for a long time at elevated temperature, for example 180 ° C., as shown by the example of FIG Plastic housing composition as well as the filled Kunststofffo- lie, which has become in the meantime to a filled plastic coating can be achieved.
Figur 8 zeigt einen schematischen Querschnitt durch ein Halb¬ leiterbauteil 20 einer dritten Ausführungsform der Erfindung. Komponenten mit gleichen Funktionen wie in den vorhergehenden Figuren werden mit gleichen Bezugszeichen gekennzeichnet und nicht extra erörtert.FIG. 8 shows a schematic cross section through a semiconductor component 20 of a third embodiment of the invention. Components having the same functions as in the previous figures are identified by the same reference numerals and will not be discussed separately.
Die dritte Ausführungsform der Erfindung eines Halbleiterbau¬ teils 20 gemäß Figur 8 unterscheidet sich von den ersten bei¬ den Ausführungsformen gemäß Figur 1 und Figur 2 dadurch, dass in der Kunststoffgehäusemasse 12 der Halbleiterchip 3 nicht mit seiner Rückseite auf einer gefüllten Kunststofffolie 8 angeordnet ist, sondern vielmehr von der Kunststoffgehäuse¬ masse 12 vollständig umgeben ist. Die aktive Oberseite 15 des Halbleiterchips weist in dieser Ausführungsform der Erfindung Flipchip-Kontakte 19 als Verbindungselemente 4 mit elektrisch leitenden Partikeln der gefüllten Kunststofffolie 8 auf. Die¬ se mit elektrisch leitenden Partikel gefüllte Kunststofffolie 8 bedeckt lediglich Kontaktanschlussflächen 7 eines Verdrah¬ tungssubstrats 25, sodass bei der Herstellung dieses Halblei¬ terbauteils der Halbleiterchip 3 nach Erwärmen des Trägersub- strats 22 mit den Kontaktanschlussflächen 7 und Bereichen der gefüllten Kunststofffolie 8 mit seinen Flipchip-Kontakten 19 in die zäh viskose Masse der gefüllten Kunststofffolie 8 ein¬ gedrückt werden kann, ohne dass ein zusätzlicher Lötprozess erforderlich ist. Dieses vereinfacht die Fertigung und die Herstellung eines derartigen Halbleiterbauteils.The third embodiment of the invention of a semiconductor component 20 according to FIG. 8 differs from the first two embodiments according to FIG. 1 and FIG. 2 in that in the plastic housing composition 12 the semiconductor chip 3 is not arranged with its rear side on a filled plastic film 8, but rather completely surrounded by the Kunststoffgehäuse¬ mass 12. In this embodiment of the invention, the active upper side 15 of the semiconductor chip has flip-chip contacts 19 as connecting elements 4 with electrically conductive particles of the filled plastic film 8. This plastic film 8 filled with electrically conductive particles only covers contact connection surfaces 7 of a wiring substrate 25, so that in the manufacture of this semiconductor component 3 the semiconductor chip 3 after heating the support substrate 22 with the contact connection surfaces 7 and regions of the filled plastic film 8 with its Flipchip contacts 19 in the viscous viscous mass of the filled plastic film 8 ein¬ can be pressed without an additional soldering process is required. This simplifies the manufacture and manufacture of such a semiconductor device.
Das selektive Aufbringen von Bereichen einer gefüllten Kunst¬ stofffolie 8 kann auf die gleiche Weise durchgeführt werden wie bei den ersten Ausführungsformen der Erfindung. In der dritten Ausführungsform der Erfindung ist anstelle einer Lei¬ terstruktur aus Flachleitern ein Trägersubstrat 22 mit einer Keramikplatte ausgebildet. Durchkontakte 23 durch die Kera- mikplatte gewährleisten, dass Außenkontakte 21, die in ihren Dimensionen um etwa eine Größenordnung größer sind als die elektrischen Verbindungselemente 4 in Form von Flipchip- Kontakten 19, auf der Unterseite der Keramikplatte angeordnet werden können. Diese Außenkontakte 21 in Form von Lotbällen sind auf Außenkontaktflachen 24 angebracht, welche über die Durchkontakte 23 mit den Kontaktanschlussflächen 7 des Trä¬ gersubstrats in Verbindung stehen und über die Verdrahtungs¬ struktur 25 mit den Flipchip-Kontakten über Bereiche der ge¬ füllten Kunststofffolie 8 elektrisch verbunden sind.The selective application of regions of a filled plastic film 8 can be carried out in the same way as in the first embodiments of the invention. In the third embodiment of the invention, a carrier substrate 22 is formed with a ceramic plate instead of a Lei¬ terstruktur of flat conductors. Through contacts 23 through the ceramic plate ensure that external contacts 21, which are larger in their dimensions by about one order of magnitude than the electrical connection elements 4 in the form of flip-chip contacts 19, can be arranged on the underside of the ceramic plate. These external contacts 21 in the form of solder balls are mounted on external contact surfaces 24, which are connected to the contact pads 7 of the carrier substrate via the through-contacts 23 and electrically via the wiring structure 25 with the flip-chip contacts over regions of the filled plastic film 8 are connected.
Mit dieser dritten Ausführungsform der Erfindung wird ge¬ zeigt, dass die mit elektrischen Partikeln gefüllte Kunst¬ stofffolie in den unterschiedlichsten Variationen in der Halbleitertechnologie und in der Halbleiterbauteilfertigung zur Verkürzung des Prozessablaufs eingesetzt werden kann.With this third embodiment of the invention, it is shown that the plastic film filled with electrical particles can be used in a great variety of variations in semiconductor technology and in semiconductor component manufacturing to shorten the process sequence.
Auch in Figur 8 kann, wie hier nicht gezeigt, zwischen Trä¬ gersubstrat 22 und Kunststoffgehäusemasse 12 mit einer ge¬ füllten Kunststofffolie 8 bedeckt sein, um die Haftfähigkeit der Kunststoffgehäusemasse 12 zu dem Trägersubstrat 22 zu verbessern. Um Kurzschlüsse zu vermeiden, wird jedoch für diese Funktion eine gefüllte Kunststofffolie 8 mit isolieren¬ den Keramikpartikeln eingesetzt. Also in FIG. 8, as not shown here, carrier foil 22 and plastic housing composition 12 may be covered with a filled plastic film 8 in order to improve the adhesion of plastic housing composition 12 to carrier substrate 22. In order to avoid short circuits, however, a filled plastic film 8 with insulating ceramic particles is used for this function.

Claims

Patentansprüche claims
1. Halbleiterbauteil (1) mit einem Halbleiterchip (3) und elektrischen Verbindungselementen (4) zu einer Leiter- struktur (5), wobei die Leiterstruktur (5) eine Chipin¬ sel (6) und Kontaktanschlussflächen (7) aufweist, die koplanar angeordnet sind, und wobei die Leiterstruktur (5) von einer gefüllten Kunststofffolie (8) selektiv be¬ schichtet ist, wobei sowohl der Halbleiterchip (3) als auch die elektrischen Verbindungselemente (4) mittels der folienbedeckten Chipinsel (6) bzw. den folienbedeck¬ ten Kontaktanschlussflächen (7) mechanisch fixiert und/oder elektrisch verbunden sind, wobei die Folienbe¬ deckung eine haftvermittelnde Beschichtung zu einer urti- gebenden Kunststoffgehäusemasse (12) darstellt.Semiconductor component (1) with a semiconductor chip (3) and electrical connecting elements (4) to a conductor structure (5), wherein the conductor structure (5) has a Chipin¬ sel (6) and contact pads (7) arranged coplanar and wherein the conductor structure (5) of a filled plastic film (8) is selectively coated, wherein both the semiconductor chip (3) and the electrical connection elements (4) by means of the foil-covered chip island (6) or the foil-covered Contact connection surfaces (7) are mechanically fixed and / or electrically connected, wherein the Folienbe¬ cover is an adhesion-promoting coating to an urti- giving plastic housing composition (12).
2. Halbleiterbauteil nach Anspruch 1, dadurch gekennzeichnet , das s das für ein mechanisches Fixieren und zur thermischen Kopplung, sowohl des Halbleiterchips (2) als auch der umgebenden Kunststoffgehäusemasse (12) die Kunststofffo¬ lie (8) als Füllmaterial isolierende Partikel aufweist.2. Semiconductor component according to claim 1, characterized in that the s for mechanical fixing and for thermal coupling, both of the semiconductor chip (2) and the surrounding plastic housing composition (12) the Kunststofffo¬ lie (8) as a filler insulating particles.
3. Halbleiterbauteil nach Anspruch 1 Anspruch 2, dadurch gekennzeichnet , dass die Kunststofffolie (8) als Füllstoff isolierende Kera¬ mikpartikel vorzugsweise Aluminiumnitrid, Aluminiumoxid, Siliciumnitrid, Siliciumkarbid, Diamant und/oder Bor¬ nitrid aufweist.3. Semiconductor component according to claim 1, characterized in that the plastic film (8) has as filler insulating ceramic particles, preferably aluminum nitride, aluminum oxide, silicon nitride, silicon carbide, diamond and / or boron nitride.
4. Halbleiterbauteil nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet , dass die Kunststofffolie (8) als Füllstoff leitfähige Metall¬ partikel vorzugsweise aus der Gruppe Aluminium, Kupfer, Silber, Gold, Palladium, Nickel oder Legierungen dersel¬ ben aufweist.4. Semiconductor component according to one of the preceding claims, characterized in that the plastic film (8) as a filler conductive Metall¬ particles preferably from the group aluminum, copper, silver, gold, palladium, nickel or alloys dersel¬ ben.
5. Halbleiterbauteil nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet , dass die Halbleiterchips (3) stoffschlüssig auf Chipinseln (6) über die Kunststofffolie (8) mit einem Verdrahtungs¬ substrat eines BGA- -oder LBGA-Gehäuses fixiert sind.5. Semiconductor component according to one of the preceding claims, characterized in that the semiconductor chips (3) are cohesively fixed on chip islands (6) via the plastic film (8) with a wiring substrate of a BGA or LBGA housing.
6. Halbleiterbauteil nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, dass die Halbleiterchips (3) stoffschlüssig auf Chipinseln (6) über die Kunststofffolie (8) mit Flachleitern (9) eines Gehäuses (10) in Flachleitertechnik fixiert sind.6. Semiconductor component according to one of claims 1 to 5, characterized in that the semiconductor chips (3) are cohesively fixed on chip islands (6) on the plastic film (8) with flat conductors (9) of a housing (10) in flat conductor technology.
7. Halbleiterbauteil nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet , dass die Verbindungselemente (4) Flipchip-Kontakte (19) sind, die über eine elektrisch leitende Kunststofffolie (8) mit Kontaktanschlussflächen (7) einer Leiterstruktur (5) verbunden sind, wobei die Leiterstruktur (5) als struk- turierte Metallbeschichtung auf einem Trägersubstrat7. Semiconductor component according to one of claims 1 to 6, characterized in that the connecting elements (4) are flip-chip contacts (19) which are connected via an electrically conductive plastic film (8) with contact pads (7) of a conductor structure (5), wherein the conductor structure (5) as a structured metal coating on a carrier substrate
(22) , das Keramik oder Kunststoff aufweist, angeordnet ist.(22), which has ceramic or plastic, is arranged.
8. Halbleiterbauteil nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet , dass die Verbindungselemente (4) Bonddrähte (11) sind, die über eine elektrisch leitende Kunststofffolie (8) mit Kontaktanschlussflächen (7) einer Leiterstruktur (5) verbunden sind.8. Semiconductor component according to one of claims 1 to 6, characterized in that the connecting elements (4) are bonding wires (11), which via an electrically conductive plastic film (8) with Contact connection surfaces (7) of a conductor structure (5) are connected.
9. Verfahren zur Herstellung eines Halbleiterbauteils (1) aus Bauteilkomponenten mit einem Halbleiterchip (3) und elektrischen Verbindungselementen (4) zu einer Leiter¬ struktur (5), wobei das Verfahren die folgenden Verfah¬ rensschritte aufweist:9. A method for producing a semiconductor component (1) from component components having a semiconductor chip (3) and electrical connecting elements (4) to a Leiter¬ structure (5), the method comprising the following procedural steps:
- Herstellen einer Leiterstruktur (5) mit einer Chip- insel (6) und Kontaktanschlussflächen (7), wozu die- Producing a conductor structure (5) with a chip island (6) and contact pads (7), including the
Chipinsel (β) und die Kontaktanschlussflächen (7) koplanar angeordnet werden,Chip island (β) and the contact pads (7) are arranged coplanar,
- Bedecken der Leiterstruktur (5) mit einer von Par¬ tikeln gefüllten Kunststofffolie (8) unter Struktu- rieren der Kunststofffolie (8) kongruent zu derCovering the conductor structure (5) with a plastic film (8) filled with particles while structuring the plastic film (8) congruently with the
Leitungsstruktur (5),Line structure (5),
Vorwärmen unter Vorvernetzen der Kunststoffmolekül¬ ketten der gefüllten Kunststofffolie (8) zu einer zäh viskosen die Leiterstruktur (5) bedeckenden Be- Schichtung;Preheating with precrosslinking of the plastic molecule chains of the filled plastic film (8) to a viscous coating covering the conductor structure (5);
Aufbringen von Halbleiterchips (3) und Verbindungs¬ elementen (4) auf die zäh viskose Masse und Abküh¬ len der gefüllten Kunststofffolie (8) unter Fixie¬ ren und/oder elektrischem Verbinden der Halbleiter- chips (3) und der Verbindungselemente (4) auf derApplication of semiconductor chips (3) and connecting elements (4) to the viscous mass and cooling of the filled plastic film (8) with fixation and / or electrical connection of the semiconductor chips (3) and the connecting elements (4) on the
Chipinsel (6) bzw. den Kontaktanschlussflächen (7); Verpacken der Bauteilkomponenten in eine Kunst¬ stoffgehäusemasse unter Vernetzen der Kunststoffge¬ häusemasse (12) mit der Kunststofffolie (8) auf de Leiterstruktur (5) und unter Aushärten der gefüll¬ ten Kunststofffolie (8) . Chip island (6) and the contact pads (7); Packaging the component components into a plastic housing composition with crosslinking of the plastic housing composition (12) with the plastic film (8) on the conductor structure (5) and with curing of the filled plastic film (8).
10. Verfahren nach Anspruch 9, dadurch gekennzeichnet , dass das Vorwärmen und Vorvernetzen der Kunststoffmolekülket¬ ten der gefüllten Kunststofffolie (8) zu einer zäh vis- kosen, die Leiterstruktur (5) bedeckenden Beschichtung bei 1300C bis 1800C durchgeführt wird.10. The method according to claim 9, characterized in that the preheating and precrosslinking of the Kunststoffmolekülket¬ th the filled plastic film (8) to a viscous viscous, the conductor structure (5) covering coating at 130 0 C to 180 0 C is performed.
11. Verfahren nach Anspruch 9 oder Anspruch 10, dadurch gekennzeichnet , dass das Aufbringen von Verbindungselerαenten (4) auf die Lei¬ terstruktur (5) durch Eindrücken von Flipchip-Kontakten in die zäh viskose Masse des mit leitenden Partikeln ge¬ füllten Folienmaterials (8) auf Kontaktanschlussflächen (7) der Leiterstruktur (5) erfolgt.11. The method according to claim 9 or claim 10, characterized in that the application of Verbindungselerαenten (4) on the Lei¬ terstruktur (5) by pressing flipchip contacts in the viscous viscous mass of the ge filled with conductive particles film material (8 ) takes place on contact pads (7) of the conductor structure (5).
12. Verfahren nach Anspruch 9 oder Anspruch 10, dadurch gekennzeichnet , dass das Aufbringen von elektrischen Verbindungselementen (4) auf die Leiterstruktur (5) durch Eindrücken von Bond- drahtenden (13) in die zäh viskose Masse des mit leiten¬ den Partikeln gefüllten Folienmaterials (8) auf Kontakt¬ anschlussflächen (7) erfolgt.12. The method according to claim 9 or claim 10, characterized in that the application of electrical connecting elements (4) on the conductor structure (5) by pressing in bonding wire ends (13) in the viscous viscous mass of leit¬ the particles filled film material (8) takes place on Kontakt¬ connection surfaces (7).
13. Verfahren nach einem der Ansprüche 9 bis 12, dadurch gekennzeichnet , dass die Aushärtung und das Vernetzen der Kunststofffolie (8) mit der Kunststoffgehäusemasse (12) in einem Temperatur¬ bereich zwischen 16O0C und 2000C durchgeführt wird.13. The method according to any one of claims 9 to 12, characterized in that the curing and crosslinking of the plastic film (8) with the plastic housing composition (12) in a Temperatur¬ range between 16O 0 C and 200 0 C is performed.
14. Verfahren nach einem der Ansprüche 9 bis 13, dadurch gekennzeichnet , dass die Kunststofffolie (8) im Aufbringen der Kunststoffge- häusemasse (12) weiterhin bei erhöhter Temperatur ver¬ netzt und ausgehärtet wird. 14. The method according to any one of claims 9 to 13, characterized in that the plastic film (8) in the application of the plastic häusemasse (12) further ver at elevated temperature ¬ wets and is cured.
PCT/DE2005/001172 2004-07-05 2005-07-04 Semiconductor component with a semiconductor chip and electric connecting elements for connecting to a conductor structure WO2006005304A2 (en)

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US9082706B2 (en) 2015-07-14
DE102004032605B4 (en) 2007-12-20

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