WO2005109631A1

WO2005109631A1 - Overcurrent limiting method and device

Info

Publication number: WO2005109631A1
Application number: PCT/IB2005/051456
Authority: WO
Inventors: Marco Berkhout
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2004-05-10
Filing date: 2005-05-04
Publication date: 2005-11-17

Abstract

The invention concerns a method and device for avoiding overcurrents to a load (28) in an amplifier stage including a first (16) and a second switch (20) driven alternately with each other as well as a power amplifying device including such an overcurrent avoiding device. The overcurrent avoiding device comprises an overcurrent logic unit (12) that receives a switching control signal (PWMI) having a number of driving cycles for driving the switches, receives an overcurrent indication signal (OCH) indicating that the output current (IO) provided by the first switch to the load exceeds a current limit (ILIM) during a certain driving cycle, and forces, within said driving cycle, the switching control signal to change state (PWMO) if the limit is exceeded, such that the first switch is prematurely switched off for providing a current decrease tot he load and the second switch is prematurely switched on during said driving cycle.

Description

Overcurrent limiting method and device

The present invention is generally directed towards the field of power amplifier stages, for example class D audio amplifier stages, and more particularly towards a method and device for avoiding overcurrents in such an amplifier stage as well as a power amplifying device including such an overcurrent avoiding device.

In the field of power amplifiers that are used for driving a load such as a speaker, it is known to provide switches in stages that alternately drive a load via an LC filter that suppresses high frequency components of a PWM signal used to drive the stage. One type of such an amplifier is the so-called class D power audio amplifier. In these types of amplifiers it is necessary to monitor the output current and make sure that it does not cross certain overload limits. When two switches in a stage are driven alternately it is then known to prematurely switch over to the driving of the alternate switch when the active switch provides too large a current to the load, which is in many cases done in an indirect way through modifying the generation of the PWM signal used for driving the stage. This is for instance described in the document US 6,229,389. When an overcurrent situation is detected for a certain PWM pulse, the information about the situation is used for the generation of an input signal. The input signal is provided to the PWM pulse generating circuit for the generation of subsequent PWM pulses. In this way the PWM pulse generation is influenced in order to change the overcurrent situation. The document also mentions using the duty cycle of these input signals in order to judge the impedance of the load. However it would be of interest to provide a more direct switch over in case of overcurrent situations, which allows a simpler, more compact and faster realization of the control device for switching the power amplifying stage in the case of overcurrent situations. The present invention is therefore directed towards solving the above- mentioned problem of providing a more direct and faster switch over in case of overcurrent situations in power amplifier stages. It is an object of the present invention to provide a method that ensures a direct switch over in case of overcurrent situations in a power amplifier stage.

According to a first aspect of the present invention, this object is achieved by a method of avoiding overcurrents to a load from an amplifier stage having at least a first switch and a second switch driven alternately with each other and comprising the steps of: receiving a switching control signal having a number of driving cycles for driving the switches, receiving an overcurrent indication signal indicating that the output current provided by the first switch to the load exceeds a current limit during a certain driving cycle, and forcing, within said driving cycle, the switching control signal to change state if the limit is exceeded, such that the first switch is prematurely switched off for providing a current decrease to the load and the second switch is prematurely switched on during said driving cycle. Another object of the present invention is to provide a device that ensures a direct switch over in case of overcurrent situations of a power amplifier stage. According to a second aspect of the present invention, this object is achieved by a device for avoiding overcurrents to a load from an amplifier stage, which stage includes at least a first and a second switch driven alternately with each other and comprising: an overcurrent logic unit arranged to: receive a switching control signal having a number of driving cycles for driving the switches, receive an overcurrent indication signal indicating that the output current provided by the first switch to the load exceeds a current limit during a certain driving cycle, and force, within said driving cycle, the switching control signal to change state if the limit is exceeded, such that the first switch is prematurely switched off for providing a current decrease to the load and the second switch is prematurely switched on during said driving cycle. Yet another object of the present invention is to provide a power amplifying device that ensures a direct switch over in case of overcurrent situations of the power amplifier stage. According to a third aspect of the present invention, this object is achieved by a power amplifying device comprising a power amplifying stage having at least a first and a second switch for connection to a load as well as a device for avoiding overcurrents to said load according to the second aspect. According to claim 2, the output current is compared with a current limit for generating an overcurrent indication signal. According to claim 3 and 11, the rate of change of the output current is used for discriminating between different overcurrent situations. The rate of change is a good characteristic for making this separation. In this way it is possible to detect a short circuit situation while still allowing a low load situation to exist such that the amplifier is shut down only when it is actually necessary. One situation where a short circuit is detected based on the rate of change of the output current is described in claim 4. This claim allows the indication of a need to shut down the power amplifying device in question. According to claim 5 and 10, an overcurrent alarm signal is generated which has a cyclic behaviour. This cyclic behaviour is then advantageous to use when determining the overcurrent situation. According to claim 6 and 12 the time the alarm signal has different levels are compared for determining overcurrent situation. This is a simple way of comparing rates of change of the output current. According to claim 7, averaging of a number of rate of change comparisons are performed. In this way a safe indication of correct overcurrent situation is obtained. According to claims 8 and 19, the load is connected to the amplifier stage via an inductive element, which element gives the output current rate of change properties that are easy to measure and process. Cairns 13 - 15 are directed towards simple and efficient realizations of a discriminating unit for separating between a low load situation and short circuit situations. With the present invention there is provided the possibility to obtain fast forced switching of an amplifier stage to avoid overcurrents. The time occupied by the possibly harmful overcurrent situation is thereby limited to a minimum. When forced switching is used combined with a resuming of normal operation after a short period of time that allows the current to decrease a little, disturbing audio holes that can appear in the reproduced sound when the load is a loudspeaker are avoided. The invention furthermore allows a compact and simple implementation of the overcurrent logic unit. The overcurrent logic unit does therefore not need to use clocks or flip-flops. The solution is furthermore not limited to specific types of class D amplifiers, but can be used in any such amplifier topology like self-oscillating or fixed frequency amplifiers. The basic idea of the invention is to directly influence a power amplifier stage to prematurely switch over from a first switch to a second switch once an overcurrent situation is detected in relation to the first switch . The above mentioned and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.

The present invention will be further described in relation to the accompanying drawings, in which: Fig. 1 shows a schematic drawing of a power amplifying device according to the invention including an overcurrent logic unit, Fig. 2 schematically shows an overcurrent detector to be used with the device in Fig. 1, Fig. 3 shows a timing diagram of different voltages, currents and signals in the device in Fig. 1 in a first overcurrent situation, Fig. 4 shows a timing diagram of different voltages, currents and signals in the device in Fig. 1 in a second overcurrent situation, Fig. 5 shows a timing diagram of different voltages, currents and signals in the device in Fig. 1 in a third overcurrent situation, Fig. 6 shows a schematic drawing of a discriminating unit for separating between different overcurrent situations to be used with the device in Fig. 1 , and Fig. 7 shows a state diagram depicting the way the overcurrent logic unit is arranged to work.

The present invention is generally directed towards detecting and avoiding overcurrent situations in power amplifying devices or stages that are normally used in audio applications. It is furthermore preferably used in class D audio power amplifying stages. Parts of such a power amplifying device 10 is shown in Fig. 1, where the device 10 in the drawing comprises an overcurrent logic unit 12, which has an input for receiving a switching control signal PWMi in the form of a PWM (Pulse width modulation) signal from a PWM generating unit (not shown). The overcurrent logic unit 12 has two more inputs for receiving overcurrent indication signals OCH and OC_L as well as two outputs, one outputting an overcurrent alarm signal AL and one outputting a modified PWM signal PWMo- The modified PWM signal PWMo is supplied to switch logic 14, which switch logic 14 is in turn connected to the gate of a first high side power transistor 16 and to the gate of a second low side power transistor 20. The first transistor 16 is connected to an upper voltage rail V_DD and the second transistor to a lower voltage rail Vss- The rail voltages are preferably symmetrical with ground potential provided in the middle between them. Backgate diodes 18 and 22 are connected in parallel with the transistors in the stage. Each transistor diode pair therefore constitutes a power switch. The output of the amplifier stage is provided between the two transistors 16 and 20, where an output voltage Vo is supplied. To this output there is connected an LC filter comprising an inductive element 24 in the form of an inductor and a first capacitor 26. To the LC circuit there is connected a load 28, which in the present case is a loudspeaker. In the drawing the load voltage V_L and the output current Io when the first transistor is conducting are also shown. Overcurrents that can appear when driving the load are detected using overcurent detectors connected to each switch, where one such detector 30 is schematically shown in Fig. 2. One such detector is connected over a corresponding power transistor and emits an overcurrent indication signal OC when the current running through the transistor is above a certain overcurrent threshold. The overcurrent signal OC is supplied to the overcurrent logic (12) shown in Fig. 1. There are thus normally provided two such detectors one for each transistor and each providing an overcurrent indication signal. How such an overcurrent detector can be implemented is for instance described in WO-03/098804, where a series of additional transistors and current mirroring is used for current detection. This document is herein incorporated by reference. The normal functioning of the device shown in Fig. 1 will now be described. The previously mentioned PWM circuit generates a number of PWM cycles PWMi that are supplied to the overcurrent logic 12. In the normal operational state these signals are passed transparently through to the switch logic 14. The output signal PWMo from the overcurrent logic is thus in this case the same as the input signal PWMi. The switch logic 14 thereafter drives the first and second transistors 16 and 20 alternately with each other based on these PWM pulses such that the output of the amplifier stage provides a square wave voltage V₀ supplied to the LC filter. When the first transistor 16 drives the output, an output current Io running from the supply rail V_DD is therefore supplied to the load 28 via the inductor 24. The LC filter here suppresses the high frequency components of the PWM signal. Consequently only the desired signal appears across the load. In the same way the second transistor provides the voltage V_Ss to the load 28, when it is conducting. The case of a first overcurrent situation will now be described with reference also being made to Fig. 3, which shows a timing chart showing the signals PWMi, PWMo, AL, the output voltage Vo, the output current Io as well as an upper limit I_LIM associated with the output current running to the load. Of the input signal PWMi there is shown a part of a first cycle, whole second and third cycles as well as part of a fourth cycle. The latter part of a first switching cycle is shown from a first point in time t₀. The first cycle ends at a second point in time ti. During the first cycle, the PWM signal PWMi is initially transparently passed through the overcurrent logic 12 to the switch logic 14, which in the present example fully opens the first transistor 16 for providing the high level of a square wave to the load 28. When this is done the output current Io is increasing and at a certain point it reaches an output current threshold or limit I_UM, which is detected by detector 30. The limit is in this example reached because the load is very low. The detector 30 then outputs the overcurrent indication OC_H to overcurrent logic 12. Based on this signal the overcurrent logic 12 does the following. It first forces the PWM signal to the opposite level, such that the switch logic 14 now receives a change in the level of the PWM signal and in this case from a high level to a low level, which level is kept for the remainder of the relevant PWM cycle. The output signal PWMo thus goes from a high to a low level before the input PWMi signal and keeps this level until the input signal PWMi goes high again, in which case the overcurrent control logic makes the output signal PWMo yet again follow the input signal PWMi. This has as a result that the switch logic 14 switches off the first transistor 16 and simultaneously switches on the second transistor 20 prematurely in relation to the input signal PWMi. As can be seen in Fig. 3 this leads to an immediate decrease of the output current Io such that it no longer exceeds the limit as well as a reversal of the output voltage to the voltage V_Ss- The current Io here decreases until the first transistor 16 is switched on again. At the same time the overcurrent logic 12 generates an overcurrent alarm signal AL at the time of reception of the overcurrent indication signal OC_H. This signal AL is kept high for the duration of decrease of the output current. It remains at a high level for the whole first cycle even when the second transistor 20 would normally be switched on and is not pulled down to a low level until the first transistor 16 is again switched on when the next switching cycle is begun at the second point in time ti. The same process is performed for the next cycle, which ranges from the second point in time ti to a third point in time t₂ and where the transistor driving signal PWMo is forced low when the output current Io reaches the current limit I_LIM, whereupon the output voltage Vo goes low and the alarm signal AL goes high and stays at a high level for the remainder of the cycle. In the following third cycle, which ranges from the third point in time t₂ to a fourth point in time t₃, the output current Io never reaches the current limit and consequently the driving signal is fed through transparently and the transistors 16 and 20 are switched in a normal fashion, which is also happening in the part of the fourth cycle depicted in Fig. 3, which fourth cycle starts at the fourth point in time t₃. In this cycle there is thus no alarm signal generated. It should be realized that overcurrent detection is performed in a similar manner for the second power transistor. In this way the switching of the transistors is made directly by influencing the existing drive signal and therefore a faster switching is obtained than if the drive signal generation process would be influenced. The time occupied by the possibly harmful overcurrent situation is thereby limited to a minimum. This also enables a simpler and more compact design of the overcurrent control logic. When the load is a loudspeaker it does not have pure resistive properties, but the load impedance can vary considerably depending on the audio frequency of the signal generated. This means that the load can have dips and peaks in its impedance. There are thus situations where the load has a very low impedance in normal operation such that an overcurrent would occur. In this case the above described overcurrent control scheme should be used for taking care of the temporary overcurrent situation, but in all other respects the amplifier should continue to operate as usual. An overcurrent situation might also occur because of a short circuit of the load. In this case it is necessary to shut down the amplifier at least within a certain time limit. It would thus also be advantageous to separate between at least these two different overcurrent situations, such that the amplifier stage is only switched off for repair in case a real short circuit is at hand. The present invention is also directed towards separating between different types of overcurrent situations. The inductive element that is present in the LC circuit has the properties to make the rate of change of the current, i.e. di/dt have an easily analysed behavior. Because of this element an increasing current will show a straight linear increase and a decreasing current a straight linear decrease, which properties can be used for identifying different overcurrent situations. Fig. 3 shows the case where a low load situation existed. In this case there is a small resistive load. This means that the slope of the output current when the first transistor is open has a certain rate of change and the slope or rate of change of the output current when the second transistor is then turned on has another rate of change. Due to the fact that a low load situation exists, the potential at the end of the inductor facing the load has a small positive voltage. As the voltage is then changed from the positive upper rail voltage to the negative lower rail voltage at the other end of the inductor, the output current will decrease with a faster rate than the rate with which it was increasing. Fig. 3 thus shows two different rates of change for the output current Io, where these differences are directly appearing in the duty cycle of the alarm signal AL. Fig. 4 shows a similar chart as Fig. 3, but for a short circuit situation across the load. Fig. 4 thus shows the same signals and voltages as Fig. 3, but their behavior is slightly different. Since the load is now short-circuited the potential of the end of the inductor facing the load has a ground potential. As the output voltage is then changed from the positive upper rail to the negative lower rail voltage at the other end of the inductor, this means that the inductor will make the current decrease with approximately the same rate as the rate with which it increased. Fig. 4 thus shows essentially the same rate of change for the output current Io, where these differences can be obtained from the alarm signal AL, at least over a number of cycles. Fig. 5 shows a similar chart as Figs. 3 and 4, but for a short circuit situation towards the second rail voltage Vss- Because of this the potential of the end of the inductor facing the load has a potential close to the lower rail voltage Vss- This means that when the first transistor is conducting, the output current increases much faster than when the second transistor is conducting. As a consequence the rate of change of increasing output current is much higher than the rate of change of the decreasing output current, where these differences can be obtained from the alarm signal AL. It should be noted that similar overcurrent situations for the second power transistor are measured and determined in a similar manner as described above for the first power transistor. The information of the different slopes or rate of changes are then used for separating between different overcurrent situations, which can be used for discriminating between the different situations. In the present invention this is done through the overcurrent logic emitting the above described alarm signal AL and providing it to a discriminating unit, where an example of one such simple discriminating unit 32 is shown in a schematic in Fig. 6. The discriminating unit 32 has a first current source 34, which is at one end connected to a voltage Vp. A second end of the first current source 34 is connected to a first end of a branch including a switch 36 connected to a second current source 38. The second end of the branch is connected to ground. A second capacitor 40 is connected in parallel with the branch and an output voltage Vc is provided from the connection point between the branch and first current source 34. The switch 36 is controlled by the alarm signal AL, such that a high alarm signal AL closes the switch and a low alarm signal opens it. The second current source 38 furthermore provides a larger current than the first current source 34, which in the preferred embodiment of the present invention is at least twice as large as the current supplied by the first current source. In practice it is advantageous to dimension the current sources such that the desired duty cycle safely indicates a short circuit, i.e. that a safety margin is provided. Thus the second current source can often be somewhat more than twice as large, like 2.5 or 3 times as large to provide this safety margin for the 50% duty cycle. When the switch 36 is open the first current source 34 loads the capacitor 40 to a certain level. When the alarm signal AL then closes the switch 36 the capacitor 40 starts unloading since the second current source 38 provides a larger current then the first current source 34. If then the duty cycle of the alarm signal AL is higher than or equal to about 50%, i.e. the slope of the increasing output current is higher than the slope of the decreasing output current, the capacitor 40 will eventually be emptied and consequently the voltage Vc receive zero potential. This is then used to signal that the amplifier stage needs to be shut down, which happens after a number of cycles. It should here be noted that this is signaled faster when there is a short circuit in the driving stage than in the load and that no indication will be provided when a normal low load situation occurs. In this embodiment a duty cycle of the alarm signal (AL) of about 50% will then lead to the voltage Vc going to the ground potential. Naturally the current sources can be set such that a different duty cycle leads to a ground voltage being obtained on the output of the unit 32. The overcurrent logic can be obtained through Karnaugh mapping of a state diagram on a state machine and therefrom obtaining a logic circuit. One such state diagram is shown in Fig. 7, which also outlines the method the overcurrent logic unit is working according to. The state diagram has a number of states A - H. A box with dashed lines surrounding a number of states indicates that the output control signal PWMo has a high signal level for these states. For all other states this signal has a low level. A dotted box indicates that an alarm signal AL is generated having a high level. For all other states the alarm signal AL has a low level. In the drawing the normal states are states D and E, where the overcurrent logic toggles between these states. Assume that the input switching control signal has a low level in state E and goes to a high level, which is indicated by showing the input signal PWMi. This new level leads to a transition to state E and a consequential high level of the output signal PWMo. When the input signal then receives a low level, indicated by the inverse of the signal PWMi, the overcurrent logic returns to state D, and consequently also the output signal PWMo receives a low level. The two overcurrent indication possibilities are mutually exclusive, i.e. they cannot happen at the same time. If a low overcurrent indication signal OC_L is received, the overcurrent logic is forced to state A and the output signal PWMo is forced high. At the same time the alarm signal AL is generated or receives a high level. When the input signal PWMi then goes high, state B is entered where both AL and PWMo are kept high. When the input signal returns to a low level, state C is entered where PWMo is lowered. This state C is unstable and immediately transitions to state D where the signal AL is also set low. The high side overcurrent states H, G, F and E are transitioned into each other in a similar way starting with state E in case of a high side overcurrent situation, where state F is also an unstable state which immediately transitions into state E. With the present invention, there is thus provided the possibility to obtain fast forced switching of the amplifier stage to avoid overcurrents. When the forced switching is combined with a resuming of normal operation after a short period of time that allows the current to decrease a little, disturbing audio holes that can appear in the reproduced sound in a loudspeaker are avoided. The described solution furthermore allows a compact and simple implementation of the overcurrent logic. The overcurrent logic does furthermore not need to use clocks or flip-flops. The solution is also not limited to specific types of class D amplifiers, but can be used in any such amplifier topology like self-oscillating, fixed frequency or open loop "full digital" amplifiers. The use of the rate of change of the current for separating the different overcurrent conditions also enables the provision of a simple way of separating between the situations. This is furthermore simplified by the rate of change being more or less constant because of the inductive element, which element is normally used in an amplifier stage. The invention can be varied in a multitude of ways. The overcurrent indication signal can be generated in other ways, for instance by measuring the current running through a measurement resistance. The overcurrent logic can also be provided through countless other types of logic. The discrimination unit can furthermore be provided in countless other ways, for instance through measuring the total time length of the alarm signals. If a capacitor is used it is furthermore possible to let the alarm signal load the capacitor instead and let a certain high voltage level be used for indicating short circuit. The different signal levels used could of course also be opposite. The alarm signal AL could for instance let a low level indicate an alarm. It should be emphasized that the term "comprises/comprising" when used in this specification is taken to specify the presence of stated features, integers, steps or components, but does not preclude the presence or addition of one or more other features, integers, steps, components or groups thereof. It should furthermore be realized that reference signs appearing in the claims should in no way be construed as limiting the scope of the present invention.

Claims

CLAIMS:

1. Method of avoiding overcurrents to a load (28) from an amplifier stage having at least a first switch (16) and a second switch (20) driven alternately with each other and comprising the steps of: receiving a switching control signal (PWMi) having a number of driving cycles for driving the switches, receiving an overcurrent indication signal (OC_H) indicating that the output current (Io) provided by the first switch to the load exceeds a current limit (I_LIM) during a certain driving cycle, and forcing, within said driving cycle, the switching control signal (PWMo) to change state if the limit is exceeded, such that the first switch is prematurely switched off for providing a current decrease to the load and the second switch is prematurely switched on during said driving cycle.

2. Method according to claim 1, further comprising the step of comparing the output current with said current limit and generating said overcurrent indication signal if the current limit is exceeded.

3. Method according to claim 1, further comprising the steps of comparing the rate of change of the current before the forced changed state of the switching control signal with the rate of change of the current after the forced changed state of the switching control signal in said cycle and identifying a low load situation or a short circuit situation in dependence of the comparison.

4. Method according to claim 3, wherein a short circuit situation exists for the load if the rate of change of the current before the forced changed state is approximately equal to or larger than the rate of change after the forced changed state in said cycle and otherwise a low load situation exists.

5. Method according to claim 3, further comprising the step of generating an overcurrent alarm signal (AL) which has a first level when no overcurrent situation exists, goes to a second level when the situation is first detected in said cycle and returns to the first level again when the first switch is switched on in the next cycle.

6. Method according to claim 5, wherein the step of comparing rates of change comprises comparing the time the overcurrent alarm signal is at the second level with the time the overcurrent alarm signal is at the first level for at least one cycle.

7. Method according to claim 2, wherein the step of comparing rates of change is performed for a number of switching control signal cycles of the amplifier stage and a low load situation or a short circuit situation is indicated based on an averaging of comparison results.

8. Method according to claim 1, wherein the load is connected to the amplifier stage via an inductive element (24).

9. Device for avoiding overcurrents to a load (28) from an amplifier stage, which stage includes at least a first (16) and a second switch (20) driven alternately with each other and comprising: an overcurrent logic unit (12) arranged to: receive a switching control signal (PWMi) having a number of driving cycles for driving the switches, receive an overcurrent indication signal (OC_H) indicating that the output current (Io) provided by the first switch to the load exceeds a current limit (I_LIM) during a certain driving cycle, and force, within said driving cycle, the switching control signal to change state (PWMo) if the limit is exceeded, such that the first switch is prematurely switched off for providing a current decrease to the load and the second switch is prematurely switched on during said driving cycle.

10. Device according to claim 9, wherein the overcurrent logic unit is further arranged to generate an overcurrent alarm signal (AL) which has a first level before an overcurrent indication is received, goes to a second level when the indication is recieved in a first cycle and returns to the first level again when the first switch is switched on in the next cycle.

11. Device according to claim 10, further comprising a discriminating unit (32) arranged to compare the rate of change of the current before the forced changed state of the switching control signal with the rate of change of the current after the forced changed state of the switching control signal in said cycle and identify a low load situation or a short circuit situation in dependence of the comparison.

12. Device according to claim 11 , wherein the discriminating unit is arranged to compare the time the overcurrent alarm signal has the second level with the time the overcurrent alarm signal has the first level for at least one cycle.

13. Device according to claim 12, wherein the discriminating unit comprises a capacitor (40) the voltage (V_c) of which is changed at least when the overcurrent alarm signal goes to the second level and the resulting voltage level of the capacitor, after such a second level alarm signal has been provided at least once, is used for discriminating between a low load situation and a short circuit situation.

14. Device according to claim 13, wherein the discriminating unit furthermore comprises a first current source (34) connected to the capacitor and to a first branch comprising a second current source (38) and a switch (36), which first branch is connected in parallel with the capacitor, wherein a first level overcurrent alarm signal closes the switch and a second level overcurrent alarm signal opens the switch such that a second level overcurrent alarm signal keeps the voltage of the capacitor to a certain level while a first level overcurrent alarm signal discharges the capacitor.

15. Device according to claim 14, wherein the second current source provides a larger current than the first current source and their relationships are dimensioned such that the voltage over the capacitor provides a level which can be used for separating between a low load situation and short circuit situation.

16. Device according to claim 15, wherein the second current source provides at least twice as large a current as the first current source.

17. Power amplifying device (10) comprising a power amplifying stage having at least a first (16) and a second (20) switch for connection to a load (28) as well as a device (12) for avoiding overcurrents to said load according to claim 9.

18. Power amplifying device according to claim 17, further comprising at least one overcurrent detector (30) for one switch.

19. Power amplifying device according to claim 17, further comprising an inductive element (26) between the power amplifying stage and said load.