WO2005107057A1

WO2005107057A1 - Method for compensating a temperature-related frequency error of an oscillating quartz

Info

Publication number: WO2005107057A1
Application number: PCT/DE2005/000755
Authority: WO
Inventors: Janos-Gerold Enderlein; Hans-Jürgen Neuhaus
Original assignee: Siemens Aktiengesellschaft
Priority date: 2004-04-28
Filing date: 2005-04-20
Publication date: 2005-11-10
Also published as: DE102004021441A1

Abstract

A method for compensating a temperature-related frequency error of an oscillating quartz in a real-time clock, particularly for mobile radio terminals, GPS receivers or the like. A frequency error temperature curve describing the frequency error (df/f) at least in one temperature interval is approximated bit by bit by means of a temperature-dependent characteristic curve of an electronic circuit and a temperature-dependent compensation voltage (Ust) is produced on the basis of a compensation voltage temperature curve obtained from said bit by bit approximation and is used in order to tune the frequency of the oscillating quartz.

Description

description

Method for compensating a temperature-related frequency error of a quartz crystal

Radio modules and mobile end devices which are operated according to the specifications of the GSM mobile radio standard contain, as frequency standard and timer, a device for real time measurement (Real Time Clock = RTC). This device is also active when the device is switched off and, after the device is switched on, enables the time to be determined with the appropriate accuracy.

The frequency-determining component of the real-time clock is usually formed by a quartz crystal in the form of a quartz crystal (fork generator) in a quartz crystal circuit that vibrates in the GSM mobile radio system with a nominal frequency of 32,768 Hz. For the construction of the real-time clock or the crystal of the quartz crystal, the requirements of low material and development costs in connection with the smallest possible space consumption of the component must be met. Furthermore, a sufficiently low current consumption of less than 500 nA is required for the real-time clock, in particular for the switched-off mode. Finally, a very narrow frequency tolerance of the order of ± 20ppm and a very high frequency stability with respect to temperature fluctuations must be fulfilled for the quartz crystal.

Existing frequency compensation methods, which work in conjunction with the GSM standard only in the activated mode, ensure a sufficiently precise frequency stability for the GSM functions of the mobile device. However, exact time control is essential for time-critical applications. conditions, such as real-time controls, are essential. An example of such a time-critical application is a clock with an integrated GSM module or a GSM telephone. In this application, the frequency accuracy of the embodiments of the real-time clock known according to the prior art is not sufficient to meet the required accuracy of the Ensure timekeeping. The time errors caused by temperature changes and the associated frequency changes of the quartz crystal can assume considerable values. Without the compensation algorithm already used in GSM mode, the frequency error caused by the temperature adds up to an error of up to 50 min / year.

The standard in the GSM mobile radio environment is frequency error compensation of the real-time clock by means of a baseband processor, and above all a continuous calibration is carried out with the 13/26 MHz GSM clock used in the GSM system. This can significantly increase the accuracy during GSM operation and the time deviation to less than

10 min / year can be reduced. For the applicability of this method, however, there is the indispensable main condition that the GSM baseband must be switched on for the entire time so that the compensation algorithm can be activated. However, this constant activation is associated with a high power consumption and is extremely disadvantageous due to the greatly reduced standby time. In addition, it is not possible to activate the compensation procedure when the operating mode is switched off, in which the real-time clock continues to run as a timer.

Another option for correcting the temperature-induced frequency error of the real-time clock is the use of temperature given stabilized quartz modules. However, due to their design complexity, these are very expensive and therefore do not allow widespread use in mobile GSM terminals for reasons of economy.

Finally, references from other time sources, for example the GPS system or known time transmitters, can be used. For this purpose, however, the GSM terminals have to be equipped with additional devices and functionalities for the reception and processing of these signal transmitters which are foreign to the GSM system, which in some cases unnecessarily complicates the structure of the devices.

The task thus arises of specifying a method for compensating the frequency error of the real-time clock caused by temperature changes in a device of the type mentioned above, in which the frequency error of the real-time clock is largely compensated for in an easy to implement, inexpensive and energy-saving manner and the resultant result - Time errors can be reduced sustainably. A corresponding circuit arrangement is also to be provided.

The object is achieved with a method with the features of claim 1 and an arrangement with the features of claim 4, the subclaims comprising at least advantageous or expedient refinements.

The temperature-dependent frequency error of the quartz crystal is described by a frequency error-temperature curve. As a result, the course of the frequency error within a given temperature interval is known per se. The compensation method according to the invention makes use of this fact, which within this temperature interval approximates sections of the frequency error-temperature curve by temperature-dependent characteristics of an electronic circuit. These piece-wise approximations are used to generate a compensation voltage with a temperature-dependent compensation voltage curve. The compensation voltage required to correct the frequency error at a current temperature is determined and generated from this. The compensation voltage determined in this way influences the frequency of the quartz crystal and thus compensates for the temperature-related frequency error of the quartz crystal in the real-time clock.

Access to a baseband or connection of a baseband processor is therefore completely eliminated. The frequency error itself is compensated for by the current temperature conditions. This compensation is carried out by the electronic circuit in a self-sufficient manner and is in particular also active and executable when the mobile radio device is switched off, that is to say in particular in a state that is not set up for reception, or in a state characterized by a minimal current consumption.

In the case of a frequency error-temperature curve with a parabolic shape given within the temperature interval, the compensation voltage is generated in a first partial temperature interval with a linearly increasing temperature-dependent profile and in a second partial temperature interval with a linearly decreasing temperature-dependent profile. The rising or falling parabola branches of the frequency error-temperature curve are thus in this embodiment represented by a linearly rising or falling temperature. temperature characteristic of the generated compensation voltage approximated. Ultimately, the compensation voltage is generated by a superposition from two temperature characteristics, in particular the rising and falling temperature characteristics mentioned.

A circuit arrangement for carrying out the method mentioned is characterized by the following components:

The arrangement initially has a temperature-dependent one

Electronic circuit generating compensation voltage (generator circuit) comprising a temperature-dependent resistor in connection with an electronic switching and amplifying element and furthermore a tuning circuit adjoining an output of the generator circuit for a quartz crystal circuit having the quartz crystal. The temperature-dependent resistance represents the temperature-sensitive component in the generator circuit. In connection with the switching and amplification element used, a circuit is thus implemented which generates the compensation voltages mentioned with the corresponding temperature characteristic. The tuning circuit tunes the frequency of the quartz crystal in the quartz crystal circuit in accordance with the compensation voltage and thereby compensates for the temperature-dependent frequency deviation of the quartz crystal.

In an expedient embodiment, the temperature-dependent resistor is designed as a thermally conductive (NTC) resistor with a negative temperature coefficient. The designation "NTC ^Nλ" is an abbreviation for the term "negative temperature coefficient". In principle, cold-conducting (PTC) resistors can also be used in a suitable circuit arrangement. In one embodiment, a transistor is provided as the switching and amplifying element (in each case), the generator circuit being designed in particular as a two-stage transistor circuit. Such an embodiment is particularly expedient with regard to the generation of the superpositioned rising or falling temperature characteristics mentioned above.

The NTC resistor of the first transistor stage is expediently in series with the base of the first transistor and the NTC resistor of the second transistor stage is parallel to the base of the second transistor. Thus, the first stage realizes a rising or falling temperature characteristic, while the second stage creates a falling or rising temperature characteristic complementary thereto, which are superpositioned at the output of the two-stage circuit and influence the tuning circuit.

The emitters of the transistors are expediently connected to ground, and the collectors of the transistors are connected to the output of the generator circuit.

The tuning circuit is preferably designed as a capacitance diode circuit. Such a circuit enables a particularly simple tuning option for the compensation voltages generated by the compensation circuit for influencing the frequency response of the quartz crystal.

In a further preferred embodiment, the capacitance diode circuit is designed as a series circuit comprising a varactor diode and a capacitor. The output of the generator Circuit is at a node connected in series between the capacitor and the varactor diode.

In a modified embodiment of the generator circuit, operational amplifiers are arranged in the circuit as switching and amplification elements. The other structure of the arrangement, in particular the interconnection of the electronic components, may remain essentially unchanged.

The method according to the invention and the corresponding circuit will now be explained in more detail using an exemplary embodiment in conjunction with figures. The same reference numerals are used for the same or equivalent parts or process sequences.

It shows

La shows a frequency error-temperature diagram with an exemplary frequency error-temperature curve,

Fig. Lb is a voltage-temperature diagram with an exemplary compensation voltage characteristic and

Fig. 2 is a circuit diagram of a circuit arrangement.

Fig. 1 shows a typical course of the frequency error-temperature curve for a quartz crystal in a real-time clock of a cell phone or a radio module in a GSM cell phone network. In this example, the temperature interval shown in the curve on the abscissa covers a temperature range of almost 90 K and extends from approx. -20 ° C to approx. 70 ° C. On the ordinate on the left is the relative temperature dependent frequency errors df / f in ppm parts and on the right the resulting time errors in min / year. As can be seen from the diagram in FIG. 1 a, the relative frequency error curve shows a parabolic course.

In a first partial temperature interval ΔTl, called the low-temperature range, in the range from approx. -20 ° C to approx. 10 ° C, the relative frequency error drops from -lOOppm to approx. -30ppm. The vertex of the frequency error parabola is relatively flat and changes into a parabolic load which in turn falls within an exemplary temperature sub-interval ΔT2 referred to as a high temperature range in the range from approx. 40 ° C. to approx. 70 ° C. The relative frequency error in this area increases in a first approximation symmetrically with respect to the vertex of the parabola again to values of up to -100ppm.

To correct this frequency error curve and to generate a suitable compensation voltage, the parabolic curve is approximated by piece-wise approximations in the temperature subintervals ΔTl and ΔT2 and a compensation voltage Ust which is dependent on the temperature is generated. This approximation is exemplified in the diagram in FIG. 1b by a series of linear temperature-dependent voltage characteristic curves. It goes without saying that in principle any temperature-dependent characteristic curve shape can be used to approximate the frequency error curve or to describe the temperature-dependent compensation voltage characteristic curve, provided that this reproduces the shape of the frequency error curve with sufficient accuracy. An exemplary temperature-dependent curve of such a characteristic of the compensation voltage Ust is shown in FIG. 1b. One can see a curve that increases linearly in the first partial temperature interval ΔT1 and a curve that decreases linearly in the second partial temperature interval ΔT2. In between is a temperature range with an essentially constant value of the compensation voltage. As can be seen from the comparison with FIG. 1 a, the rising or falling branch of the parabola of the frequency error-temperature curve is approximated by the sections of the rising, constant and falling values of the compensation voltage Ust which are joined together piece by piece. These sections form the T-dependent compensation voltage curve given in this exemplary embodiment by a polygon to compensate for the temperature-frequency error curve of the quartz crystal and thus the real-time clock of the GSM mobile radio device shown in FIG.

The function curve shown in FIG. 1b is thus the result of a superposition of an increasing and a falling temperature characteristic curve with an increasing Ust curve in a lower temperature range and a falling Ust curve in an upper temperature range.

2 shows a circuit diagram of a circuit for generating the temperature characteristic curves, their superposition and the compensation voltage curve generated thereby. The heart of the arrangement shown in FIG. 2 is a two-stage generator circuit 1, which is implemented from a first stage 2 and a second stage 3. A tuning circuit in the form of a capacitance diode circuit 4 is coupled to this two-stage generator circuit. This tunes a quartz crystal circuit 5 depending on the temperature. In the following explanation of the compensation circuit shown in FIG. 2, in the treatment of the two-stage circuit 1 and in particular stages 2 and 3, an implementation in the form of transistor stages or circuits is assumed. For example, npn transistors are used, and the use of pnp transistors or field effect transistors or other switching and amplification elements, in particular operational amplifiers and the same electronic components, is also possible in principle within the scope of professional action. For reasons of a circuit variant that is as simple and inexpensive as possible and a current consumption that is as low as possible of less than 50 μA, the use of npn transistors is preferred.

During operation, both transistor stages 2 and 3 generate the temperature-dependent compensation voltage corresponding to the temperature characteristics shown there for the first and second temperature range shown in FIG. 1b and output it as an output voltage. This serves as a control signal for the capacitance diode circuit 4.

The generator circuit 1 from the first transistor stage 2 and the second transistor stage 3 is explained in more detail below. In the following exemplary embodiment, thermally conductive or NTC resistors are used as temperature-sensitive components. The use of cold-conducting resistors with a positive temperature coefficient, so-called PTC resistors, is also possible with a corresponding change in the circuit structure.

All other resistors within the circuit show an ohmic resistance characteristic and can be galvanic Resistors are executed. They expediently have sufficiently constant resistance values in the required temperature range. The circuit itself, in particular the two-stage compensation circuit or each of the two transistor stages, can optionally also be designed as an integrated circuit.

Of considerable importance for the functionality of the exemplary embodiment explained below is the selection of appropriate NTC resistors, in particular with regard to appropriate temperature coefficients, in conjunction with a coordinated selection of the appropriate transistor type and a suitable selection of corresponding operating points of the transistor stages based on this. Furthermore, a varactor diode with a sufficiently large tuning range of the inner junction capacitance matched to the compensation voltage generated by the compensation circuit must be provided for the capacitance diode circuit 4.

The electronic components of the first transistor stage 2 are connected between a first voltage source VRTC or a voltage source referred to as VBATT and ground M.

A parallel circuit consisting of a first resistor with a negative temperature coefficient NTCl and a galvanic resistor R21 with connection to the voltage source VRTC is connected in series with a galvanic resistor RV1 with ground contact M. The base B1 of a transistor Tl is connected to the resistor RVl at a node 2A located between the parallel connection of NTCl and R21 and the galvanic resistor RV1. The collector Kl of the transistor Tl is connected to the voltage source VBATT via a series-connected galvanic resistor RC1. Via a node 2C located between the collector K1 and the resistor RC1 and a node 2B arranged between the parallel connection of NTCl and R21 and the node 2A, a resistor R11 connecting the collector K1 to the base B1 of the transistor T1 is additionally inserted. The E- middle El of the transistor Tl is connected to the ground Ml. Node 2C is also connected to output A of circuit 1.

The structure of the circuit of the second transistor stage 3 is similar to the structure of the first transistor stage 2. The electronic components of this transistor stage are arranged between the voltage source VRTC and ground M. A galvanic resistor RV2 connected to the voltage source VRTC leads to a node 3D via the nodes 3A and 3B. At the node 3D, a parallel connection arises from a resistor with negative temperature coefficients NTC2 and a galvanic resistor R22. These are each connected to ground M.

The transistor T2 of the second transistor stage 3 is connected at its base B2 to the node 3B. The emitter of transistor T2 is connected to ground M. The collector K2 of the transistor T2 is connected to a node 3C. A galvanic resistor R12 connecting the collector K2 and the base B2 of the transistor T2 is inserted between the node 3C and the node 3A. The node 3C is also connected to the output A of the compensation circuit 1. The output A of the two-stage circuit 1 is connected via a galvanic resistor RD to the tuning circuit in the form of the capacitance diode circuit 4. In the exemplary embodiment in FIG. 3, this consists of a varactor diode VI, which is connected in series with a capacitor C1. The current path emanating from the output A of the two-stage circuit 1 opens in the exemplary embodiment from FIG. 3 at a node 4A connected in series between the capacitor C1 and the varactor diode VI. The varactor diode VI is switched in the blocking direction in the direction of the mass M. The line routing via the capacitor C1 branches at a node 4B in the direction of a further node 6A in a baseband control (gate) 6 and in the direction of the quartz crystal circuit 5. The quartz crystal circuit consists of the quartz crystal SC connected between the node 4B and a node 5A. A capacitor C2 is additionally inserted into the quartz crystal circuit between the node 5A and the ground M.

During operation, the compensation voltage generated by the two-stage transistor circuit 1 changes the junction capacitance of the varactor diode in the capacitance diode circuit 4 in accordance with the prevailing temperature conditions. In this case, the oscillating quartz circuit 5 is tuned depending on the temperature and the frequency deviation of the real-time clock is thus compensated for.

The circuit for frequency error compensation constructed in accordance with this exemplary embodiment is distinguished by a low current consumption in the range of less than 50 microamps and can therefore also be used without further ado when the mobile terminal is virtually switched off. Furthermore, the circuit is completely electronic Standard components built. Therefore, the electronic components used to implement the circuit prove to be extremely inexpensive. In the case of mass production of the exemplary circuit from FIG. 2, material costs of less than € 0.25 per circuit can be assumed.

LIST OF REFERENCE NUMBERS

1 two-stage generator circuit

2 first stage 2A, 2B, 2C node

3 second stage

3A, 3B, 3C, 3D node

4 capacitance diode circuit

4A, 4B, 5 quartz crystal circuit

5A node

6 baseband control

6A node

A output generator circuit Cl, C2 capacitor

M mass

NTCl, NTC2 resistor with negative T coefficient

RCl, Rll, R12, R21, R22, RCl, RD, RVl, RV2 galvanic resistance

T1, T2 transistor

Bl, B2 basis

El, E2 emitter

Kl, K2 collector VI varactor diode

SC quartz crystal

ΔTl, ΔT2 partial temperature interval

Ust compensation voltage df / f relative frequency error

Claims

claims

1. A method for compensating for a temperature-related frequency error of a quartz crystal of a real-time clock, in particular for mobile radio terminals, GPS receivers or the like, that means that

a frequency error-temperature curve describing the frequency error (df / f) is approximated piece by piece by a temperature-dependent characteristic curve of an electronic circuit at least in a temperature interval (T) and

- A temperature-dependent compensation voltage (Ust) is generated from a compensation voltage-temperature curve obtained as a result of the piece-wise approximation and is used for frequency tuning of the quartz crystal.

2. The method of claim 1, d a d u r c h g e k e n n z e i c h n e t that at a given within the temperature interval (T) frequency error-temperature curve with a parabolic

The compensation voltage is generated in a first partial temperature interval (ΔTl) with an, in particular linear, rising temperature-dependent profile and in a second partial temperature interval (ΔTl) with a, in particular linear, falling temperature-dependent profile.

3. The method according to claim 2, characterized in that the compensation voltage (Ust) is generated by a superposition from at least two characteristics, in particular the rising in the temperature interval (ΔTl) and falling in the temperature interval (ΔT2).

4. Circuit arrangement for executing a method according to one of claims 1 to 3, g e k e n n z e i c h n e t d u r c h

- A generator circuit (1) generating a temperature-dependent compensation voltage with at least one temperature-dependent resistor (NTCl, NTC2) and at least one electronic switching and amplification element and a tuning circuit (4) provided at an output (A) of the compensation circuit for a quartz crystal (SC) oscillating crystal circuit (5).

5. Circuit arrangement according to claim 4, so that the or each temperature-dependent resistor is designed as an NTC resistor (NTCl, NTC2).

6. A circuit arrangement according to claim 4 or 5, that the or each switching and amplifying element is formed by a transistor or operational amplifier.

7. Arrangement according to claim 5 or 6, so that a first NTC resistor (NTCl) of a first transistor stage (2) connects in series with the base (B1) of a first

Transistors (T1) and a second NTC resistor (NTC2) of a second transistor stage (3) forms a series circuit with the base (B2) of a second transistor (T2).

8. Arrangement according to claim 7, characterized in that the emitters (El, E2) of the transistors (Tl, T2) are connected to ground (M) and the collectors (Kl, K2) of the transistors are connected to the output (A) of the generator circuit (1).

9. Arrangement according to one of claims 4 to 8, d a d u r c h g e k e n n z e i c h n e t that the tuning circuit is designed as a capacitance diode circuit (4).

10. The arrangement according to claim 9, characterized in that the capacitance diode circuit (4) is formed by a series circuit of a varactor diode (VI) and a capacitor (Cl), wherein the output (A) of the generator circuit (1) with one in series between the capacitor and the varactor diode connected node (4A) is connected.