DE102004021441A1 - Method for compensating a temperature-induced frequency error of a quartz crystal - Google Patents

Abstract

A method for compensating a temperature-induced frequency error of a quartz crystal of a real-time clock, in particular for mobile radio terminals, GPS receivers or the like, wherein the frequency error (df / f) descriptive frequency error temperature curve at least in a temperature interval piecewise by a temperature-dependent characteristic of an electronic circuit is approximated and generated from a compensation voltage-temperature curve obtained as a result of the piecewise approximation, a temperature-dependent compensation voltage (Ust) and is applied for a frequency tuning of the quartz crystal.

Description

RF modules and mobile devices, operated according to the GSM mobile standard specifications be included as frequency normal and timer as a real time clock (Real Time Clock = RTC) means for measuring time. This device is also active in the off state and allows after switching on the device a time determination with a corresponding accuracy.

The Frequency-determining component of the real-time clock is usually through a quartz crystal in the form of a quartz crystal (fork generator) formed in a crystal oscillator circuit in the GSM mobile radio system oscillates at a nominal frequency of 32,768 Hz. For the construction of the real-time clock or the crystal of the quartz crystal requirements must be lower Material and development costs in connection with a possible low area consumption of the device met be. Furthermore, for the real-time clock, especially for the off mode, a sufficiently low power consumption required by less than 500 nA. Finally, for the quartz crystal a very close frequency tolerance of the order of ± 20ppm and one opposite Temperature fluctuations very high frequency stability be met.

Already existing frequency compensation methods associated with however, only work in switched-on mode when backing up to the GSM standard a sufficiently accurate frequency stability for the GSM functions of the mobile Terminal. A exact timing is however for time-critical applications, For example, real-time controls, essential. An example of such Time-critical application provides a clock with an integrated GSM module or a GSM telephone In this application, the frequency accuracy of the after known in the prior art embodiments of the real-time clock not sufficient to ensure the required accuracy of the time measurement. The by temperature changes and the associated frequency changes of the quartz crystal caused time errors can be considerable Accept values. Without the compensation algorithm already used in GSM mode adds up the frequency error caused by the temperature to an error of up to 50 min / year.

default is a frequency error compensation in the GSM mobile environment the real-time clock through a baseband processor, and above all a continuous calibration with the common in the GSM system 13/26 MHz GSM clock running becomes. This can significantly improve the accuracy during GSM operation elevated and the time deviation is reduced to less than 10 min / year. For the Applicability of this method, however, is the indispensable Main condition that the GSM baseband switched on all the time must be, so that the compensation algorithm can be activated. These permanent Activation is associated with high power consumption and is extremely disadvantageous due to the greatly reduced standby time. Furthermore is the activation of the compensation procedure in the off Operating mode in which the real-time clock continues to run as timer, not possible.

A further correction option the temperature-induced frequency error of the real-time clock is through the use of temperature-stabilized quartz modules is given. These However, due to their constructive effort are very expensive and therefore allow for reasons the economy is not widely used in mobile GSM terminals.

Finally, references can from other time sources, such as the GPS system or known Time transmitters are used. For this, however, the GSM terminals must with additional Facilities and functionalities for the Reception and processing of this the GSM system itself foreign Signalers are equipped, which reduces the structure of the devices in part unnecessary complicated.

It Thus, the task results, a method for compensation of the by temperature changes caused real time clock frequency error in a device of the above mentioned Specify type, in an easily realizable, cost-effective and power-saving manner, the frequency error of the real-time clock largely compensated and the resulting timing errors sustainably reduced can be. Next is a corresponding circuit to be provided.

The solution The object is achieved by a method having the features of the claim 1 and an arrangement with the features of claim 4, wherein the under claims comprise at least advantageous or expedient embodiments.

The temperature-dependent frequency error of the quartz crystal is described by a frequency error-temperature curve. As a result, the course of the frequency error within a given temperature interval is known per se. The compensation method according to the invention utilizes this circumstance, in which, within this temperature interval, sections of the frequency error-temperature curve through temperature-dependent characteristic curves of an electronic circuit ap with sufficient approximation be approximated. These piecewise approximations are used to generate a compensation voltage with a temperature-dependent compensation voltage curve. From this, the compensation voltage required for a currently applied temperature is determined and generated to correct the frequency error. The compensation voltage thus determined influences the frequency of the quartz crystal and thus compensates for the temperature-induced frequency error of the quartz crystal in the real-time clock.

One Access to a baseband or a connection of a baseband processor deleted thus complete. There is a by the currently prevailing temperature conditions even certain compensation of the frequency error. This compensation done by the electronic circuit in a self-sufficient manner and is in particular also in a switched off, that is in particular one not furnished on receipt, or in one by one minimal power consumption marked state of the mobile device active and executable.

at a given within the temperature interval frequency error temperature curve with a parabolic Shape is the compensation voltage in a first temperature sub-interval with a linearly increasing temperature-dependent course and in one second temperature sub-interval with a linearly decreasing temperature-dependent course generated. The rising or falling parabolic branches of the frequency error-temperature curve are thus in this embodiment by a linear rising or falling temperature characteristic of the approximated compensation voltage generated. Ultimately, the Compensation voltage due to a superposition of two temperature characteristics generated, in particular the mentioned rising and falling temperature characteristic.

A circuit arrangement for carrying out the mentioned method is characterized by the following components:
The arrangement initially has a temperature-dependent compensation voltage generating electronic circuit (generator circuit) of a temperature-dependent resistor in conjunction with an electronic switching and amplifying element and further adjoining an output of the generator circuit tuning circuit for a quartz crystal having the quartz crystal circuit. The temperature-dependent resistor is in the generator circuit, the temperature-sensitive device. In conjunction with the switching and amplifying element used so that a circuit is realized, which generates the aforementioned compensation voltages with the corresponding temperature characteristic. The tuning circuit tunes in accordance with the compensation voltage, the frequency of the quartz crystal in the crystal oscillator circuit and thereby compensates the given temperature-dependent frequency deviation of the quartz crystal.

In an expedient embodiment is the temperature-dependent Resistance as a hot conductor (NTC) resistor formed with a negative temperature coefficient. The term "NTC" is hereby a abbreviation for the Term "negative temperature coefficient ". in principle are also, in a suitable circuit arrangement, cold conductive (PTC) resistors used.

In an embodiment is as a switching and reinforcing element (Each) a transistor provided, wherein the generator circuit is designed in particular as a two-stage transistor circuit. A such embodiment is superpositioned in particular with regard to the production mentioned above rising or falling temperature curves appropriate.

Conveniently, the NTC resistor of the first transistor stage is in series with the base of the first transistor and the NTC resistor of the second Transistor stage parallel to the base of the second transistor. Consequently the first stage realizes a rising or falling temperature characteristic, while the second stage complementary to a falling or rising temperature characteristic generated, the be superpositioned at the output of the two-stage circuit and affect the tuning circuit.

The Emitters of the transistors are suitably grounded, and the collectors of the transistors are at the output of the generator circuit connected.

The Tuning circuit is preferable as a capacitance diode circuit educated. Such a circuit allows a particularly simple Tuning option for the compensation voltages generated by the compensation circuit for the Influencing the frequency response of the quartz crystal.

The Capacity diode circuit is in a further preferred embodiment as a series circuit of a varactor diode and a capacitor educated. The output of the generator circuit is located at an in Row connected between the capacitor and the varactor diode Junction.

In a modified embodiment of the generator circuit are as switching and amplifying elements operational amplifier in the scarf arranged. The other structure of the arrangement, in particular the interconnection of the electronic components, optionally remains substantially unchanged.

The inventive method or the corresponding circuit will now be based on an embodiment in conjunction with figures closer explained become. It will be for the same or equivalent parts or processes the the same reference numerals used.

It shows

1a a frequency error-temperature diagram with an exemplary frequency error-temperature curve,

1b a voltage-temperature diagram with an exemplary compensation voltage characteristic and

2 a circuit diagram of a circuit arrangement.

1 shows a typical course of the frequency error-temperature curve for a quartz crystal in a real-time clock of a mobile phone or a radio module in a GSM mobile network. The temperature interval on the abscissa shown in the curve in this example comprises a temperature range of almost 90 K and extends from about -20 ° C to about 70 ° C. The ordinate on the left shows the relative temperature-dependent frequency error df / f in ppm parts and on the right the resulting time error in min / year. Like the diagram 1a can be seen, the relative frequency error curve shows a parabolic course.

In a first, called low-temperature region temperature sub-interval .DELTA.T1 in the range from approx. -20 ° C to approx. 10 ° C, the falls relative frequency error of -100ppm down to about -30ppm from. The vertex of the frequency error parabola is relatively flat and merges into a falling parabolic branch, the in an exemplary temperature part interval ΔT2 in the range designated as the high-temperature region of about 40 ° C up to approx. 70 ° C lies. The relative frequency error increases in this area in the first place approximation symmetrical with respect to the vertex of the parabola again down to values of up to -100ppm at.

In order to correct this frequency error profile and to generate a suitable compensation voltage, the parabolic profile is approximated by piecewise approximations in the temperature subintervals ΔT1 and ΔT2, and a corresponding compensation voltage Ust dependent on the temperature is generated. In the diagram in 1b this approximation is exemplified by a series of linear temperature-dependent voltage characteristics. It goes without saying that, in principle, any temperature-dependent characteristic curve form can be used for approximating the frequency error curve or for describing the temperature-dependent compensation voltage characteristic, provided that it reproduces the shape of the frequency error curve to a sufficient degree of accuracy.

In 1b an exemplary temperature-dependent profile of such a characteristic of the compensation voltage Ust is shown. One recognizes a gradient rising linearly in the first temperature subinterval ΔT1 and a course decreasing linearly in the second temperature subinterval ΔT2. In between there is a temperature range with a substantially constant value of the compensation voltage. As compared with 1a can be seen, the rising or falling branch of the parabola of the frequency error-temperature curve is approximated by the piece-wise juxtaposed portions of the rising, constant and falling values of the compensation voltage Ust. These sections form the T-dependent compensation voltage curve given in this exemplary embodiment by a polygon to compensate for the in 1a shown temperature-frequency error curve of the quartz crystal and thus the real-time clock of the GSM mobile device.

The in 1b The functional curve shown is thus the result of a superposition of a rising and a falling temperature characteristic with an increasing Ust curve in a lower temperature range and a falling Ust curve in an upper temperature range.

2 shows a circuit diagram of a circuit for generating the temperature characteristics, their superposition and the compensation voltage curve generated thereby. Centerpiece of in 2 shown arrangement is a two-stage generator circuit 1 coming from a first stage 2 and a second stage 3 is executed. To this two-stage generator circuit is a tuning circuit in the form of a capacitance diode circuit 4 coupled. This agrees a quartz crystal circuit 5 temperature dependent.

In the following explanation of in 2 Compensation circuit shown in the treatment of the two-stage circuit 1 and in particular the stages 2 and 3 assumed a realization in the form of transistor stages or circuits. In this case, reference is made to npn transistors by way of example, the application of Pnp transistors or field effect transistors or other switching and amplifying elements, in particular of operational amplifiers and the like electronic components, in principle in the context of expert action is also possible. For reasons of a simple and cost-effective circuit variant and the lowest possible power consumption of less than 50 μA, the use of npn transistors is preferred.

During operation, both transistor stages generate 2 and 3 for the in 1b shown first and second temperature range, the temperature-dependent compensation voltage according to the temperature characteristics shown there and output this as output voltage. This serves as a control signal for the capacitance diode circuit 4 ,

The following is the generator circuit 1 from the first transistor stage 2 or the second transistor stage 3 explained in more detail. As temperature-sensitive components, reference is made in the following exemplary embodiment to thermally conductive or NTC resistors. The use of cold conductive resistors with a positive temperature coefficient, so-called PTC resistors, is also possible with a corresponding change in the circuit structure.

All further resistances within the circuit show an ohmic resistance characteristic and can as galvanic resistances accomplished be. They point expediently in the required temperature range sufficiently constant resistance values on. The circuit itself, in particular the two-stage compensation circuit or each of the two transistor stages, may optionally also as a be formed integrated circuit.

Of considerable importance for the functionality of the embodiment explained below, on the one hand, the choice of appropriate NTC resistors, in particular with regard to appropriate temperature coefficients, in conjunction with a matched selection of the corresponding type of transistor and an appropriate choice of appropriate operating points of the transistor stages based thereon. Furthermore, for the capacitance diode circuit 4 a varactor diode having a sufficiently large tuning range of the inner junction capacitance tuned to the compensation voltage generated by the compensation circuit is provided.

The electronic components of the first transistor stage 2 are connected between a first voltage source VRTC and a designated as VBATT voltage source and ground M.

A parallel circuit of a first resistor with a negative temperature coefficient NTC1 and a galvanic resistor R21 connected to the voltage source VRTC is connected in series with a galvanic resistor RV1 with ground contact M. The base B1 of a transistor T1 is connected to a node located between the parallel circuit of NTC1 and R21 and the galvanic resistor RV1 2A connected to the resistor RV1. The collector K1 of the transistor T1 is connected via a series-connected galvanic resistor RC1 to the voltage source VBATT. Via a node located between the collector K1 and the resistor RC1 2C and one between the parallel connection of NTC1 and R21 and the node 2A arranged node 2 B In addition, a resistor R11 connecting the collector K1 to the base B1 of the transistor T1 is inserted. The emitter E1 of the transistor T1 is connected to the ground M1. Furthermore, the node 2C with the output A of the circuit 1 connected.

The structure of the circuit of the second transistor stage 3 is similar to the structure of the first transistor stage 2 , The electronic components of this transistor stage are arranged between the voltage source VRTC and ground M. A galvanic resistor RV2 connected to the voltage source VRTC passes through the nodes 3A and 3B to a node 3D , At the junction 3D a parallel connection arises from a resistor with negative temperature coefficient NTC2 and a galvanic resistance R22. These are each connected to mass M.

The transistor T2 of the second transistor stage 3 is at its base B2 with the node 3B connected. The emitter of the transistor T2 is connected to ground M. The collector K2 of the transistor T2 is connected to a node 3C connected. Between the node 3C and the node 3A a galvanic resistor R12 connecting the collector K2 and the base B2 of the transistor T2 is inserted. The node 3C is still connected to the output A of the compensation circuit 1 connected.

The output A of the two-stage circuit 1 is via a galvanic resistor RD with the tuning circuit in the form of the capacitance diode circuit 4 connected. This consists in the embodiment in 3 a varactor diode V1 connected in series with a capacitor C1. That of the output A of the two-stage circuit 1 outgoing current path terminates in the embodiment 3 at a node connected in series 4A between capacitor C1 and varactor diode V1. The varactor diode V1 is connected in the direction of ground M in the reverse direction. The wiring via the capacitor C1 branches at a node 4B in the direction of another node 6A in a baseband control (gate) 6 and in the direction of the quartz crystal circuit 5 , The oscillating crystal circuit consists of that between the node 4B and a node 5A switched quartz crystal SC. Between the node 5A and the mass M, a capacitor C2 is additionally inserted in the crystal oscillation circuit.

During operation, the changes from the two-stage transistor circuit 1 generated compensation voltage according to the respective present temperature conditions, the junction capacitance of the varactor diode in the capacitance diode circuit 4 , At the same time, according to this variable capacitance, the crystal oscillation circuit becomes 5 Temperature-dependent tuned and thus compensated for the frequency deviation of the real time clock.

The constructed according to this embodiment circuit for frequency error compensation is characterized by a low power consumption in the range of less than 50 microamps and is therefore readily usable even in a quasi-off operation of the mobile terminal. Furthermore, the circuit is constructed entirely of standard electronic components. Therefore, the electronic components used to realize the circuit prove to be extremely inexpensive. In a mass production of the exemplary circuit 2 can be expected from material costs of less than 0.25 EUR per circuit.

1

two stage generator circuit

2

first step

2A, 2B, 2C

junction

3

second step

3A, 3B, 3C, 3D,

junction

4

Capacity diode circuit

4A, 4B

5

Quartz oscillator circuit

5A

junction

6

Baseband control

6A

junction

A

output generator circuit

C1, C2

capacitor

M

Dimensions

NTC1, NTC2

resistance with negative T-coefficient

RC1, R11, R12, R21

R22, RC1, RD, RV1, RV2

galvanic resistance

T1, T2

transistor

B1, B2

Base

E1, E2

emitter

K1, K2

collector

V1

varactor

SC

quartz crystal

ΔT1, ΔT2

Temperature subinterval

Ust

compensation voltage

df / f

relative frequency error

Claims (10)

A method for compensating a temperature-induced frequency error of a quartz crystal of a real-time clock, in particular for mobile devices, GPS receivers or the like, characterized in that - a frequency error (df / f) descriptive frequency error temperature curve at least in a temperature interval (T) piecewise is approximated by a temperature-dependent characteristic of an electronic circuit, and - a temperature-dependent compensation voltage (Ust) is generated from a compensation voltage-temperature curve obtained as a result of the piecemeal approximation and applied for frequency tuning of the quartz crystal. Method according to claim 1, characterized in that that at a given within the temperature interval (T) Frequency error-temperature curve with a parabolic shape the compensation voltage in a first temperature subinterval (ΔT1) with a, in particular linear, rising temperature-dependent course and in a second partial temperature interval (ΔT1) with one, in particular linear, falling temperature-dependent History is generated. Method according to claim 2, characterized in that that the compensation voltage (Ust) by a superposition off at least two characteristic curves, in particular those in the temperature interval (ΔT1) increasing and the temperature falling in the temperature interval (ΔT2) Characteristic curve is generated. Circuit arrangement for carrying out a method according to one of Claims 1 to 3, characterized by a generator circuit generating a temperature-dependent compensation voltage ( 1 ) having at least one temperature-dependent resistor (NTC1, NTC2) and at least one electronic switching and amplifying element and a tuning circuit provided at an output (A) of the compensation circuit ( 4 ) for a quartz crystal (SC) having quartz crystal circuit ( 5 ). Circuit arrangement according to claim 4, characterized in that the or each tempera turabhängige resistance as NTC resistor (NTC1, NTC2) is formed. Circuit arrangement according to claim 4 or 5, characterized characterized in that the or each switching and reinforcing element is formed by a transistor or operational amplifier. Arrangement according to claim 5 or 6, characterized in that a first NTC resistor (NTC1) of a first transistor stage ( 2 ) a series circuit with the base (B1) of a first transistor (T1) and a second NTC resistor (NTC2) of a second transistor stage ( 3 ) forms a series connection with the base (B2) of a second transistor (T2). Arrangement according to Claim 7, characterized in that the emitters (E1, E2) of the transistors (T1, T2) are connected to ground (M) and the collectors (K1, K2) of the transistors are connected to the output (A) of the generator circuit ( 1 ) are switched. Arrangement according to one of claims 4 to 8, characterized in that the tuning circuit as a capacitance diode circuit ( 4 ) is trained. Arrangement according to Claim 9, characterized in that the capacitance diode circuit ( 4 ) is formed by a series connection of a varactor diode (V1) and a capacitor (C1), wherein the output (A) of the generator circuit ( 1 ) with a node connected in series between the capacitor and the varactor diode ( 4A ) connected is.