WO2005089303A2 - Self-aligned silicon carbide semiconductor device - Google Patents
Self-aligned silicon carbide semiconductor device Download PDFInfo
- Publication number
- WO2005089303A2 WO2005089303A2 PCT/US2005/008526 US2005008526W WO2005089303A2 WO 2005089303 A2 WO2005089303 A2 WO 2005089303A2 US 2005008526 W US2005008526 W US 2005008526W WO 2005089303 A2 WO2005089303 A2 WO 2005089303A2
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- Prior art keywords
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- type sic
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- semiconductor device
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- 239000004065 semiconductor Substances 0.000 title claims description 20
- 229910010271 silicon carbide Inorganic materials 0.000 title abstract description 72
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title abstract description 65
- 238000000034 method Methods 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 229910052751 metal Inorganic materials 0.000 claims abstract description 23
- 239000002184 metal Substances 0.000 claims abstract description 23
- 238000000151 deposition Methods 0.000 claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 claims abstract description 10
- 239000003989 dielectric material Substances 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 239000002019 doping agent Substances 0.000 claims description 8
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052681 coesite Inorganic materials 0.000 claims description 4
- 229910052906 cristobalite Inorganic materials 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 229910052682 stishovite Inorganic materials 0.000 claims description 4
- 229910052905 tridymite Inorganic materials 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 230000000694 effects Effects 0.000 abstract description 6
- 230000008020 evaporation Effects 0.000 abstract description 2
- 238000001704 evaporation Methods 0.000 abstract description 2
- 108091006146 Channels Proteins 0.000 description 11
- 239000000463 material Substances 0.000 description 11
- 230000005527 interface trap Effects 0.000 description 5
- 238000001465 metallisation Methods 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000003949 trap density measurement Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 102000004129 N-Type Calcium Channels Human genes 0.000 description 2
- 108090000699 N-Type Calcium Channels Proteins 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000013590 bulk material Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- UJXZVRRCKFUQKG-UHFFFAOYSA-K indium(3+);phosphate Chemical compound [In+3].[O-]P([O-])([O-])=O UJXZVRRCKFUQKG-UHFFFAOYSA-K 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 239000000700 radioactive tracer Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
- WGPCGCOKHWGKJJ-UHFFFAOYSA-N sulfanylidenezinc Chemical compound [Zn]=S WGPCGCOKHWGKJJ-UHFFFAOYSA-N 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
- 229910052984 zinc sulfide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
- H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
- H01L29/66863—Lateral single gate transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
- H01L29/8128—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate with recessed gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
Definitions
- the present application relates generally to semiconductor devices and, in particular, to self-aligned silicon carbide power MESFETs and to a method of
- MMICs bandwidth monolithic microwave integrated circuits
- the interface state density remains in the 10 12 range [4].
- a method of making a semiconductor device comprises: selectively etching a first layer of n-type SiC on a second layer of n-type SiC using a metal etch mask on the first layer of n-type SiC, wherein the second layer of n-type SiC is less heavily doped with an n-type dopant than the first layer
- etching comprises etching through
- ohmic contacts on upper surfaces of the raised regions; depositing one or more layers of dielectric material on exposed surfaces of the first and second layers of n-type SiC including the bottom surface and sidewalls of the one or more recesses; anisotropically etching through the one or more dielectric layers on the
- an n-type SiC layer which is more heavily doped with an
- n-type dopant than the second n-type SiC layer can be positioned between the
- Depositing one or more layers of dielectric material may comprise depositing a layer of SiO 2 on exposed surfaces of the first and second layers of n-type SiC. Depositing one or more layers of dielectric material may also comprise depositing a layer of Si 3 N 4 and subsequently
- a semiconductor device depositing a layer of SiO 2 on exposed surfaces of the first and second layers of n- type SiC.
- the metal etch mask may comprise nickel or aluminum.
- a semiconductor device is
- a SiC substrate layer comprising: a SiC substrate layer; a buffer layer of a p-type SiC on the SiC substrate layer; a channel layer of n-type SiC on the buffer layer, the channel layer
- the source/drain layer is more heavily doped with an n-type dopant than the channel layer; metal contacts on the source/drain layer of n-type SiC; a gate region of a Schottky metal on the bottom surface of at least one
- the gate region forms a rectifying junction with the channel layer and wherein the gate region is aligned between the sidewalls of the recess.
- the gate region can be in contact with the one or more dielectric layers on the sidewalls of the recess.
- the gate region can be spaced from the one or more dielectric layers on the sidewalls of the recess.
- the semiconductor device may further comprise an n-type SiC layer which is more
- Figure 1 is a schematic cross-section of a SiC power MESFET.
- Figure 2A is a schematic cross-section of a self-aligned SiC power MESFET according to a first embodiment.
- Figure 2B is a schematic cross-section of a self-aligned SiC power MESFET according to a second embodiment.
- Figure 3 is a comparison of the current flow and DC IV characteristics of a
- Figure 4 is a schematic process flow for the fabrication of a self-aligned SiC MESFET.
- Figure 5 includes SEM photographs of the test structures used for the
- FIG. 1 shows a schematic cross-section of a SiC MESFET 10 fabricated on a semi-insulating substrate 12 with a p-type buffer layer 14.
- the SiC MESFET 10 also comprises an n-type channel layer 16, an n-type source region 18, an n-type drain region 19, and source 20, gate 22 and drain 24
- FIG. 2A shows a schematic cross-section of a self-aligned power SiC
- the device comprises a semi-insulating substrate 1, a p-type SiC buffer layer 2, an n- type SiC channel 3, source and drain fingers 26 formed in the channel and separated by a gate recess 28, and n+ source and n+ drain layers 4.
- the device as shown in Figure 2A also includes source and drain ohmic contacts 5 and a Schottky contact 6. Also shown are source, drain and gate contacts 8 formed via self-aligned metallization.
- the device structure includes a surface passivation layer 7.
- Figure 2B shows a schematic cross-section of a self-aligned power SiC
- MESFET structure according to a second embodiment.
- the device shown in Figure 2B is similar in structure to the device shown in Figure 2A. This device,
- n-type layer 3 a also includes an optional n-type layer 3 a.
- the devices shown in Figures 2A and 2B include a surface passivation layer 7. However, even under conditions where the surface trap density is high, the
- Figure 3 shows a comparison of current flows in a conventional device
- Figure 3 is a comparison of the current flow and DC I-N characteristics of a conventional (left figure) and a
- the gate of a power SiC MESFET can be formed using a
- FIG. 4 A schematic process flow for self-aligned SiC MESFET fabrication is shown in Figure 4. This diagram shows only the self-aligned process, and does not include, for example, the device mesa isolation and air ⁇
- Step 4 Source and Drain finger definition.
- Step 2 Single- or multilayer dielectric film growth or deposition.
- Step 3 Anisotropic plasma etching through the dielectric layers and source/drain ohmic contact anneal.
- Step 4 Deposition of Schottky contact and final metal using evaporation or other anisotropic deposition technique.
- Step 5 Isotropic etch of dielectric layer or layers (optional). Device mesa isolation and air-bridge formation can be performed using known methods.
- Figure 5 illustrates the results of using a gate metallization process that
- source/gate line widths varying from 1 ⁇ m to 2 ⁇ m, and have received source/gate Au metallization at a thickness of 5 kA.
- a close-up SEM picture of the test structure with source/gate line widths of 1 ⁇ m/1 ⁇ m is shown on the left side of
- the source- to-gate breakdown voltage is related to the depth of the gate recess and can be adjusted within a wide range.
- the self-aligned process described herein is truly self-aligned because
- a conducting SiC substrate (either of n-type or p-type) can be used.
- Another exemplary substrate material that can be used is a conducting SiC
- Silicon carbide crystallizes in numerous (more than 200) different substrate material
- the SiC layers of the self-aligned structure can be formed by doping the layers with donor or acceptor materials using known techniques.
- exemplary donor materials include nitrogen and phosphorus. Nitrogen is preferred donor material.
- exemplary acceptor materials for doping SiC include boron and aluminum.
- Aluminum is a preferred acceptor material.
- the above materials are merely exemplary, however, and any acceptor and donor materials which can be doped
- layers of self-aligned power SiC MESFET described herein can be varied to produce a device having desired characteristics for a particular application.
- the dimensions of the various features of the device can also be varied to produce a device having desired characteristics for a particular application.
- the SiC layers can be formed by epitaxial growth on a suitable substrate.
- the layers can be doped during epitaxial growth.
- Exemplary doping concentration ranges for the SiC epitaxial layers of the device are as follows: n-type source/drain: > 5xl0 18 cm “3 ; n-type channel: ⁇ lxlO 17 cm “3 (e.g., ⁇ 5xl0 16 cm “3 ); optional n-type layer: 5xl0 16 cm “3 - 3xl0 17 cm “3 ; and p-type buffer: lxlO 15 cm “3 - 3xl0 17 cm “3 (e.g., 3xl0 15 cm "3 - 3xl0 17 cm “3 ). While the foregoing specifications teaches the principles of the present
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Junction Field-Effect Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
Claims
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007503110A JP5101273B2 (en) | 2004-03-12 | 2005-03-14 | Self-aligned silicon carbide semiconductor device and method for making the device |
EP05725593.7A EP1726043B1 (en) | 2004-03-12 | 2005-03-14 | Self-aligned silicon carbide or gallium nitride semiconductor devices and methods of making the same |
KR1020127014340A KR101259330B1 (en) | 2004-03-12 | 2005-03-14 | Self-aligned silicon carbide semiconductor devices and methods of making the same |
NZ549359A NZ549359A (en) | 2004-03-12 | 2005-03-14 | Self-aligned silicon carbide semiconductor devices and methods of making the same |
CA002557702A CA2557702A1 (en) | 2004-03-12 | 2005-03-14 | Self-aligned silicon carbide semiconductor devices and methods of making the same |
AU2005222981A AU2005222981B2 (en) | 2004-03-12 | 2005-03-14 | Self-aligned silicon carbide semiconductor device |
KR1020067018730A KR101318090B1 (en) | 2004-03-12 | 2005-03-14 | Self-aligned silicon carbide semiconductor devices and methods of making the same |
CN200580008008.1A CN101040387B (en) | 2004-03-12 | 2005-03-14 | Self-aligned silicon carbide semiconductor devices |
HK07101025.0A HK1094278A1 (en) | 2004-03-12 | 2007-01-29 | Self-aligned silicon carbide or gallium nitride semiconductor devices and methods of making the same |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US55239804P | 2004-03-12 | 2004-03-12 | |
US60/552,398 | 2004-03-12 | ||
US11/076,857 US7470967B2 (en) | 2004-03-12 | 2005-03-11 | Self-aligned silicon carbide semiconductor devices and methods of making the same |
US11/076,857 | 2005-03-11 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2005089303A2 true WO2005089303A2 (en) | 2005-09-29 |
WO2005089303A3 WO2005089303A3 (en) | 2007-04-05 |
Family
ID=34922300
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2005/008526 WO2005089303A2 (en) | 2004-03-12 | 2005-03-14 | Self-aligned silicon carbide semiconductor device |
Country Status (10)
Country | Link |
---|---|
US (2) | US7470967B2 (en) |
EP (1) | EP1726043B1 (en) |
JP (1) | JP5101273B2 (en) |
KR (2) | KR101259330B1 (en) |
CN (1) | CN101040387B (en) |
AU (1) | AU2005222981B2 (en) |
CA (1) | CA2557702A1 (en) |
HK (1) | HK1094278A1 (en) |
NZ (1) | NZ549359A (en) |
WO (1) | WO2005089303A2 (en) |
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JP2009542005A (en) * | 2006-06-19 | 2009-11-26 | セミサウス ラボラトリーズ インコーポレイテッド | Silicon carbide and related wide band gap transistors on semi-insulating epitaxy |
US8890277B2 (en) | 2010-03-15 | 2014-11-18 | University Of Florida Research Foundation Inc. | Graphite and/or graphene semiconductor devices |
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US20100013009A1 (en) * | 2007-12-14 | 2010-01-21 | James Pan | Structure and Method for Forming Trench Gate Transistors with Low Gate Resistance |
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US7560325B1 (en) * | 2008-04-14 | 2009-07-14 | Semisouth Laboratories, Inc. | Methods of making lateral junction field effect transistors using selective epitaxial growth |
US20100038715A1 (en) * | 2008-08-18 | 2010-02-18 | International Business Machines Corporation | Thin body silicon-on-insulator transistor with borderless self-aligned contacts |
US8278666B1 (en) * | 2009-09-25 | 2012-10-02 | Northrop Grumman Systems Corporation | Method and apparatus for growing high purity 2H-silicon carbide |
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US9093395B2 (en) * | 2011-09-02 | 2015-07-28 | Avogy, Inc. | Method and system for local control of defect density in gallium nitride based electronics |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5409849A (en) | 1990-01-24 | 1995-04-25 | Kabushiki Kaisha Toshiba | Method of manufacturing a compound semiconductor device having gate electrode self-aligned to source and drain electrodes |
EP0668610A2 (en) | 1990-10-30 | 1995-08-23 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a schottky gate field effect transistor |
US5925895A (en) | 1993-10-18 | 1999-07-20 | Northrop Grumman Corporation | Silicon carbide power MESFET with surface effect supressive layer |
WO2001086727A2 (en) | 2000-05-10 | 2001-11-15 | Cree, Inc. | Silicon carbide metal-semiconductor field effect transistors and methods of fabricating silicon carbide metal-semiconductor field effect transistors |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07107906B2 (en) * | 1987-10-30 | 1995-11-15 | 株式会社東芝 | Method for manufacturing semiconductor device |
JPH01117366U (en) * | 1988-01-30 | 1989-08-08 | ||
US5270554A (en) | 1991-06-14 | 1993-12-14 | Cree Research, Inc. | High power high frequency metal-semiconductor field-effect transistor formed in silicon carbide |
US5399883A (en) | 1994-05-04 | 1995-03-21 | North Carolina State University At Raleigh | High voltage silicon carbide MESFETs and methods of fabricating same |
JPH08115924A (en) * | 1994-08-22 | 1996-05-07 | Matsushita Electric Ind Co Ltd | Field effect transistor and its manufacture |
US5686737A (en) | 1994-09-16 | 1997-11-11 | Cree Research, Inc. | Self-aligned field-effect transistor for high frequency applications |
US5543637A (en) | 1994-11-14 | 1996-08-06 | North Carolina State University | Silicon carbide semiconductor devices having buried silicon carbide conduction barrier layers therein |
JP3158973B2 (en) | 1995-07-20 | 2001-04-23 | 富士電機株式会社 | Silicon carbide vertical FET |
EP0851460B1 (en) * | 1996-12-24 | 1999-11-03 | Advantest Corporation | Gun lens for generating a particle beam |
JPH10209435A (en) * | 1997-01-20 | 1998-08-07 | Nec Corp | Semiconductor device and its manufacturing method |
JPH10209182A (en) * | 1997-01-23 | 1998-08-07 | Mitsubishi Electric Corp | Field-effect transistor and its manufacture |
WO1998035389A1 (en) * | 1997-02-07 | 1998-08-13 | Northrop Grumman Corporation | Silicon carbide power mesfet |
JPH11283994A (en) * | 1998-03-30 | 1999-10-15 | Toshiba Corp | Multi-finger type field effect transistor |
US6159781A (en) | 1998-10-01 | 2000-12-12 | Chartered Semiconductor Manufacturing, Ltd. | Way to fabricate the self-aligned T-shape gate to reduce gate resistivity |
EP1358681A4 (en) | 2001-01-03 | 2008-04-30 | Univ Mississippi | Silicon carbide and related wide-bandgap transistors on semi-insulating epitaxy for high-speed, high-power applications |
WO2003075319A2 (en) * | 2001-07-12 | 2003-09-12 | Mississippi State University | Self-aligned transistor and diode topologies |
US6906350B2 (en) * | 2001-10-24 | 2005-06-14 | Cree, Inc. | Delta doped silicon carbide metal-semiconductor field effect transistors having a gate disposed in a double recess structure |
JP2004150538A (en) * | 2002-10-30 | 2004-05-27 | Tadahiro Omi | Heat insulation panel and heating device |
JP2005011915A (en) * | 2003-06-18 | 2005-01-13 | Hitachi Ltd | Semiconductor device, semiconductor circuit module and its manufacturing method |
-
2005
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5409849A (en) | 1990-01-24 | 1995-04-25 | Kabushiki Kaisha Toshiba | Method of manufacturing a compound semiconductor device having gate electrode self-aligned to source and drain electrodes |
EP0668610A2 (en) | 1990-10-30 | 1995-08-23 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a schottky gate field effect transistor |
US5925895A (en) | 1993-10-18 | 1999-07-20 | Northrop Grumman Corporation | Silicon carbide power MESFET with surface effect supressive layer |
WO2001086727A2 (en) | 2000-05-10 | 2001-11-15 | Cree, Inc. | Silicon carbide metal-semiconductor field effect transistors and methods of fabricating silicon carbide metal-semiconductor field effect transistors |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009542005A (en) * | 2006-06-19 | 2009-11-26 | セミサウス ラボラトリーズ インコーポレイテッド | Silicon carbide and related wide band gap transistors on semi-insulating epitaxy |
US8890277B2 (en) | 2010-03-15 | 2014-11-18 | University Of Florida Research Foundation Inc. | Graphite and/or graphene semiconductor devices |
CN114335152A (en) * | 2022-03-02 | 2022-04-12 | 江苏游隼微电子有限公司 | Silicon carbide power semiconductor device and preparation method thereof |
Also Published As
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WO2005089303A3 (en) | 2007-04-05 |
KR101259330B1 (en) | 2013-05-06 |
HK1094278A1 (en) | 2007-03-23 |
CN101040387B (en) | 2010-06-09 |
US20050199882A1 (en) | 2005-09-15 |
KR20070051776A (en) | 2007-05-18 |
CA2557702A1 (en) | 2005-09-29 |
EP1726043A2 (en) | 2006-11-29 |
US7470967B2 (en) | 2008-12-30 |
EP1726043B1 (en) | 2013-11-20 |
US7510921B2 (en) | 2009-03-31 |
NZ549359A (en) | 2009-03-31 |
EP1726043A4 (en) | 2010-11-03 |
KR20120062948A (en) | 2012-06-14 |
CN101040387A (en) | 2007-09-19 |
AU2005222981B2 (en) | 2011-05-26 |
AU2005222981A1 (en) | 2005-09-29 |
JP5101273B2 (en) | 2012-12-19 |
KR101318090B1 (en) | 2013-10-14 |
JP2007529885A (en) | 2007-10-25 |
US20070122951A1 (en) | 2007-05-31 |
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