WO2005084040A1

WO2005084040A1 - A method and a system of double engines sharing memory

Info

Publication number: WO2005084040A1
Application number: PCT/CN2004/000154
Authority: WO
Inventors: Jinyou Xun; Sixin Wu; Jijun Xu
Original assignee: Utstarcom (China) Co., Ltd.
Priority date: 2004-02-27
Filing date: 2004-02-27
Publication date: 2005-09-09
Also published as: CN1902949A; CN100576936C

Abstract

The present invention discloses a communication mechanism of the main control boards which is separated from specific service and constructed on normal CompactPCI bus with the peripheral single boards, which particularly satisfies the communication mechanism of high performance and high reliability required in the communication devices, the communication mechanism completes the switch between the main control boards and peripheral single boards, and between the peripheral single boards, in which the core module is high speed sharing memory engine, in the main control boards which are mutually standby, there have respectively a high speed sharing memory engine, and both the high speed sharing memory engine are hot standby mutually. when one engine fails to work or the main control board which the engine resides fails to work, -another engine takes the work without gap, and any data information won't lost.

Description

Method and system for dual-engine shared memory communication

The present invention relates to a communication system, and includes a dual-engine shared memory communication method and system in a mobile communication system, a fixed communication system, and a data communication system. Background technique

Generally speaking, carrier-grade systems such as mobile communication systems, fixed communication systems, and data communication systems are different from personal application systems. They are systems that require high reliability. And this kind of system is more complicated than the general system, there are many business subsystems in one system, and each business subsystem is interconnected with each other, and a large amount of business data needs to be exchanged with each other. Each subsystem may run on different physical entities, such as different chassis, or between different boards in the same chassis.

When different service subsystems run on different boards of the same chassis, each service subsystem generally exchanges data messages with each other. For example, in

In UTStarcom's signaling gateway, the No. 7 signaling management module and the system HA module are run on the main control board. One of the boards runs the MTP2 module, the one of the boards runs the MTP3 module, and the other board Run the Sigtran module. These modules exchange management messages and transfer protocol packets.

The interaction of data messages between different services has different requirements for the underlying transmission mechanism. For example, some subsystems are sensitive to the delay of the message. For example, in the No. 7 signaling gateway, a message enters the signaling gateway from the traditional No. 7 signaling network, passes through the processing of the gateway, and is output from the IP network. The delay during this period cannot exceed the requirements set by national standards. Some subsystems are not very sensitive to the delay of the message, but are sensitive to whether the message arrives reliably and the message arrives in sequence. For example, in the No. 7 signaling gateway, the signaling management module on the main control board sends a message to the board. Management command. If this command is lost, the signaling link may be unusable. Other subsystems may have large message data blocks, but do not want to fragment the messages, so there are special requirements for the maximum message length. In a complex communication system, communication between various subsystems is unavoidable, and different subsystems have different requirements. Therefore, a communication between subsystems that can meet the different requirements of each subsystem is needed. method.

The following briefly describes the two existing communication mechanisms currently used to solve the above problems.

1. Ethernet-based communication mechanism.

Each board has at least one Ethernet interface, and the board runs the TCP / IP protocol stack. At this time, if each board directly outputs the Ethernet interface, it means that a corresponding switch needs to be equipped outside the system; and if it passes the backplane Ethernet bus of the PIGMG2.16 standard, it means that another system needs to be added to act as Board with switching function. Either way, the communication between the subsystems is built on the TCP / IP protocol stack, which means that if UDP communication is used, there are problems of message loss and sequence arrival, and if TCP communication is used, There are problems that it is difficult to manage all TCP connections and system HA. For example, a single board communicates with the main control board through TCP. When the main control board finds that it has switched to the standby main control board by mistake, the TCP connection is cut off, and the connection between the single board and the main control board needs to be re-established. In this way, the message data of the single board and the main control board will be lost. In addition, no matter whether it is based on TCP or UDP, there may be a problem of message delay, because messages must pass through two complete TCP / IP protocol stacks from one subsystem to another, and the performance of the protocol stack has become a problem that must be solved. .

2. Serial-based communication mechanism.

For this communication mechanism, if there is a need for communication between each board, and between the board and the main control board, these boards must have physical serial lines connected to each other. If you do not design these wires from the backplane, and connect them from the panel or the backplane, the system will be very chaotic; if you connect these serial cables from the backplane, the backplane will not be standard. In addition, if a single-party board is used, there is no way for the third-party board to communicate with its own board. Furthermore, the bandwidth of the serial port will be the bottleneck of communication between the various subsystems.

In view of the above-mentioned special requirements for the development of next-generation communication systems, the above two communication mechanisms each have disadvantages, and neither can meet the requirements of a communication system based on a standard platform.

In addition, the VME bus used in the existing communication mechanism, as a bus standard proposed in the 1980s, has certain limitations, for example, its theoretical bandwidth is 80Mbps, which is as practical as In international applications, it can only reach 40Mbps, while cPCI can theoretically reach 264Mbps. At the same time, there are not many manufacturers supporting VME bus, so it will be very difficult to quickly integrate the boards of other manufacturers and quickly develop new products. Summary of the invention

Therefore, an object of the present invention is to overcome the above problems in the existing communication mechanism, and provide a dual-engine shared memory communication method and system, so as to achieve high performance and high reliability of shared memory.

The invention discloses a communication mechanism of a main control board and a peripheral single board independent of a specific service, which is structured on a standard CompactPCI bus, and particularly meets the high-performance and high-reliability communication mechanism required in communication equipment. This communication mechanism completes data In the communication equipment, the main control board and peripheral boards, and the exchange between the peripheral boards, the core module of which is a high-speed shared memory engine, each of the main control boards backed up each has a high-speed shared memory engine The two shared memory engines are hot backed up to each other, one engine fails, or the main control board is faulty, and the other engine works seamlessly without any loss of data messages.

According to an aspect of the present invention, a communication system is provided, which includes a main main control board that runs a main service module and at least one board that runs a sub-service module, and is characterized in that: the single board includes a physical divided into four parts. The first part stores the message headers of the board sending messages to other boards, the second part stores the message headers of the boards receiving messages from other boards, and the third part stores the message bodies of the boards sending messages to other boards. Four parts store a message body where the board accepts messages from other boards; and the main control board includes a virtual memory for mapping the physical memory of the board.

According to another aspect of the present invention, a service board used in the above-mentioned communication system is provided, which is characterized in that the board includes physical memory divided into four parts, wherein one part stores the board to send messages to other boards The second part stores the message header for the board to receive messages from other boards, the third part stores the message body for the board to send messages to other boards, and the fourth part stores the message body for the board to receive messages from other boards.

According to another aspect of the present invention, a main control used in the above communication system is provided. The board is characterized in that the main control board includes a virtual memory for mapping the physical memory of a service single board used in the communication system.

According to still another aspect of the present invention, a cPCI bus-based dual-engine shared memory communication method is provided, which includes the steps of: a) mapping a board's shared memory to a main control board's virtual memory; b) polling board sharing Memory information header area until an information header is obtained; c) determining the target board according to the obtained information header; d) obtaining the position of the information body in the shared memory and the shared memory information of the target board; and e) starting direct memory reading Write and complete message transfer.

In addition, a computer program product recorded in at least one computer-readable interface is provided, which includes functional description materials for causing the computer to execute the steps of the cPCI bus-based dual-engine shared memory communication method when the computer is used.

According to the above method and system of the present invention, a 64-bit 66M frequency cPCI bus is used to solve the bandwidth problem, a shared bus-based mechanism ensures the order of messages, and a communication method based on direct memory read-write solves the delay in message delivery. When requested. BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 shows the situation where different service subsystems run on different boards of the same chassis;

Figure 2 shows the physical memory allocation of each board and the virtual memory mapping of the master and slave master control boards;

3 is a block diagram showing a structure of a main control board of a communication system according to an embodiment of the present invention;

FIG. 4 shows a flowchart of a main control board when switching between a main and a standby board in a communication system according to an embodiment of the present invention; FIG.

5 shows a flowchart of a process of inserting a new board in a communication system according to an embodiment of the present invention;

FIG. 6 shows a flowchart of a board removal process in a communication system according to an embodiment of the present invention; and

FIG. 7 shows high reliability of a dual-cPCI bus-based engine running the present invention. The shared memory communication method is the basic processing flow performed on the main control board. detailed description

An object of the present invention is to provide a highly reliable communication system and method based on a standard cPCI bus shared memory, and the communication method is independent of any specific service. For example, the communication method according to the present invention can be applied to high-speed and reliable message transmission of each protocol layer in a signaling gateway, and can also be applied to the communication of submodules distributed on each board in a relay gateway. It is used in call server, call information interaction, mirroring, etc. among various business subsystems.

In the following, the present invention is specifically described by taking different service subsystems running on different boards on the same chassis as an example.

It should be pointed out here that the following description is merely exemplary. The present invention is not limited to the case where subsystems running different services are located in the same chassis, but includes that each subsystem runs on different physical entities, such as different Condition of the chassis.

Figure 1 shows a situation in which different service subsystems run on different boards of the same chassis, where each service subsystem exchanges data messages with each other. As shown in FIG. 1, the main service module is run on the main control board and the slave main control board, and each sub-service module is run on the board 1 to the authority N. For example, on the signaling gateway of UTStarcom, the No. 7 signaling management module and the system HA module are run on the main control board, the MTP2 module is run on one of the boards 1 to N, and the board 1 to The MTP3 module runs on board N, and the Sigtran module runs on other boards 1 to N. These modules exchange management messages and transfer protocol packets. The interaction of all these modules is accomplished by the dual-engine high-reliability shared memory communication method of the present invention, which will be described in detail below.

It should also be pointed out here that as a bus standard proposed in the 1980s, the VME bus has certain limitations. For example, its theoretical bandwidth is 80 Mbps, which can only reach 40 Mbps in practical applications, while cPCI can theoretically reach 264 Mbps. In addition, there are not many manufacturers supporting the VME bus. Unlike the cPCI bus, there are many cPCI boards from various third parties that provide various functions. Therefore, as a preferred embodiment, the present invention adopts cPCI The bus is used as a connection bus between the various boards (including the main control board and the single board), which facilitates the rapid integration of the boards of other manufacturers, thereby rapidly developing new products.

According to the communication system of the present invention, each board in the above chassis and the master and slave master control boards are allocated a piece of physical memory of an appropriate size according to specific requirements, and the memory section of each board is divided into four For the most part, see Figures 2 and 3 for physical memory allocation and virtual memory mapping of the master and slave master boards.

As shown in Figure 2, a piece of physical memory PM-DAT is allocated on each board and divided into four parts. Among them, the first part stores the message header P- MQ sent by the board to other boards, the second part stores the message header MPQ that the board accepts messages from other boards, and the third part stores the message body that the board sends messages to other boards. PMD (labeled as DATA in the figure), and the fourth part stores the message body MPD (labeled as DATA in the figure) of the board receiving messages from other boards.

Each of the above four sections is divided into three small sections. For example: In the first part, there are PMQH, PMQN., And PMQL, which means that the board sends messages to other boards PMQH with the highest priority, and boards send messages to other boards PMQN with the normal priority, and boards have low priority Level sends messages to other boards PMQL.

At the same time, the corresponding virtual memory VM-DAT is mapped on the main control board, corresponding to the above-mentioned physical memory PM-D AT of each board respectively.

In addition, as shown in FIG. 3, the main control board also includes a global control block SME-CB, a communication engine management core module SMP, a communication engine management module SMM, an HA management module HAM, a real-time database-message routing standard SM-MRT, And the hot plug detection module HSD not shown. These modules are mirrored on the master and slave control boards.

The global control block SME-CB saves the correspondence between the physical memory of each board PM-D AT and the virtual memory VM-DAT on the main control board.

The communication engine management core module SMP is a module with a very high priority. It continuously queries the first part of the shared memory of each board according to the priority policy. If the communication engine management core module SMP finds that a certain board has a message to send to other boards, it immediately fetches the message from the memory of this board and sends it to the destination subsystem on the destination board.

The communication engine management module SMM has a heartbeat mechanism with each board and manages each board status. The communication engine management module SMM also has a message interface with the system's HA management module HAM, and can stop and start the communication engine management core module SMP.

In addition, according to the communication system of the present invention, a system-level HA management module HAM is run on each main control board. The HA management module HAM manages the health status of the entire system and provides master-slave switching services for the entire system. Once an error occurs in the main control board, it immediately informs the communication engine management module SMM, and the communication engine management module SMM immediately stops the current communication engine management core module SMP. Therefore, the HA management module HAM will change the current main control board to the slave main control board, and change the slave main control board to the main main control board, and notify the communication engine management module SMM. Immediately after the communication engine management module SMM receives the notification, the communication engine management core module SMP is started. In this way, the second communication engine starts immediately. Since the shared memory is stored on the board, there is no loss of message data, and the two communication engines are smoothly switched over.

There is also a real-time database on the main control board-the message routing standard SM-MRT. According to the message routing standard SM-MRT, the communication engine management core module SMP can better distribute messages. If a sub-module on one board needs to send a message to another board, this is easy for the communication engine. It can directly send this message to the destination according to the slot number of the destination board.

However, sometimes the sub-modules on the board do not know the slot number of the destination board, or the target board uses the main or backup or other methods for redundant backup. In this case, the sub-module will use the ID of the destination module for addressing. In this way, the communication engine management core module SMP can translate the module ID into the destination board that is processing the service according to the message routing indicator SM-MRT.

When the destination board is switched, the external management module will cooperate with the communication engine management core module SMP to complete the switching process. Figure 4 shows the process performed by the main control board when the main and standby boards are switched.

First, as shown in FIG. 4, in step SP41, the services on the main board are stopped. When the active board receives notification that it is about to be switched to standby, the local query task on the active board will stop querying. At this time, the messages on the service channel will be cached in the shared memory of this board.

Next, in step SP42, a message that has not been sent on the main board is sent. then, In step SP43, a message not received on the main board is sent to the standby board. Then, in step SP44, the switching between the active and standby boards is completed, and the routing information of the active and standby relationship is updated. The communication engine management core module SMP "retrieves" messages buffered on the old board and sends them to the new board that processes the service. At the same time, the message routing indicator SM-MRT is updated, and subsequent service messages will be sent directly to the new service board. In this process, if the shared memory of the old board cannot be accessed (corresponding to an uncontrolled switchover due to software and hardware exceptions of the old board), the "retrieve" process is skipped, and messages already sent to the old board are lost.

After that, in step SP45, the information receiving and sending service on the new main board is enabled. The new main board starts to query and process services.

Preferably, the extended translation function is connected in the access of the message routing target so as to realize the load sharing function.

In addition, the cPCI has the feature of hot swap (Hot Swap), and the communication system according to the present invention also supports hot swap of a single board in the system. Figures 5 and 6 illustrate the process of inserting and removing a new board, respectively.

As shown in FIG. 5, in step SP51, when a new board is inserted in the chassis, the hot-plug detection module HSD located on the main control board detects the event and judges the board type. When this board supports the shared memory engine, in step SP52, the hot plug detection module HSD configures the PCI interface chip of the board and maps the PCI address for the shared memory on the board. Next, in step SP53, the hot plug detection module HSD notifies the corresponding engine management module SMM of the corresponding parameters.

After that, in step SP54, the communication engine management module SMM starts the heartbeat detection of the board. After the heartbeat detection is successful, at step SP55, the correspondence between the physical memory PM-DAT of the board stored in the global control block SME-CB and the virtual memory VM-DAT on the main control board is updated, and confirmed in step SP56. After the board is activated, the communication engine management core module SMP is controlled to start the communication service for the board. Thereby, the insertion process of the new board is completed.

For the process of removing a board, as shown in FIG. 6, in step SP60, when the hot-swap detection module HSD detects that the pull-out wrench of a certain board is pulled down, the hot-swap detection module HSD is in step SP61. Notify the board driver of this message. And if this board has been enabled To move the shared memory communication service, the hot plug detection module HSD immediately informs the communication engine management module SMM at step SP62.

After that, in step SP63, the communication engine management module SMM controls the communication engine management core module SMP to stop the communication service of the single board. Then, in step SP64, the communication engine management module SMM stops the heartbeat detection of the board, and in step SP65, the board is deregistered from the global control block SME-CB.

After the above operations are completed, the hot-swap detection module HSD board removal processing is notified at step SP66, and the board can be removed and maintained normally in step SP67.

The dual-engine high-reliability shared-memory communication system based on the cPCI bus according to the present invention and the process of hot-plugging a service single board in the system are described in detail above with reference to the accompanying drawings.

The dual-engine high-reliability shared memory communication method based on the cPCI bus according to the present invention will be described in detail below with reference to the accompanying drawings.

FIG. 7 shows a basic processing flow executed on a main control board when a dual-engine high-reliability shared memory communication method based on a cPCI bus is executed according to the present invention.

As shown in FIG. 7, in step SP71, the main control board maps the shared memory of each board to the address space of this board. Next, in step SP72, the board shared memory information and function-slot number mapping are recorded.

After completing the above initialization work, in step SP73, the main control board starts to poll the shared memory header area of the board until a header is obtained.

Then, it is determined in step SP74 whether the destination slot number exists in the information header. If the destination slot number exists in the message header, the information is sent to the board with the slot number specified by the destination slot number in step SP75. After that, the processing flow proceeds to step SP78.

If it is determined in step SP74 that the destination slot number does not exist in the message header, then the information head is sent to the designated function board in step SP76. Then, in step SP77, the destination slot number is translated from the function, the master-backup relationship, and the matching sharing relationship.

Next, in step SP78, the main control board acquires the position of the information body in the shared memory and the shared memory information of the target board, and starts direct memory reading and writing in step SP79 according to the obtained above information. Thus, the transmission of a message is completed at step SP80. After the transmission of one message is completed in step SP80, the processing flow returns to step SP73, and the main control board continues to poll the shared memory information header area of the board for the next message transmission.

In addition, a single board is provided with a set of APIs for specific business modules to conveniently use the communication method according to the present invention. Each business module uses this set of APIs to send messages to and receive messages from other boards. . There is also a local query module on the board, which continuously queries the shared memory block of the second part according to a predetermined priority policy: M-P-Q. If a message arrives, it immediately informs the specific business module to accept the message.

As can be seen from the above specific description, according to the cPCI bus-based dual-engine high-reliability shared memory communication system and method of the present invention, its MPQ / PMQ mechanism makes it possible for Memory reads and writes become possible. The CPU of the main control board only determines the message routing and does not participate in message copying. Since the "single board-single board" communication volume in the system accounts for more than 95% of the entire communication volume, the cPCI bus-based dual-engine high-reliability shared memory communication system and method according to the present invention can be implemented with high performance. data communication.

In addition, since the shared memory exists on the single board, rather than the main control board, when the main control board is switched, the information in the shared memory will not be lost. Thereby, the most basic guarantee conditions are provided to completely guarantee the integrity, uniqueness and order of the messages.

In addition, the SM-MRT mechanism enables the peripheral boards on the cPCI to implement active / standby switchover when communicating with other boards using shared memory. The hot-swap detection and heartbeat detection mechanisms ensure that board failures are detected as fast as possible, thereby ensuring message delay during board switching.

The "retrieval" process ensures the integrity of the message during the board switching process, and the "dual engine" guarantees that the shared memory communication can still be performed normally when the main control board fails.

From this, it can be seen that according to the cPCI bus-based dual-engine high-reliability shared memory communication system and method, the high performance and high reliability of the entire communication system can be achieved.

Although the invention has been described above in terms of preferred embodiments, the invention can be further modified within the spirit and scope of the disclosure. Accordingly, this application covers any variations, uses, or adaptations of the invention by its general principles. In addition, this application is intended to cover The disclosure is based on known or commercial practice that is technically related to the invention and within the limits of the appended claims.

Claims

Rights request

1. A communication system comprising a main main control board running a main service module and at least one board running a sub service module, characterized in that:

The single board includes four parts of physical memory (PM-D AT), where the first part stores the message header (PMQ) of the board to send messages to other boards, and the second part stores the boards that receive messages from other boards. Message header (MPQ), the third part stores the message body (PMD) of the board sending messages to other boards, and the fourth part stores the message body (MPD) of the boards receiving messages from other boards; and

The main board includes a virtual memory (VM-DAT), for mapping the physical memory board (PM-DAT) ₀

2. The communication system according to claim 1, wherein the communication system is based on a cPCI bus.

3. The communication system according to claim 2, characterized in that each part of the physical memory (PM-D AT) divided into four parts is further divided into three small segments of high, medium and low priority.

4. The communication system according to any one of claims 1 to 3, wherein the communication system further comprises a slave main control board having a structure symmetrical to the structure of the master main control board.

5. The communication system according to claim 4, wherein the master control board and the slave control board respectively include:

Global Control Block (SME-CB), which is used to save the correspondence between the physical memory (PM-D AT) of the board and the virtual memory (VM-D AT) on the main control board; and

The communication engine management core module (SMP) polls the first part of the shared memory of the board according to the priority policy. If a board is found to have messages to send to other boards, the message is immediately taken from the memory of this board And send it to the destination subsystem on the destination board.

6. The communication system according to claim 5, wherein the master control board and the slave control board respectively include:

The communication engine management module (SMM) has a heartbeat mechanism with the board to manage the status of the board; and

HA Management Module (HAM), used to manage the health status of the entire system, for the entire system System to provide master-slave switching services; and

The communication engine management module (SMM) also has a message interface with the system's HA management module (HAM), and can stop and start the communication engine management core module (SMP).

7. The communication system according to claim 6, wherein the master control board and the slave control board respectively include a message routing indicator (SM-MRT), and a communication engine management core module (SMP) Messages are distributed according to this message routing indicator (SM-MRT).

8. A service board used in a communication system according to any one of claims 1 to 7, wherein the board includes a physical memory (PM-DAT) divided into four parts, wherein the first part Stores the message header (PMQ) of the board sending messages to other boards, the second part stores the message header (MPQ) of the board receiving messages from other boards, and the third part stores the message body (PMD) of the boards sending messages to other boards ), The fourth part stores the message body (MPD) of the board receiving messages from other boards.

9. The service board according to claim 8, characterized in that each part of the physical memory (PM-D AT) divided into four parts is further divided into three small segments of high, medium and low priority.

10. A main control board used in the communication system according to any one of claims 1 to 7, characterized in that the main control board includes a virtual memory (VM-DAT) for mapping use in the communication system The physical memory of the service board (PM-DAT).

11. The main control board according to claim 10, wherein the physical memory (PM-DAT) is divided into four parts, wherein the first part stores message headers sent by the board to other boards.

(PMQ), the second part stores the message header (MPQ) of the board receiving messages from other boards, the third part is the message body (PMD) that stores the board sending messages to other boards, and the fourth part stores the boards that receive messages from other boards (PMD). The message body (MPD) of the message.

12. The main control board according to claim 11, wherein each part of the physical memory (PM-DAT) divided into four parts is further divided into three small segments of high, medium, and low priority.

13. The main control board according to any one of claims 10 to 12, wherein the main control board further comprises:

Global Control Block (SME-CB), which is used to save the correspondence between the physical memory (PM-DAT) of the board and the virtual memory (VM-D AT) on the main control board; and

Communication Engine Management Core Module (SMP), polling the sharing of boards based on priority policies In the first part of the memory, if a board is found to have messages to send to other boards, the message is immediately taken out from the memory of this board and sent to the destination subsystem on the destination board.

14. The main control board according to any one of claims 10 to 12, wherein the main control board further comprises:

A communication engine management module (SMM), which has a heartbeat mechanism with the board to manage the status of the board; and

HA management module (HAM), which is used to manage the health status of the entire system, and provide the slave switching service for the entire system; and

15. The main control board according to any one of claims 10 to 12, wherein the main control board further comprises a message routing logo (SM-MRT), and the communication engine management core module (SMP) according to the message routing logo (SM-MRT) Distribute messages.

16. A dual-engine shared memory communication method based on a cPCI bus, which is characterized by including steps:

a) Map the shared memory of the board to the virtual memory of the main control board;

b) polling the information header area of the shared memory of the board until an information header is obtained;

c) determining the target board according to the obtained information header;

d) obtaining the position of the information body in the shared memory, the shared memory information of the target board; and

e) Start direct memory read and write, and complete message transmission.

17. The communication method according to claim 16, further comprising a step of recording single board shared memory information and function-slot number mapping before step b).

18. The communication method according to claim 17, wherein step c) comprises the following steps:

Determine whether the destination slot number exists in the information header;

If it is determined that the destination slot number exists in the information header, the information is sent to the board with the slot number specified by the destination slot number; and

If it is determined that the destination slot number does not exist in the message header, the message head is sent to the specified The function board, and translates the destination slot number according to the function, the master-backup relationship, and the sharing relationship.

19. The communication method according to any one of claims 16 to 18, characterized in that the single board constantly queries its shared memory block according to a predetermined priority policy, and immediately informs the specific service if a message arrives The module accepts the message.

20. The communication method according to claim 19, further comprising the following steps when the main and standby single boards are switched:

Stop the services on the main board;

Sending a message that has not been sent on the main board;

Sending a message that is not received on the main board to the standby board;

Update the routing information of the master-backup relationship; and

Enable the message receiving and sending services on the new main board.

21. The communication method according to claim 19, further comprising the following steps when a new single board is inserted:

Hot plug detection module (HSD) on the main control board detects the insertion of a new board and judges the board type;

When this board supports the shared memory engine, the hot plug detection module (HSD) configures the PCI interface chip of the board to map the PCI address for the shared memory on the board; the hot plug detection module (HSD) The corresponding parameters are notified to the communication engine management module (SMM);

The communication engine management module (SMM) starts the heartbeat detection of the board;

Update the physical memory of the board saved in the global control block (SME-CB)

(PM-DAT) and virtual memory (VM-DAT) on the main control board; and

After confirming that the board is activated, the communication engine management core module (SMP) is controlled to start the communication service for the board.

22. The communication method according to claim 19, further comprising the following steps when the board is pulled out:

When the hot plug detection module (HSD) detects that the plugging wrench of a board is pulled down, it notifies the board driver of this message, and if the shared memory communication service has been started on this board, it immediately informs the communication engine management module. (SMM); The communication engine management module (SMM) controls the communication engine management core module (SMP) to stop the communication service of the board;

The communication engine management module (SMM) stops the board heartbeat detection and deregisters the board to the global control block (SME-CB); and

Notify the end of the hot-swap detection module (HSD) board removal process.

23. A computer program product recorded in at least one computer-readable medium, comprising, when used by a computer, a functional description material for causing a computer to perform the method steps of any one of claims 16-22.