WO2005069484A1

WO2005069484A1 - Configurable amplifier circuit

Info

Publication number: WO2005069484A1
Application number: PCT/IB2005/050033
Authority: WO
Inventors: Wolfgang Eberdorfer
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2004-01-07
Filing date: 2005-01-05
Publication date: 2005-07-28

Abstract

In an amplifier circuit having at least two signal-source terminals (IN; IN Ch I, IN Ch2) to allow signal sources (Q, Q1 to Q7) to be connected in and to allow signal-source signals (Q; QS 1, QS2) to be fed to the amplifier circuit, that has at least two amplifier stages (A1, A2) that are each arranged to amplify input signals able to be fed to them and to drive electrical loads (SP 1, SP2; LOAD 1, LOAD2, LOAD3) with the input signals amplified by them, there are provided configuration setting means (K1, K2, K3) for setting the configuration of the amplifier stages (A1, A2), as a function of the absence or presence of a configuration control signal (KS) able to be fed to them, either to a mutually independent amplifier stage configuration or to a mutually dependent amplifier stage configuration, and also provided are detection means (A3, A4, AND; 10, 14, 16, 21, 25) that are arranged to detect the absence of a connection between a signal-source terminal (IN; IN Chl, IN Ch2) and a signal source (Q, Q1 to Q7) and, when the absence of such a connection is detected, to generate the configuration control signal (KS).

Description

Configurable amplifier circuit

The invention relates to an amplifier circuit having at least two signal-source terminals, which signal-source terminals are intended to allow signal sources to be connected in and to allow signal-source signals to be fed to the amplifier circuit, and having at least two amplifier stages, which amplifier stages are each arranged to amplify input signals able to be fed to them and to drive electrical loads with the input signals amplified by them. The invention further relates to a device having an amplifier circuit of the kind specified in the first paragraph. The invention further relates to a toy having an amplifier circuit of the kind specified in the first paragraph. The invention further relates to a configuring method for setting an amplifier stage configuration of an amplifier circuit, which amplifier circuit has at least two signal- source terminals, which signal-source terminals are intended to allow signal sources to be connected in and to allow signal-source signals to be fed to the amplifier circuit, and which amplifier circuit has at least two amplifier stages, which amplifier stages are each arranged to amplify input signals able to be fed to them and to drive electrical loads with the input signals amplified by them.

An amplifier circuit of this kind is known from patent document US 4,494,077. This document discloses an amplifier circuit having two amplifier stages that are each arranged to amplify input signals fed to them and to drive electrical loads with the input signals amplified by them, and having configuration setting means that are arranged to change the input and/or output configuration of the amplifier stages as a function of a configuration control signal fed to them. However, something that has proved to be disadvantageous about the known amplifier circuit is that the configuration control signal has to be generated manually by a user of the amplifier circuit. There is therefore no possibility of the amplifier circuit responding automatically to its being connected to signal sources or to signal sources being withdrawn. It is an object of the invention to provide an amplifier circuit of the kind specified in the first paragraph, a device of the kind specified in the second paragraph, a toy of the kind specified in the third paragraph and a configuring method of the kind specified in the fourth paragraph, in which the disadvantages stated above are avoided. To allow the above-mentioned object to be achieved, features according to the invention are provided in an amplifier circuit according to the invention, thus enabling an amplifier circuit according to the invention to be characterized in the manner specified below, namely: An amplifier circuit having at least two signal-source terminals, which signal- source terminals are intended to allow signal sources to be connected in and to allow signal- source signals to be fed to the amplifier circuit, and having at least two amplifier stages, which amplifier stages are each arranged to amplify input signals able to be fed to them and to drive electrical loads with the input signals amplified by them, and having configuration setting means that are arranged to set the configuration of the amplifier stages, as a function of the absence or presence of a configuration control signal able to be fed to them, either to a mutually independent amplifier stage configuration or to a mutually dependent amplifier stage configuration, and having detection means that are arranged to detect the absence of a connection between a signal-source terminal and a signal source and, when the absence of such a connection is detected, to generate the configuration control signal. To allow the above-mentioned object to be achieved, an amplifier circuit according to the invention is provided in a device of the above kind. To allow the above-mentioned object to be achieved, an amplifier circuit according to the invention is provided in a toy of the above kind. To allow the above-mentioned object to be achieved, features according to the invention are provided in a configuring method according to the invention, thus enabling a configuring method according to the invention to be characterized in the manner specified below, namely: A configuring method for setting an amplifier stage configuration of an amplifier circuit, which amplifier circuit has at least two signal-source terminals, which signal-source terminals are intended to allow signal sources to be connected in and to allow signal-source signals to be fed to the amplifier circuit, and which amplifier circuit has at least two amplifier stages, which amplifier stages are each arranged to amplify input signals able By the measures claimed in claims 9 and 22, the advantage is obtained that it is possible for loads to be switched in and out in the single mode when there is no input signal. By the measures claimed in claims 10 and 23, the advantage is obtained that a bridge-tied mode for loads is implemented to allow a high power yield to be achieved. By the measures claimed in claims 11 and 24, the advantage is obtained that the amplifier circuit is switched automatically between the single mode and the bridge-tied mode. These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.

In the drawings: Fig. 1 is a block circuit diagram of an embodiment of amplifier circuit according to the invention. Fig. 2 is a block circuit diagram of detection means in an amplifier circuit according to the invention. Fig. 3 is a block circuit diagram of a further embodiment of detection means in an amplifier circuit according to the invention. Fig. 3 A is a block circuit diagram of a variant of the amplifier circuit shown in

Fig. 3. Fig. 4 is a circuit diagram of a further embodiment of detection means in an amplifier circuit according to the invention. Fig. 5 is a block circuit diagram of a further embodiment of detection means in an amplifier circuit according to the invention. Fig. 6 is a block circuit diagram of a further embodiment of detection means in an amplifier circuit according to the invention. Fig. 7 is again a block circuit diagram, showing a different embodiment of detection means in an amplifier circuit according to the invention. Fig. 8 is a circuit diagram of a basic configuration of a known two-channel amplifier circuit having two mutually independent channels. Fig. 9 is a block circuit diagram of an embodiment of two-channel amplifier circuit having configuration setting means according to the invention. Fig. 10 is a block circuit diagram of a further embodiment of configuration setting means in an amplifier circuit according to the invention. Fig. 11 is a block circuit diagram of a further embodiment of configuration setting means in an amplifier circuit according to the invention. Fig. 12 is a block circuit diagram of a further embodiment of configuration setting means in an amplifier circuit according to the invention. Fig. 13 is a block circuit diagram of a further embodiment of configuration setting means in an amplifier circuit according to the invention. Fig. 14 is a block circuit diagram of a further embodiment of configuration setting means in an amplifier circuit according to the invention. Fig. 15 is again a block circuit diagram, showing a different embodiment of configuration setting means in an amplifier circuit according to the invention.

Fig. 1 is a block circuit diagram of a first embodiment of an amplifier circuit according to the invention. This amplifier circuit comprises two signal-source terminals IN Chi and IN Ch2 for connection to respective signal sources for feeding signal-source signals to respective channels of the amplifier circuit. The amplifier circuit shown is symmetrically constructed for two channels (Channel 1 and Channel 2) and for each of the channels it has respective amplifier stages Al and A2. The two amplifier stages Al and A2 are formed by means of inverting amplifiers. The inverting input of the first amplifier stage Al is connected to the signal- source terminal IN Chi via a coupling capacitor Cl (for decoupling d.c. components in the signal-source signal fed in) and a series resistor Rl, to allow signal-source signals for amplification to be received at the inverting input (-). The gain factor often set for the amplifier stage Al is the result of the ratio of the resistance of a feedback resistor R2 to that of a series resistor Rl, which ratio is set in the present embodiment at 10:1. The signals amplified by the amplifier stage Al are fed from an output of the amplifier stage A 1 to an output terminal OUT Chi of the amplifier circuit. Connected to the output terminal OUT Chi is an electrical load SPl that takes the form of a loudspeaker. A second terminal of the load SPl is connected to configuration setting means Kl that have switching means SI, S2, S3, with switching means SI being arranged to open or close an electrically conductive path between the second terminal of the load SPl and a reference potential, namely ground, as a function of a configuration control signal KS 1. The inverting input of the second amplifier stage A2 is connected to the signal-source terminal IN Ch2 via a coupling capacitor C2 and a series resistor R3, to allow signal-source signals for amplification to be received. The gain factor of amplifier A2 is set to ten and is the result of the ratio of the resistance of a feedback resistor R4 to that of a series resistor R3. The signals amplified by the amplifier stage A2 are fed from an output of the amplifier stage to an output terminal OUT Ch2 and drive an electrical load SP2 that is connected to the output terminal OUT Ch2 by its first terminal and that takes the form of a loudspeaker. A second terminal of the load SPl is connected to the configuration setting means Kl and as a function of a configuration control signal KS1 can be pulled down to ground potential by the switching means S3, when the said switching means S3 are closed. The purpose of the other switching means S2 that is included in the configuration settings means Kl is to connect the respective second terminals of loads SPl and SP2 together. The switching means SI, S2, S3 are so configured that switching means S2 are always open when switching means SI and S3 are closed, and vice versa. In this way, when switching means S2 are open and switching means SI and S3 closed, the two loads SPl and SP2 can be driven separately from one another, i.e. in the single mode, by the output signals from the amplifier stages Al and A2 that are configured to be mutually independent. By contrast, when the switching means S2 are closed and the switching means SI and S3 open, the loads SPl and SP2 are connected together in a series bridge circuit between the outputs of the amplifier stages Al and A2, which are configured to be mutually dependent. The amplifier circuit according to the invention has detection means that are arranged to detect whether signal sources that are supplying signal-source signals are connected to the respective signal-source terminals IN Chi, IN Ch2. If this is not the case, the detection means generate the configuration control signal KS1 by which the configuration setting means Kl are operated. For the respective channels, the detection means comprise d.c. amplifiers A3, A4, which d.c. amplifiers A3, A4 are connected to respective ones of the signal-source terminals IN Chi, IN Ch2 and amplify d.c. components of respective ones of the signal-source signals fed to the signal-source terminals IN Chi, IN Ch2 to a level that is sufficiently high to enable respective ones of the inputs of a downstream AND-gate AND to be raised to a high state. This embodiment of the invention thus assumes that the signal- source signals that are fed to respective ones of the signal-source terminals IN Chi, IN Ch2 have a d.c. component that the detection means are able to analyze. By reference to the following embodiments, it will be explained how this d.c. component that is required can be generated. However, embodiments of the invention for which it is not necessary for the signal-source signals to have a d.c. component will also be described. What is more, embodiments will be elucidated in which the detection means are so arranged that connected signal sources are detected regardless of whether or not they are emitting signal-source signals. The way in which the detection means according to the invention operate is therefore such that, in a case where signal-source signals having a sufficiently large d.c. component are present at both the signal-source terminals IN Chi, IN Ch2, the output signals from the two d.c. amplifiers A3, A4 set the two inputs of the AND-gate AND to high, which causes the configuration control signal KS1 that is generated at the output of the AND-gate AND also to go to the high level. The configuration setting means Kl receive the configuration control signal KS1 that is at the high level and close the switching means SI and S3 and open the switching means S2, thereby separating the loads SPl and SP2 from one another and connecting them between the outputs of respective ones of amplifier stages Al, A2 and ground potential. In addition, the output signal from the first amplifier stage Al (see current II) is fed to further configuration settings means K2 that comprise a voltage divider, made up of resistors R5 and R6, that acts as an attenuator. The ratio of resistors R5 and R6 is 10:1, which means that at point pi of the voltage divider, the output signal from the first amplifier stage Al is attenuated to a tenth of its original level. This attenuated signal is fed back, via a d.c. decoupling resistor C3 and a resistor R7, to the inverting input (-) of the second amplifier stage A2, which input (-) acts as a summing point for all the signals fed to it. In the same way, on the second channel too, the output signal from the second amplifier stage A2 (see current 12) is fed to configuration setting means K3 having a voltage divider, comprising resistors R8 and R9, that acts as an attenuator. The ratio of resistors R8 and R9 is 10:1, which means that at point p2 of the voltage divider R8, R9, the output signal from the amplifier stage A2 is attenuated to a tenth of its original level. From point p2, a signal path runs via a d.c. decoupling resistor C4 and a resistor R10 to the inverting input (-) of the amplifier stage A2. As was explained above, the two amplifier stages Al and A2 are to drive their respective loads Al and A2 independently of one another, in the single mode, if there are signal-source signals at both the signal-source terminals IN Chi, IN Ch2. When this is the case, it is therefore undesirable for output signals from one amplifier stage Al, A2 to be fed back through the configuration setting means K2, K3 to the inverting input (-) of whichever is the other of the amplifier stages A2, Al. To effectively stop such feedback, the configuration setting means K2 of the amplifier circuit according to the invention comprise switching means S4 and the configuration settings means K3 comprise switching means S5. The switching means S4 are driven by the d.c. amplifier A4 and are so arranged that they remain closed for as long as what is present at the signal-source terminal IN Ch2 is a signal- source signal having a d.c. component sufficiently large to cause the switching means S4 to respond, as a result of which the switching means S4 pull point pi of the voltage divider R5, R6 down to ground and thus stop the output signal from the first amplifier stage Al from being fed back to the inverting input (-) of the second amplifier stage A2. The switching means S5 are driven by the d.c. amplifier A3 and are so arranged that they remain closed for as long as what is present at the signal-source terminal IN Chi is a signal-source signal having a d.c. component sufficiently large to cause the switching means S5 to respond, as a result of which the switching means S5 pull point p2 of the voltage divider R8, R9 down to ground and thus stop the output signal from the second amplifier stage A2 from being fed back to the inverting input (-) of the first amplifier stage Al. With regard to their configurations, the two amplifier stages Al and A2 can thus be configured independently of one another. If however there is not a signal-source signal having a sufficiently large d.c. component present at one of the two signal-source terminals IN Chi, IN Ch2, then the appropriate one of the switching means S4 and S5 is opened. As a result, point pi or point p2 in voltage divider R5, R6 or R8, R9 is isolated from ground potential, and the output signal from the one amplifier stage Al or A2 that is receiving a signal-source signal via the signal- source terminal IN Chi or IN Ch2, which output signal is attenuated by the voltage divider, is instead fed back to the inverting input of the other amplifier stage A2 or Al. With regard to their configurations, the two amplifiers stages Al and A2 are thus configured with a dependence on one another. What also happens in this case where there is not a signal-source signal having a sufficiently large d.c. component present at one of the two signal-source terminals IN Chi, IN Ch2, is that the configuration control signal KS1 generated by the AND-gate AND goes to a low level. This causes the switching means SI and S3 to be opened, and the switching means S2 to be closed, in the configuration setting means Kl and in this way the loads SPl and SP2 to be operated in a serial bridge circuit between the outputs of the amplifier stages Al and A2. Because the amplifier stages operate in push-pull in relation to one another, the result is a voltage to the loads SPl and SP2 that is twice as high as exists when the amplifier stages Al and A2 are operating in the single mode, and hence a power that is equally large. In the event of there not being a signal-source signal having a sufficiently large d.c. component applied to either of the two signal-source terminals IN Chi, IN Ch2, both switching means S4 and S5 are closed, and both the points pi and p2 in the voltage dividers are pulled down to ground and the inputs of the amplifier stages Al, A2 are thus at a defined potential, namely ground. All the switching means SI to S5 that have been described may advantageously take the form of electronic switches in integrated circuit form or even of relays. The embodiment of amplifier circuit according to the invention that is shown in Fig. 1 is in the form of a two-channel audio amplifier for automatically switching loudspeakers between the single mode and the bridge-tied mode (bridge-tied load, BTL). The invention is not however confined to this application but can also be employed for driving electric motors or actuators. In what follows, various embodiments of detection means that can be used in the amplifier circuit according to the invention will be elucidated. Components and signals whose functions are the same as or similar to those described previously will be identified by . the same reference numerals when this is done. Fig. 2 is a block circuit diagram of an embodiment of detection means 10 that ^■ are arranged to detect the absence or presence of a connection between a signal-source terminal IN and a signal source Ql and to generate a configuration control signal KSl when the absence of such a connection is detected. This embodiment of detection means 10 relies on the analysis of signal-source signals QS that are fed into the amplifier circuit according to the invention from the signal source Ql via the signal-source terrninal IN. It is assumed in this case that the signal-source signals QS are a.c. signals (e.g. an audio signal). The signal- source signals QS are amplified in an amplifier stage (gain stage) 11a of the detection means 10 and then rectified in a rectifier 1 lb. The output signal from the rectifier 1 lb is compared in a comparator 12 with a preset threshold voltage Ut_hres_hoid- If the signal-source signal QS is sufficiently powerful to generate, at the output of the rectifier 1 lb, a signal that exceeds the threshold voltage Ut_hres_hoi_d) then the output of the comparator 12 goes to the high state. If the threshold voltage is not exceeded, the output of the comparator 12 goes to the low state. This output signal from the comparator 12 represents the configuration control signal KSl and can be used to control configuration setting means Kl , K2 ... Kn for a plurality of amplifier stages Al , A2, ... An in the way that was described above by reference to Fig. 1. Reference 10

numeral 13 denotes a signal path to an amplifier stage Al or A2 of the amplifier circuit according to the invention. Under certain circumstances, the circuit shown in Fig. 2 for the detection means may not be suitable however, for example if the signal-source signal QS contains a very high proportion of noise or has sections in which the signal level is only very low, as may happen with audio signals between two pieces of music or when there are pauses in music or speech. To solve this problem, the alternative embodiment of detection means 14 that is shown in Fig. 3 is proposed, and will be described by reference to one input, which stands for the at least two inputs of the amplifier circuit according to the invention. This embodiment of detection means 14 is based on the a.c. signal QS2 produced by the signal source Q2 having a d.c. voltage Udc superimposed on it in the signal source Q2. This mixed signal QS + Udc is coupled in at the signal-source input IN of the amplifier circuit. The mixed signal QS + Udc is fed on the one hand to a decoupling capacitor 16 that filters out the d.c. component Udc, which means that the signal path 13 that leads from the decoupling capacitor 16 to one of the amplifier stages Al or A2 of the amplifier circuit according to the invention carries only the a.c. signal QS2. On the other hand, the mixed signal QS + Udc s also fed to the detection means 14, which detection means 14 comprise a low-pass filter 15 that filters out the a.c. component QS2 of the signal and allows only the d.c. component Udc to pass to an input of the comparator 12 where, as was described above by reference to Fig. 2, it is compared with the threshold voltage Uthreshoid- From its output, the comparator 12 supplies the configuration control signal KS for controlling the configuration setting means. In this embodiment, as was mentioned above, either the signal source Q2 itself may be so arranged or adapted that it generates the d.c. component Udc required for detection, or alternatively the d.c. voltage Udc may be made available at the signal-source terminal IN by detection means 14', as is shown in Fig. 3A where a signal source Q2' that generates the a.c. signal QS is connected to the signal-source signal terminal IN and, when so connected, is biased by a d.c. voltage Udc, thus causing the mixed signal QS + Udc to be applied to the signal-source terminal IN. Fig. 4 is a circuit diagram of a further variant of detection means according to the invention. There is a two-pole signal-source terminal IN present whose first pole is connected to ground, i.e. to a reference potential, and whose second pole is connected via two resistors R to the positive supply voltage +Ub. In the case of this circuit, it is assumed that a signal source Q4 that is connected to the signal-source terminal IN has an internal resistance Ri that is connected in parallel with the generator for generating the signal-source signal QS. 11

The value of the internal resistance Ri may, for example, be more than 100 kOhm and it merely needs to be ensured that it is able to draw a sufficiently large current to enable a suitable base current to flow from the PNP transistor T through the signal-source terminal IN and the internal resistance Ri to ground to make the transistor T conductive, as a result of which its collector terminal is pulled up to the voltage level +Ub. The voltage level at the time at the collector terminal of the transistor T is available via the resistor Rx as a configuration control signal KS. If the signal source is not connected, it follows that no d.c. current Idc can flow and hence no base current can flow in the transistor T, which means that the transistor T blocks and as a result its collector terminal is pulled down to ground potential via the electrolytic capacitor C. The decoupling capacitor Cin ensures that only the signal- source signal QS, which is an a.c. signal, is fed along the signal path 13 to an amplifier stage of the amplifier circuit according to the invention. Another embodiment of detection means according to the invention, which is shown in Fig. 5, is based on the signal-source signal QS being modulated, in a signal source Q5, by a modulating signal MS and this modulated signal QS+MS being fed to the detection means 16 via the signal-source terminal IN. This embodiment of detection means 16 may be used with particular advantage when the signal-source signal QS is a low-frequency signal or a d.c. signal that varies only slowly, when for example the signal source Q5 takes the form of a temperature sensor or an air-pressure sensor. The frequency of the modulating signal MS should be chosen to be sufficiently high for no interference to occur with the signal-source ' signal QS to be modulated. The detection means 16 comprise a band-pass filter 17 that is set in such a way that, although it allows the modulating frequency MS to pass, it does not allow the signal-source signal QS to do so. The output signal from the band-pass filter 17 is rectified in a rectifier 18, smoothed by a capacitor 19 and, as was described above by reference to Fig. 2, is compared in a comparator 12 with a threshold voltage Ut_hres_hoid- The output signal from the comparator 12 represents the configuration control signal KS. The modulated signal MS+QS is also fed to a low-pass filter 20 in the amplifier circuit, which filters out the modulating signal MS and allows only the signal-source signal QS to pass via the signal path 13 to an amplifier stage of the amplifier circuit according to the invention. This embodiment of the invention may be further refined if a large number of different modulating frequencies are used, together with a large number of band-pass filters for passing these different modulating frequencies. This in fact not only makes it possible to determine whether a signal source is connected to the signal-source terminal IN but also 12 allows different types of signal source, to which respective modulating frequencies are assigned, to be distinguished. A further embodiment of detection means according to the invention, which is shown in Fig. 6, is based on there also being provided, in a signal source Q6 and in addition to the means for generating the signal-source signal QS, a generator for generating a digital code signal CS that is superimposed on the signal-source signal QS, and on this mixed signal QS+CS being fed to the detection means 21 via the signal-source terminal IN. The detection means 21 comprise a band-pass filter 22 that is set in such a way that, although it allows the digital code signal CS to pass, it does not allow the signal-source signal QS to do so. From the output of the band-pass filter 22, the digital code signals CS make their way to a decoder 23 that decodes the digital code signals CS in order to generate the configuration control signal KS from the information contained in the signals. The decoder 23 may be constructed as discrete logic but it may also comprise a microcontroller. The mixed signal MS+QS is also fed to a filter 24 for filtering out the digital code signals CS, which means that the filter 24 allows only the signal-source signal QS to pass along the signal path 13 to an amplifier stage of the amplifier circuit according to the invention. Depending on the purpose for which the • ^; amplifier circuit is used and the form taken by the code signals CS, the filter 24 may even be omitted where possible. This embodiment of the invention not only enables it to be

: determined whether the signal source Q6 is connected to the signal-source terminal^' IN but also makes it possible for different types of signal source Q6, to which respective digital codes CS are assigned, to be distinguished. To form an appropriate configuration control signal KS to control configuration setting means of the amplifier circuit according to the invention, the digital code signals CS may, for example, contain information on the gain factor to be selected, the configuration of the amplifier stages, the bandwidths, etc. In Fig. 7 is shown a further embodiment of detection means according to the invention that can be considered a generalized form of the embodiment shown in Fig. 4. In the embodiment shown in Fig. 7, the detection means 25 comprise a signal generator 26 for generating test signals TS that are fed to the signal-source terminal IN. If a signal source Q7 for generating a signal-source signal QS is connected to the signal-source terminal IN, then the test signal TS is taken to ground via the internal resistance Ri of the signal source Q7. Depending on the nature of the internal resistance Ri and of the other internal circuitry of the signal source Q7, there is an effect on the test signal TS, which may happen in a wide variety of ways. Where the internal resistance Ri takes the form of an ohmic resistance, then the form that the effect takes is the simplest one, because it is only currents that are enabled to flow in 13

this case. In other applications, reflections of the test signal TS may be produced, which are transmitted back into the detection means 25 via the signal-source terminal IN. In general terms, the test signal TS initiates at the signal source Q7 a response signal RS that makes its way back into the detection means 25, where it is reshaped by a filter 27, a rectifier 28 and a smoothing capacitor 29 into a signal that is assessed by the comparator 12, the result of the assessment being shown as the configuration control signal KS. On the other hand, the response signal RS is filtered out by a filter 31 from a signal path 13 to downstream amplifier stages, which means that only the signal-source signal QS is fed to the amplifier stages. In what follows, embodiments of amplifier stage configuration will be elucidated that can be set or laid down, and changed, by configuration setting means according to the invention. From considerations of clarity, the description will be confined to two signal channels each having one amplifier stage, even though the invention is not limited to this. What all the following embodiments, which are shown in Figs. 8 to 16, have in common is that each signal channel has a signal-source terminal INI or LN2 to which a signal source QSi having a generator for generating a signal-source signal QSl, QS2 can be connected. The signal sources QSi also have an internal resistance Ri. The individual amplifier stages Al and A2 are also in the form of inverting amplifiers, even though the invention is not in any way limited to this. It is also assumed that what is used to detect whether or not a signal source QSi is connected is a d.c. current Idc that flows from the amplifier circuit via the internal resistance Ri of the connected signal source to ground. The invention is not however in any way limited to what was demonstrated by the plurality of possible embodiments of detection means that were described above. Fig. 8 shows the basic configuration of an amplifier stage configuration for a known two-channel amplifier circuit having two mutually independent channels that have mutually independent amplifier stages. A first signal-source signal QSl is fed to the first signal-source terminal INI and is amplified in a first amplifier stage Al and the output signal from the latter drives a load LOAD1. Similarly, a second signal-source signal QS2 is fed to the second signal-source terminal IN2 and is amplified in the second amplifier stage A2 and the amplified signal drives a load LOAD2. An amplifier stage configuration of this kind is used in for example a stereo audio amplifier. Fig. 9 is a block circuit diagram of an embodiment of two-channel amplifier circuit according to the invention. The case that is shown here is one in which the first signal- source terminal INI on the first channel is connected to the first signal source QSi that supplies the first signal-source signal QSl, whereas the connection of the second channel, i.e. 14

of the second signal-source terminal LN2, to the second signal source QS2 is broken. There are detection means according to the invention present (Idc detector) that detect this missing connection and emit the configuration control signal KS. Rather than leaving the unconnected channel unused, as would be the case with ordinary stereo amplifiers, e.g. that shown in Fig. 8, in the embodiment shown in Fig. 9 there are configuration setting means according to the invention present that comprise switching means S6 by which, as a function of the configuration control signal KS supplied by the detection means (Idc detector), the output of the first amplifier stage Al, which is formed by the amplified signal-source signal QSl, is fed back to the input of the second amplifier stage A2 if there is no connection to the second signal source QS2. By virtue of this measure, the two-channel amplifier circuit is always automatically switched to a mono mode if a signal-source signal QSl or QS2 is present on only one of its channels. As a result, the amplifier stages Al and A2 both amplify the same input signal and drive the loads LOAD1 and LOAD2 with the signal QSl amplified by them. The present amplifier circuit is designed to amplify signal-source signal that are a.c. signals, which means that a capacitor Ck to decouple d.c. components may usefully be connected into the feedback path so that the detection of the absence of a connection to a signal source QSl or QS2, which is based on the detection of d.c. currents Idc, is not affected. Also connected into the feedback path is an attenuator ATT that attenuates the output signal from the amplifier stage Al and reduces it to the same order of magnitude as the input signal QSl fed to the amplifier stage Al . It should be mentioned that the attenuator ATT may also be arranged to attenuate the output signal from the first amplifier stage Al variably as a function of a variable gain that can be set for the first amplifier stage Al. It should also be mentioned that even though only one feedback path and one switching means are shown in Fig. 9 between the output of the amplifier stage Al and the input of the amplifier stage A2, a symmetrical implementation is preferred in practice, i.e. a feedback path and a switching means are also provided between the output of the amplifier stage A2 and the input of the amplifier stage Al. Fig. 10 shows a development of the amplifier circuit according to the invention that is shown in Fig. 9. The circuit shown in Fig. 10 differs from that shown in Fig. 9 in that the configuration setting means include additional switching means S7, S8 that change the polarity of the load LOAD2 as a function of the configuration control signal KSl. In Fig. 9, because the amplifier stages Al and A2 are configured as inverting amplifiers, when the signal-source signal QS2 is not present the signal-source signal QSl on the first 15

channel is fed, after amplification by the amplifier stage Al and feedback and the attenuation that takes place in the course of this, to the input of the second amplifier stage A2 180° out of phase. When the amplifier circuit is implemented, or used, as an audio amplifier, this would for example cause canceling out at low frequencies if the loads were in the form of loudspeakers. To prevent this from happening, the switching means S7, S8 shown in Fig. 10 are provided to change the polarity of the load LOAD2. In practice, when the embodiment is symmetrical, switching means are of course also provided to change the polarity of the load LOAD1. Fig. 11 is a block circuit diagram of a further embodiment of an amplifier circuit having configuration setting means according to the invention. This embodiment is particularly suitable for battery-operated devices, where low power consumption is a major criterion. In this embodiment, the configuration setting means comprise switching means S9 that are activated by the configuration control signal KS when there is not a signal-source signal QSl, QS2 present at either of the two signal-source terminals INI and IN2. When activated, the switching means S9 switch off the power supply to the amplifier stages Al and A2. The switching means S9 may be implemented in semiconductor technology, which means that they have no current consumption worth mentioning of their own. The detection means (Idc detector) may likewise be implemented in semiconductor technology with minimal current consumption. In the embodiments shown in Figs. 8 to 11, the loads LOADl^ LOAD2, were connected between the outputs of respective amplifier stages Al and A2 and ground potential, i.e. they were operated in a single mode. What will be elucidated below will be embodiments of the invention in which the configuration setting means comprise switching means by means of which loads can be switched between the single mode described and a bridge-tied mode, in which bridge-tied mode the loads are connected between the outputs of the two amplifier stages Al and A2 in parallel or in series with one another. The bridge-tied mode is selected when there is no signal-source signal QSl or QS2 applied to one of the two channels, the configuration of the amplifier stages being changed at the same time in such a way that the existing signal-source signal on one channel is routed directly or indirectly to the input of the other amplifier stage. An essential feature of all the following circuits is that in the bridge-tied mode the two amplifier stages Al, A2 operate in push-pull. This may, for example, be achieved by making the two amplifier stages Al and A2 inverting amplifiers and feeding the amplified output signal from the one amplifier stage Al or A2 at whose input a signal-source signal QSl or QS2 is present, via an attenuator that compensates for the gain 16

factor of the said amplifier stage, to the input of the other amplifier stage A2 or Al, which amplifies this signal while at the same time inverting it. If the two amplifier stages Al and A2 are in the form of non-inverting amplifiers, a signal inverter may be connected into the feedback path from the output of the one amplifier stage Al or A2 to the input of the other amplifier stage A2 or Al . Measure may also be made for an attenuator provided on the feedback path also to take the form of a signal inverter. It is also possible for one amplifier stage Al or A2 to be inverting and the other amplifier stage A2 or Al to be non-inverting, by which means a signal inverter can be dispensed with. The following embodiments show the various possible configurations for switching between the single mode and the bridge-tied mode of the amplifier circuit, doing so illustratively for a single signal path. It goes without saying that these configurations may also be provided for both signal paths, i.e. channels. Fig. 12 shows an embodiment of an amplifier circuit according to the invention that has configuration setting means having switching means S 10, SI 1 and S12 that are controlled by the configuration control signal KS that is supplied by detection means (Idc detector). The switching means S 10 are in the form of double switching means, which on the one hand close a feedback path from the output of the amplifier stage Al, at whose input the signal-source signal QSl is present, to an input of the second amplifier stage A2, when there is not a signal-source signal QS2 present at the input of the latter, and which on the other hand at the same time close a signal path to a load LOAD3 that is thereby connected between the outputs of the amplifier stages Al and A2. The load LOAD3 is thus operated in the bridge-tied mode. If the switching means S10 close, the switching means SI 1 and S12 open at the same time and thus break the connection that the respective loads LOADl and LOAD2 have to ground potential. If signal-source signals QSl and QS2 are present at the inputs of both the amplifier stages Al, A2, the switching means S10 open and the switching means SI 1 and S12 close, whereby the load LOAD3 is switched out and the loads LOADl and LOAD2 are operated in the single mode between the output of their amplifier stage and ground. On the assumption that the impedances of the loads LOADl, LOAD2 and LOAD3 are the same, the load LOAD3 will be operated in the bridge circuit at twice the power, in relation to the sum of the individual powers on the two channels when loads LOADl and LOAD2 are in the single mode. In the embodiment shown in Fig. 13, the configuration setting means according to the invention have switching means S13 and S14 that, under the control of the configuration control signal KS, switch the loads LOADl and LOAD2 between the single mode (when signal-source signals QSl and QS2 are present at both inputs of the amplifier 17

circuit) and a serial bridge-tied mode. The latter switch takes place when there is no signal- source signal QS2 present at one of the two amplifier inputs, as a result of which the two loads LOADl and LOAD2 are connected in series between the outputs of the two amplifier stages Al and A2. In the embodiment shown in Fig. 14, the configuration setting means according to the invention have switching means S15 and S16 that, under the control of the configuration control signal KS, switch the loads LOADl and LOAD2 between a single mode (when there are signal-source signals present at both amplifier inputs) and a bridge-tied mode in which the two loads LOADl and LOAD2 are arranged in parallel with one another, the latter switch taking place when there is no signal-source signal QSl or QS2 present at one of the two amplifier inputs. In the bridge-tied mode the loads LOADl and LOAD2 draw four times the power in relation to the sum of the individual powers on the two channels relative to the reference potential when the loads LOADl and LOAD2 are in the single mode. In the embodiment shown in Fig. 15, the configuration setting means according to the invention have switching means SI 7 and S18 that, under the control of the configuration control signal KS, switch the loads LOADl and LOAD2 between a single mode (when there are signal-source signals QS 1 and QS2 present at both inputs of the : amplifier circuit) and a combined single and bridge-tied mode. If in fact there is no signal- source signal QS2 present at the signal-source terminal LN2 for example, then the switching means S17 are closed and the switching means S18 opened. In this way, the output signal from the first amplifier stage Al is fed via an attenuator (not shown) to the input of the second amplifier stage A2. At the same time, the switching means S18 are opened, whereby the load LOADl is switched from the single mode to the bridge-tied mode between the outputs of the amplifiers stages Al and A2. The load LOAD2 however remains as it was in the single mode between the output of the amplifier stage A2 and ground potential. It should be mentioned that in a practical embodiment there are also switching means provided to switch the load LOAD2 and a feedback path between the output of the second amplifier stage A2 and the input of the first amplifier stage Al but these have been omitted in the schematic representation in Fig. 15 for greater clarity. The present amplifier circuit according to the invention is very well suited in all its embodiments for use in audio amplifiers and in sensor-signal amplifiers and for driving motors. Because of its freedom from maintenance, its fully automatic operation and the safe and reliable way in which it is operated it is also particularly suitable for use in toys, where it combines a wide variety of functions with, due to its automatic operation, the avoidance of 18

operating errors by children. Finally, where the amplifier circuit according to the invention may be mentioned as outstandingly well suited for use is in toy systems made by the LEGO® company, when it may for example be incorporated in LEGO® blocks, to be used in sub- units of LEGO® toy systems as an audio amplifier, signal emitter, measurement amplifier or power amplifier for a motor drive. It should be mentioned that even though reference was always made to two amplifier stages Al and A2 in the embodiments described above, the invention may also be used for, for example, three (3), four (4) or even ten (10) amplifier stages that, by virtue of the measures according to the invention, can be operated in a mutually independent amplifier stage configuration or a mutually dependent one.

Claims

19CLAIMS:

1. An amplifier circuit having at least two signal-source terminals (IN; IN Chi , IN Ch2), which signal-source terminals (IN; IN Chi, IN Ch2) are intended to allow signal sources (Q, Ql to Q7) to be connected in and to allow signal-source signals (Q; QSl, QS2) to be fed to the amplifier circuit, and having at least two amplifier stages (Al, A2), which amplifier stages (Al, A2) are each arranged to amplify input signals able to be fed to them and to drive electrical loads (SPl, SP2; LOADl, LOAD2, LOAD3) with the input signals amplified by them and having configuration setting means (Kl, K2, K3) that are arranged to set the configuration of the amplifier stages (Al, A2), as a function of the absence or' presence of a configuration control signal (KS) able to be fed to them, either to a mutually independent amplifier stage configuration or to a mutually dependent amplifier stage configuration, and having detection means (A3, A4, AND; 10, 14, 16, 21, 25) that are arranged to detect the absence of a connection between a signal-source terminal (IN; IN Chi, IN Ch2) and a signal source (Q, Ql to Q7) and, when the absence of such a connection is detected, to generate the configuration control signal (KS).

2. An amplifier circuit as claimed in claim 1, wherein the detections means (A3, A4, AND; 10, 14, 16, 21, 25) are arranged to detect the absence of a connection between a signal-source terminal (IN; IN Chi, IN Ch2) and a signal source (Q, Ql to Q7) by detecting that a signal-source signal (QS) is not present or by determining and assessing characteristics of a signal-source signal (QS).

3. An amplifier circuit as claimed in claim 2, wherein the detection means (A3, A4, AND; 10, 14, 16, 21, 25) are arranged to determine and assess one or more of the following characteristics of a signal-source signal (QS; QSl, QS2): a d.c. voltage (Udc) or d.c. current component, a modulating signal component (MS) or a coding signal (CS).

4. An amplifier circuit as claimed in claim 1, wherein the detection means (25) comprise a test signal generator (26) for applying test signals (TS) to a given signal-source 20

terminal (IN) and are arranged to detect the absence of a connection between the signal- source terminal (IN) and a signal source (Q7) from a response (RS) to the test signals.

5. An amplifier circuit as claimed in claim 1, wherein the configuration setting means comprise switching means (S6, SI 9, SI 3) for opening and closing a signal path from the output of one of the amplifier stages to the input of at least one other amplifier stage, as a function of the configuration control signal (KS).

6. An amplifier circuit as claimed in claim 5, wherein signal attenuation means (ATT) and/or signal inverting means are provided in the signal path between the output of one amplifier stage and the input of at least one of the other amplifier stages.

7. An amplifier circuit as claimed in claim 1, wherein the configuration setting means have switching means (S7, S8) as a function of the configuration control signal (KS) for reversing the connection together of terminals of a load (LOAD2) to an output of an amplifier stage (A2) and a reference potential.

8. An amplifier circuit as claimed in claim 1, wherein the configuration setting means have switching means (S9) for switching off the power supply to an amplifier stage that is not connected to a signal source.

9. An amplifier circuit as claimed in claim 1, wherein the configuration setting means have switching means (SI 1, SI 2, SI 4) that are intended to make or break a connection between an output of an amplifier stage and a load terminal and/or a connection between a reference potential and a load terminal, as a function of the configuration control signal (KS).

10. An amplifier circuit as claimed in claim 1, wherein the configuration setting means have switching means (S10, SI 5, SI 6, SI 8) that are intended to switch a load in and out between the outputs of two amplifier stages.

11. An amplifier circuit as claimed in claim 1, wherein the configuration setting means have switching means (S14, SI 5, SI 6, SI 8) that are intended to switch loads between a configuration in which the given load is connected between an output of an amplifier stage and a reference potential and a configuration in which the loads are connected between the 21

outputs of the amplifier stages in parallel or in series, as a function of the configuration control signal (KS).

12. A device having an amplifier circuit as claimed in any of claims 1 to 11 , wherein the device is preferably an audio device, a signal processing device, or a motor control device.

13. A toy having an amplifier circuit as claimed in any of claims 1 to 11, wherein the amplifier circuit is preferably in the form of an audio amplifier or a power amplifier for a motor drive.

14. A configuring method for setting an amplifier stage configuration of an amplifier circuit, which amplifier circuit has at least two signal-source terminals (IN; IN Chi, IN Ch2), which signal-source terminals (IN; IN Chi, IN Ch2) are intended to allow signal sources (Q, Ql to Q7) to be connected in and to allow signal-source signals (QS; QSl, QS2) to be fed to the amplifier circuit, and which amplifier circuit has at least two amplifier stages (Al, A2), which amplifier stages (Al, A2) are each arranged to amplify input signals able to be fed to them and to drive electrical loads (SPl, SP2; LOADl, LOAD2, LOAD3) with the input signals amplified by them, comprising the detection of the absence of a connection between one of the signal-source terminals (IN; IN Chi, IN Ch2) and a signal source (Q, Ql to Q7) and comprising the setting of the configuration of the amplifier stages (Al, A2), as a function of the detected absence or presence of a connection between the signal-source terminals (IN; IN Chi, IN Ch2) and a signal source (Q, Ql to Q7), either to a mutually independent amplifier stage configuration or to a mutually dependant amplifier stage configurations.

15. Configuring method as claimed in claim 14, wherein the detection of the absence of a connection between a signal-source terminal (IN; IN Chi, IN Ch2) and a signal source (QS, QSl, QS2) comprises the detection of the presence of a signal-source signal (QS; QSl, QS2) or the determination and assessment of characteristics of a signal-source signal (QS).

16. A configuring method as claimed in claim 15, wherein one or more of the following characteristics of a signal-source signal (QS; QSl, QS2) are determined and 22

assessed: a d.c. voltage (Udc) or d.c. current component, a modulating signal component (MS) or a coding signal (CS).

17. A configuring method as claimed in claim 14, wherein the detection of the absence of a connection between a signal-source terminal and a signal source comprises the application of test signals (TS) to a given signal-source terminal and the analysis of the response (RS) to the test signals.

18. A configuring method as claimed in claim 14, wherein a signal path from the output of an amplifier stage to the input of another amplifier stage is broken or made as a function of the absence or presence of a connection between a signal-source terminal and a signal source.

19. A configuring method as claimed in claim 18, wherein signal attenuation means (ATT) and/or signal inverting means are provided in the signal path from the output of one amplifier stage to the input of the at least one other amplifier stage.

20. A configuring method as claimed in claim 14, wherein the connection together of terminals of a load (LOAD2) which is connected between the output of an amplifier stage and a reference potential is switched as a function of the absence or presence of a connection between a signal-source terminal and a signal source.

21. A configuring method as claimed in claim 14, comprising the switching of the power supply away from amplifier stages (Al, A2) that are not connected to a signal source.

22. A configuring method as claimed in claim 14, wherein a connection between an output of an amplifier stage and a terminal of a load and/or a connection between a reference potential and a terminal of a load is broken or made as a function of the absence or presence of a connection between a signal-source terminal and a signal source.

23. A configuring method as claimed in claim 14, wherein a load is switched in or out between the outputs of two amplifier stages as a function of the absence or presence of a connection between a signal-source terminal and a signal source. 23

24. A configuring method as claimed in claim 14, wherein a switch is made between a configuration in which the given load is connected between an output of an amplifier stage and a reference potential and a configuration in which the loads are connected between the outputs of the amplifier stages in parallel or in series, as a function of the absence or presence of a connection between a signal-source terminal and a signal source.