WO2005067134A1 - Power transistor protecting circuit of motor drive circuit, motor drive circuit, and semiconductor device - Google Patents

Power transistor protecting circuit of motor drive circuit, motor drive circuit, and semiconductor device Download PDF

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Publication number
WO2005067134A1
WO2005067134A1 PCT/JP2005/000118 JP2005000118W WO2005067134A1 WO 2005067134 A1 WO2005067134 A1 WO 2005067134A1 JP 2005000118 W JP2005000118 W JP 2005000118W WO 2005067134 A1 WO2005067134 A1 WO 2005067134A1
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WIPO (PCT)
Prior art keywords
circuit
power transistor
terminal
output
disconnection
Prior art date
Application number
PCT/JP2005/000118
Other languages
French (fr)
Japanese (ja)
Inventor
Mitsuaki Daio
Daiki Yanagishima
Original Assignee
Rohm Co., Ltd
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Application filed by Rohm Co., Ltd filed Critical Rohm Co., Ltd
Priority to JP2005516894A priority Critical patent/JPWO2005067134A1/en
Publication of WO2005067134A1 publication Critical patent/WO2005067134A1/en

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/122Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters
    • H02H7/1222Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters responsive to abnormalities in the input circuit, e.g. transients in the DC input
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/08Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P29/00Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
    • H02P29/02Providing protection against overload without automatic interruption of supply

Definitions

  • the present invention relates to a power transistor protection circuit for a motor drive circuit, a motor drive circuit, and a semiconductor device, and more particularly, to an output terminal of a power transistor and a motor in a stepper motor driver driven by a bipolar (half-wave) drive.
  • the present invention relates to a power transistor protection circuit for a motor drive circuit capable of preventing a power transistor from being destroyed when a disconnection is made between the power transistor and an exciting coil.
  • a bipolar drive stepping motor driver (pulse motor driver) is a one-phase drive
  • the protruding rotor is rotated by a predetermined rotation angle.
  • the driver that supplies the drive current for exciting each stator has a power transistor (output transistor) corresponding to each phase in series with the coil (excitation coil) connected to the power supply line and wound on the stator. Is provided in each. When the power transistor provided for each phase is turned ON / OFF at a predetermined timing, the stator is sequentially excited and the stepping motor is driven.
  • the drive current sequentially increases during the ON period due to a transient phenomenon of a predetermined time constant determined by the inductance of the exciting coil of the phase and the impedance of the power transistor and the like!].
  • the power transistor is turned on and turned off after a predetermined period, so that the power transistor is controlled so that no overcurrent flows. Therefore, each phase of the power transistor is normally driven by shobbing with a logic value pulse of "H" (HIGH level) and "L" (LOW level) to be ONZOFF.
  • Patent Document 1 JP-A-11-112313
  • the above-described power transistor protection circuit generally includes an overcurrent protection circuit and a current limiting circuit.
  • the motor drive driver is integrated into an IC, the output terminal is connected to the terminal of the motor's excitation coil, so connection failure between the output terminal and the motor is likely to occur.
  • motors and other devices have a rotor, which can cause disconnection of the excitation coil.
  • one of the output terminals of the power transistor may momentarily open due to noise or driving conditions. Therefore, if an attempt is made to detect a disconnection by detecting the open state of the terminal, erroneous detection is likely to occur, which affects the driving operation of the motor drive circuit, and is not practical. Therefore, no protection circuit has been found for this kind of disconnection.
  • the motor continues to be driven even if one of the output terminals has a poor connection or the exciting coil is disconnected. At this time, since no back electromotive force is generated in the exciting coil connected to the open terminal, the current flowing to the other exciting coils increases by that amount, and the motor continues to be driven in an overloaded state as a whole driver. Is performed. As a result, the power transistor is destroyed, and the IC itself is destroyed.
  • An object of the present invention is to solve such a problem of the prior art, and to reduce the output terminal force of the power transistor.
  • An object of the present invention is to provide a power transistor protection circuit for a motor drive circuit, a motor drive circuit, or a semiconductor device that can prevent a power transistor from being destroyed when there is a disconnection up to the other end of a coil.
  • the configuration of the power transistor protection circuit, the motor drive circuit, or the semiconductor device of the motor drive circuit according to the first invention provides a drive current to an excitation coil of the motor via an output terminal.
  • Output power transistor to multiple excitation coils In the power transistor protection circuit of the motor drive circuit having a plurality of correspondingly,
  • the terminal open detection circuit is configured such that the other terminal of each excitation coil that is not connected to the output terminal is connected to the other terminal, and the excitation coil having one of the deviations from the other line and the other terminal.
  • There are output terminals that are connected! Are provided between one of the lines to which this output terminal is connected and one of the other lines, and are provided corresponding to a plurality of power transistors, respectively. It is to detect whether or not the force is open between either one and the other during the output operation of
  • the disconnection detection circuit detects that there is no open state between one of the terminals and one of the other terminals, and then detects any of the disconnection states by detecting that it is open. Things,
  • the drive stop circuit stops the drive operation of the motor drive circuit when the disconnection state is detected by the disconnection detection circuit.
  • the second invention in the terminal open detection circuit, when the power transistor performs the output operation of the drive current, the open state between! /, One of the shifts and! /, And Or to detect the connection state,
  • the disconnection state is detected when the disconnection detection circuit detects the open state a plurality of times in response to the detection of either the open state or the connection state by the terminal open detection circuit.
  • the terminal open detection circuit when the power transistor is performing the output operation of the drive current, the terminal open detection circuit is not connected to the output terminal and the other terminal of each excitation coil or the other terminal is connected thereto. And the output terminal corresponding to each exciting coil or the output terminal connected to each of the exciting coils is connected to detect whether or not the open line (or the other) is open. Further, as disconnection detection, it is detected that the terminal open detection circuit is not in the open state, and thereafter, it is detected that the terminal is open. As described above, in the first invention, the power transistor detects that the terminals are not in an open state in advance, and then detects that the terminals are in an open state by the power transistor.
  • the first invention is based on the condition that the terminals are not in an open state and that the terminals are in an open state. Detect whether or not.
  • the terminal open detection circuit when the power transistor is performing the drive current output operation, the terminal open detection circuit has an open state between one, one of the shifts and one, and the other one of the shifts. To detect any of Then, as the disconnection detection, the disconnection state is detected when the open state is detected a plurality of times in response to the detection of either the open state or the connection state by the terminal open detection circuit.
  • connection state is set to the open state when the connection state is not established, and the connection state is set to the connection state when the connection state is not established.
  • the power transistor also detects that the power transistor is always in the open state or the open state when the drive transistor is outputting the drive current. At this time, the drive current is flowing through the coil of the motor. It is hardly affected by instantaneous noise and changes in driving conditions. In particular, if the open / closed state is detected near the voltage value corresponding to the drive current limit current value, it is less affected by instantaneous noise and instantaneous open state. Can be detected.
  • the output terminal force of the power transistor can be immediately detected when there is a disconnection between the other end of the excitation coil of the motor, so that the power transistor can be prevented from being destroyed.
  • FIG. 1 is a block diagram of a bipolar drive stepping motor driver according to an embodiment to which a power transistor protection circuit of a motor drive circuit according to the present invention is applied
  • FIG. 6 is a timing chart of the operation of the transistor protection circuit.
  • reference numeral 10 denotes a bipolar driving stepping motor driver IC having four excitation coils.
  • single-phase drive circuits la, lb, lc, Id are provided, and the excitation terminals 11a, l ib, 11c, 11 d of the stepping motor 11 are connected to the respective output terminals 2a, 2b, 2c, 2d. Each is connected.
  • excitation coils 11a, lib, 11c, lid are connected to a power supply line 13 of a power supply (battery) 12, and receive power supply therefrom.
  • a flywheel diode D is connected in parallel to each of the excitation coils 11a, lib, 11c, lid.
  • the power supply 12 supplies power to the voltage regulator circuit (REG) 2 inside the IC via the terminal 2e, and a predetermined voltage, for example, 3 V, which is stabilized to the internal power supply line + VDD via REG2. Is transmitted to various internal circuits.
  • REG voltage regulator circuit
  • the single-phase drive circuits la, lb, lc, and Id are each composed of the same circuit, the details are shown only in the single-phase drive circuit la.
  • the single-phase drive circuit la will be described, and the description of the single-phase drive circuits lb, lc, Id will be omitted because they are the same.
  • Describing the single-phase drive circuit la it comprises an N-channel MOSFET power transistor 3, a power transistor protection circuit 4, a current limiting circuit 5, and a reference voltage generating circuit 6. Note that, for convenience of explanation, the current limiting circuit 5 of each single-phase drive circuit is outside the dotted frame of the single-phase drive circuit la.
  • the power transistor 3 has a drain connected to the output terminal 2a, and outputs an excitation current to the output terminal 2a.
  • the source side of the power transistor 3 is connected via a terminal 2f to an output current detecting resistor Rs attached outside the IC, and is grounded via this.
  • the output current of the output terminal 2a is a current sinking from the exciting coil 11a to the output terminal 2a.
  • the lower transistor protection circuit 4 includes a terminal open detection circuit 4a for detecting an open state between the power supply line 12a of the battery 12 and the output terminal 2a, and a disconnection detection circuit 4b.
  • the terminal open detection circuit 4a detects that the terminals are open by detecting the voltage between the output terminal 2a and the terminal (the other terminal) on the power supply line 13 side of the exciting coil 11a.
  • the resistance voltage dividing circuit 44 is connected between the output terminal 2a and the ground GND, and has the resistances Rl and R2.
  • the resistor voltage dividing circuit 45 includes resistors R3 and R4, one of which is connected to the power supply line 13 via the terminal 2i and the other of which is connected to the ground GND.
  • the (+) input of the comparator 46 is connected to the connection point of the resistor of the resistance voltage dividing circuit 44 and receives the divided voltage Va at the connection point.
  • the (1) input is connected to the connection point of the resistance of the resistance voltage dividing circuit 45 and receives the divided voltage Vb at the connection point.
  • Va> Vb because the output terminal 2a has a voltage value corresponding to this current value.
  • the output of the comparator 46 changes from “H” to “L”. That is, the comparator 46 generates an “L” significant output detection pulse indicating that an output current is generated when the output is “L” (see FIG. 2D).
  • This output detection pulse is a detection signal output by the terminal open detection circuit 4a to indicate that the output terminal 2a is connected to the other terminal of the exciting coil 11a. Conversely, this output detection pulse indicates that these pins are not open. Therefore, when this output detection pulse is not generated while the power transistor 3 is performing the drive current output operation, these terminals are in the open state.
  • the voltage of the divided voltage Vb is set to a voltage value close to the limit current value of the drive current (5% to 20% lower).
  • the power transistor 3 when the power transistor 3 is performing the output operation of the drive current, it is detected whether the output terminal 2a is in the open state, and when the drive current is close to the voltage value corresponding to the limited current value, If the terminal detects whether or not the terminal is in the open state, the drive current continues to flow through the motor coil, and the detection of the terminal open state is less likely to be affected by noise or instantaneous open state due to the relationship. .
  • the disconnection detection circuit 4b also has a comparator 4c and an octal counter 4d, and the octal counter 4d also receives the clock CLK transmitted via the terminal 2h.
  • the (+) input of the comparator 4c receives the comparison reference voltage VR from the reference voltage generation circuit 6 provided commonly to the single-phase drive circuits la, lb, lc, and Id.
  • the detection voltage signal is received from the circuit 4a.
  • the output of the comparator 4c is connected to the reset terminal R of the octal counter 4d.
  • the reference voltage generation circuit 6 is supplied with the power by laser trimming or the like. Pressure adjustment is possible. By this voltage adjustment, the voltage VR is set so that each of the comparators 4c of the single-phase drive circuits la, lb, lc, Id generates a reset signal.
  • the reset signal changes from “H” to “L” of the comparator 46, and when the comparator 4c changes to “H” next, the falling trigger signal when the comparator 4c falls from “H” to “L” is generated. Used.
  • the disconnection detection circuit 4b receives the detection voltage signal from the terminal open detection circuit 4a, and detects the disconnection by counting the clock CLK with the octal counter 4d that the open state continues for a certain period of time. That is, the disconnection detection signal is generated when the octal counter 4d finishes counting (counting up to 8 or more). As a result, a disconnection detection signal is generated during a period when the power transistor 3 is not performing a drive current output operation. Thus, the disconnection detection signal does not need to be affected by noise during the operation of the power transistor 3.
  • the period TG of the gate drive pulse for driving the power transistor 3 is TG ⁇ 8 ⁇ T, and T is the period of the clock CLK.
  • the period TG is set to, for example, a period of about 6 counts (6 ⁇ T) of the octal counter 4d!
  • the comparator 4c generates an "H" output pulse (reset pulse) and resets the octal counter 4d only when the comparator 46 generates an "L" output detection pulse. As a result, the octal counter 4d starts counting from “0". Since the next gate drive pulse is generated before 8 XT, an output current of the power transistor 3 is generated. As long as this occurs, octal counter 4d will continue to be reset. As a result, the 8-counter counter 4d does not generate an 8-count end signal.
  • the divided voltage of the resistance voltage dividing circuit 44 becomes the ground GND potential, and the output generated by the comparator 46 is generated. Even if a gate drive pulse is generated, the detection pulse remains at “H” when no output current is generated in the power transistor 3 (see the second half waveform of FIG. 4E). Therefore, the output pulse (reset pulse) of the comparator 4c remains "L", and the octal counter 4d is not reset by the output pulse of the comparator 4c. . As a result, when the output current of the power transistor 3 is not generated, an eight count end signal of the octal counter 4d is generated. This 8 count end signal is used as a disconnection detection signal.
  • Reference numeral 41 denotes a drive stop signal generation circuit, which comprises an OR gate 42 and a latch circuit 43. Then, the latch circuit 43 receives the 8-count end signal "H" of the final stage of the octal counter 4d of the single-phase drive circuits la, lb, lc, Id via the OR gate 42 as a disconnection detection signal. As a result, the latch circuit 43 receives the 8 count end signal “H” at “1” and latches the logical sum signal of the exciting coils 11a-1 Id according to the clock CLK.
  • the latch circuit 43 applies this “1” to the phase excitation signal generation circuit 9 as a drive stop signal SP. Thereby, the phase excitation signal generation circuit 9 stops its operation.
  • the reset signal “1” is input to the reset terminal R of the latch circuit 43 via the terminal RS, the value of the latch circuit 43 is cleared to “0”. In the initial state, the latch circuit 43 is set to “0” by the reset signal.
  • an octal counter 4d when a disconnection occurs between the terminal coil of the excitation coil 11a on the power supply line 13 side and the connection terminal 2a, an octal counter 4d generates an 8 count end signal ("H") as a disconnection detection signal. As a result, "1" is latched in the latch circuit 43, and the operation of the phase excitation signal generation circuit 9 stops. As a result, the stepping motor driver IC 10, especially the power transistor 3, does not need to be destroyed.
  • an overflow signal or a carry signal of the octal counter 4d may be used.
  • the current limiting circuit 5 includes a comparator 5a and a reference voltage generating circuit 5b.
  • the (+) input terminal of the comparator 5a is connected to the terminal 2f
  • the reference voltage generation circuit 5b is provided outside the IC, and is connected to the (1) input terminal of the comparator 5a via the terminal 2g, and the reference voltage VREF To the (1) input terminal.
  • the terminal voltage (voltage at terminal 2f) of the output current detection resistor Rs is Vs
  • the drive current (output current) of the power transistor 3 increases, and the output current that causes the voltage Vs to exceed the reference voltage VREF
  • the comparator 5a generates the detection noise S.
  • This detection pulse S is output to the pulsing pulse generation circuit 7 to output “H”. Turns the shoving pulse P OFF ("H" to “L”) and drives the OFF timer circuit 8. As a result, the power transistor 3 is turned off (the operation is described later).
  • the stop time of the tibbing pulse P (the period of “L”) is counted by the OFF timer circuit 8 for setting the OFF time, and after a fixed period of time, for example, 15 seconds, the tibbing pulse P changes from “L” to “H”.
  • the shoving pulse P is a pulse that becomes “H” for a selected period in a range of, for example, about 30 ⁇ sec to 50 ⁇ sec. That is, the chubbing pulse P is generated as a chubbing pulse when the norm of “H” becomes “L” in response to the detection pulse S and becomes “H” after a predetermined time.
  • the current limiting circuit 5 stops the driving current and limits the output current of the power transistor 3.
  • the current limiting circuit 5 is provided to also serve as an overcurrent protection circuit of the motor drive circuit.
  • the shoving pulse P of "H” is sent to the phase excitation signal generation circuit 9, and for example, in the phase excitation signal generation circuit 9, the gate drive pulse of the single-phase drive circuit la is output by an AND gate.
  • "H” and AND logic are taken and output to the gate of the power transistor 3 (see FIGS. 2 (a) and 2 (b)). Therefore, in the power transistor 3, a pulsing pulse (corresponding to the pulsing pulse P) that cuts off the transistor 3 at a predetermined frequency during the “H” of the gate drive pulse is generated from the phase excitation signal generation circuit 9. Will be.
  • the gate drive pulse becomes “L”
  • the power transistor 3 is turned off, and the drive current for the exciting coil 1 la of the stepping motor 11 stops.
  • a flywheel diode D is provided in parallel with each exciting coil! /, So that the current flowing through each exciting coil 11a, llb, 11c, lid is determined by the pulsing pulse P being "L”.
  • the current flows through the flywheel diode D. It is an average current determined by the relationship between the ON period and the OFF period by the shoving pulse P.
  • the chabbing pulse generation circuit 7 and the OFF timer circuit 8 are provided in common with the single-phase drive circuits la, lb, lc, and Id. 1A, lb, lc, and Id excitation pulse drive is generated for each excitation pulse P The signal is sent to the phase excitation signal generation circuit 9.
  • the phase excitation signal generation circuit 9 drives the gates of the power transistors 3 of the single-phase drive circuits la, lb, lc, and Id according to single-phase drive, one-phase to two-phase drive, two-phase drive, and the like for each excitation coil.
  • This circuit generates pulses at a predetermined timing and generates "H” and "L” gate drive pulses. Further, the "H" period of each gate pulse is shoved by each shoving pulse P to limit the drive current. Note that the cycle of the shoving pulse P is smaller than the cycle of the clock CLK.
  • FIG. 2 is a timing chart of the operation of the power transistor protection circuit 4.
  • FIG. 2A shows a gate drive pulse of the single-phase drive circuit la, and during this period of “H”, the power transistor 3 is driven by shoving.
  • FIG. 2 (b) shows the shobbing pulse P.
  • a driving current flows through the exciting coil 11a of the stepping motor 11, so that the output voltage Vout of the output terminal 2a becomes , Figure 2 (It looks like this.
  • the comparator 46 changes from “H” to “L” when the divided voltage Va obtained by dividing the voltage according to the voltage of the output terminal 2a exceeds the divided voltage Vb (see FIG. 2 (d)).
  • the output pulse becomes "H", "L", “H”, " It becomes an output detection pulse of L ".
  • the comparator 4c Since the cycle of the chopping panel P is smaller than the clock CLK, the comparator 4c generates an “H” output (reset pulse) in accordance with the output pulse of the output detection pulse “L” of the comparator 46. To reset the octal counter 4d. As a result, the latch circuit 43 remains at the initial value “0”, and the phase excitation signal generation circuit 9 continues to operate without generating the drive stop signal SP.
  • the last output detection pulse of "L” of the comparator 46 generated at this time is generated in accordance with the chopping norse P in FIG. Then, the "L" output detection pulse of the comparator 46 which is generated next corresponds to the first shoving pulse P after the next gate drive pulse is generated. At this time, the generation period of the output detection pulse of “L” of the comparator 46 is shorter than the period 8 XT during which the octal counter 4d counts for eight clocks. Therefore, the terminal force of the excitation coil 11a on the side of the power supply line 13 is also connected. As long as there is no disconnection up to the terminal 2a, the drive stop signal SP for the phase excitation signal generation circuit 9 is not generated from the latch circuit 43. Note that the count period of the octal counter 4d only needs to be longer than the last output detection pulse power and the first output detection pulse.
  • the 8 count end signal (disconnection detection signal) from the octal counter 4d is longer than the period during which the comparator 46 generates more than one "L" output detection pulse in the period during which the next output current is generated. It is preferred that Therefore, here, the period up to the end of 8 counts of the octal counter 4d is a value longer than the generation cycle of each gate drive pulse in each of the single-phase drive circuits la, lb, lc, and Id. Is set to As a result, it is possible to detect that the terminal open state continues for one cycle or more of the gate drive pulse.
  • the OR gate 42 receives the 8 count end signal (disconnection detection signal) obtained by the final stage of the octal counter 4d of the single-phase drive circuits la, lb, lc, and Id by a logical sum.
  • the operation of the phase excitation signal generation circuit 9 is stopped even when the 8 count end signal (disconnection detection signal) is generated in the octal counter 4d of lb, lc, or Id.
  • the octal counter 4d can be a 13-ary counter or a counter that counts more.
  • the detection signal indicating the connection state of the terminal open detection circuit 4a does not occur continuously more than once, it is assumed that the terminal open detection signal has been continuously generated more than once, and at this time, the disconnection detection circuit is first generated. 4b determines that the wire is broken. This makes it possible to more reliably determine the disconnection.
  • the disconnection determination may be made such that the period from the reset of the counter 4d to the end of the count exceeds twice the period TG of the gate drive pulse.
  • the disconnection detection circuit 4b may determine that a disconnection has occurred when the terminal open detection signal is not detected continuously but is detected a plurality of times.
  • the comparator 5a is provided in each of the single-phase drive circuits la, lb, lc, and Id, but the comparator 5a is provided in common to a plurality of single-phase drive circuits. You may. In this case, for example, each of the comparators 5a of the single-phase drive circuits la and lb and each of the comparators 5a of the single-phase drive circuits lc and Id share a detection resistor Rs for the output current value. Two can be used in total. Further, in the embodiment, the comparator 5 is one having two (+) input terminals. The internal circuit of the comparator 5 may be composed of two comparators in parallel. This may also use a comparator with two (+) input terminals and two (1) input terminals.
  • the disconnection detection signal is used as the count end signal of the n-ary counter, but the present invention does not need to use the count end signal of the counter.
  • the disconnection detection signal according to the present invention is provided if the detection signal of the terminal open detection circuit is received and the output of the drive current at the time of receiving the signal is later than the period until the output of the next drive current generated. Good.
  • the power transistor Tr of the embodiment is a MOSFET transistor. Of course, this may be a bipolar transistor.
  • the motor drive circuit of the stepper motor driver IC of the bipolar drive is described.
  • the output circuit of the power transistor is used as the drive circuit of the push-pull operation, and the bipolar drive (positive phase It is needless to say that the present invention may be applied to a stepping motor driver IC having the opposite phase of double-wave drive).
  • the power transistor 3 that controls the power transistor 3 to be turned off via the tibbing pulse generation circuit 7 and the OFF timer circuit 8 is configured to be turned off,
  • the shoving pulse generation circuit 7 and the OFF timer circuit 8 are not necessarily required for the present invention.
  • any drive circuit having a current limiting circuit that limits the drive current by turning off the power transistor at a specified current value described in the stepping motor driver IC is used. Even if there is, this invention can be applied.
  • FIG. 1 is a block diagram of a bipolar drive stepping motor driver according to an embodiment to which a power transistor protection circuit of a motor drive circuit according to the present invention is applied.
  • FIG. 2 is a timing chart of the operation of the power transistor protection circuit.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Stepping Motors (AREA)

Abstract

A power transistor protecting circuit of a motor drive circuit, a motor drive circuit, or a semiconductor device, wherein when a breaking of wire exists between the output terminal of a power transistor and another end of an exciting coil of a motor, the power transistor can be prevented from being broken. There are included a terminal open detection circuit, a breaking-of-wire detection circuit and a drive halting circuit. While a power transistor is in an operation of outputting a drive current, it is determined whether there exists an open condition between a terminal, or a line connected thereto, of each exciting coil whose output terminal is not connected to the terminal open detection circuit and an output terminal, or a line connected thereto, which corresponds to each exciting coil. A breaking of wire is detected by detecting an open condition after detecting no open condition.

Description

明 細 書  Specification
モータドライブ回路のパワートランジスタ保護回路、モータドライブ回路お よび半導体装置  Power transistor protection circuit of motor drive circuit, motor drive circuit and semiconductor device
技術分野  Technical field
[0001] この発明は、モータドライブ回路のパワートランジスタ保護回路、モータドライブ回路 および半導体装置に関し、詳しくは、ュ-ポーラ(半波)駆動のステッピングモータドラ ィバにおいて、パワートランジスタの出力端子とモータの励磁コイルとの間が断線状 態になっているときにパワートランジスタが破壊されるのを防止することができるような モータドライブ回路のパワートランジスタ保護回路に関する。  The present invention relates to a power transistor protection circuit for a motor drive circuit, a motor drive circuit, and a semiconductor device, and more particularly, to an output terminal of a power transistor and a motor in a stepper motor driver driven by a bipolar (half-wave) drive. The present invention relates to a power transistor protection circuit for a motor drive circuit capable of preventing a power transistor from being destroyed when a disconnection is made between the power transistor and an exciting coil.
背景技術  Background art
[0002] ュ-ポーラ駆動のステッピングモータドライバ(パルスモータドライノく)は、 1相駆動、  [0002] A bipolar drive stepping motor driver (pulse motor driver) is a one-phase drive,
1相— 2相駆動あるいは 2相駆動等によりモータの固定子側を順次励磁することで、所 定の回転角だけ突起形状の回転子を回転させる。  By sequentially exciting the stator side of the motor by one-phase-two-phase drive or two-phase drive, the protruding rotor is rotated by a predetermined rotation angle.
各固定子を励磁するための駆動電流を流すドライバは、電源ラインに接続され固定 子に巻かれたコイル (励磁コイル)に対してこれに直列にパワートランジスタ(出力段ト ランジスタ)が各相対応にそれぞれ設けられていている。この各相対応に設けられた パワートランジスタが所定のタイミングで ONZOFFされることで、固定子が順次励磁 されてステッピングモータがドライブされる。  The driver that supplies the drive current for exciting each stator has a power transistor (output transistor) corresponding to each phase in series with the coil (excitation coil) connected to the power supply line and wound on the stator. Is provided in each. When the power transistor provided for each phase is turned ON / OFF at a predetermined timing, the stator is sequentially excited and the stepping motor is driven.
ある相のパワートランジスタが ONすると、その相の励磁コイルのインダクタンスとパ ワートランジスタ等のインピーダンスにより決定される所定の時定数の過渡現象で O N期間の間順次駆動電流が増力!]していく。この増加量を所定値までに制限するため に、パワートランジスタを ONさせて力 所定の期間後に OFFすることで、パワートラン ジスタに過電流が流れないように制御される。そのため、パワートランジスタは、通常 、 ONZOFFする" H" (HIGHレベル), "L" (LOWレベル)の論理値パルスで各相 がチヨッビングによるノ ルス駆動される。  When the power transistor of a certain phase is turned on, the drive current sequentially increases during the ON period due to a transient phenomenon of a predetermined time constant determined by the inductance of the exciting coil of the phase and the impedance of the power transistor and the like!]. In order to limit this increase to a predetermined value, the power transistor is turned on and turned off after a predetermined period, so that the power transistor is controlled so that no overcurrent flows. Therefore, each phase of the power transistor is normally driven by shobbing with a logic value pulse of "H" (HIGH level) and "L" (LOW level) to be ONZOFF.
[0003] このようなパルス駆動制御の 1つとして、 ON期間をタイマ回路で設定して制御する チヨッパ制御の 3相モータドライバとその IGBTパワートランジスタの保護回路が公知 である (特許文献 1)。 [0003] As one of such pulse drive controls, a chopper-controlled three-phase motor driver in which an ON period is set and controlled by a timer circuit and a protection circuit for its IGBT power transistor are known. (Patent Document 1).
特許文献 1 :特開平 11— 112313号公報  Patent Document 1: JP-A-11-112313
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0004] 前記のようなパワートランジスタの保護回路は、過電流保護回路や電流制限回路が 一般的である。しかし、モータ駆動のドライバが IC化されている場合には、出力端子 にモータの励磁コイルの端子が接続されることから、出力端子とモータとの接続不良 が発生し易い。また、モータ等では回転子があるので励磁コイルの断線等も発生する し力も、モータ駆動回路等では、ノイズや駆動状態などによってパワートランジスタ の出力端子の 1つが瞬間的にオープン状態になることがあって、端子のオープン状 態を検出することで断線を検出しょうとすると誤検出が発生し易ぐモータドライブ回 路の駆動動作に影響を与えて、実用的なものにはならない。したがって、この種の断 線に対する保護回路は見受けられな 、。 [0004] The above-described power transistor protection circuit generally includes an overcurrent protection circuit and a current limiting circuit. However, if the motor drive driver is integrated into an IC, the output terminal is connected to the terminal of the motor's excitation coil, so connection failure between the output terminal and the motor is likely to occur. In addition, motors and other devices have a rotor, which can cause disconnection of the excitation coil.In motor drive circuits, etc., one of the output terminals of the power transistor may momentarily open due to noise or driving conditions. Therefore, if an attempt is made to detect a disconnection by detecting the open state of the terminal, erroneous detection is likely to occur, which affects the driving operation of the motor drive circuit, and is not practical. Therefore, no protection circuit has been found for this kind of disconnection.
ステッピングモータドライバにおいて、出力端子の 1つに接続不良や励磁コイルの 断線が発生したときにもモータの駆動は継続される。このとき、オープンとなった端子 に接続される励磁コイルに逆起電力が発生しなくなるため、その分、他の励磁コイル に流れる電流が増加してドライバ全体として過負荷状態でモータの駆動が継続され る。それによりパワートランジスタが破壊され、しいては IC自体が破壊されることになる この発明の目的は、このような従来技術の問題点を解決するものであり、パワートラ ンジスタの出力端子力 モータの励磁コイルの他端までの間に断線があるときにパヮ 一トランジスタが破壊されるのを防止することができるモータドライブ回路のパワートラ ンジスタ保護回路、モータドライブ回路あるいは半導体装置を提供することにある。 課題を解決するための手段  In the stepping motor driver, the motor continues to be driven even if one of the output terminals has a poor connection or the exciting coil is disconnected. At this time, since no back electromotive force is generated in the exciting coil connected to the open terminal, the current flowing to the other exciting coils increases by that amount, and the motor continues to be driven in an overloaded state as a whole driver. Is performed. As a result, the power transistor is destroyed, and the IC itself is destroyed. An object of the present invention is to solve such a problem of the prior art, and to reduce the output terminal force of the power transistor. An object of the present invention is to provide a power transistor protection circuit for a motor drive circuit, a motor drive circuit, or a semiconductor device that can prevent a power transistor from being destroyed when there is a disconnection up to the other end of a coil. Means for solving the problem
[0005] このような目的を達成するための第 1の発明のモータドライブ回路のパワートランジ スタ保護回路、モータドライブ回路あるいは半導体装置の構成は、出力端子を介して モータの励磁コイルに駆動電流を出力するパワートランジスタを複数の励磁コイルに 対応して複数有するモータドライブ回路におけるパワートランジスタ保護回路におい て、 [0005] In order to achieve the above object, the configuration of the power transistor protection circuit, the motor drive circuit, or the semiconductor device of the motor drive circuit according to the first invention provides a drive current to an excitation coil of the motor via an output terminal. Output power transistor to multiple excitation coils In the power transistor protection circuit of the motor drive circuit having a plurality of correspondingly,
端子オープン検出回路と、断線検出回路と、駆動停止回路とを備えるものである。 そして、端子オープン検出回路は、出力端子に接続されていない各励磁コイルの 他方の端子とこの他方の端子が接続されて 、るラインとの 、ずれかの一方と他方の 端子を持つ励磁コイルが接続されて!ヽる出力端子ある!ヽはこの出力端子が接続され ているラインとのいずれかの他方との間に設けられかつ複数のパワートランジスタに 対応してそれぞれ設けられパワートランジスタが駆動電流の出力動作をしているとき にいずれか一方といずれか他方との間がオープン状態にある力否かを検出するもの であり、  It includes a terminal open detection circuit, a disconnection detection circuit, and a drive stop circuit. Then, the terminal open detection circuit is configured such that the other terminal of each excitation coil that is not connected to the output terminal is connected to the other terminal, and the excitation coil having one of the deviations from the other line and the other terminal. There are output terminals that are connected! Are provided between one of the lines to which this output terminal is connected and one of the other lines, and are provided corresponding to a plurality of power transistors, respectively. It is to detect whether or not the force is open between either one and the other during the output operation of
断線検出回路は、端子オープン検出回路がいずれか一方といずれか他方との間 がオープン状態にないことを検出しかつその後にオープン状態にあることを検出した ことにより断線状態のいずれかを検出するものであり、  The disconnection detection circuit detects that there is no open state between one of the terminals and one of the other terminals, and then detects any of the disconnection states by detecting that it is open. Things,
駆動停止回路は、この断線検出回路により断線状態が検出されたときにモータドラ イブ回路の駆動動作を停止させるものである。  The drive stop circuit stops the drive operation of the motor drive circuit when the disconnection state is detected by the disconnection detection circuit.
また、第 2の発明は、前記の端子オープン検出回路がパワートランジスタが駆動電 流の出力動作をして 、るときに!/、ずれか一方と!/、ずれか他方との間のオープン状態 あるいは接続状態を検出するものであり、  Further, in the second invention, in the terminal open detection circuit, when the power transistor performs the output operation of the drive current, the open state between! /, One of the shifts and! /, And Or to detect the connection state,
前記の断線検出回路が端子オープン検出回路によるオープン状態あるいは接続 状態のいずれかの検出に応じて複数回オープン状態が検出されたときに断線状態 を検出するものである。  The disconnection state is detected when the disconnection detection circuit detects the open state a plurality of times in response to the detection of either the open state or the connection state by the terminal open detection circuit.
発明の効果 The invention's effect
このように、第 1の発明は、パワートランジスタが駆動電流の出力動作をしているとき に端子オープン検出回路が出力端子に接続されていない各励磁コイルの他方の端 子あるいはこれが接続されて ヽるライン ( ヽずれか一方)と、各励磁コイルに対応する 出力端子あるいはこれが接続されて 、るライン ( 、ずれか他方)の間がオープン状態 であるか否かを検出する。さらに断線検出として、端子オープン検出回路がオープン 状態にないことを検出しかつその後にパオープン状態であることを検出する。 このように、第 1の発明は、端子間がオープン状態にないことを先に検出しておき、 その後に端子間がオープン状態にあることを検出することをパワートランジスタが駆 動電流の出力動作ごとに行いオープン状態になっていな力つた状態力もオープン状 態になる変化を検出する。また、第 1の発明は、端子間がオープン状態にないことと オープン状態にあることとを検出条件とすることで実質的に後の駆動電流の出力時ま で端子間のオープン状態が続くか否かを検出する。 As described above, according to the first invention, when the power transistor is performing the output operation of the drive current, the terminal open detection circuit is not connected to the output terminal and the other terminal of each excitation coil or the other terminal is connected thereto. And the output terminal corresponding to each exciting coil or the output terminal connected to each of the exciting coils is connected to detect whether or not the open line (or the other) is open. Further, as disconnection detection, it is detected that the terminal open detection circuit is not in the open state, and thereafter, it is detected that the terminal is open. As described above, in the first invention, the power transistor detects that the terminals are not in an open state in advance, and then detects that the terminals are in an open state by the power transistor. Each time it is performed, it detects a change in the force that is not open and the force that becomes open. Further, the first invention is based on the condition that the terminals are not in an open state and that the terminals are in an open state. Detect whether or not.
一方、第 2の発明は、パワートランジスタが駆動電流の出力動作をしているときに端 子オープン検出回路が 1、ずれか一方と 1、ずれか他方との間のオープン状態ある ヽ は接続状態のいずれかを検出する。そして、断線検出として、端子オープン検出回 路によるオープン状態あるいは接続状態のいずれかの検出に応じて複数回オーブ ン状態が検出されたときに断線状態を検出する。  On the other hand, in the second invention, when the power transistor is performing the drive current output operation, the terminal open detection circuit has an open state between one, one of the shifts and one, and the other one of the shifts. To detect any of Then, as the disconnection detection, the disconnection state is detected when the open state is detected a plurality of times in response to the detection of either the open state or the connection state by the terminal open detection circuit.
なお、以上の検出では、当然ながら、接続状態にないときにはオープン状態とされ 、逆にオープン状態にないときには接続状態とされる。  In the above-described detection, it is a matter of course that the connection state is set to the open state when the connection state is not established, and the connection state is set to the connection state when the connection state is not established.
これら複数の条件で断線状態を判定することで、断線の誤検出がなくなり、モータド ライブ回路の駆動動作に影響を与えることなぐ確実に断線を検出することができる。 そこで、断線時にモータドライブ回路の駆動動作を停止させることができる。  By judging the disconnection state under these plural conditions, erroneous detection of the disconnection is eliminated, and the disconnection can be reliably detected without affecting the driving operation of the motor drive circuit. Therefore, the driving operation of the motor drive circuit can be stopped when the wire is disconnected.
し力も、パワートランジスタが駆動電流の出力動作をしているときに常時オープン状 態あるいはオープン状態でな!、ことの検出をし、この検出時には駆動電流がモータ のコイルに流れている関係カゝら瞬間的なノイズや駆動状態などの変化に影響され難 い。特に、駆動電流の制限電流値に対応する電圧値に近いところでオープン状態に ある力否かを検出するようにすれば、瞬間的なノイズや瞬間的にオープン状態になる ことに対して影響され難い検出ができる。  The power transistor also detects that the power transistor is always in the open state or the open state when the drive transistor is outputting the drive current. At this time, the drive current is flowing through the coil of the motor. It is hardly affected by instantaneous noise and changes in driving conditions. In particular, if the open / closed state is detected near the voltage value corresponding to the drive current limit current value, it is less affected by instantaneous noise and instantaneous open state. Can be detected.
その結果、パワートランジスタの出力端子力もモータの励磁コイルの他端までの間 に断線があるときにそれが即座に検出できるのでパワートランジスタが破壊されるの を防止することができる。  As a result, the output terminal force of the power transistor can be immediately detected when there is a disconnection between the other end of the excitation coil of the motor, so that the power transistor can be prevented from being destroyed.
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
図 1は、この発明のモータドライブ回路のパワートランジスタ保護回路を適用した一 実施例のュ-ポーラ駆動のステッピングモータドライバのブロック図、図 2は、パワート ランジスタ保護回路の動作のタイミングチャートである。 FIG. 1 is a block diagram of a bipolar drive stepping motor driver according to an embodiment to which a power transistor protection circuit of a motor drive circuit according to the present invention is applied, and FIG. 6 is a timing chart of the operation of the transistor protection circuit.
図 1において、 10は、励磁コイルが 4個のュ-ポーラ駆動のステッピングモータドラ ィバ ICである。これには、単相駆動回路 la, lb、 lc, Idが設けられ、それぞれの出 力端子 2a, 2b、 2c, 2dに ίまステッピングモータ 11の励磁コィノレ 11a, l ib, 11c, 11 dがそれぞれ接続されて ヽる。  In FIG. 1, reference numeral 10 denotes a bipolar driving stepping motor driver IC having four excitation coils. In this, single-phase drive circuits la, lb, lc, Id are provided, and the excitation terminals 11a, l ib, 11c, 11 d of the stepping motor 11 are connected to the respective output terminals 2a, 2b, 2c, 2d. Each is connected.
これら励磁コイル 11a, l ib, 11c, l idは、電源(電池) 12の電源ライン 13に接続 されてこれから電力供給を受ける。なお、各励磁コイル 11a, l ib, 11c, l idには、 それぞれフライホイールダイオード Dが並列に接続されて!ヽる。  These excitation coils 11a, lib, 11c, lid are connected to a power supply line 13 of a power supply (battery) 12, and receive power supply therefrom. A flywheel diode D is connected in parallel to each of the excitation coils 11a, lib, 11c, lid.
また、電源 12は、端子 2eを介して IC内部の電圧レギユレータ回路 (REG) 2に電力 を供給して、 REG2を介して内部電源ライン +VDDに安定ィ匕した所定の電圧、例え ば、 3Vの電力を各種の内部回路に送出する。  In addition, the power supply 12 supplies power to the voltage regulator circuit (REG) 2 inside the IC via the terminal 2e, and a predetermined voltage, for example, 3 V, which is stabilized to the internal power supply line + VDD via REG2. Is transmitted to various internal circuits.
単相駆動回路 la, lb、 lc, Idは、それぞれ同一の回路で構成されているので、そ の詳細は単相駆動回路 laのみに示す。以下、単相駆動回路 laについて説明し、単 相駆動回路 lb、 lc, Idは、同様であるのでその説明を割愛する。  Since the single-phase drive circuits la, lb, lc, and Id are each composed of the same circuit, the details are shown only in the single-phase drive circuit la. Hereinafter, the single-phase drive circuit la will be described, and the description of the single-phase drive circuits lb, lc, Id will be omitted because they are the same.
単相駆動回路 laについて説明すると、 Nチャネル MOSFETパワートランジスタ 3と 、パワートランジスタ保護回路 4、電流制限回路 5、そして基準電圧発生回路 6とから なる。なお、説明の都合上、各単相駆動回路の電流制限回路 5は、単相駆動回路 la の点線枠の外に出してある。  Describing the single-phase drive circuit la, it comprises an N-channel MOSFET power transistor 3, a power transistor protection circuit 4, a current limiting circuit 5, and a reference voltage generating circuit 6. Note that, for convenience of explanation, the current limiting circuit 5 of each single-phase drive circuit is outside the dotted frame of the single-phase drive circuit la.
パワートランジスタ 3は、ドレインが出力端子 2aに接続され、出力端子 2aに励磁電 流を出力する。パワートランジスタ 3のソース側は、端子 2fを介して IC外部に取り付け られた出力電流検出用の抵抗 Rsに接続され、これを介して接地されている。なお、 出力端子 2aの出力電流は、この出力端子 2aに励磁コイル 11aからシンクする電流と なる。  The power transistor 3 has a drain connected to the output terminal 2a, and outputs an excitation current to the output terminal 2a. The source side of the power transistor 3 is connected via a terminal 2f to an output current detecting resistor Rs attached outside the IC, and is grounded via this. The output current of the output terminal 2a is a current sinking from the exciting coil 11a to the output terminal 2a.
ノワートランジスタ保護回路 4は、電池 12の電源ライン 12aと出力端子 2aとのォー プン状態を検出する端子オープン検出回路 4aと断線検出回路 4bとからなる。  The lower transistor protection circuit 4 includes a terminal open detection circuit 4a for detecting an open state between the power supply line 12a of the battery 12 and the output terminal 2a, and a disconnection detection circuit 4b.
端子オープン検出回路 4aは、出力端子 2aと前記励磁コイル 11aの電源ライン 13 側の端子 (他方の端子)との電圧を検出することでこれら端子間がオープン状態にあ ることを検出するものであって、抵抗分圧回路 44と抵抗分圧回路 45、そしてコンパレ ータ 46とからなる。抵抗分圧回路 44は、出力端子 2aとグランド GNDとの間に接続さ れ、た抵抗 Rl, R2力もなる。抵抗分圧回路 45は、端子 2iを介して電源ライン 13に一 方が接続され、他方がグランド GNDに接続された抵抗 R3, R4からなる。 The terminal open detection circuit 4a detects that the terminals are open by detecting the voltage between the output terminal 2a and the terminal (the other terminal) on the power supply line 13 side of the exciting coil 11a. There is a resistor divider circuit 44, a resistor divider circuit 45, and a comparator Data 46. The resistance voltage dividing circuit 44 is connected between the output terminal 2a and the ground GND, and has the resistances Rl and R2. The resistor voltage dividing circuit 45 includes resistors R3 and R4, one of which is connected to the power supply line 13 via the terminal 2i and the other of which is connected to the ground GND.
コンパレータ 46の(+ )入力は、抵抗分圧回路 44の抵抗の接続点に接続され、接 続点の分圧電圧 Vaを受ける。その (一)入力は、抵抗分圧回路 45の抵抗の接続点に 接続され、接続点の分圧電圧 Vbを受ける。ここで、パワートランジスタ 3の出力が発 生してそれが所定の駆動電流値になったときには、出力端子 2aがこの電流値に応じ た電圧値になるので、 Va>Vbとなる。このとき、コンパレータ 46の出力は" H"から" L "となる。すなわち、コンパレータ 46は、 "L"のときに出力電流が発生していることを示 す" L"有意の出力検出パルスを発生する(図 2 (d)参照)。この出力検出パルスは、 端子オープン検出回路 4aが出力端子 2aと励磁コイル 11aの他方の端子とが接続状 態にあることを示すために出力する検出信号である。逆に言えば、この出力検出パ ルスは、これら端子がオープン状態にないことを示している。したがって、パワートラン ジスタ 3が駆動電流の出力動作をしているときにこの出力検出パルスが発生しないと きにはこれら端子がオープン状態になっていることになる。  The (+) input of the comparator 46 is connected to the connection point of the resistor of the resistance voltage dividing circuit 44 and receives the divided voltage Va at the connection point. The (1) input is connected to the connection point of the resistance of the resistance voltage dividing circuit 45 and receives the divided voltage Vb at the connection point. Here, when the output of the power transistor 3 is generated and reaches a predetermined drive current value, Va> Vb because the output terminal 2a has a voltage value corresponding to this current value. At this time, the output of the comparator 46 changes from “H” to “L”. That is, the comparator 46 generates an “L” significant output detection pulse indicating that an output current is generated when the output is “L” (see FIG. 2D). This output detection pulse is a detection signal output by the terminal open detection circuit 4a to indicate that the output terminal 2a is connected to the other terminal of the exciting coil 11a. Conversely, this output detection pulse indicates that these pins are not open. Therefore, when this output detection pulse is not generated while the power transistor 3 is performing the drive current output operation, these terminals are in the open state.
ここで、図 2 (d)に示すように、分圧電圧 Vbの電圧は、駆動電流の制限電流値に近 い電圧値(5%— 20%低いところ)に設定されている。このようにパワートランジスタ 3 が駆動電流の出力動作をしているときに出力端子端子 2aがオープン状態か否かの 検出をし、さらにその駆動電流が制限電流値に対応する電圧値に近いときに端子が オープン状態力否かの検出をするようにすれば、駆動電流がモータのコイルに流れ 続けて、、る関係から端子オープン状態の検出がノイズや瞬間的にオープン状態に影 響され難くなる。  Here, as shown in FIG. 2 (d), the voltage of the divided voltage Vb is set to a voltage value close to the limit current value of the drive current (5% to 20% lower). As described above, when the power transistor 3 is performing the output operation of the drive current, it is detected whether the output terminal 2a is in the open state, and when the drive current is close to the voltage value corresponding to the limited current value, If the terminal detects whether or not the terminal is in the open state, the drive current continues to flow through the motor coil, and the detection of the terminal open state is less likely to be affected by noise or instantaneous open state due to the relationship. .
断線検出回路 4bは、コンパレータ 4cと 8進カウンタ 4dと力もなり、 8進カウンタ 4dは 、クロック発生回路 14力も端子 2hを介して送出されたクロック CLKを受ける。コンパ レータ 4cの(+ )入力は、単相駆動回路 la, lb、 lc, Idに共通に設けられた基準電 圧発生回路 6から比較基準電圧 VRを受け、(一)入力は、端子オープン検出回路 4a から検出電圧信号を受ける。コンパレータ 4cの出力は、 8進カウンタ 4dのリセット端子 Rに接続されている。なお、基準電圧発生回路 6は、レーザトリミング等によりその電 圧調整が可能になっている。この電圧調整により、単相駆動回路 la, lb、 lc, Idの それぞれのコンパレータ 4cがそれぞれにリセット信号を発生するようにその電圧 VR が設定される。 The disconnection detection circuit 4b also has a comparator 4c and an octal counter 4d, and the octal counter 4d also receives the clock CLK transmitted via the terminal 2h. The (+) input of the comparator 4c receives the comparison reference voltage VR from the reference voltage generation circuit 6 provided commonly to the single-phase drive circuits la, lb, lc, and Id. The detection voltage signal is received from the circuit 4a. The output of the comparator 4c is connected to the reset terminal R of the octal counter 4d. Note that the reference voltage generation circuit 6 is supplied with the power by laser trimming or the like. Pressure adjustment is possible. By this voltage adjustment, the voltage VR is set so that each of the comparators 4c of the single-phase drive circuits la, lb, lc, Id generates a reset signal.
なお、このリセット信号は、コンパレータ 46の" H"から" L"となり、次に" H"に変化し たときにコンパレータ 4cが" H"から" L"に立下がるときの立下がりトリガ信号が利用さ れる。  The reset signal changes from “H” to “L” of the comparator 46, and when the comparator 4c changes to “H” next, the falling trigger signal when the comparator 4c falls from “H” to “L” is generated. Used.
断線検出回路 4bは、端子オープン検出回路 4aから検出電圧信号を受けて、一定 期間オープン状態が «I続していることを 8進カウンタ 4dでクロック CLKをカウントする ことで断線の検出をする。すなわち、断線検出信号は、 8進カウンタ 4dがカウント終了 (8カウントか、それ以上カウントアップすること)することで発生する。これによりパワー トランジスタ 3が駆動電流の出力動作をしていない期間に断線検出信号を発生する。 これにより断線検出信号は、パワートランジスタ 3の動作中のノイズに影響されないで 済む。  The disconnection detection circuit 4b receives the detection voltage signal from the terminal open detection circuit 4a, and detects the disconnection by counting the clock CLK with the octal counter 4d that the open state continues for a certain period of time. That is, the disconnection detection signal is generated when the octal counter 4d finishes counting (counting up to 8 or more). As a result, a disconnection detection signal is generated during a period when the power transistor 3 is not performing a drive current output operation. Thus, the disconnection detection signal does not need to be affected by noise during the operation of the power transistor 3.
ところで、パワートランジスタ 3を駆動するゲート駆動パルスの周期 TGは、 TG< 8 X Tであり、 Tは、クロック CLKの周期である。ここでは、周期 TGは、例えば、 8進カウン タ 4dの 6カウント(6 X T)程度の周期に設定されて!、る。  By the way, the period TG of the gate drive pulse for driving the power transistor 3 is TG <8 × T, and T is the period of the clock CLK. Here, the period TG is set to, for example, a period of about 6 counts (6 × T) of the octal counter 4d!
コンパレータ 4cは、コンパレータ 46が" L"の出力検出パルスを発生したときにのみ 、 "H"の出力パルス(リセットパルス)を発生して 8進カウンタ 4dをリセットする。これに より 8進カウンタ 4dは、 "0"からそのカウントをスタートさせる。 8 XTより手前で次のゲ ート駆動パルスが発生するので、これにより、パワートランジスタ 3の出力電流が発生 する。これが発生する限りは、 8進カウンタ 4dはリセットされ続ける。その結果、 8進力 ゥンタ 4dの 8カウント終了信号は発生しな 、。  The comparator 4c generates an "H" output pulse (reset pulse) and resets the octal counter 4d only when the comparator 46 generates an "L" output detection pulse. As a result, the octal counter 4d starts counting from "0". Since the next gate drive pulse is generated before 8 XT, an output current of the power transistor 3 is generated. As long as this occurs, octal counter 4d will continue to be reset. As a result, the 8-counter counter 4d does not generate an 8-count end signal.
ここで、電源ライン 13側の励磁コイル 11aの端子力も接続端子 2aまでの間で断線 が発生したときには、抵抗分圧回路 44の分圧電圧がグランド GND電位となるので、 コンパレータ 46が発生する出力検出パルスは、たとえゲート駆動パルスが発生しても 、パワートランジスタ 3に出力電流が発生しない場合には" H"のままとなる(図 4 (e)の 後半波形参照)。そのため、コンパレータ 4cの出力パルス(リセットパルス)は" L"のま まとなり、 8進カウンタ 4dは、コンパレータ 4cの出力パルスによってはリセットされない 。その結果、パワートランジスタ 3の出力電流が発生していないときには、 8進カウンタ 4dの 8カウント終了信号が発生することになる。この 8カウント終了信号が断線検出信 号とされる。 Here, when the terminal force of the excitation coil 11a on the side of the power supply line 13 is disconnected between the connection terminal 2a and the connection terminal 2a, the divided voltage of the resistance voltage dividing circuit 44 becomes the ground GND potential, and the output generated by the comparator 46 is generated. Even if a gate drive pulse is generated, the detection pulse remains at “H” when no output current is generated in the power transistor 3 (see the second half waveform of FIG. 4E). Therefore, the output pulse (reset pulse) of the comparator 4c remains "L", and the octal counter 4d is not reset by the output pulse of the comparator 4c. . As a result, when the output current of the power transistor 3 is not generated, an eight count end signal of the octal counter 4d is generated. This 8 count end signal is used as a disconnection detection signal.
41は、駆動停止信号発生回路であって、オアゲート 42とラッチ回路 43とからなる。 そして、単相駆動回路 la, lb、 lc, Idの 8進カウンタ 4dの最終段の 8カウント終了信 号" H"を断線検出信号としてオアゲート 42を介してラッチ回路 43が受ける。これによ りラッチ回路 43は、 8カウント終了信号" H"を" 1"を受けてこれの励磁コイル 11a— 1 Idについての論理和信号をクロック CLKに応じてラッチする。  Reference numeral 41 denotes a drive stop signal generation circuit, which comprises an OR gate 42 and a latch circuit 43. Then, the latch circuit 43 receives the 8-count end signal "H" of the final stage of the octal counter 4d of the single-phase drive circuits la, lb, lc, Id via the OR gate 42 as a disconnection detection signal. As a result, the latch circuit 43 receives the 8 count end signal “H” at “1” and latches the logical sum signal of the exciting coils 11a-1 Id according to the clock CLK.
断線検出信号 ("1")がラッチされたときには、ラッチ回路 43からこの" 1"が駆動停 止信号 SPとして相励磁信号生成回路 9に加えられる。これにより相励磁信号生成回 路 9は、その動作を停止する。なお、ラッチ回路 43のリセット端子 Rにリセット信号" 1" が端子 RSを介して入力されると、ラッチ回路 43の値は、 "0"クリアされる。このラッチ 回路 43は、初期状態では、このリセット信号により" 0"がセットされている。  When the disconnection detection signal (“1”) is latched, the latch circuit 43 applies this “1” to the phase excitation signal generation circuit 9 as a drive stop signal SP. Thereby, the phase excitation signal generation circuit 9 stops its operation. When the reset signal “1” is input to the reset terminal R of the latch circuit 43 via the terminal RS, the value of the latch circuit 43 is cleared to “0”. In the initial state, the latch circuit 43 is set to “0” by the reset signal.
そこで、電源ライン 13側の励磁コイル 11aの端子カゝら接続端子 2aまでの間で断線 が発生したときには、 8進カウンタ 4dから 8カウント終了信号("H")が断線検出信号と して発生してラッチ回路 43に" 1"がラッチされ、相励磁信号生成回路 9の動作が停 止する。これにより、ステッピングモータドライバ IC10、特にパワートランジスタ 3は破 壊されないで済む。  Therefore, when a disconnection occurs between the terminal coil of the excitation coil 11a on the power supply line 13 side and the connection terminal 2a, an octal counter 4d generates an 8 count end signal ("H") as a disconnection detection signal. As a result, "1" is latched in the latch circuit 43, and the operation of the phase excitation signal generation circuit 9 stops. As a result, the stepping motor driver IC 10, especially the power transistor 3, does not need to be destroyed.
ところで、断線検出信号は、 8進カウンタ 4dのオーバーフロー信号やキャリー信号 を使用してもよい。  By the way, as the disconnection detection signal, an overflow signal or a carry signal of the octal counter 4d may be used.
電流制限回路 5は、コンパレータ 5a、そして、基準電圧発生回路 5bとからなる。 コ ンパレータ 5aの(+ )入力端子は、端子 2fと接続され、基準電圧発生回路 5bは、 IC 外部に設けられ、端子 2gを介してコンパレータ 5aの (一)入力端子に接続され、基準 電圧 VREFを (一)入力端子に加える。出力電流検出用の抵抗 Rsの端子電圧 (端子 2f の電圧)を Vsとすると、パワートランジスタ 3の駆動電流(出力電流)が増加して、電圧 Vsが基準電圧 VREFを越えるような出力電流がパワートランジスタ 3に発生したとき、 言い換えれば、出力電流が規定値になったときに、コンパレータ 5aは検出ノ ルス Sを 発生する。この検出パルス Sは、チヨッビングパルス発生回路 7にカ卩えられて、 "H"の チヨッビングパルス Pを OFF ("H"から" L")にするとともに OFFタイマ回路 8を駆動す る。これによりパワートランジスタ 3は OFFになる(その動作にっ ヽては後述)。 The current limiting circuit 5 includes a comparator 5a and a reference voltage generating circuit 5b. The (+) input terminal of the comparator 5a is connected to the terminal 2f, the reference voltage generation circuit 5b is provided outside the IC, and is connected to the (1) input terminal of the comparator 5a via the terminal 2g, and the reference voltage VREF To the (1) input terminal. Assuming that the terminal voltage (voltage at terminal 2f) of the output current detection resistor Rs is Vs, the drive current (output current) of the power transistor 3 increases, and the output current that causes the voltage Vs to exceed the reference voltage VREF When the voltage is generated in the transistor 3, in other words, when the output current reaches the specified value, the comparator 5a generates the detection noise S. This detection pulse S is output to the pulsing pulse generation circuit 7 to output “H”. Turns the shoving pulse P OFF ("H" to "L") and drives the OFF timer circuit 8. As a result, the power transistor 3 is turned off (the operation is described later).
チヨッビングパルス Pの停止時間("L"の期間)は、 OFF時間設定の OFFタイマ回 路 8によりカウントされて、一定期間後、例えば、 15 sec後にチヨッビングパルス Pが "L"から" H"となる。このチヨッビングパルス Pは、例えば、 30 μ sec— 50 μ sec程度の 範囲で選択された期間の間" H"となるパルスである。すなわち、チヨッビングパルス P は、 "H"のノルスが検出パルス Sに応じて" L"となり、一定時間後に" H"となることで 、チヨッビングパルスとして生成される。  The stop time of the tibbing pulse P (the period of “L”) is counted by the OFF timer circuit 8 for setting the OFF time, and after a fixed period of time, for example, 15 seconds, the tibbing pulse P changes from “L” to “H”. " The shoving pulse P is a pulse that becomes “H” for a selected period in a range of, for example, about 30 μsec to 50 μsec. That is, the chubbing pulse P is generated as a chubbing pulse when the norm of “H” becomes “L” in response to the detection pulse S and becomes “H” after a predetermined time.
その結果、電流制限回路 5は、抵抗 Rsの端子電圧 Vsが電圧 VREFを越えたとき〖こ 駆動電流を停止させてパワートランジスタ 3の出力電流を制限する。この点で電流制 限回路 5は、モータドライブ回路の過電流保護回路を兼ねるものとして設けられてい る。  As a result, when the terminal voltage Vs of the resistor Rs exceeds the voltage VREF, the current limiting circuit 5 stops the driving current and limits the output current of the power transistor 3. In this regard, the current limiting circuit 5 is provided to also serve as an overcurrent protection circuit of the motor drive circuit.
[0012] 定常状態で" H"のチヨッビングパルス Pは、相励磁信号生成回路 9に送出されて、 例えば、相励磁信号生成回路 9においてアンドゲートにより単相駆動回路 laのゲー ト駆動パルスの" H"とアンド論理が採られて、パワートランジスタ 3のゲートに出力され る(図 2 (a) , (b)参照)。そこで、パワートランジスタ 3には、ゲート駆動パルスの" H"の 期間、所定の周波数でこのトランジスタ 3を遮断するチヨッビングパルス (チヨッビング パルス Pに対応)が相励磁信号生成回路 9からカ卩えられることになる。チヨッピングパ ルス Pが" L"のときには、ゲート駆動パルスは" L"となり、パワートランジスタ 3が OFF にされて、ステッピングモータ 11の励磁コイル 1 laに対する駆動電流が停止する。 ここで、各励磁コイルにはフライホイールダイオード Dが並列に設けられて!/、るので 、各励磁コイル 11a, l lb、 11c, l idに流れるそれぞれの電流は、チヨッビングパル ス Pが" L"の OFF期間にはフライホイールダイオード Dを通して流れる。それは、チヨ ッビングパルス Pによる ON期間と OFF期間との関係で決定される平均的な電流とな る。  [0012] In the steady state, the shoving pulse P of "H" is sent to the phase excitation signal generation circuit 9, and for example, in the phase excitation signal generation circuit 9, the gate drive pulse of the single-phase drive circuit la is output by an AND gate. "H" and AND logic are taken and output to the gate of the power transistor 3 (see FIGS. 2 (a) and 2 (b)). Therefore, in the power transistor 3, a pulsing pulse (corresponding to the pulsing pulse P) that cuts off the transistor 3 at a predetermined frequency during the “H” of the gate drive pulse is generated from the phase excitation signal generation circuit 9. Will be. When the chopping pulse P is "L", the gate drive pulse becomes "L", the power transistor 3 is turned off, and the drive current for the exciting coil 1 la of the stepping motor 11 stops. Here, a flywheel diode D is provided in parallel with each exciting coil! /, So that the current flowing through each exciting coil 11a, llb, 11c, lid is determined by the pulsing pulse P being "L". During the OFF period, the current flows through the flywheel diode D. It is an average current determined by the relationship between the ON period and the OFF period by the shoving pulse P.
[0013] ここでは、チヨッビングパルス発生回路 7と OFFタイマ回路 8とは、単相駆動回路 la , lb、 lc, Idに対応して共通に設けられていて、これら回路により各単相駆動回路 1 a, lb、 lc, Idの励磁コイル駆動に対応してチヨッビングパルス Pがそれぞれに生成 され、相励磁信号生成回路 9に送出される。 [0013] Here, the chabbing pulse generation circuit 7 and the OFF timer circuit 8 are provided in common with the single-phase drive circuits la, lb, lc, and Id. 1A, lb, lc, and Id excitation pulse drive is generated for each excitation pulse P The signal is sent to the phase excitation signal generation circuit 9.
相励磁信号生成回路 9は、各励磁コイルを単相駆動、 1相 - 2相駆動、 2相駆動等 に応じて、単相駆動回路 la, lb、 lc, Idの各パワートランジスタ 3のゲート駆動パル スを所定のタイミングで生成する回路であって、 "H"、 "L"のゲート駆動パルスを発生 する。さらに、駆動電流を制限するために各ゲートパルスの" H"の期間がそれぞれに それぞれのチヨッビングパルス Pによりチヨッビングされる。なお、チヨッビングパルス P の周期は、クロック CLKの周期よりも小さい。  The phase excitation signal generation circuit 9 drives the gates of the power transistors 3 of the single-phase drive circuits la, lb, lc, and Id according to single-phase drive, one-phase to two-phase drive, two-phase drive, and the like for each excitation coil. This circuit generates pulses at a predetermined timing and generates "H" and "L" gate drive pulses. Further, the "H" period of each gate pulse is shoved by each shoving pulse P to limit the drive current. Note that the cycle of the shoving pulse P is smaller than the cycle of the clock CLK.
[0014] 図 2は、パワートランジスタ保護回路 4の動作のタイミングチャートである。 FIG. 2 is a timing chart of the operation of the power transistor protection circuit 4.
図 2 (a)は、単相駆動回路 laのゲート駆動パルスであり、これが" H"の期間の間、 パワートランジスタ 3がチヨッビング駆動される。図 2 (b)は、そのチヨッビングパルス P であり、これの" H"の期間の間、ステッピングモータ 11の励磁コイル 11aに対して駆 動電流が流れるので、出力端子 2aの出力電圧 Voutは、図 2 (このようになる。  FIG. 2A shows a gate drive pulse of the single-phase drive circuit la, and during this period of “H”, the power transistor 3 is driven by shoving. FIG. 2 (b) shows the shobbing pulse P. During the "H" period, a driving current flows through the exciting coil 11a of the stepping motor 11, so that the output voltage Vout of the output terminal 2a becomes , Figure 2 (It looks like this.
ここで、図 2 (a)のゲート駆動パルスに応じて単相駆動回路 laのパワートランジスタ 3が出力電流を発生しているとする。この場合、コンパレータ 46は、出力端子 2aの電 圧に応じてこれを分圧した分圧電圧 Vaが分圧電圧 Vb (図 2 (d)参照)を越えたときに "H"から" L"の出力となるので、図 2 (e)に示すように、図 2 (c)の出力端子 2aの電圧 Voutに応じて、その出力パルスは、 "H", "L"、 "H"、 "L"の出力検出パルスとなる。 チヨッピングパノレス Pの周期は、クロック CLKよりも小さいので、コンパレータ 46の、こ の出力検出パルス" L"の出力パルスに応じて、コンパレータ 4cは、 "H"の出力(リセ ットパルス)を発生して 8進カウンタ 4dをリセットする。これにより、ラッチ回路 43は、初 期値" 0"のままとなり、駆動停止信号 SPは発生することなぐ相励磁信号生成回路 9 は動作し続ける。  Here, it is assumed that the power transistor 3 of the single-phase drive circuit la generates an output current in accordance with the gate drive pulse in FIG. In this case, the comparator 46 changes from “H” to “L” when the divided voltage Va obtained by dividing the voltage according to the voltage of the output terminal 2a exceeds the divided voltage Vb (see FIG. 2 (d)). As shown in FIG. 2 (e), according to the voltage Vout of the output terminal 2a in FIG. 2 (c), the output pulse becomes "H", "L", "H", " It becomes an output detection pulse of L ". Since the cycle of the chopping panel P is smaller than the clock CLK, the comparator 4c generates an “H” output (reset pulse) in accordance with the output pulse of the output detection pulse “L” of the comparator 46. To reset the octal counter 4d. As a result, the latch circuit 43 remains at the initial value “0”, and the phase excitation signal generation circuit 9 continues to operate without generating the drive stop signal SP.
[0015] このとき発生しているコンパレータ 46の" L"の最後の出力検出パルスは、図 2 (a)の ゲート駆動ノルスが落ちる手間のチヨッピングノルス Pに対応して発生して ヽる。そし て次に発生するコンパレータ 46の" L"の出力検出パルスは、次のゲート駆動パルス が発生してその最初のチヨッビングパルス Pに対応して 、る。このときのコンパレータ 4 6の" L"の出力検出パルスの発生期間は、 8進カウンタ 4dが 8クロック分カウントする 期間 8 XTより短い。したがって、電源ライン 13の側の励磁コイル 11aの端子力も接続 端子 2aまでの間に断線がない限りは、相励磁信号生成回路 9に対する駆動停止信 号 SPはラッチ回路 43から発生しない。なお、 8進カウンタ 4dのカウント期間は、前記 の最後の出力検出パルス力 次の最初の出力検出パルスまで以上長い期間があれ ばよい。 [0015] The last output detection pulse of "L" of the comparator 46 generated at this time is generated in accordance with the chopping norse P in FIG. Then, the "L" output detection pulse of the comparator 46 which is generated next corresponds to the first shoving pulse P after the next gate drive pulse is generated. At this time, the generation period of the output detection pulse of “L” of the comparator 46 is shorter than the period 8 XT during which the octal counter 4d counts for eight clocks. Therefore, the terminal force of the excitation coil 11a on the side of the power supply line 13 is also connected. As long as there is no disconnection up to the terminal 2a, the drive stop signal SP for the phase excitation signal generation circuit 9 is not generated from the latch circuit 43. Note that the count period of the octal counter 4d only needs to be longer than the last output detection pulse power and the first output detection pulse.
一方、ステッピングモータ 11との接続不良などにより電源ライン 13側の励磁コイル 1 laの端子力 接続端子 2aまでの間に断線があるときには、ゲート駆動パルスに応じ て単相駆動回路 laのパワートランジスタ 3が駆動されても出力電流を発生しない。そ こで、図 2 (c)に後半に示すように、出力端子 2aの電圧 Voutが発生しない。そのため 分圧電圧 Vaは Va = 0Vになる。  On the other hand, when there is a disconnection between the excitation coil 1 la of the power supply line 13 and the connection terminal 2 a due to a poor connection with the stepping motor 11 or the like, the power transistor 3 of the single-phase drive circuit la is switched in accordance with the gate drive pulse. Does not generate an output current even if is driven. Therefore, as shown in the latter half of FIG. 2 (c), the voltage Vout of the output terminal 2a does not occur. Therefore, the divided voltage Va becomes Va = 0V.
[0016] その結果、 Va<Vbとなり、コンパレータ 46から発生する出力検出パルスが" H"の ままとなる。これにより 8進カウンタ 4dはリセットされることなぐクロック CLKをカウント する。そこで、次の出力電流が発生しなかったときには、コンパレータ 46から" L"の出 力検出パルスが発生しないので、 8進カウンタ 4dから 8カウント終了信号("H")が発 生してそれがオアゲート 42を介してこれ力ラッチ回路 43に" 1"としてラッチされる。こ れにより、相励磁信号生成回路 9の動作が停止するので、ステッピングモータドライバ IC10は破壊されな 、で済む。 As a result, Va <Vb, and the output detection pulse generated from the comparator 46 remains “H”. Thus, the octal counter 4d counts the clock CLK without being reset. Therefore, when the next output current does not occur, the output detection pulse of "L" is not generated from the comparator 46, so that the octal counter 4d generates the 8 count end signal ("H"), which is output. This is latched as "1" in the power latch circuit 43 through the OR gate 42. As a result, the operation of the phase excitation signal generation circuit 9 stops, so that the stepping motor driver IC 10 does not need to be destroyed.
この場合、 8進カウンタ 4dからの 8カウント終了信号(断線検出信号)は、次の出力 電流発生する期間において、コンパレータ 46から" L"の出力検出パルスが複数個分 以上発生する期間以上の長さにするのが好ましい。そこで、ここでは、 8進カウンタ 4d の 8カウント終了までの期間は、ここでは、各単相駆動回路 la, lb、 lc, Idのそれぞ れにおいて、それぞれのゲート駆動パルスの発生周期より長い値に設定している。そ れによりゲート駆動パルスの 1周期分以上に渡って端子オープン状態が連続すること を検出できる。  In this case, the 8 count end signal (disconnection detection signal) from the octal counter 4d is longer than the period during which the comparator 46 generates more than one "L" output detection pulse in the period during which the next output current is generated. It is preferred that Therefore, here, the period up to the end of 8 counts of the octal counter 4d is a value longer than the generation cycle of each gate drive pulse in each of the single-phase drive circuits la, lb, lc, and Id. Is set to As a result, it is possible to detect that the terminal open state continues for one cycle or more of the gate drive pulse.
なお、オアゲート 42は、単相駆動回路 la, lb、 lc, Idの 8進カウンタ 4dの最終段 力 得られる 8カウント終了信号 (断線検出信号)を論理和で受けるので、単相駆動 回路 la, lb、 lc, Idのいずれかの 8進カウンタ 4dにおいて 8カウント終了信号(断線 検出信号)が発生しても相励磁信号生成回路 9の動作は停止する。  The OR gate 42 receives the 8 count end signal (disconnection detection signal) obtained by the final stage of the octal counter 4d of the single-phase drive circuits la, lb, lc, and Id by a logical sum. The operation of the phase excitation signal generation circuit 9 is stopped even when the 8 count end signal (disconnection detection signal) is generated in the octal counter 4d of lb, lc, or Id.
[0017] 前記の実施例では、 8進カウンタ 4dのリセットから 8進カウンタ 4dのカウント終了まで の期間を 8 X Tとし、これに対してゲート駆動パルスの周期 TGを 6 X Tとしている。そ こで、端子オープン検出回路 4aの接続状態を示す検出信号が 1回発生しなければ 端子オープン検出信号が発生したものとして断線検出回路 4bにより断線と判断され る。 [0017] In the above embodiment, from the reset of the octal counter 4d to the end of counting of the octal counter 4d Is 8 XT, and the period TG of the gate drive pulse is 6 XT. Therefore, if the detection signal indicating the connection state of the terminal open detection circuit 4a is not generated once, it is determined that the terminal open detection signal has been generated and the disconnection detection circuit 4b determines that the connection is broken.
しかし、この発明では、例えば、 8進カウンタ 4dを 13進カウンタあるいはそれ以上の カウントをするカウンタとすることができる。この場合には、端子オープン検出回路 4a の接続状態を示す検出信号が連続して複数回発生しなければ、端子オープン検出 信号が連続して複数回発生したものとし、このときに初めて断線検出回路 4bが断線 と判定する。これにより断線の判定をより確実にすることができる。  However, in the present invention, for example, the octal counter 4d can be a 13-ary counter or a counter that counts more. In this case, if the detection signal indicating the connection state of the terminal open detection circuit 4a does not occur continuously more than once, it is assumed that the terminal open detection signal has been continuously generated more than once, and at this time, the disconnection detection circuit is first generated. 4b determines that the wire is broken. This makes it possible to more reliably determine the disconnection.
言い換えれば、この発明としては、カウンタ 4dのリセットからカウント終了までの期間 をゲート駆動パルスの周期 TGに対してこれの 2倍を超えるようにして断線判定をする ようにしてもよい。  In other words, according to the present invention, the disconnection determination may be made such that the period from the reset of the counter 4d to the end of the count exceeds twice the period TG of the gate drive pulse.
なお、断線検出回路 4bは、端子オープン検出信号が連続的に検出されなくても複 数回検出されることをもって断線と判定してもよい。  Note that the disconnection detection circuit 4b may determine that a disconnection has occurred when the terminal open detection signal is not detected continuously but is detected a plurality of times.
ところで、実施例では、コンパレータ 5aは、単相駆動回路 la, lb、 lc, Idにそれぞ れ設けられる構成となっているが、コンパレータ 5aは、複数の単相駆動回路に共通 に設けられていてもよい。この場合、例えば、単相駆動回路 la, lbのそれぞれのコン パレータ 5aと、単相駆動回路 lc, Idのそれぞれのコンパレータ 5aとに対して出力電 流値の検出抵抗 Rsをそれぞれに共通化してトータルで 2個とすることができる。 また、実施例では、コンパレータ 5は、 2つの(+ )入力端子を持つもの 1つでしてい る力 これは、コンパレータ 5の内部回路をパラレルに 2つのコンパレータで構成とし てもよい。また、これは、(+ )入力端子と (一)入力端子がそれぞれある 2つあるコンパ レータを使用してもよい。  By the way, in the embodiment, the comparator 5a is provided in each of the single-phase drive circuits la, lb, lc, and Id, but the comparator 5a is provided in common to a plurality of single-phase drive circuits. You may. In this case, for example, each of the comparators 5a of the single-phase drive circuits la and lb and each of the comparators 5a of the single-phase drive circuits lc and Id share a detection resistor Rs for the output current value. Two can be used in total. Further, in the embodiment, the comparator 5 is one having two (+) input terminals. The internal circuit of the comparator 5 may be composed of two comparators in parallel. This may also use a comparator with two (+) input terminals and two (1) input terminals.
さらに、実施例では、断線検出信号を n進カウンタのカウント終了信号としているが 、この発明は、カウンタのカウント終了信号による必要はない。この発明における断線 検出信号は、端子オープン検出回路の検出信号を受けてこれを受けたときの駆動電 流の出力に対してその次に発生する駆動電流の出力までの期間よりも後であればよ い。 また、実施例のパワートランジス Trは、 MOSFETトランジスタである力 これは、ノ イポーラトランジスタであってもよいことはもちろんである。 Further, in the embodiment, the disconnection detection signal is used as the count end signal of the n-ary counter, but the present invention does not need to use the count end signal of the counter. The disconnection detection signal according to the present invention is provided if the detection signal of the terminal open detection circuit is received and the output of the drive current at the time of receiving the signal is later than the period until the output of the next drive current generated. Good. Further, the power transistor Tr of the embodiment is a MOSFET transistor. Of course, this may be a bipolar transistor.
さらに、実施例では、ュ-ポーラ駆動のステッピングモータドライバ ICのモータ駆動 回路につ 、て説明して 、るが、パワートランジスタの出力回路をプッシュ ·プル動作の 駆動回路として、バイポーラ駆動(正位相と逆位相の両波駆動)のステッピングモータ ドライバ ICにこの発明を適用してもよいことはもちろんである。  Furthermore, in the embodiment, the motor drive circuit of the stepper motor driver IC of the bipolar drive is described. However, the output circuit of the power transistor is used as the drive circuit of the push-pull operation, and the bipolar drive (positive phase It is needless to say that the present invention may be applied to a stepping motor driver IC having the opposite phase of double-wave drive).
産業上の利用可能性  Industrial applicability
[0019] 以上説明してきたが、実施例では、チヨッビングパルス発生回路 7と OFFタイマ回路 8を介してパワートランジスタ 3の OFF制御をしている力 パワートランジスタ 3が OFF される構成であれば、チヨッビングパルス発生回路 7や OFFタイマ回路 8はこの発明 にとつて必ずしも必要な構成ではな ヽ。 As described above, in the embodiment, if the power transistor 3 that controls the power transistor 3 to be turned off via the tibbing pulse generation circuit 7 and the OFF timer circuit 8 is configured to be turned off, The shoving pulse generation circuit 7 and the OFF timer circuit 8 are not necessarily required for the present invention.
さらに、実施例では、ステッピングモータドライバ ICについて説明している力 規定 の電流値でパワートランジスタを OFFして駆動電流を制限するような電流制限回路を 有するドライブ回路であれば、どのような回路であってもこの発明は適用できる。 図面の簡単な説明  Further, in the embodiment, any drive circuit having a current limiting circuit that limits the drive current by turning off the power transistor at a specified current value described in the stepping motor driver IC is used. Even if there is, this invention can be applied. Brief Description of Drawings
[0020] [図 1]図 1は、この発明のモータドライブ回路のパワートランジスタ保護回路を適用し た一実施例のュ-ポーラ駆動のステッピングモータドライバのブロック図である。  FIG. 1 is a block diagram of a bipolar drive stepping motor driver according to an embodiment to which a power transistor protection circuit of a motor drive circuit according to the present invention is applied.
[図 2]図 2は、パワートランジスタ保護回路の動作のタイミングチャートである。  FIG. 2 is a timing chart of the operation of the power transistor protection circuit.
符号の説明  Explanation of symbols
[0021] la, lb、 lc, Id…単相駆動回路、 [0021] la, lb, lc, Id… single-phase drive circuit,
2a, 2b、 2c, 2d…出力端子、  2a, 2b, 2c, 2d ... output terminals,
3· · ·Νチャネル MOSFETパワートランジスタ、  3 channel MOSFET power transistor,
4…パワートランジスタ保護回路、 4a…端子オープン検出回路、  4… Power transistor protection circuit 4a… Terminal open detection circuit
4b…断線検出回路、 4c, 46· ··コンパレータ、  4b… Disconnection detection circuit, 4c, 46 ··· Comparator,
4(1· ··8進カウンタ、 5…電流制限回路、  4 (1 ····· octal counter, 5… current limiting circuit,
5a…コンパレータ、 6…基準電圧発生回路、  5a… Comparator, 6… Reference voltage generation circuit,
7…チヨッビングパルス発生回路、 8〜OFFタイマ回路、  7 ... Chiobbing pulse generation circuit, 8 ~ OFF timer circuit,
9…相励磁信号生成回路、 · ··ステッピングモータドライノく IC、9… Phase excitation signal generation circuit ···· Stepping motor dry IC
a, lib, 11c, lid…励磁コイル、a, lib, 11c, lid… excitation coil,
···電源、 13…クロック発生回路、 14…クロック発生回路 …駆動停止信号発生回路、 42···オアゲート、···ラッチ回路、 44, 45…抵抗分圧回路、 ······· Power supply, 13… Clock generation circuit, 14… Clock generation circuit… Driving stop signal generation circuit, 42 ··· OR gate, ··· Latch circuit,
…抵抗、 D…フライホイールダイオード。 ... resistance, D ... flywheel diode.

Claims

請求の範囲 The scope of the claims
[1] 出力端子を介してモータの励磁コイルに駆動電流を出力するパワートランジスタを 複数の前記励磁コイルに対応して複数有するモータドライブ回路における前記パヮ 一トランジスタ保護回路において、  [1] In the power transistor protection circuit in a motor drive circuit having a plurality of power transistors for outputting a drive current to an exciting coil of a motor via an output terminal in correspondence with the plurality of exciting coils,
端子オープン検出回路と、断線検出回路と、駆動停止回路とを備え、  A terminal open detection circuit, a disconnection detection circuit, and a drive stop circuit are provided,
前記端子オープン検出回路は、前記出力端子に接続されていない各前記励磁コ ィルの他方の端子とこの他方の端子が接続されて 、るラインとの 、ずれかの一方と前 記他方の端子を持つ前記励磁コイルが接続されて 、る前記出力端子ある 、はこの 出力端子が接続されて ヽるラインとの ヽずれかの他方との間に設けられかつ複数の 前記パワートランジスタに対応してそれぞれ設けられ前記パワートランジスタが前記 駆動電流の出力動作をして 、るときに前記 、ずれか一方と前記 、ずれか他方との間 がオープン状態にある力否かを検出するものであり、  The terminal open detection circuit may be configured to determine whether the other terminal of each of the exciting coils not connected to the output terminal is connected to the other terminal and the other terminal is connected to the other terminal. The output terminal is connected to the excitation coil having the following. The output terminal is connected to a line to which the output terminal is connected and the other of the output terminal and a corresponding one of the plurality of power transistors. The power transistor is provided to output the drive current, and when the power transistor is turned on, the power transistor detects whether or not the force is in an open state between one of the shifts and the other.
前記断線検出回路は、前記端子オープン検出回路が前記いずれか一方と前記い ずれ力他方との間がオープン状態にないことを検出しかつその後にオープン状態に あることを検出したことにより断線状態を検出するものであり、  The disconnection detection circuit detects a disconnection state by detecting that the terminal open detection circuit is not in an open state between one of the terminals and the other of the force and the open state thereafter. To detect,
前記駆動停止回路は、この断線検出回路により断線状態が検出されたときに前記 モータドライブ回路の駆動動作を停止させるパワートランジスタ保護回路。  The drive stop circuit is a power transistor protection circuit that stops a drive operation of the motor drive circuit when a disconnection state is detected by the disconnection detection circuit.
[2] 前記端子オープン検出回路は、前記いずれか一方と前記いずれか他方との間が オープン状態にあることある 、はオープン状態な 、ことの 、ずれかの一方の検出信 号を発生し、前記断線検出回路は、複数の前記パワートランジスタのそれぞれに対 応して複数設けられ、各前記断線検出回路は、自己に対応する前記パワートランジ スタに対応して設けられた前記端子オープン検出回路力 前記検出信号を受けて前 記オープン状態にないことが検出された後にオープン状態にあることが検出されたと きに断線状態と判定する請求項 1記載のパワートランジスタ保護回路。  [2] The terminal open detection circuit generates one of a detection signal indicating that one of the terminals is in an open state and the other is in an open state. A plurality of the disconnection detection circuits are provided corresponding to each of the plurality of power transistors, and each of the disconnection detection circuits is connected to the terminal open detection circuit provided for the corresponding power transistor. 2. The power transistor protection circuit according to claim 1, wherein a disconnection state is determined when the open state is detected after the non-open state is detected after receiving the detection signal.
[3] 前記端子オープン検出回路は、前記いずれか一方と前記いずれか他方との間の 電圧を検出するものであり、前記検出信号は、前記オープン状態にないものとして前 記接続状態を検出するものである請求項 2記載のパワートランジスタ保護回路。  [3] The terminal open detection circuit detects a voltage between one of the ones and the other one, and the detection signal detects the connection state as not being in the open state. 3. The power transistor protection circuit according to claim 2, wherein:
[4] 前記断線検出信号は、前記パワートランジスタが前記駆動電流の出力動作をして V、るときにお 、て前記検出信号を受けな 、ことをもってその駆動電流の出力動作が 終了した後に発生する請求項 3記載のパワートランジスタ保護回路。 [4] The disconnection detection signal indicates that the power transistor performs the output operation of the drive current. 4. The power transistor protection circuit according to claim 3, wherein the power transistor protection circuit is generated after the output operation of the drive current is completed when the detection signal is not received at the time of V.
[5] 各前記断線検出回路は、周期 Tのクロックを nカウント (nは 2以上の整数)するカウ ンタを有し、前記検出信号に応じて前記カウンタがリセットされ、このリセットから前記 カウンタが nカウント終了するまでの期間がある前記駆動電流の出力から次に発生す る前記駆動電流の出力までの期間よりも長ぐ前記カウンタの nカウント終了信号が前 記断線検出信号とされる請求項 4記載のパワートランジスタ保護回路。  [5] Each of the disconnection detection circuits has a counter that counts a clock having a period T by n (n is an integer of 2 or more), and the counter is reset in response to the detection signal. The disconnection detection signal is an n-count end signal of the counter, which is longer than a period from the output of the drive current having a period until the end of the n-count to the output of the drive current to be generated next. 4. The power transistor protection circuit according to 4.
[6] 前記断線検出信号は、複数回前記検出信号を受けないことをもって発生する請求 項 4記載のパワートランジスタ保護回路。  6. The power transistor protection circuit according to claim 4, wherein the disconnection detection signal is generated by not receiving the detection signal a plurality of times.
[7] 各前記端子オープン検出回路は、前記いずれか一方と前記いずれか他方との間 の電圧を比較する第 1のコンパレータを有し、この第 1のコンパレータにより前記検出 信号を検出パルスとして発生し、各前記断線検出回路は、前記検出パルスを所定の 基準電圧と比較する第 2のコンパレータを有し、この第 2のコンパレータの出力に応じ て前記カウンタをリセットする信号を発生する請求項 5記載のパワートランジスタ保護 回路。  [7] Each of the terminal open detection circuits has a first comparator for comparing a voltage between one of the terminals and the other, and generates the detection signal as a detection pulse by the first comparator. 6. Each of the disconnection detecting circuits has a second comparator for comparing the detection pulse with a predetermined reference voltage, and generates a signal for resetting the counter in accordance with an output of the second comparator. The described power transistor protection circuit.
[8] 前記駆動停止回路は、オアゲートとラッチ回路とを有し、各前記断線検出回路から 得られる各前記断線検出信号をそれぞれ前記オアゲートで受けて前記ラッチ回路に ラッチし、前記ラッチ回路の出力に応じて前記パワートランジスタを駆動する信号を停 止させる請求項 6記載のパワートランジスタ保護回路。  [8] The drive stop circuit includes an OR gate and a latch circuit, receives each of the disconnection detection signals obtained from each of the disconnection detection circuits by the OR gate, latches the signal in the latch circuit, and outputs the output of the latch circuit. 7. The power transistor protection circuit according to claim 6, wherein a signal for driving the power transistor is stopped in response to the condition.
[9] 前記パワートランジスタは、前記出力端子力もシンクする駆動電流を出力電流とし て発生し、前記他方の端子は電源ラインに接続され、前記いずれか一方の電圧は、 前記電源ラインの電圧を第 1の抵抗分圧回路により分圧した電圧であって、その電圧 値は、前記駆動電流が制限されるときの電圧値に近いものであり、前記いずれか他 方の電圧は、前記出力端子の電圧を第 2の抵抗分圧回路により分圧した電圧である 請求項 7記載の電流制限回路。  [9] The power transistor generates a drive current that also sinks the output terminal force as an output current, the other terminal is connected to a power supply line, and one of the voltages is a voltage of the power supply line 1 is a voltage divided by the resistor voltage dividing circuit, the voltage value of which is close to the voltage value at the time when the drive current is limited, and the other voltage is the voltage of the output terminal. 8. The current limiting circuit according to claim 7, wherein the voltage is a voltage obtained by dividing a voltage by a second resistor voltage dividing circuit.
[10] 出力端子を介してモータの励磁コイルに駆動電流を出力するパワートランジスタを 複数の前記励磁コイルに対応して複数有するモータドライブ回路における前記パヮ 一トランジスタ保護回路において、 端子オープン検出回路と、断線検出回路と、駆動停止回路とを備え、 前記端子オープン検出回路は、前記出力端子に接続されていない各前記励磁コ ィルの他方の端子とこの他方の端子が接続されて 、るラインとの 、ずれかの一方と前 記他方の端子を持つ前記励磁コイルが接続されて 、る前記出力端子ある 、はこの 出力端子が接続されて ヽるラインとの ヽずれかの他方との間に設けられかつ複数の 前記パワートランジスタに対応してそれぞれ設けられ前記パワートランジスタが前記 駆動電流の出力動作をして 、るときに前記 、ずれか一方と前記 、ずれか他方との間 のオープン状態あるいは接続状態の 、ずれかを検出するものであり、 [10] In the power transistor protection circuit of the motor drive circuit having a plurality of power transistors for outputting a drive current to the excitation coil of the motor via the output terminal corresponding to the plurality of excitation coils, A terminal open detection circuit, a disconnection detection circuit, and a drive stop circuit, wherein the terminal open detection circuit connects the other terminal of each of the excitation coils not connected to the output terminal to the other terminal. Then, the excitation coil having one of the terminals and the other terminal is connected to the output line, and the output terminal is connected to the line to which the output terminal is connected. And the power transistor is provided in correspondence with a plurality of the power transistors, and the power transistor performs an output operation of the drive current. Between the open state and the connected state during
前記断線検出回路は、前記端子オープン検出回路による前記オープン状態あるい は前記接続状態のいずれかの検出に応じて複数回前記オープン状態が検出された ときに断線状態を検出するものであり、  The disconnection detection circuit detects a disconnection state when the open state is detected a plurality of times in response to detection of either the open state or the connection state by the terminal open detection circuit,
前記駆動停止回路は、この断線検出回路により断線状態が検出されたときに前記 モータドライブ回路の駆動動作を停止させるパワートランジスタ保護回路。  The drive stop circuit is a power transistor protection circuit that stops a drive operation of the motor drive circuit when a disconnection state is detected by the disconnection detection circuit.
[11] 前記断線検出回路は、連続して前記複数回オープン状態にあることにより前記断 線状態とする請求項 10記載のパワートランジスタ保護回路。  11. The power transistor protection circuit according to claim 10, wherein the disconnection detection circuit sets the disconnection state by being continuously in the open state a plurality of times.
[12] 請求項 1一 11のいずれかの項記載の前記パワートランジスタ保護回路を有する前 記モータドライブ回路が IC化され前記パワートランジスタの前記出力電流によりモー タが駆動されるモータドライブ回路。 [12] A motor drive circuit in which the motor drive circuit having the power transistor protection circuit according to any one of claims 11 to 11 is formed into an IC, and a motor is driven by the output current of the power transistor.
[13] 前記モータはステッピングモータである請求項 12記載のモータドライブ回路。 13. The motor drive circuit according to claim 12, wherein the motor is a stepping motor.
[14] 請求項 12または 13項記載のモータドライブ回路を IC化した半導体装置。 [14] A semiconductor device in which the motor drive circuit according to claim 12 or 13 is integrated into an IC.
PCT/JP2005/000118 2004-01-09 2005-01-07 Power transistor protecting circuit of motor drive circuit, motor drive circuit, and semiconductor device WO2005067134A1 (en)

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JPH03203599A (en) * 1989-12-29 1991-09-05 Toyota Motor Corp Controller for exhaust gas recirculation control valve
JPH0799796A (en) * 1993-09-27 1995-04-11 Fujitsu Ten Ltd Driving device for stepping motor
JPH10257799A (en) * 1997-03-07 1998-09-25 Toyota Motor Corp Output open-circuiting detection device of multichannel output device
JP2003339190A (en) * 2002-05-21 2003-11-28 Mitsubishi Electric Corp Abnormality-detecting apparatus for motor drive system

Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
JPH03203599A (en) * 1989-12-29 1991-09-05 Toyota Motor Corp Controller for exhaust gas recirculation control valve
JPH0799796A (en) * 1993-09-27 1995-04-11 Fujitsu Ten Ltd Driving device for stepping motor
JPH10257799A (en) * 1997-03-07 1998-09-25 Toyota Motor Corp Output open-circuiting detection device of multichannel output device
JP2003339190A (en) * 2002-05-21 2003-11-28 Mitsubishi Electric Corp Abnormality-detecting apparatus for motor drive system

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