WO2005064500A1 - Procede pour concevoir un systeme technique - Google Patents

Procede pour concevoir un systeme technique Download PDF

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Publication number
WO2005064500A1
WO2005064500A1 PCT/EP2004/052374 EP2004052374W WO2005064500A1 WO 2005064500 A1 WO2005064500 A1 WO 2005064500A1 EP 2004052374 W EP2004052374 W EP 2004052374W WO 2005064500 A1 WO2005064500 A1 WO 2005064500A1
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classes
hypergraph
class
assigned
hyper
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PCT/EP2004/052374
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German (de)
English (en)
Inventor
Lars Grunske
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Siemens Aktiengesellschaft
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Publication of WO2005064500A1 publication Critical patent/WO2005064500A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]

Definitions

  • the invention relates to a method for designing a technical system and a corresponding computer program product.
  • non-functional properties are e.g. properties related to the security, availability, reliability or temporal correctness of the technical system. If these requirements are not met, constructive quality assurance measures must be taken to improve these non-functional properties. From an economic point of view, these changes in the technical system should be made early in the system design.
  • the object of the invention is therefore to create a method for the design of a technical system with which an optimized technical system can be designed automatically and with little effort.
  • a technical system which contains a large number of technical components.
  • the method is characterized in that hypergraph elements, which are hypergraphs and / or building blocks of hypergraphs, are assigned to the technical components. Subsequently, one or more of the technical components are replaced by new technical components using hypergraph transformation rules, and the technical system is finally designed taking into account the new technical components.
  • the invention is based on the knowledge that the mapping of technical components onto hypergraphs
  • Hypergraphs are generalizations of graphs in which an edge can be linked with more than two nodes and with which complex structures can be reproduced.
  • the theory of hypergraphs is well known from the prior art, as are the transformation rules relating to these hypergraphs. This will be discussed in more detail in the detailed description.
  • hypergraph transformation rules automatic replacements can be made after the technical components have been assigned to the corresponding hypergraph elements technical system can be carried out without the need for human expert knowledge.
  • the hypergraph elements are typed, hierarchical hypergraphs and building blocks from these hypergraphs.
  • Typed hypergraphs are hypergraphs that are classified by certain attributes or node types and hyper edge types. Typed hypergraphs can thus be typed by classes based on object-oriented concepts.
  • Typed, hierarchical hypergraphs are typed hypergraphs that are hierarchically structured, i.e. a building block of a hypergraph can in turn contain a hypergraph as building block. The exact description of typed, hierarchical hypergraphs is also discussed in the detailed description.
  • the hypergraphic elements are preferably nodes and / or hyper edges and / or complex hyper edges. These terms are also discussed in more detail in the detailed description.
  • each technical component of a class is made up of a plurality of first
  • Classes and each hypergraph element are assigned to a class from a plurality of second classes, with a second class being assigned to each first class when the technical components are assigned to hypergraph elements.
  • the first classes are preferably so-called meta classes from the architecture description language COOL, which are sufficiently known from the prior art.
  • the majority of the first classes comprise one or more of the following meta classes from the COOL architecture description language, namely “Ver binder “,” component “,” module “,” port “,” role “,” software element “,” interconnection “,” binding “,” interface element ".
  • the majority of the first classes can also contain the following architecture description elements from the COOL language: “hardware platform”, “transmission channel”, “sensor”, “actuator”, “hardware element”, “settlement interconnection”, settlement node ", “Settlement node”.
  • the majority of the second classes comprise one or more of the classes "hypergraph”, “complex hyper edge”, “hyper edge” and “node”.
  • Meta classes of the COOL language are used, the first classes "connector”, “component” and “software element” are assigned to the second class “Hypergraph”, the first classes “interconnection”, “binding” and “module” is the second class “hyper edge” is assigned and the first class "port”, “role”, “interface element” is assigned the second class "node”.
  • This assignment achieves the optimal mapping of the description elements from COOL onto corresponding hypergraphs, so that suitable hypergraph transformation rules can subsequently be applied. If further first classes are included in the technical system, the optimal assignment of the first to the second classes is as follows:
  • the first classes "hardware platform”, “transmission channel”, “sensor”, “actuator” and “hardware element” are assigned to the second class “hypergraph”; the first class “settlement interconnection” is assigned the second class “hyper edge”;
  • the hypergraph transformation rules correspond to the "homogeneous redundancy" replacement pattern, with which the reliability of a technical system is improved by multiplying technical components.
  • the invention further relates to a computer program product which has a storage medium on which a computer program is stored, with which the method described above is carried out when the computer program runs on a computer.
  • Figure 1 is an exemplary graphical representation of a general hypergraph
  • FIG. 2 shows the graphical representation of the meta model of a hierarchical typed hypergraph
  • FIG. 3 shows an assignment according to the invention of software elements from the COOL meta model to components of the hypergraph according to the meta model of FIG. 2;
  • FIG. 4 shows an assignment according to the invention of hardware elements of the COOL meta model to components of the hypergraph according to the meta model of FIG. 2;
  • FIG. 5 shows a sketch of a technical system relating to a level crossing control system which is designed in accordance with the method according to the invention
  • FIG. 6 shows the graphical representation of hypergraph transformation rules which are applied to the technical system of FIG. 5;
  • FIG. 7 shows a sketch of the technical system according to FIG. 5, parts of the system having been replaced according to the hypergraph transformation rules according to FIG. 6;
  • FIG. 8 shows a processor unit for carrying out the method according to the invention.
  • Hypergraphs are generally known from the prior art and a detailed description of these graphs can be found in particular in document [1].
  • the definition of general hypergraphs follows first.
  • Definition 1 General hypergraphs Let Zy ⁇ be a set of node types and L E a
  • V represents a set of nodes and E a set of hyper edges.
  • a node sequence V is assigned to a hyper edge using the function atti EV.
  • the function lab A - + Ly jL E assigns a node or hyperantype to the individual nodes and hyper edges.
  • the assignment function att it is possible to assign any number of nodes to a hyper edge.
  • the number n is referred to as the arity of the hyper edge.
  • For a hyper edge e e E it can be determined from the length of the assigned node sequence
  • a hyper edge thus represents a generalization of a normal edge, with more than two nodes being connectable to one another via the hyper edge.
  • FIG. 1 An example of a general hypergraph is shown in FIG.
  • This hypergraph comprises three hyper edges 1, 2 and 3, the hyper edges 1 and 2 being of type Hyper edge A and the hyper edge 3 being of type Hyper edge B.
  • the hypergraph also includes four nodes 1, 2, 3, 4, where nodes 1, 3 and 4 are of type Node A and node 2 is of type NodeB.
  • Hyper edges 1 and 2 include nodes 1, 3 and 4, and hyper edge 3 is assigned nodes 2 and 3.
  • hypergraphs To map a technical system to hypergraphs, it is necessary to structure the hypergraphs hierarchically.
  • the concept of hierarchical hypergraphs is generally known from the prior art. Reference is made to the publications [2] and [3].
  • a set of hyper edges is defined in a hypergraph, which is used for embedding so-called odular hypergraphs.
  • a modular hypergraph (multi-pointed hypergraph) has external nodes that are used to connect to other hypergraphs. The external nodes thus represent glue points for the modular hypergraph.
  • ocular hypergraphs are defined as follows:
  • Modular hypergraphs A modular hypergraph is characterized by the tuple (V, E, att, lab, ext). (V, E, att, lab) corresponds to a hypergram phen and ext describes a sequence of external nodes ext eV * .
  • the arity n of a modular hypergraph is determined by the length of the sequence of the external nodes ⁇ ext ⁇ .
  • a hyper edge frame jf.ra.mes
  • a hyper-edge frame describes a sequence of nodes V * .
  • For each hyper edge such a hyper edge frame can be assigned using the assignment function ⁇ tf.
  • E ⁇ V * can be determined.
  • hierarchical graphs can be defined as follows:
  • Hierarchical Hypergraphs A hierarchical hypergraph G from the set of all imaginable hierarchical hypergraphs G over the types L and L B is characterized by the tuple V, E, ⁇ tt, l ⁇ b, ext, cts).
  • V, E, ⁇ tt, l ⁇ b, ext) is a modular hypergraph and cts:
  • E -> G is an assignment function that assigns an embedded hierarchical hypergraph to a hyper edge.
  • the hyper edge is removed from the graph and the frame of the hyper edge is included with the Hypergraph connected.
  • the nodes of the hyper-edge frame and the external nodes of the embedded hypergraph thus represent the interface between the two graphs and are also referred to as ports (see document [1]).
  • Node and hyper edge types have already been introduced when defining hypergraphs. Based on object-oriented concepts, these types can be described by classes. This specifies each node and hyper edge by a set of attributes and operations. In addition to the nodes and hyper edges, hypergraphs can also be typed by classes. The contained nodes and hyper edges of a hypergraph are assigned to the hypergraph class by composition. With the introduction of hypergraph classes, complex hyper edges that contain a hypergraph can also be modeled. This is necessary for the specification of the hierarchical hypergraphs described in Definition 4. In summary, a typified, hierarchical hypergraph is described by the meta model shown in FIG. 2.
  • Figure 2 shows the graphical representation of the meta-model of a hierarchical typed hypergraph. It can be seen in particular from FIG. 2 that a hypergraph is specified over a set E of hyper edges and a set V of nodes. Furthermore, a hyper edge is specified via the function att, which assigns a node sequence to the hyper edge. In addition, complex hyper edges can exist, which in turn contain a hyper graph, the assignment between hyper edge and hyper graph being carried out via the function cts. Based on this meta-model, application-specific classes of inheritance can be created. These expand the meta classes with application-specific attributes and operations.
  • variables can also be intuitively integrated into a hypergraph specification. tegrieren. Such a variable describes an instance of a class or its subclasses.
  • meta classes from the architecture description language COOL are assigned to the meta model of a hierarchical typed hypergraph.
  • the individual elements of the description language COOL are not referred to below
  • FIG. 3 shows the so-called meta-level ME I of a software architecture in the COOL meta-model in the lower area.
  • This meta-level comprises a large number of meta-classes, whereby the classes at the lowest level are in turn assigned classes from a higher level.
  • the meta-level ME II adjoins the meta-level ME I, which corresponds to a representation of the meta-model of FIG. 2. According to the method according to the invention, the technical components of a technical system are initially each classified into a class of level ME I.
  • the classes of level ME I can be divided into so-called basic classes and architecture classes.
  • the base classes are usually directly assigned to components of the ME II hypergraph level. According to FIG. 3, this includes the classes “software element”, “interconnection”, “binding” and “interface element”.
  • the architecture classes are usually not directly assigned to components of the meta-level ME II, but are derived from the base classes. According to FIG. 3, the architecture classes include the gray classes "Vebinder”, “Component”, “Module”, "Port” and "Role”.
  • the structural specification shown in FIG. 3 in the meta-level ME I basically corresponds to a component connector Model that is described in detail in the publication [4]. For the interaction with the environment, a large number of ports and roles are assigned to each component in this model.
  • the "Ports” and “Roles” classes are assigned the “Interface element” class, which in turn is assigned to the "Node” class in ME II.
  • the classes “connector” and “component” are assigned the class “software element”, which in turn is assigned the class “hypergraph” in ME II.
  • the classes “Module”, “Interconnection” and “Binding” are directly assigned to the class “Hyperka.nte” in ME II.
  • a flat software element describes a hypergraph with only one hyper edge, which connects all nodes represented by ports or roles. This hyper edge is specified by the class "module”.
  • Hierarchical software elements contain several hyper edges in their modeling.
  • the class "complex. Hyper edge” describes a special hyper edge that can be replaced by a hypergraph. This allows both components and connectors to be embedded in hierarchical hyper edges.
  • the hierarchical breakdown of a software element is represented in a composition hierarchy.
  • the leaf nodes of this composition hierarchy are flat software elements. All others are hierarchical software elements.
  • the root of the composition hierarchy is a special component, which is called the original component. Starting from The technical system is instantiated recursively from this original component. This is done by the compositions v and E contained in the hypergraph meta-level.
  • the "interconnection" and "binding" classes are assigned to the "hyper-edge” class.
  • the interconnection hyper edge connects the nodes of software elements on a hierarchical level.
  • the hyperlink "binding" is used to model communication relationships between software elements on different hierarchy levels.
  • a node of an embedded software element is connected to a node of an enclosing software element.
  • the sensors and actuators of a technical system serve as an interface to the system environment. They are modeled as message sources (sensors) and message sinks (actuators).
  • the hardware platform is responsible for processing the software elements. Therefore, a hardware platform is to be considered as a network of processors, bus systems, memory modules, power supply, peripheral devices and the necessary software base systems.
  • a transmission channel connects the hardware platforms in the system. It consists of the transmission medium and the communication mechanisms provided.
  • FIG. 4 provides a link between hardware classes in the COOL description language and hypergraph classes in the meta-level ME II in analogy to FIG. 3.
  • the class "hardware element” is assigned the class "hypergraph”.
  • the class “hardware element” in turn serves as a super class for the four classes "sensor”, “actuator”, “hardware platform” and “transmission channel”.
  • a hardware element can be structured hierarchically just as a software element. Therefore, hardware elements and software elements can be modeled similarly.
  • the class “processing connection” is assigned the class “hyper edge”. Furthermore, the two classes "handler node” and “handover node” of the class
  • Hypergraph addition and with the removal of partial hypergraphs the hypergraph subtraction is defined.
  • Definition 7 Disjoint union of hypergraphs, hypergraph addition
  • hypergraph substitution When replacing a hypergraph, a subgraph is identified in an application graph and replaced by a new graph. The new graph is inserted using the glulng approach.
  • the specification of the hypergraph substitution is based on context-sensitive graph transformation rules, which can be formally defined as follows:
  • a graph transformation rule is characterized by the tuple (G L , G j , G R , l, r).
  • G L eG is the replaced graph
  • G R eG is the replacing graph
  • G r eG is an interface graph.
  • a graph transformation rule for hypergraph replacement is also simplified as follows; r noted: G L 4r-G, ⁇ G R r
  • G L 4r-G ⁇ G R r
  • G R r ⁇ G R r
  • the necessary conditions for embedding with the glui.ng 'approach are checked with the dangling conditlon and the identification condition (see also document [1]).
  • the dangling condition hyper-edges that are associated with a deleted node exist in the context graph. This creates a syntactically incorrect graph when using the graph transformation rule.
  • the identification condition is violated, a node must be removed from the application graph, since it is part of the graph o (G L -l (G l ')) and must be preserved at the same time because it is an adhesive point. In this case, the context graph cannot be clearly constructed.
  • m E describes a morphism of a flat graph and M a family of hierarchical morphisms M e for all in The complex hypergraphs contain hypergraphs, whereby for every morphism ,, with esdom (cts): M e : cts (e) ->cts' m E (ey
  • the technical system shown in FIG. 5 relates to a level crossing control, the level crossing control being coupled to a barrier, a barrier sensor, a train signal and a train sensor.
  • the designations behind a colon in FIG. 5 designate the types of technical components.
  • Each technical component comprises a "component” and a "module” in the sense of the architectural description language COOL.
  • the component or module of the level crossing control is designated with BKKl or BKMl
  • the component or module of the barrier is designated with SKI or SM1
  • the component or module of the barrier sensor is designated with SSK1 or SSM1
  • the component or the module of the train signal is ZSigKl or ZSigMl
  • the component or module of the train sensor is with ZSensKl or.
  • the technical system also includes eight ports, shown as black rectangles, which connect individual components of the technical system with one another.
  • the port COS type BKG c h r nke the port BK2 type BK barrier sensor, the port BK3 type BK train signal and port BK4 type BKZ U g nsor se.
  • Ports are assigned to the level crossing control and are each connected to further ports of the components “barrier”, “barrier sensor”, “train signal” or “train sensor”. These other ports are Gl, GS1, Sl and TS1 and are of the type G BK , GS BK , S BK and TS BK .
  • the technical system of FIG. 5 includes the control system SSys as a further technical component, which relates to the control software of the level crossing as a whole.
  • components of hypergraphs are assigned to the components, modules and ports of the technical system.
  • the components BKKl, SKI, SSK1, ZSigKl, ZSensKl and SSys are each assigned a hypergraph and the modules BKMl, SM1, SKM1, ZSigMl and ZSensMl are assigned hyper edges.
  • a node of a hypergraph is assigned to the individual ports in FIG. 5.
  • the connections between the individual nodes belong to the "interconnection" class.
  • this class is in turn assigned to a hyper edge.
  • hyper edges There are also complex hyper edges that describe the connections between hypergraphs and nodes.
  • the assignment of the classified technical components to the building blocks of hypergraphs is precisely specified, the names after the colon denoting the type of architectural element.
  • BK1 BKgrranke
  • BK2 BKgrrankenSensoE * BK3 BKzugSignal / BK4 BKz ug sen- sorj
  • Gl G-ßKr GS1: GSBK
  • Sl SEK
  • TS1 TSBK
  • Level crossing control module BKMl extensively associated nodes
  • BKl BKs c domain
  • BK2 BKschenkenSensoi: / BK3: BKz U gSignalf
  • BK4 BKzugSen-
  • Barrier module SM1 comprising the associated node Gl: G B ⁇
  • Barrier sensor module SSM1 comprising the associated node GS1: GS BK
  • Level crossing control component BKKl including external nodes
  • BKl BK barrier / -
  • BK2 BKso rankenSensorr
  • BK3 BK Werner / - BK2: BKso rankenSensorr
  • BK3 BK Werner / -
  • BK4 BK Werner / -
  • Barrier component SKI comprising the external node Gl: G RK and the hyper edge SMl
  • Barrier sensor component SSKl comprising the external node GS1: GS B ⁇ and the hyper edge SSMl
  • Control system SSys comprising:
  • BKl BK Sch ranke
  • BK2 BK barrier sensor
  • BK3 BK Werner _ signal *
  • BK4 BK Switzerland s ensor
  • Gl GBK ⁇ GS1: GS BKf
  • SBK TSl T SBK
  • - Complex hyper edge BK comprising associated nodes BK1: BK barrier i BK2 '.
  • BK barrier sensor BK3: BK7, ug signal, BK4: BK7, ug g e nsor and hypergraph BKKl complex hyper edge S including the associated node Gl: G BK and hypergraph SKI - complex hyper edge SS including the associated node GSI.GSBK and hypergraph SSKl complex hyper edge ZSig comprising the associated node S1: S B ⁇ and the hypergraph ZSigKl complex hyper edge ZSens comprising the associated node TSl: TS B ⁇ and the hypergraph ZSensKl
  • a component of the technical system is now replaced by other components, the so-called "homogeneous redundancy" being considered as a replacement.
  • an existing architectural element of the technical system is multiplied by the insertion of a so-called voter replicator.
  • the Voter Replicator forwards all incoming messages to the multiplied architectural elements. Outgoing messages from the multiplied architectural elements are only transmitted to the environment if a predetermined number of messages is identical. In practice, a two-out-of-three majority decision is often used, in which two of the three technical components have to send identical messages. This structure improves the reliability of the system when the reliability of the Voter Replicator component is greater than that of the multiplied components.
  • the homogeneous redundancy is represented as a hypergraph transformation rule and results from FIG. 6.
  • This figure shows the hypergraph transformation rule in the form of the so-called ⁇ notation, which is already known from the prior art (see document [9]) -
  • This notation shows the technical components to be removed on the left and the technical components to be added on the right of the ⁇ .
  • the components that are completely within the ⁇ are retained and serve as glue points between the unchanged components of the technical system and the newly added components of the technical system.
  • any component x on its assigned port is replaced by a Voter / replicator replaced, which in turn is connected to several identical components xl, x2 and x3 via ports.
  • Voter / ReplicatorModule VRMl comprising associated nodes BK5:
  • Voter / replicator component VRK1 including external nodes BK5: BK S chanenSensor, GS1: GS B ⁇ and hyper edge VRMl
  • VSSys control system comprising:
  • FIG. 7 shows the technical system which was supplemented by the voter / replicator according to the previous specification. It can be seen that the technical component barrier sensor from FIG. 5 has been replaced by the two-out-of-three voter / replicator, with three barrier sensors with corresponding ports GS2, GS3 and GS4 following the speaker / replicator.
  • the processor unit PRZE comprises a processor CPU, a memory MEM and an input / output interface IOS, which is used in different ways via an interface IFC: an output on a monitor MON becomes visible and / or on via a graphic interface output to a printer PRT. An entry is made using a mouse MAS or a keyboard TAST.
  • the processor unit PRZE also has a data bus BUS, which connects the memory MEM, the processor CPU and the input / output interface IOS guaranteed.
  • additional components can be connected to the data bus BUS, for example additional memory, data storage (hard disk) or scanner.

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Abstract

L'invention concerne un procédé pour concevoir un système technique, selon lequel le système technique comprend une pluralité de composants techniques, des éléments hypergraphes de composants techniques, lesquels sont des hypergraphes et/ou des éléments d'hypergraphes. Les règles de transformation des hypergraphes sont utilisées pour remplacer un ou plusieurs composants techniques par de nouveaux composants techniques et le système technique comprend les nouveaux composants techniques.
PCT/EP2004/052374 2003-10-02 2004-09-30 Procede pour concevoir un systeme technique WO2005064500A1 (fr)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030131323A1 (en) * 2002-01-07 2003-07-10 Mcconaghy Trent Lorne Method of schematic-level AMS topology optimization using direct representations

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030131323A1 (en) * 2002-01-07 2003-07-10 Mcconaghy Trent Lorne Method of schematic-level AMS topology optimization using direct representations

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
DREWES F ET AL: "Hierarchical graph transformation", JOURNAL OF COMPUTER AND SYSTEM SCIENCES ACADEMIC PRESS USA, vol. 64, no. 2, March 2002 (2002-03-01), pages 249 - 283, XP002319201, ISSN: 0022-0000 *

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