WO2005059934A1 - Printed board with built-in capacitor - Google Patents

Printed board with built-in capacitor Download PDF

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Publication number
WO2005059934A1
WO2005059934A1 PCT/JP2004/018107 JP2004018107W WO2005059934A1 WO 2005059934 A1 WO2005059934 A1 WO 2005059934A1 JP 2004018107 W JP2004018107 W JP 2004018107W WO 2005059934 A1 WO2005059934 A1 WO 2005059934A1
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Prior art keywords
carbon nanotubes
capacitor
electric double
large number
electrode
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Application number
PCT/JP2004/018107
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French (fr)
Japanese (ja)
Inventor
Takaharu Kitamura
Hideki Shiozaki
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Hitachi Zosen Corporation
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Publication of WO2005059934A1 publication Critical patent/WO2005059934A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G11/00Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
    • H01G11/22Electrodes
    • H01G11/30Electrodes characterised by their material
    • H01G11/32Carbon-based
    • H01G11/36Nanostructures, e.g. nanofibres, nanotubes or fullerenes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G11/00Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
    • H01G11/08Structural combinations, e.g. assembly or connection, of hybrid or EDL capacitors with other electric components, at least one hybrid or EDL capacitor being the main component
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G11/00Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
    • H01G11/10Multiple hybrid or EDL capacitors, e.g. arrays or modules
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G11/00Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
    • H01G11/78Cases; Housings; Encapsulations; Mountings
    • H01G11/82Fixing or assembling a capacitive element in a housing, e.g. mounting electrodes, current collectors or terminals in containers or encapsulations
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/13Energy storage using capacitors

Definitions

  • the present invention relates to an electric double layer capacitor using carbon nanotubes capable of storing a large amount of electricity, a printed circuit board for an electronic circuit incorporating the electric double layer capacitor, and a printed circuit board incorporating the capacitor.
  • one internal electrode having a large number of carbon nanotubes on both sides is sandwiched by a pair of side electrodes having a large number of carbon nanotubes on one side via a separator.
  • the pair of side electrodes are arranged so that the carbon nanotube group of one side electrode and the carbon nanotube group of the other side electrode face each other, and the carbon nanotube group is impregnated with the electrolyte. This is an electric double layer capacitor.
  • a plurality of internal electrodes having a large number of carbon nanotubes on both surfaces are arranged in a multilayer through a separator, and this multilayer internal electrode group is composed of a pair of a plurality of carbon nanotubes having a large number of carbon nanotubes on one surface.
  • Side electrodes with side electrodes. The pair of side electrodes are arranged so that the carbon nanotubes of one side electrode and the carbon nanotubes of the other side electrode face each other, and the pair of side electrodes are electrolyzed to the carbon nanotube group. This is an electric double layer capacitor impregnated with liquid.
  • the present invention by arranging the size of the basic capacitor so as to match the wiring pitch of the printed board, it is possible to simplify the arrangement of the through holes connecting the wiring layer and the capacitor layer. By connecting a plurality of capacitors in series or in parallel, a desired capacitor capacity can be realized.
  • the structure of the carbon nanotube may be a single-walled or single tube, or a multi-walled or concentric tube of different diameters. —It may be a group.
  • the diameter of the carbon nanotubes is preferably 1 to: LOO nm.
  • a carbon nanotube is an ultra-fine tube-like substance with a hole diameter of nanometers (one nano is one billionth of a billion) formed by meshing carbon atoms. Since the electrolyte ion diameter of a normal electrolyte is about 0.4 to 0.6 nm, it is preferable for the adsorption and desorption of force ions having a hole diameter of 1 to 2 nm. In addition, by orienting the carbon nanotubes substantially vertically, the absorption and desorption of the ions are further smoothed, and even when the discharge current is increased, the capacity does not decrease much, so that it can be used for a long time.
  • the electrolyte of the electric double layer capacitor is non-printed tones such as propylene carbonate, 1-butylene carbonate, snoreholane, acetonitril, y-butyltyl lactone and dimethylformamide.
  • Organic solvent such as tetrafluoroammonium perchlorate, tetrafluoroammonium hexafluorophosphate, and tetrachlorammonium perchlorate, or lithium
  • cations such as quaternary phosphonium BF 4 -, PF 6 -, C 1 0 4 - ⁇ CF 2 obtained by dissolving a Anio down or Ranaru inorganic solutes, such as SO 2 and an aqueous solution-based electrolyte, such as diluted sulfuric acid containing a salt of La Ntano Lee de elements such A liquid, or a polymer type electrolytic solution obtained by adding a polymer substance to the liquid, or the like can be used.
  • the electric double-layer canister is incorporated in each of the holes of the insulating plate frame having a large number of holes in a predetermined pattern. Can be connected to Therefore, no special space is required for installing capacitors, and long connection wiring between high-speed operation elements is not required. Simple theory of drawing
  • FIG. 1 is a vertical sectional view schematically showing an electric double layer capacitor in Example 1.
  • FIG. 2 is a vertical sectional view schematically showing an electric double-layer capacitor in Example 2.
  • FIG. 4 is a vertical sectional view schematically showing a first step in the fourth embodiment.
  • FIG. 5 is a vertical sectional view schematically showing the steps 2 1 and 3 in Example 4.
  • FIG. 6 is a vertical sectional view schematically showing a fourth step in the fourth embodiment.
  • FIG. 6 is a vertical sectional view schematically showing a sixth step in Example 4.
  • FIG. 8 is a vertical sectional view schematically showing a seventh step in Example 4.
  • FIG. 9 is a vertical sectional view schematically showing a first step and a second step in Example 5.
  • FIG. 10 is a vertical sectional view schematically showing a third step in Example 5.
  • FIG. 11 is a vertical sectional view schematically showing a fourth step in Example 5.
  • FIG. 12 is a vertical sectional view schematically showing a fifth step in Example 5.
  • FIG. 13 is a plan view schematically showing an example in which a plurality of through-holes form a grid-like pattern arranged vertically and horizontally.
  • FIG. 14 is a plan view schematically showing an example in which a plurality of through holes are unevenly distributed in necessary portions of the insulating plate frame.
  • FIG. 2 which shows the electric double-layer capacity according to the second invention
  • a large number of carbon nanotubes (2 7) is sandwiched by a pair of side electrodes (24) (25) having a large number of carbon nanotubes on one side via a separator (26).
  • the pair of side electrodes (24) and (25) are arranged such that the carbon nanotube (22) of one side electrode (24) and the carbon nanotube (23) of the other side electrode (25) face each other. Are located.
  • Electrolyte is injected into the container (21) and impregnated into the carbon nanotubes (22) (23) (27).
  • an unhardened insulating plate frame (10) having a plurality of rectangular through holes (9) was prepared.
  • the uncured insulating plate frame (10) is composed of a prepreg.
  • the through holes (9) have a plurality of through holes (9) in a grid pattern arranged vertically and horizontally.
  • the electric double layer capacitor (8) obtained in the previous step was fitted into each through hole (9) of the uncured insulating plate frame (10).
  • the thickness of the uncured insulating plate frame (10) is the same as the thickness of the electric double layer capacitor (8), so that both sides of the capacitor-embedded unhardened insulating plate frame (11) are flush with each other. And came.
  • a circuit layer (12) having an aluminum or copper circuit (13) is laminated on both sides of the insulating plate frame (11) with a built-in capacitor, and electronic components are placed on the upper circuit layer (12).
  • the installation layer (14) was stacked.
  • the pre-prepader constituting the uncured insulating plate frame (10) is thermally cured, the electric double layer capacitor (8) is fixed to the cured insulating plate frame (10), and the capacitor is assembled. An insulating plate frame (11) was obtained.
  • the through-horn (15) penetrates the insulation board frame (11), the circuit layer (12), and the electronic component installation layer (14), and connects to the circuit (13) at the required position.
  • the through-horn penetrates the insulation board frame (11), the circuit layer (12), and the electronic component installation layer (14), and connects to the circuit (13) at the required position.
  • a printed board with built-in capacitors (16) was fabricated.
  • a high-speed operation device is placed on the electronic component installation layer (14) and connected to the through hole (15).
  • an insulating plate is interposed between the cured insulating plate frame (10) and the circuit layer (12), and the circuit (13) It may be configured to connect an electric double layer capacitor (8).
  • a cured insulating plate frame (20) having many rectangular through holes (1) was prepared.
  • the hardened insulating plate frame (20) is formed by hardening a pre-preda, and the plurality of through holes (9) form a checkerboard pattern arranged vertically and horizontally.
  • the sand and the switch (17) obtained in the previous step are fitted into each through-hole (9) of the cured insulating plate frame (20), and the capacitor-mounted cured insulating plate frame (18) is attached.
  • the thickness of the hardened insulating plate frame (20) was the same as the thickness of the sand switch (17), and therefore both side surfaces of the capacitor-mounted insulating plate frame (18) were flush with each other.
  • a circuit layer (12) containing an aluminum or copper circuit (13) is laminated on both sides of the insulating plate frame (18) with a built-in capacitor, and the upper circuit layer (12)
  • An electronic component installation layer (14) was laminated thereon, and an electrolytic solution having the same configuration as in Example 1 was injected into each through-hole (9) under a dry nitrogen atmosphere to impregnate the carbon nanotubes. .
  • the amount of electrolyte was 1-3 cc / cm 2 .
  • the present invention relates to an electric double-layer capacitor using carbon nanotubes capable of storing a large amount of electricity, a printed circuit board for an electronic circuit incorporating an electric double-layer capacitor, and a print incorporating the capacitor.
  • a method for manufacturing a substrate is provided.

Abstract

According to the invention, a pair of electrodes (24, 25) each having numerous carbon nanotubes on one side are disposed in a case (21) in such a way that the carbon nanotubes (22) on one electrode (24) are opposed to the carbon nanotubes (23) on the other electrode (25) with a separator (26) interposed therebetween. The case (21) is filled with electrolyte, and the carbon nanotubes (22, 23) are impregnated with it. The electric double layer capacitor exhibits a capacitance of 3 mF/cm2. The electric double layer capacitor is incorporated in each of many through holes made in an insulating plate frame and arranged in a predetermined pattern. Therefore, these electric double layer capacitors can be connected near a high-speed operating element to a capacitor with a required capacitance. As a result, no special space for installing a capacitor is needed, and no long connection wiring between high-speed operation elements is needed.

Description

明 細 書 キャパシタ組込みプリ ン ト基板 技術分野 .  Technical field of printed circuit board with built-in capacitor.
本発明は、 大容量の電気を蓄えることが可能な、 カーボン ナノ チューブを用いた電気二重層キャパシタ、 および電気二 重層キャパシタを組込んだ電子回路用プリ ン ト基板並びに同 キャパシタ組込みプリ ン ト基板の製造方法に関するものであ る 背景技術  The present invention relates to an electric double layer capacitor using carbon nanotubes capable of storing a large amount of electricity, a printed circuit board for an electronic circuit incorporating the electric double layer capacitor, and a printed circuit board incorporating the capacitor. Background of the Invention
高速動作の電子回路素子 (高速動作素子) で電子回路を構 成するとき、 プリ ン ト基板には高速動作に必要な大電流を高 速動作素子に供給しなければならない。 このため同素子の近 く に蓄電用のキャパシタを配置する必要がある。  When an electronic circuit is composed of high-speed electronic circuit elements (high-speed operation elements), a large current required for high-speed operation must be supplied to the high-speed operation elements on the printed circuit board. For this reason, it is necessary to arrange a storage capacitor near the element.
高速動作の電子回路をプリ ン ト基板で構成するとき、 必要 な電流の供給を補うためにキヤパシ夕を高速動作素子の近傍 に配置する と共に、 高速動作素子間の配線長を可能な限り短 く す.る こ とが求められる。 しかし、 高速動作素子の近傍にキ ャパシタを設置するとその設置スペースが必要である上に配 線長が長く なり、 上記要望と矛盾することになる。 さ らに電 源供給ライ ンのィ ン ピーダンスが高く なるために E M I (El e ctro Magnet ic Interf erence)などの電磁放射も問題となつ ている。  When a high-speed electronic circuit is configured on a printed circuit board, a capacitor is placed near the high-speed operation element to supplement the supply of necessary current, and the wiring length between the high-speed operation elements is made as short as possible. Is required. However, installing a capacitor in the vicinity of a high-speed operation element requires an installation space and increases the wiring length, which contradicts the above demand. In addition, electromagnetic radiation such as EMI (Electro Magnetic Interface) is also a problem due to the high impedance of the power supply line.
本発明は、 上記矛盾点を解決することを課題とする。 発明の開示 An object of the present invention is to solve the above contradictions. Disclosure of the invention
第 1の発明は、 片面に多数の力一 ボンナノチューブを有す る一対の電極が、 セパレ一タを介して、 一方の電極のカーボ ンナノチュープ群と他方の電極の力一ボンナノチューブ群が 対向するように配置され、 力一ボン ナノ チューブ群に電解液 が含浸されてなる、 電気二重層キヤ ノ、。シタである。  According to the first invention, a pair of electrodes having a large number of carbon nanotubes on one side face a carbon nanotube group of one electrode and a carbon nanotube group of the other electrode via a separator. An electric double-layer canopy, in which a group of carbon nanotubes is impregnated with an electrolyte. Sita.
第 2の発明は、 両面に多数のカー ボンナノチューブを有す る 1枚の内部電極が、 片面に多数の カーボンナノチューブを 有する一対の側部電極で、 セパレー 夕を介してサン ドィ ツチ され、 一対の側部電極は、 一方の側部電極の力一ボンナノ チ ュ一プ群と他方の側部電極のカーボ ンナノチューブ群が対向 するように配置され、 カーボンナノ チューブ群に電解液が含 浸されてなる、 電気二重層キャパシ タである。  According to a second aspect of the present invention, one internal electrode having a large number of carbon nanotubes on both sides is sandwiched by a pair of side electrodes having a large number of carbon nanotubes on one side via a separator. The pair of side electrodes are arranged so that the carbon nanotube group of one side electrode and the carbon nanotube group of the other side electrode face each other, and the carbon nanotube group is impregnated with the electrolyte. This is an electric double layer capacitor.
第 3の発明は、 両面に多数のカー ボンナノチューブを有す る複数枚の内部電極がセパレータを介して多層状に配置され、 この多層内部電極群が、 片面に多数のカーボンナノチューブ を有する一対の側部電極で、 側部セ ノ、。レータを介してサン ド ィ ツチされ、 一対の側部電極は、 一方の側部電極のカーボン ナノチューブ群と他方の側部電極の カーボンナノチューブ群 が対向するように配置され、 カーボ ンナノチューブ群に電解 液が含浸されてなる、 電気二重層キ ャパシタである。  In the third invention, a plurality of internal electrodes having a large number of carbon nanotubes on both surfaces are arranged in a multilayer through a separator, and this multilayer internal electrode group is composed of a pair of a plurality of carbon nanotubes having a large number of carbon nanotubes on one surface. Side electrodes, with side electrodes. The pair of side electrodes are arranged so that the carbon nanotubes of one side electrode and the carbon nanotubes of the other side electrode face each other, and the pair of side electrodes are electrolyzed to the carbon nanotube group. This is an electric double layer capacitor impregnated with liquid.
第 4の発明は、 第 1〜 3のいずれかの発明による電気二重 層キャパシ夕が、 所定パターンで多数の透孔を有する絶縁板 枠の各透孔に嵌込まれ、 両側に回路層が積層されてなる、 キ ャパシタ組込みプリ ン ト基板である 。  According to a fourth invention, the electric double layer capacity according to any one of the first to third inventions is fitted into each through hole of an insulating plate frame having a large number of through holes in a predetermined pattern, and circuit layers are provided on both sides. This is a printed circuit board with a built-in capacitor.
第 5の発明は、 第 1〜 3のいずれかの発明による電気二重 層キャパシタを、 所定パターンで多数の透孔を有する未硬化 絶縁板枠の各透孔に嵌込み、 次いで同絶縁板枠を硬化させ、 硬化絶縁板枠の両側に回路層を積層する、 キャパシタ組込み プリ ン ト基板の製造方法であ る。 According to a fifth aspect of the present invention, the electric double layer capacitor according to any one of the first to third aspects is fitted into each of the uncured insulating plate frames having a large number of through holes in a predetermined pattern. Cured, This is a method for manufacturing a printed circuit board with a built-in capacitor, in which circuit layers are laminated on both sides of a cured insulating plate frame.
第 6の発明は、 第 1 〜 3のいずれかの発明による電気二重 層キャパシタを、 所定パター ンで多数の透孔を有する硬化絶 縁板枠の各透孔に嵌込み、 次いで、 硬化絶縁板枠の両側に回 路層を積層する、 キャパシタ組込みプリ ン ト基板の製造方法 でめる。  In a sixth aspect, the electric double layer capacitor according to any one of the first to third aspects is fitted into each through hole of a hardened insulating plate frame having a large number of through holes in a predetermined pattern. A circuit board is built on both sides of a board frame.
第 1 〜 3の発明による電気二重層キャパシタは、 いずれも 小さな面積で大きなキャパシ タ容量を示す。 例えば第 1 の発 明による電気二重層キャパシタは 1 c m 2当 り 3 m F と大き なキャパシタ容量を示す。 Each of the electric double layer capacitors according to the first to third inventions shows a large capacitance with a small area. For example, the electric double layer capacitor according to the first invention has a large capacitance of 3 mF / cm 2 .
絶縁板枠は、 炭素繊維、 ガラス繊維等の強化繊維の織物に 熱硬化樹脂を含浸させてなる シー ト、 例えばプリ プレダを硬 化させて構成したものであつ てよい。 絶縁板枠(10)に設けら れる透孔(9) のパターンは、 図 1 3 に示すように、 通常は複 数の透孔(9) が縦横に並んだ碁盤目である。 複数の透孔(9) は絶縁板枠(10)の全体に直つ て設けられても、 図 1 4に示す ように、 絶縁板枠(10)の必要部分に偏在して設けられてもよ い。 後者の場合、 複数の透孔(9) に嵌込まれた電気二重層キ ャパシタ(8) をカバ一して 1 つの高速動作素子(19)を配置す ることができる。  The insulating plate frame may be a sheet obtained by impregnating a woven fabric of reinforcing fibers such as carbon fiber and glass fiber with a thermosetting resin, for example, a sheet obtained by hardening a pre-preda. As shown in FIG. 13, the pattern of the through holes (9) provided in the insulating plate frame (10) is usually a grid having a plurality of through holes (9) arranged vertically and horizontally. The plurality of through-holes (9) may be provided directly on the entire insulating plate frame (10), or may be unevenly provided on required portions of the insulating plate frame (10) as shown in FIG. Good. In the latter case, one high-speed operation element (19) can be arranged by covering the electric double-layer capacitor (8) inserted into the plurality of through holes (9).
本発明において、 基本にな るキャパシタのサイズをプリ ン ト基板の配線ピッチに合う よ うにするこ とにより配線層とキ ャパシタ層を繋ぐスルーホールの配置を簡素化するこ とがで きる。 複数のキャパシタを直列または並列に接続する こ とに より所望のキャパシタ容量を実現するこ とができる。  In the present invention, by arranging the size of the basic capacitor so as to match the wiring pitch of the printed board, it is possible to simplify the arrangement of the through holes connecting the wiring layer and the capacitor layer. By connecting a plurality of capacitors in series or in parallel, a desired capacitor capacity can be realized.
カーボンナノチューブの構造は単層すなわち単一のチュー プであってもよいし、 多層すなわち同心状の複数の異径チュ —プであってもよい。 カーボンナノチューブの直径は好ま し く は 1〜: L O O n mである。 The structure of the carbon nanotube may be a single-walled or single tube, or a multi-walled or concentric tube of different diameters. —It may be a group. The diameter of the carbon nanotubes is preferably 1 to: LOO nm.
力一ボンナノチューブは、 力一ボン原子が網目状に結合し てできた穴径ナノ ( 1ナノ は 1 0億分の 1) メ ー トルサイズ の極微細な筒 (チューブ) 状の物質である。 通常の電解液の 電解質イオン直径は約 0. 4〜 0. 6 n mであるので、 穴径 l〜 2 nmの力一ボンナノチューブ力 イオンの吸脱着に好ま しい。 また、 カーボンナノチューブを実質上垂直に配向させ るこ とでィォンの吸脱着がさ らにスムーズとなり、 放電電流 が増加した場合でも容量の低下が少ないため、 長時間の使用 が可能となる。  A carbon nanotube is an ultra-fine tube-like substance with a hole diameter of nanometers (one nano is one billionth of a billion) formed by meshing carbon atoms. Since the electrolyte ion diameter of a normal electrolyte is about 0.4 to 0.6 nm, it is preferable for the adsorption and desorption of force ions having a hole diameter of 1 to 2 nm. In addition, by orienting the carbon nanotubes substantially vertically, the absorption and desorption of the ions are further smoothed, and even when the discharge current is increased, the capacity does not decrease much, so that it can be used for a long time.
電極を構成するカーボンナノチューブは、 公知の方法で作 製できる。 例えば、 シリ コ ン基板の少な く と も片面上に F e 膜をフォ ト リ ソグラフィ 一でパターン化し、 この面にァセチ レン (C 2H2) ガスを用いて一般的な化学蒸着法 (CVD法) を施すことにより作製できる。 この方法では、 直径 1 2〜 3 8 nmのカーボンナノチューブが多層構造で基板上に実質上 垂直に起毛される。 こ う して成長させた力一ボンナノ チュー プをシリ コン基板から接着剤を施した集電体に転写し接着す る。 接着層は導電性ペース 卜からなる ものである ことが好ま しい。 集電体は、 アルミ ニウムのような導電材からなる。 電気二重層キヤパシタの電解液は、 プロ ピレンカーボネー ト、 1—プチレンカーボネー ト、 スノレホラ ン、 ァセ トニ ト リ ル、 y—プチルラク ト ン、 ジメチルホルムア ミ ドなどの非プ 口 ト ン性溶媒に、 テ トラェチルアンモニゥムテ トラフルォ口 ボレー トゃテ トラェチルアンモニゥムへキサフルォロホスフ アー ト、 テ トラプチルアンモニゥム過塩素酸塩などの有機溶 質、 または、 リチウム、 第 4級ホスホニゥム等のカチオンと B F 4—、 P F 6—、 C 1 0 4—ヽ C F 2 S O 2 などのァニオ ンか らなる無機溶質を溶解したものや、 ラ ンタノ イ ド元素の塩等 を含む希硫酸などの水溶液系電解液、 またはこれらに高分子 物質を加えたポリマ一型電解液などを使用することができる。 本発明によれば、 電気二重層キャノ^シタは、 所定パターン で多数の透孔を有する絶縁板枠の各透孔に組み込まれている ので、 高速動作素子の近傍でこれを必要な容量のキャパシタ と繋ぐことができる。 したがって、 キャパシタ設置のための 特別なスペースは必要でなく、 高速動作素子間の長い接続配 線も必要でない。 図面の簡単な説 The carbon nanotube constituting the electrode can be produced by a known method. For example, an Fe film is patterned by photolithography on at least one surface of a silicon substrate, and acetylene (C 2 H 2 ) gas is used to form a general chemical vapor deposition (CVD) method on this surface. Method). In this method, carbon nanotubes having a diameter of 12 to 38 nm are raised substantially vertically on a substrate in a multilayer structure. The carbon nanotubes grown in this way are transferred from the silicon substrate to a current collector provided with an adhesive and adhered. The adhesive layer is preferably made of a conductive paste. The current collector is made of a conductive material such as aluminum. The electrolyte of the electric double layer capacitor is non-printed tones such as propylene carbonate, 1-butylene carbonate, snoreholane, acetonitril, y-butyltyl lactone and dimethylformamide. Organic solvent such as tetrafluoroammonium perchlorate, tetrafluoroammonium hexafluorophosphate, and tetrachlorammonium perchlorate, or lithium, With cations such as quaternary phosphonium BF 4 -, PF 6 -, C 1 0 4 -ヽCF 2 obtained by dissolving a Anio down or Ranaru inorganic solutes, such as SO 2 and an aqueous solution-based electrolyte, such as diluted sulfuric acid containing a salt of La Ntano Lee de elements such A liquid, or a polymer type electrolytic solution obtained by adding a polymer substance to the liquid, or the like can be used. According to the present invention, the electric double-layer canister is incorporated in each of the holes of the insulating plate frame having a large number of holes in a predetermined pattern. Can be connected to Therefore, no special space is required for installing capacitors, and long connection wiring between high-speed operation elements is not required. Simple theory of drawing
図 1 は実施例 1 における電気二重層キャパシタを概略的に 示す垂直断面図である  FIG. 1 is a vertical sectional view schematically showing an electric double layer capacitor in Example 1.
図 2 は実施例 2 における電気二重層キャパシタを概略的に 示す垂直断面図である  FIG. 2 is a vertical sectional view schematically showing an electric double-layer capacitor in Example 2.
図 3 は実施例 3における電気二重層キャパシタを概略的に 示す垂直断面図である  FIG. 3 is a vertical sectional view schematically showing an electric double layer capacitor according to the third embodiment.
図 4 は実施例 4における第 1工程を概略的に示す垂直断面 図である。  FIG. 4 is a vertical sectional view schematically showing a first step in the fourth embodiment.
図 5 は実施例 4における 2 1 び第 3工程を概略的 に示す垂直断面図でめる  FIG. 5 is a vertical sectional view schematically showing the steps 2 1 and 3 in Example 4.
図 6 は実施例 4における第 4工程を概略的に示す垂直断面 図である。  FIG. 6 is a vertical sectional view schematically showing a fourth step in the fourth embodiment.
図 Ί は実施例 4における第 6工程を概略的に示す垂直断面 図である。  FIG. 6 is a vertical sectional view schematically showing a sixth step in Example 4.
図 8 は実施例 4における第 7工程を概略的に示す垂直断面 図である。 FIG. 8 is a vertical sectional view schematically showing a seventh step in Example 4. FIG.
図 9 は実施例 5における第 1工程および第 2工程を概略的 に示す垂直断面図である。  FIG. 9 is a vertical sectional view schematically showing a first step and a second step in Example 5.
図 1 0は実施例 5 における第 3工程を概略的に示す垂直断 面図である。  FIG. 10 is a vertical sectional view schematically showing a third step in Example 5.
図 1 1 は実施例 5 における第 4工程を概略的に示す垂直断 面図である。  FIG. 11 is a vertical sectional view schematically showing a fourth step in Example 5.
図 1 2は実施例 5 における第 5工程を概略的に示す垂直断 面図である。  FIG. 12 is a vertical sectional view schematically showing a fifth step in Example 5.
図 1 3は複数の透孔が縦横に並んだ碁盤目状のパターンを なす例を概略的に彔す平面図である。  FIG. 13 is a plan view schematically showing an example in which a plurality of through-holes form a grid-like pattern arranged vertically and horizontally.
図 1 4は複数の透孔が絶縁板枠の必要部分に偏在する例を 概略的に示す平面図である。 発明を実施するための最良の形態  FIG. 14 is a plan view schematically showing an example in which a plurality of through holes are unevenly distributed in necessary portions of the insulating plate frame. BEST MODE FOR CARRYING OUT THE INVENTION
つぎに、 本発明を実施例に基づいて具体的に説明する。 実施例 1  Next, the present invention will be specifically described based on examples. Example 1
第 1の発明による電気二重層キャパシタを示す図 1 におい て、 容器(21)内にて、 片面に多数のカーボンナノチューブを 有する一対の電極(24) (25)が、 セパレー夕(26)を介して、 一 方の電極(24)の力一ボンナノ チュープ(22)と他方の電極(25) の力一ボンナノチューブ(23)が対向するように配置されてい る。 容器(21)内に電解液が注入され、 カーボンナノチューブ (22) (23)に含浸されている。 この電気二重層キャパシタは 1 c m 2当り 3 m F と大きなキャパシタ容量を示す。 In FIG. 1 showing the electric double layer capacitor according to the first invention, in a container (21), a pair of electrodes (24) and (25) each having a large number of carbon nanotubes on one side are connected via a separator (26). Thus, the carbon nanotube (22) of one electrode (24) and the carbon nanotube (23) of the other electrode (25) are arranged to face each other. An electrolytic solution is injected into the container (21) and impregnated in the carbon nanotubes (22) and (23). This electric double layer capacitor has a large capacitance of 3 mF / cm 2 .
実施例 2 Example 2
第 2の発明による電気二重層キャパシ夕を示す図 2 におい て、 容器(21)内にて、 両面に多数のカーボンナノチューブ(2 7)を有する 1枚の内部電極(28)が、 片面に多数のカーボンナ ノチューブを有する一対の側部電極(24) (25)で、 セパレ一夕 (26)を介してサン ドィ ツチされてい る。 一対の側部電極(24) (25)は、 一方の側部電極(24)のカーボンナノチューブ(22)と 他方の側部電極(25)のカーボンナノ チュ一プ(23)が対向する ように配置されている。 容器(21)内に電解液が注入され、 力 一ボンナノチューブ(22) (23) (27)に含浸されている。 In FIG. 2, which shows the electric double-layer capacity according to the second invention, in the container (21), a large number of carbon nanotubes (2 7) is sandwiched by a pair of side electrodes (24) (25) having a large number of carbon nanotubes on one side via a separator (26). ing. The pair of side electrodes (24) and (25) are arranged such that the carbon nanotube (22) of one side electrode (24) and the carbon nanotube (23) of the other side electrode (25) face each other. Are located. Electrolyte is injected into the container (21) and impregnated into the carbon nanotubes (22) (23) (27).
実施例 3 Example 3
第 3の発明による電気二重層キヤノ、。シタを示す図 3 におい て、 容器(21)内にて、 両面に多数の カーボンナノチューブ(2 7)を有する複数枚の内部電極(29)が内部セパレータ(26)を介 して多層状に配置され、 こ う して構成された多層内部電極群 (30)が、 片面に多数のカーボンナノ チューブを有する一対の 側部電極(24) (25)で、 セパレータ(26)を介してサン ドィ ツチ されている。 一対の側部電極(24)(25)は、 一方の側部電極(2 4)の力一ボンナノ チューブ(22)と他方の側部電極(25)のカー ボンナノチューブ(23)が対向するよ うに配置されている。 容 器(21)内に電解液が注入され、 カー ボンナノチューブ(22) (2 3)(27)に含浸されている。  The electric double layer cano according to the third invention. In FIG. 3, which shows a pit, a plurality of internal electrodes (29) having a large number of carbon nanotubes (27) on both sides are arranged in a multilayered manner via an internal separator (26) in a container (21). The multi-layered internal electrode group (30) thus configured is composed of a pair of side electrodes (24) (25) having a large number of carbon nanotubes on one side, and sandwiched via a separator (26). It has been tipped. The pair of side electrodes (24) and (25) are arranged such that the carbon nanotube (22) of one side electrode (24) and the carbon nanotube (23) of the other side electrode (25) face each other. It is arranged as follows. The electrolytic solution is injected into the container (21) and impregnated in the carbon nanotubes (22), (23) and (27).
実施例 4 Example 4
第 1工程 1st step
図 4において、 l O mm X l O m m X O . 5 mm厚の低抵 抗 N型半導体シ リ コ ン基板の片面に フ ォ ト リ ソグラフィ ーで F e膜をパターン化した後、 ァセチ レンを流量 3 0 m 1 /m i n、 温度 7 0 0 °Cで 1 5分流して化学蒸着法により基板上 に無数のカーボンナノチューブをブラ シ状に成長させた。 得 られたカーボンナノチューブは多層構造であり、 直径は 1 2 n mで、 長さは 5 O z mであった。 こう して成長させたカーボンナノチューブをシリ コ ン基板 から、 表面に導電性ペース 卜からなる接着層を施したアルミ 二ゥム薄板からなる集電体上に 1 5 0 °C Z 4 9 N c m 2で加 熱 ·加圧することで転写した。 こ う して片面に多数のカーボ ンナノ チューブ(3) (4) を有する一対の電極(1) (2) を得た。 第 2工程 In FIG. 4, after patterning a Fe film by photolithography on one surface of a low-resistance N-type semiconductor silicon substrate having a thickness of l mm x l mm mm XO .5 mm, acetylene was applied. At a flow rate of 30 m 1 / min and a temperature of 700 ° C. for 15 minutes, countless carbon nanotubes were grown on the substrate in a brush-like manner by chemical vapor deposition. The obtained carbon nanotube had a multilayer structure, a diameter of 12 nm, and a length of 5 Ozm. This was carbon nanotubes grown from the silicon co emissions substrate, an aluminum two © beam thin plate subjected to adhesive layer made of conductive paste Bok made on the current collector to the surface 1 5 0 ° CZ 4 9 N cm 2 The image was transferred by heating and pressing. Thus, a pair of electrodes (1) and (2) each having a large number of carbon nanotubes (3) and (4) on one side were obtained. 2nd step
図 5 において、 容器(6) 内で、 露点下 (温度一 6 0 °C、 水 分なし) の窒素雰囲気で、 片面に多数のカーボンナノ チュー プを有する一対の電極(1) (2) を、 セパレータ(5) を介して、 一方の電極(1) のカーボンナノチューブ(3) と他方の電極(2) の力一ボンナノ チューブ(4) が対向する よ う に配置し、 サ ン ドイ ツチ体(17)を作製した。 その後、 1 5 0〜 2 0 0でで 2 4時間乾燥を行つた。  In Fig. 5, a pair of electrodes (1) and (2) each having a large number of carbon nanotubes on one side were placed in a vessel (6) in a nitrogen atmosphere under a dew point (temperature: 60 ° C, no water). The carbon nanotube (3) of one electrode (1) and the carbon nanotube (4) of the other electrode (2) are arranged so as to face each other via a separator (5). (17) was produced. Thereafter, drying was performed at 150 to 200 for 24 hours.
第 3工程 3rd step
同じ く 図 5において、 乾燥窒素雰囲気下にグロ一ブボッ ク ス内で電解液 (テ トラェチルアンモニゥムテ トラフルォロボ レー トのプロ ピレンカーボネー ト溶液 (濃度 = 1 m 0 1 X 1 ) ) を容器(6) 内に注入し、 カーボンナノ チューブ(3) (4) に 含浸させた。 電解液の量は 1 c m 2当たり 1〜 3 c c とした。 Similarly, in Fig. 5, the electrolyte solution (tetracarbon ammonium trifluorocarbonate solution (concentration = 1 m01 x 1)) was placed in a glove box under a dry nitrogen atmosphere. (6), and impregnated into carbon nanotubes (3) and (4). The amount of the electrolyte was 1-3 cc / cm 2 .
その後、 ポリ プロ ピレン製ガスケッ トを用いて容器(6) の 口部をステ ン レス鋼製の蓋材(7) でかしめ封口した。 こ う し て、 上側電極(1) が陽極で下側電極(2) が陰極である電気二 重層キャパシタ(8) を作製した。  Thereafter, the mouth of the container (6) was swaged with a stainless steel lid (7) using a polypropylene gasket and sealed. Thus, an electric double-layer capacitor (8) having the upper electrode (1) as the anode and the lower electrode (2) as the cathode was produced.
第 4工程 4th step
図 6 に示すように、 複数の長方形の透孔(9) を有する未硬 化絶縁板枠(10)を用意した。 未硬化絶縁板枠(10)はプリ プレ グで構成されたものである。 透孔(9) は、 図 1 3 に示すよう に、 複数の透孔(9) は縦横に並んだ碁盤目状のパターンをな 未硬化絶縁板枠(10)の各透孔(9) に前工程で得られた電気 二重層キャパシタ(8) を嵌込んだ。 こ う してキャパシタ組込 み未硬化絶縁板枠(10)を作製した。 未硬化絶縁板枠(10)の厚 さは電気二重層キャパシタ(8) の厚さと同じであり、 したが つてキャパシタ組込み未硬 f匕絶縁板枠(11)の両側面はそれぞ れ面一となつた。 As shown in FIG. 6, an unhardened insulating plate frame (10) having a plurality of rectangular through holes (9) was prepared. The uncured insulating plate frame (10) is composed of a prepreg. As shown in Fig. 13, the through holes (9) have a plurality of through holes (9) in a grid pattern arranged vertically and horizontally. The electric double layer capacitor (8) obtained in the previous step was fitted into each through hole (9) of the uncured insulating plate frame (10). Thus, an uncured insulating plate frame (10) with a built-in capacitor was manufactured. The thickness of the uncured insulating plate frame (10) is the same as the thickness of the electric double layer capacitor (8), so that both sides of the capacitor-embedded unhardened insulating plate frame (11) are flush with each other. And came.
第 5工程 Step 5
同じく 図 6 において、 キャパシタ組込み絶縁板枠(11)の両 側に、 アルミ ニゥムまたは銅製の回路(13)を有する回路層(1 2)を積層し、 上側回路層(12 )の上に電子部品設置層(14)を積 層した。  Similarly, in FIG. 6, a circuit layer (12) having an aluminum or copper circuit (13) is laminated on both sides of the insulating plate frame (11) with a built-in capacitor, and electronic components are placed on the upper circuit layer (12). The installation layer (14) was stacked.
第 6工程 Step 6
その後、 図 7に示すよう に、 未硬化絶縁板枠(10)を構成す るプリ プレダを熱硬化させ、 電気二重層キャパシタ(8) を硬 化絶縁板枠(10)に固定し、 キャパシタ組込み絶縁板枠(11)を 得た。  After that, as shown in Fig. 7, the pre-prepader constituting the uncured insulating plate frame (10) is thermally cured, the electric double layer capacitor (8) is fixed to the cured insulating plate frame (10), and the capacitor is assembled. An insulating plate frame (11) was obtained.
第 Ί工程 Step Ί
図 8に示すように、 キヤ 、°シタ組込み絶縁板枠(11)、 回路 層(12)および電子部品設置層(14)を貫通して所要位置で回路 (13)に接続するスルーホーノレ(15)を開けた。 こ う してキャパ シ夕組込みプリ ン ト基板(16 )を作製した。 電子部品設置層(1 4)の上に高速動作素子が配置されスルーホール(15)に接続さ As shown in Fig. 8, the through-horn (15) penetrates the insulation board frame (11), the circuit layer (12), and the electronic component installation layer (14), and connects to the circuit (13) at the required position. Was opened. In this way, a printed board with built-in capacitors (16) was fabricated. A high-speed operation device is placed on the electronic component installation layer (14) and connected to the through hole (15).
¾しる ¾
なお、 硬化絶縁板枠(10)と回路層(12)の接着強度を上げる ために、 硬化絶縁板枠(10)と回路層(12)の間に絶縁板を介在 させ、 回路(13)と電気二重層キャパシタ(8) を接続する構成 と してもよい。 実施例 5 In order to increase the adhesive strength between the cured insulating plate frame (10) and the circuit layer (12), an insulating plate is interposed between the cured insulating plate frame (10) and the circuit layer (12), and the circuit (13) It may be configured to connect an electric double layer capacitor (8). Example 5
第 1工程 1st step
実施例 4の第 1 工程と同じ操作により片面に多数のカーボ ンナノチューブを有する一対の電極(1) (2) を得た。  By the same operation as in the first step of Example 4, a pair of electrodes (1) and (2) each having a large number of carbon nanotubes on one surface were obtained.
第 2工程 2nd step
実施例 4の第 2 工程と同じ操作によりサン ドィ ツチ(17)を 得た。 これを図 9 に示す。  Sandwich (17) was obtained by the same operation as in the second step of Example 4. This is shown in Figure 9.
第 3工程 3rd step
図 1 3に示すよ うに、 多数の長方形の透孔(1) を有する硬 化絶縁板枠(20)を用意した。 硬化絶縁板枠(20)はプリ プレダ を硬化させて構成したものであり、 複数 1 の透孔(9) は縦横 に並んだ碁盤目伏のパターンをなす。  As shown in FIG. 13, a cured insulating plate frame (20) having many rectangular through holes (1) was prepared. The hardened insulating plate frame (20) is formed by hardening a pre-preda, and the plurality of through holes (9) form a checkerboard pattern arranged vertically and horizontally.
図 1 0において、 硬化絶縁板枠(20)の各透孔(9) に前工程 で得られたサン ド、ィ ッチ(17)を嵌込んで、 キャパシタ組込み 硬化絶縁板枠(18)を作製した。 硬化絶縁板枠(20)の厚さはサ ン ドイ ッチ(17)の厚さ と同じであり、 したがってキャパシタ 組込み絶縁板枠(18)の両側面はそれぞれ面一となった。  In FIG. 10, the sand and the switch (17) obtained in the previous step are fitted into each through-hole (9) of the cured insulating plate frame (20), and the capacitor-mounted cured insulating plate frame (18) is attached. Produced. The thickness of the hardened insulating plate frame (20) was the same as the thickness of the sand switch (17), and therefore both side surfaces of the capacitor-mounted insulating plate frame (18) were flush with each other.
第 4工程 4th step
図 1 1 に示すよ う に、 キャパシタ組込み絶縁板枠(18)の両 側に、 アルミニゥ ムまたは銅製の回路(13)を内装した回路層 (12)を積層し、 上側回路層(12)の上に電子部品設置層(14)を 積層し、 さ らに、 乾燥窒素雰囲気下に実施例 1 と同じ構成の 電解液を各透孔(9) 内に注入し、 カーボンナノチューブに含 浸させた。 電解液の量は 1 c m 2当たり 1 〜 3 c c と した。 第 5工程 As shown in Fig. 11, a circuit layer (12) containing an aluminum or copper circuit (13) is laminated on both sides of the insulating plate frame (18) with a built-in capacitor, and the upper circuit layer (12) An electronic component installation layer (14) was laminated thereon, and an electrolytic solution having the same configuration as in Example 1 was injected into each through-hole (9) under a dry nitrogen atmosphere to impregnate the carbon nanotubes. . The amount of electrolyte was 1-3 cc / cm 2 . Step 5
図 1 2に示すよ うに、 実施例 4の第 7工程と同じ操作によ りキャパシタ組込みプリ ン ト基板(16)を作製した。  As shown in FIG. 12, a printed circuit board (16) with a built-in capacitor was produced by the same operation as in the seventh step of Example 4.
0 産業上の利用可能性 0 Industrial applicability
本発明は、 大容量の電気を蓄える ことが可能な、 カーボン ナノ チューブを用いた電気二重層キャパシタ、 および電気二 重層キャパシ夕を組込んだ電子回路用プリ ン ト基板並びに同 キャパシタ組込みプリ ン ト基板の製造方法を提供する。  The present invention relates to an electric double-layer capacitor using carbon nanotubes capable of storing a large amount of electricity, a printed circuit board for an electronic circuit incorporating an electric double-layer capacitor, and a print incorporating the capacitor. A method for manufacturing a substrate is provided.
1 1

Claims

請求の範囲 The scope of the claims
1 . 片面に多数の力一ボンナノチューブを有する一 対の電極力 、 セパレータを介して、 一方の電極のカーボンナ ノチュープ群と他方の電極の力一ボンナノチュープ群が対向 するよう に配置され、 カーボンナノチュープ群に電解液が含 浸されてなる、 電気二重層キャパシタ。 1. A pair of electrodes, each having a large number of carbon nanotubes on one side, are arranged so that the carbon nanotubes of one electrode and the carbon nanotubes of the other electrode face each other via a separator. An electric double-layer capacitor made by impregnating an electrolyte into a group of nanotubes.
2 . 両面に多数の力一ボンナノチューブを有する 1 枚の内部電極が、 片面に多数のカーボンナノ チューブを有す る一対の IJ部電極で、 セパレー夕を介してサン ドィツチされ、 一対の側部電極は、 一方の側部電極の力一ボンナノチュ―プ 群と他方の側部電極のカーボンナノチュープ群が対向するよ うに配置され、 カーボンナノチュープ群に電解液が含浸され てなる、 電気二重層キャパ シ夕。  2. One internal electrode having a large number of carbon nanotubes on both sides is sandwiched via a separator with a pair of IJ electrodes having a large number of carbon nanotubes on one side. The electrodes are arranged so that the carbon nanotube group of one side electrode and the carbon nanotube group of the other side electrode face each other, and the carbon nanotube group is impregnated with an electrolytic solution. Cap evening.
3 . 両面に多数の力一ボンナノチュ 一プを有する複 数枚の内部電極がセパレ一タを介して多層状に配置さ ヽ の多層内部電極群が 、 片 に多数のカーボンナノチュ一プを 有する一対の側部電極で、 側部セパレ—夕を介してサン ド、ィ ツチされ 、 一対の側部電極は 、 一方の側部電極の力一ボンナ ノチューブ群と他方の側部電極のカーボンナノチュープ群が 対向するよ う に配置され、 力一ボンナノチュ一プ群に電解液 が含浸されてなる、 电 一重層キヤ ノ"?シタ o  3. A plurality of internal electrodes having a large number of carbon nanotubes on both surfaces are arranged in multiple layers via a separator. The multilayer internal electrode group has a large number of carbon nanotubes on one side. The pair of side electrodes is sandwiched and sandwiched via a side separator, and the pair of side electrodes is composed of the carbon nano tube group of one side electrode and the carbon nano tube group of the other side electrode. The tuples are arranged so as to face each other, and the electrolytes are impregnated in the force nanotubes.
4 . 請求項 1 〜 3のいずれかに記載の電気二重層キ ヤノ シタが、 所定パター ンで多数の透孔を有する絶縁板枠の 各透孔に嵌込まれ、 両側に回路層が積肩されてなる、 キャパ シタ組込みプリ ン ト基板。  4. The electric double layer canister according to any one of claims 1 to 3 is fitted into each through hole of an insulating plate frame having a large number of through holes in a predetermined pattern, and circuit layers are provided on both sides. A printed circuit board with a built-in capacitor.
5 . 請求項 1 〜 3のいずれかに記載の電気二重層キ ャパシタを、 所定パターンで多数の透孔を有する未硬化絶縁 板枠の各透孔に嵌込み、 次いで同絶縁板枠を硬化させ、 硬化 絶縁板枠の両側に回路層を積層する、 キャパシタ組込みプリ ン ト基板の製造方法。 5. The electric double-layer capacitor according to any one of claims 1 to 3, wherein the electric double-layer capacitor has an uncured insulation having a large number of through holes in a predetermined pattern. A method of manufacturing a printed circuit board with a built-in capacitor, wherein the circuit board is fitted into each through hole of the board frame, then the insulating board frame is cured, and circuit layers are laminated on both sides of the cured insulating board frame.
6 . 請求項 1〜 3のいずれかに記載の電気二重層キ ャパシタを、 所定パタ一ンで多数の透孔を有する硬化絶縁板 枠の各透孔に嵌込み、 次いで、 硬化絶縁板枠の両側に回路層 を積層する、 キャパシタ組込みプリ ン ト基板の製造方法。  6. The electric double layer capacitor according to any one of claims 1 to 3 is fitted into each of the through holes of the cured insulating plate frame having a large number of through holes in a predetermined pattern, and then the cured insulating plate frame is A method for manufacturing a printed circuit board with a built-in capacitor, in which circuit layers are stacked on both sides.
PCT/JP2004/018107 2003-12-16 2004-11-30 Printed board with built-in capacitor WO2005059934A1 (en)

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