WO2005045938A3 - Transistor a effet de champ a grille isolee - Google Patents

Transistor a effet de champ a grille isolee Download PDF

Info

Publication number
WO2005045938A3
WO2005045938A3 PCT/IB2004/052346 IB2004052346W WO2005045938A3 WO 2005045938 A3 WO2005045938 A3 WO 2005045938A3 IB 2004052346 W IB2004052346 W IB 2004052346W WO 2005045938 A3 WO2005045938 A3 WO 2005045938A3
Authority
WO
WIPO (PCT)
Prior art keywords
region
effect transistor
insulated gate
gate field
drift
Prior art date
Application number
PCT/IB2004/052346
Other languages
English (en)
Other versions
WO2005045938A2 (fr
Inventor
Steven T Peake
Philip Rutter
Original Assignee
Koninkl Philips Electronics Nv
Steven T Peake
Philip Rutter
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv, Steven T Peake, Philip Rutter filed Critical Koninkl Philips Electronics Nv
Publication of WO2005045938A2 publication Critical patent/WO2005045938A2/fr
Publication of WO2005045938A3 publication Critical patent/WO2005045938A3/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7825Lateral DMOS transistors, i.e. LDMOS transistors with trench gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/407Recessed field plates, e.g. trench field plates, buried field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7824Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

Ce transistor comporte un substrat semi-conducteur (2) isolant ou semi-isolant, une région de source (8), une région de corps (6), une région de migration (4) et une région de drain (10). Des tranchées à plaques de champ isolées (20) contenant des plaques de champ (24) s'étendent longitudinalement et de chaque côté de la région de migration (4). Dans certains modes de réalisation, les tranchées (20) et les régions de migration (4) alternent latéralement. Les plaques de champ (24) sont reliées à la source uniquement.
PCT/IB2004/052346 2003-11-11 2004-11-09 Transistor a effet de champ a grille isolee WO2005045938A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0326237A GB0326237D0 (en) 2003-11-11 2003-11-11 Insulated gate field effect transistor
GB0326237.5 2003-11-11

Publications (2)

Publication Number Publication Date
WO2005045938A2 WO2005045938A2 (fr) 2005-05-19
WO2005045938A3 true WO2005045938A3 (fr) 2005-08-25

Family

ID=29726305

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2004/052346 WO2005045938A2 (fr) 2003-11-11 2004-11-09 Transistor a effet de champ a grille isolee

Country Status (2)

Country Link
GB (1) GB0326237D0 (fr)
WO (1) WO2005045938A2 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005041321B4 (de) * 2005-08-31 2012-03-01 Infineon Technologies Ag Grabenstrukturhalbleitereinrichtungen
US9041003B2 (en) * 2011-10-11 2015-05-26 Massachusetts Institute Of Technology Semiconductor devices having a recessed electrode structure
US9449968B2 (en) * 2013-12-27 2016-09-20 Infineon Technologies Austria Ag Method for manufacturing a semiconductor device and a semiconductor device
US9806147B2 (en) * 2014-01-27 2017-10-31 Renesas Electronics Corporation Semiconductor device
DE102015112414A1 (de) 2015-07-29 2017-02-02 Infineon Technologies Ag Verfahren zum herstellen einer halbleiterstruktur und halbleitervorrichtung
DE102015112427B4 (de) 2015-07-29 2017-04-06 Infineon Technologies Ag Halbleitervorrichtung mit einer allmählich zunehmenden Felddielektrikumsschicht und Verfahren zum Herstellen einer Halbleitervorrichtung
CN105810739A (zh) * 2016-03-18 2016-07-27 电子科技大学 一种横向soi功率ldmos
CN109216439B (zh) * 2017-07-03 2020-11-13 无锡华润上华科技有限公司 具有沟槽内渐变厚度的场板结构的半导体器件的制造方法
DE102017130213B4 (de) * 2017-12-15 2021-10-21 Infineon Technologies Ag Planarer feldeffekttransistor
DE102017130223B4 (de) 2017-12-15 2020-06-04 Infineon Technologies Ag Halbleitervorrichtung mit elektrisch parallel geschalteten planaren Feldeffekttransistorzellen und zugehöriger DC-DC-Wandler
DE102018109950B4 (de) * 2018-04-25 2022-09-29 Infineon Technologies Ag Transistorbauelement
CN113690299B (zh) * 2020-05-18 2024-02-09 华润微电子(重庆)有限公司 沟槽栅vdmos器件及其制备方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01140773A (ja) * 1987-11-27 1989-06-01 Hitachi Ltd 絶縁ゲート形トランジスタ
US20030047792A1 (en) * 2001-09-07 2003-03-13 Power Integrations, Inc. High-voltage lateral transistor with a multi-layered extended drain structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01140773A (ja) * 1987-11-27 1989-06-01 Hitachi Ltd 絶縁ゲート形トランジスタ
US20030047792A1 (en) * 2001-09-07 2003-03-13 Power Integrations, Inc. High-voltage lateral transistor with a multi-layered extended drain structure

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 013, no. 396 (E - 815) 4 September 1989 (1989-09-04) *

Also Published As

Publication number Publication date
WO2005045938A2 (fr) 2005-05-19
GB0326237D0 (en) 2003-12-17

Similar Documents

Publication Publication Date Title
WO2005053032A3 (fr) Transistor a effet de champ a grille isolee par tranchee
WO2003100865A3 (fr) Structure de transistor a effet de champ hyperfrequence
EP1524701A3 (fr) Transistor à effet de champ à haute tension
WO2005057615A3 (fr) Transistor a effet de champ a semi-conducteur a oxyde metallique a tranchees et a cellules fermees
WO2001088997A3 (fr) Dispositifs a semi-conducteurs a porte en tranchee
SG155882A1 (en) Semiconductor constructions and transistors, and methods of forming semiconductor constructions and transistors
WO2005086237A3 (fr) Transistor ldmos
EP1085577A3 (fr) Transistor à effet de champ, de puissance, à grille en tranchée, et sa méthode de fabrication
WO2009055173A3 (fr) Transistors à effet de champ en corps flottant, et procédés de formation de transistors à effet de champ en corps flottant
EP2367205A3 (fr) Transistors verticals à effet de champ à jonction et ses procédés de fabrication
ATE515802T1 (de) Lateraler leistungs-mosfet
WO2006072575A3 (fr) Transistor ldmos
WO2005053031A3 (fr) Transistor a effet de champ a grille isolee par tranchee
TW200633125A (en) Semiconductor device and method of semiconductor device
TW200511577A (en) Vertical compound semiconductor field effect transistor structure
TW200631065A (en) Strained transistor with hybrid-strain inducing layer
WO2000030182A3 (fr) Transistors a effet de champ a seuil de fermi et a drain decale
WO2006020064A3 (fr) Transistor a effet de champ metal-oxyde semi-conducteur haute tension hetero-dope (ah2mos) asymetrique
WO2007082266A3 (fr) Transistors semi-conducteurs avec parties supérieures étendues de gâchettes
TW200633220A (en) Lateral double-diffused MOS transistor and manufacturing method therefor
TW200717806A (en) Planar ultra-thin semiconductor-on-insulator channel MOSFET with embedded source/drains
WO2005093841A3 (fr) Transistor a effet de champ de semi-conducteur d'oxyde de metal a tranchee
WO2006065324A3 (fr) Transistors comprenant des regions de types n et p incrustees a cote de la region source et procedes de fabrication de ceux-ci
WO2005045938A3 (fr) Transistor a effet de champ a grille isolee
WO2002078090A3 (fr) Structure de transistor a effet de champ et procede de fabrication

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase