WO2005036741A1 - Noise prevention coil circuit - Google Patents

Noise prevention coil circuit Download PDF

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Publication number
WO2005036741A1
WO2005036741A1 PCT/JP2004/015574 JP2004015574W WO2005036741A1 WO 2005036741 A1 WO2005036741 A1 WO 2005036741A1 JP 2004015574 W JP2004015574 W JP 2004015574W WO 2005036741 A1 WO2005036741 A1 WO 2005036741A1
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WIPO (PCT)
Prior art keywords
coil
circuit
voltage
noise
series
Prior art date
Application number
PCT/JP2004/015574
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French (fr)
Japanese (ja)
Inventor
Hiroo Arikawa
Masaya Maruo
Original Assignee
Soc Corporation
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Application filed by Soc Corporation filed Critical Soc Corporation
Priority to JP2005514692A priority Critical patent/JPWO2005036741A1/en
Publication of WO2005036741A1 publication Critical patent/WO2005036741A1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H5/00One-port networks comprising only passive electrical elements as network components
    • H03H5/02One-port networks comprising only passive electrical elements as network components without voltage- or current-dependent elements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/0107Non-linear filters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/09Filters comprising mutual inductance
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1716Comprising foot-point elements
    • H03H7/1725Element to ground being common to different shunt paths, i.e. Y-structure
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1741Comprising typical LC combinations, irrespective of presence and location of additional resistors
    • H03H7/1783Combined LC in series path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1741Comprising typical LC combinations, irrespective of presence and location of additional resistors
    • H03H7/1766Parallel LC in series path

Definitions

  • the present invention relates to a protection circuit for preventing external noise from flowing into a communication input section of an electronic device such as a communication device.
  • Information communication is performed by passing high-frequency signals through a dedicated communication line or a commercial power supply AC voltage line, but the dedicated communication line may generate induced voltage noise due to lightning, In some cases, induced voltage noise due to lightning and surge voltage noise due to turning on and off electrical equipment with large power may flow.
  • a conventional method for preventing noise in high-frequency circuits is to connect a constant voltage element such as a palister or arrester between the line (H) of the communication input and the ground, and connect a resistor R30 in series with the load. I do.
  • a large noise current flows through the resistor R30, the voltage generated at the resistor R30 increases the voltage applied to the constant-voltage element, allowing the constant-voltage element to function.
  • the resistor R30 By flowing the current to the ground and lowering the high voltage at the communication input, a large amount of noise flowing to the load is slightly reduced by the resistor R30. If a resistor with a large resistance value is connected, noise can be greatly reduced, but at the same time, a normal high-frequency signal is also greatly attenuated, so a large resistance value cannot be set.
  • a coil is connected instead of the resistor R30 in FIG.
  • a coil In order to prevent noise from flowing to the load with a coil, it is necessary to use a coil with a certain amount of inductance, so it can be used in low frequency circuits, but in high frequency circuits, it can be used in coils.
  • the coil cannot be used because the impedance becomes large and the high frequency signal is greatly attenuated. Therefore, high-frequency circuits had the disadvantage that noise could not be sufficiently prevented by merely weakening the noise with a resistor.
  • this drawback is a major obstacle to the safety and reliability of communication devices and communication networks. Specifically, there were problems such as a large lightning surge or other noise that caused many communication devices in the area to break down, and that the communication network was cut off.
  • Another improvement is to connect the constant voltage element of the two-way thyristor 31 between the communication line (F) and the other communication line (N) as shown in the ISDN line lightning surge protection circuit in Fig. 20.
  • the other communication line (N) are connected to coordination impedances 35a and 35b (Japanese Patent Application Laid-Open No. 2002-354646).
  • the coordination impedances 35a and 35b are the resistance, the ferrite core, and the inductance caused by twisting both communication lines (F, N).
  • a three-pole capacitor with a capacitance of several pF is used between both communication lines (F, N) and ground to secure 60 dB or more at 160 kHz for ISDN communication.
  • the arrester starts discharging after a delay of 2 to 6 seconds after the overvoltage is applied, and during the delay, large noise flows to the load.To reduce the large noise, the coordinating impedance 35a And 35b are connected. However, if the impedance of the coordinating impedances 35a and 35b is increased, the noise can be greatly reduced. Since the signal is also attenuated, the impedance cannot be set too high.
  • the two communication lines (F, N) in the circuit of Fig. 20 are connected by a two-way thyristor 31.
  • a bidirectional thyristor with a large short-circuit current is needed to absorb (flow) with the IGBT, but a bidirectional thyristor with a large short-circuit current has a relatively low frequency due to its large capacitance of several 100 pF. Can do, but not high frequency communication.
  • the short-circuit current is small and large noise cannot be absorbed sufficiently.
  • the present invention has been developed to solve the problem that a conventional communication line noise prevention circuit could not prevent abnormal large noise from flowing to a load without attenuating a normal high-frequency signal.
  • a high-frequency signal with normal communication a high-frequency signal can flow with a very small inductance between the constant voltage element in the input section and the load (communication circuit).
  • a very large impedance can be generated to reliably prevent noise from flowing to the load, and the capacitance between both communication lines and the capacitance between both communication lines and ground can be reduced. It is an object of the present invention to provide a noise prevention coil circuit that allows a high-frequency signal to flow by reducing the noise. Disclosure of the invention
  • FIG. 1 is a diagram illustrating a noise prevention coil circuit of the present invention connected between a communication input unit and a load.
  • FIG. 2 is a diagram illustrating a first embodiment of a noise prevention coil circuit.
  • FIG. 3 is a characteristic diagram of the noise prevention coil circuit of FIG.
  • FIG. 4 is a diagram for explaining a second embodiment of the noise prevention coil circuit.
  • FIG. 5 is a diagram for explaining a third embodiment of the noise prevention coil circuit.
  • FIG. 6 is a diagram illustrating a fourth embodiment of the noise prevention coil circuit.
  • FIG. 7 is a diagram for explaining a fifth embodiment of the noise prevention coil circuit.
  • FIG. 8 is a diagram for explaining a sixth embodiment of the noise prevention coil circuit.
  • FIG. 9 is a diagram for explaining a seventh embodiment of the noise prevention coil circuit.
  • FIG. 10 is a diagram for explaining an eighth embodiment of the noise prevention coil circuit.
  • FIG. 11 is a diagram for explaining a ninth embodiment of a noise prevention coil circuit.
  • FIG. 12 is a diagram for explaining a differential mode unit according to the ninth embodiment.
  • FIG. 13 is a characteristic diagram of the noise prevention coil circuit of FIG.
  • FIG. 14 is a voltage-current characteristic diagram when noise is applied to the noise prevention coil circuit of FIG.
  • FIG. 15 is a diagram for explaining another circuit of the noise prevention coil circuit of FIG.
  • FIG. 16 is a diagram for explaining a common mode unit of the ninth embodiment.
  • FIG. 17 is a voltage-current characteristic diagram when noise is applied to the noise prevention coil circuit of FIG.
  • FIG. 18 is a diagram for explaining a tenth embodiment of the noise prevention coil circuit.
  • FIG. 19 is a diagram illustrating a first lightning protection circuit of a conventional example.
  • FIG. 20 is a diagram illustrating a second lightning protection circuit of the conventional example.
  • Fig. 1 shows the connection of the noise prevention coil circuit of the present invention between the communication input section (terminal H) and the communication circuit (terminal S, load side).
  • E, V is the voltage between terminals H and S of the coil circuit, and r is the internal resistance of the load.
  • FIG. 1 illustrates the magnitude of the impedance of the noise prevention coil circuit of the present invention with respect to a normal high-frequency signal.
  • the coil circuit has a very high impedance and can reliably prevent noise from flowing to the load.
  • FIG. 2 shows a first embodiment of a noise prevention coil circuit according to the present invention, which is a coil circuit in which a capacitor C1 is connected in parallel to a coil L1.
  • Terminal H is the input side and terminal S is the load side.
  • the inductance of the coil L1 is large enough to prevent large noise flowing into the input terminal H.
  • V / E 0.1 is obtained when the signal frequency f> about 5 OMHz.
  • VZE ⁇ 0.1 is obtained when the signal frequency f> about 5 MHz.
  • the inductance L 5 mH of the coil L1 is an example, and the value of the inductance of the coil, the capacitance of the capacitor and the frequency of the signal are not limited to the above, but may be adjusted according to the use conditions, the mounting location, etc. adjust.
  • the inductance L1 of the inductance required to prevent the large noise flowing into the input terminal H has the ratio of the signal AC voltage E to the input high-frequency signal IS and the voltage V between the terminals HS equal to VZE.
  • the noise of 100 000 kHz such as thunder noise and spark noise, and the noise of several hundred kHz can easily flow.
  • Capacity C cannot be too large.
  • the upper limit of the size of the capacitance C of the capacitor C1 is preferably such that the ratio of the signal alternating voltage E to the voltage V between the terminals HS is V / E> 0.5 with respect to abnormal noise.
  • Fig. 3 shows how a normal high-frequency signal flows through coil L1 and capacitor C1.
  • a constant current I L1 of the DC component of the high-frequency signal IS flows through the coil L1, and an amplitude current I C1 of the AC component flows as a charge / discharge current through the capacitor C1. Then, the high-frequency signal IS flows from the output terminal S to the load.
  • the capacitance of the capacitor C 1 is small enough to allow the amplitude current of the alternating current of the high-frequency signal to flow.
  • the coil L1 functions as a large inductance and generates a large impedance, so it is necessary to ensure that large noise flows to the load. Can be prevented.
  • the variable method can be a serial method (changing the value of the series) or a parallel method (changing the value of the parallel), and can be manual or automatic.
  • a square-wave high-frequency signal IS can be passed by selecting the capacitance of the capacitor according to the square-wave high-frequency signal IS.
  • FIG. 4 shows a second embodiment of the coil circuit of the present invention, which is a coil circuit in which a coil L5 is connected in series to a parallel circuit of the coil L1 and the capacitor C1 in FIG.
  • Terminal H is the input side and terminal S is the load side.
  • Coils L 1 and L 5 are not magnetically sensitive.
  • the phase can be varied, the phase can be adjusted according to the required progress of the phase, and the impedance of the entire coil circuit can be reduced according to the frequency of the high-frequency signal, or , It can be adjusted to the required value.
  • the coil L1 reliably prevents the large noise from flowing to the load, as in the first embodiment.
  • FIG. 5 shows a coil circuit according to a third embodiment of the present invention, in which a series circuit of a coil L3 and a capacitor C3 is connected in parallel to a coil L2.
  • Terminal H is the input side and terminal S is the load side.
  • the coils L2 and L3 are magnetically coupled starting from the input terminal H side (black circle).
  • the coil L2 has an inductance large enough to prevent a large noise flowing into the input terminal H. Since the coil L2 and the coil L3 have the same winding start and are magnetically coupled, the alternating current of the current IL2 flowing through the coil L2 allows the high-frequency signal IS to flow to the load and to charge the capacitor C3. In accordance with the discharge, the coil L 3 and the capacitor C 3 flow as current IC 3 and circulate.Therefore, by selecting the capacity of the capacitor according to the combination of the high-frequency signal IS and the inductance of the coils L 2 and L 3, the input terminal The inductance between H and the output terminal S becomes equivalently small, and the high-frequency signal IS can flow.
  • the capacitance of the capacitor C3 is small enough to flow the high-frequency signal current by the combination of the coils L2 and L3.
  • the coil L2 functions as a large inductance, and a large impedance is generated when a sudden current change due to a large noise occurs. Can be reliably prevented.
  • the coil L 3 also serves to suppress the inrush current from flowing through the capacitor C 3 in the event of an abnormality.
  • the coil L2 prevents noise, a large reverse voltage is generated in the coil L2.However, the inductance of the coils L2 and L3 is also large in the coil L3 magnetically coupled to the coil L2. Therefore, only the voltage of the difference between the voltage of the coil L2 and the voltage of the coil L3 is applied to the capacitor C3. Therefore, the coil L3 can prevent a large voltage from being applied to the capacitor C3.
  • FIG. 6 shows a fourth embodiment of the coil circuit of the present invention.
  • the coil circuit of the third embodiment has a coil L2 and a series circuit of a coil L3 and a capacitor C3 connected in parallel. And a coil circuit in which a coil L5 is connected in series.
  • Terminal H is the input side
  • terminal S is the load side.
  • Coils L2 and L3 are magnetically coupled, and coils L2, L3 and L5 are not magnetically coupled.
  • this coil circuit is connected to coil L2 by selecting the inductance of coil L5 in accordance with the equivalent inductance in the coil circuit of coils L2 and L3 and capacitor C2.
  • the voltage in the circuit of L3 and capacitor C3 and the voltage in coil L5 are in opposite phases, and these voltages are almost equal, equivalently, the whole coil circuit is short-circuited. This allows the coil circuit to flow to the load without attenuating the high-frequency signal IS and without shifting the phase.
  • the phase can be varied, the phase can be adjusted according to the required progress of the phase, and the impedance of the entire coil circuit can be reduced according to the frequency of the high-frequency signal. Alternatively, it can be adjusted to the required value.
  • the coil L2 reliably prevents large noise from flowing into the load.
  • FIG. 7 shows a fifth embodiment of the coil circuit of the present invention.
  • the coil of the third embodiment in which a series circuit of a coil L3 and a capacitor C3 is connected in parallel to a coil L2.
  • This is a coil circuit in which two Zener diodes D2 and D3 are connected in series in the reverse direction between the joint of the circuit coil L3 and capacitor C3 and ground.
  • Terminal H is the input side
  • terminal S is the load side.
  • the coils L2 and L3 are magnetically coupled starting from the input terminal H side.
  • the combination of the coils L2 and L3 and the capacitor C2 is the same as in the third embodiment, and the description of the same function is omitted.
  • the coil L2 When a large noise flows into the input terminal H, the coil L2 functions as a large inductance to prevent the noise from flowing to the load, but at that time, the voltage at the connection point between the coil L3 and the capacitor C2 is reduced. Ascending, the diode diodes D 2 and D 3 conduct, and current flows from the coil L 3 to the ground. The current flowing to the ground does not flow through the capacitor C3, and therefore flows through the coil L3 from the beginning to the end of the coil. As a result, a voltage is generated in the coil L2 that causes a current to flow from the end of the winding toward the beginning of the winding, and the coil L2 more strongly prevents noise from flowing to the load.
  • FIG. 8 shows a sixth embodiment of the coil circuit of the present invention, in which coil L2 and coil L3 are connected in parallel between terminal H and terminal S, and coil L is connected between terminal H and ground.
  • This is a coil circuit in which two zener diodes D 2 and D 3 connected in series in the opposite direction to 4 are connected in series.
  • Terminal H is the input side
  • terminal S is the load side.
  • the coils L2, L3, and L4 are magnetically coupled starting from the input terminal H side.
  • the magnitude of the inductance of each of the coils L2, L3 and L4 is determined so that the normal high-frequency signal IS flows accurately, and a large impedance is generated for noise, thus preventing noise. Decide.
  • FIG. 9 shows a seventh embodiment of the coil circuit of the present invention, in which a coil L2 is connected between a terminal H and a terminal S, and a coil L3 and a capacitor C are connected between the terminal H and the ground.
  • This is a coil circuit in which two Zener diodes D 2 and D 3 connected in series in the opposite direction to the parallel circuit 4 are connected in series.
  • Terminal H is the input side
  • terminal S is the load side.
  • the coils L2 and L3 start winding around the input terminal H side, and the coils L2 and L3 are magnetically coupled.
  • the magnitude of the inductance of each of the coils L2 and L3 is determined so that the normal high-frequency signal I S flows accurately, and a large impedance is generated for noise to prevent noise.
  • a normal sine waveform or square wave high-frequency signal IS is input to the input terminal H and a reverse voltage is generated in the coil L2 due to the flow of the normal high-frequency signal IS, a voltage of the same magnitude is also applied to the coil L3.
  • the voltage generated in the coil L3 causes a current circulating in the coil L3 and the capacitor C4 to flow, so that the voltage in the coil L3 decreases. Therefore, the equivalent inductance of the coil L2 becomes very small, and the high-frequency signal IS flows from the input terminal H to the load.
  • FIG. 10 shows an eighth embodiment of the coil circuit according to the present invention, in which a terminal H is used as an input terminal, a terminal S is used as a load-side terminal, and an enhancement-type first terminal is provided between terminals H and S.
  • MOS MOS
  • M2 MOS FET
  • the beginning of winding of coil L3 is connected to the end of winding of coil L2, and two zener diodes D2 and D3 connected in series in reverse direction between the end of winding of coil L3 and ground are connected in series. Connect to. Connect capacitor C 4 in parallel with coil L 3.
  • the coil L2 and the coil L3 have the same winding direction and are magnetically coupled. 2 MO S
  • (Ml, M2) is the P-type of enhancement. Connect the resistor R2 and the resistor R3 in series between the input terminal H and the ground, and connect the MOST (Ml) and MOS (M2) guts to the connection point of the resistor R2 and the resistor R3. . Under normal conditions, select resistors R2 and R3 so that MOS (M1, M2) is conducting and high-frequency signals flow. The resistance values of resistors R2 and R3 are large.
  • the coil L2 Since the coil L2 is magnetically coupled with the coil L3 connected in parallel with the capacitor C4, the coil L2 is equivalent to a coil having a very small inductance, and a normal high-frequency signal IS flows to the load. be able to.
  • the noise causes the voltage at the input terminal to rise, and when the Zener diodes D 2 and D 3 conduct, the current does not flow through the capacitor C 4 but flows through the coil L 3.
  • a large reverse voltage is generated in coil L3, and a reverse voltage is generated in coil L2, which is magnetically coupled to coil L3. Is prevented.
  • MOS (M2) Since the gate of MOS (M2) is connected to the input terminal H and the resistor R2, when a large voltage is generated in the coil L2, the voltage of the gate of MOS (M2) rises, Since M2) is in a non-conductive state, MOS (M2) can completely cut off noise while large noise is applied to the input terminal H.
  • the MOS (M2) can be turned off.
  • MOS (Ml) Since the gate of MO S (Ml) is connected to the ground by the resistor R3, when a large voltage in the opposite direction is generated in the coil L2, the voltage of the gate of MO S (Ml) rises, Since (M l) is in a non-conductive state, MOS (Ml) can completely block the noise while a large negative noise is applied to the input terminal H.
  • the MOS (Ml) can be turned off. Further, it can also be constituted by an N-type MOS FET.
  • FIG. 11 shows a ninth embodiment of the coil circuit according to the present invention.
  • the load connected to the communication line (F) and the communication line (N) is connected to the differential mode noise and the common mode noise. This is a noise prevention coil circuit to protect from non-mode noise.
  • One end of the coil L13 is connected to the communication line (F), the palister 1 is connected between the other end of the coil L13 and the communication line (N), and a resistor R11 is connected in parallel with the coil L13.
  • a two-pole arrester 5 and a varistor 7 are connected in series between both communication lines (F, N), and both electrodes of a three-pole arrestor 6 are connected to both communication lines (F, N).
  • connection point of the coil L12 and the coil L15 connect the paristers 2 and 3 in series, and connect the coil L16 between the connection point of the noriser 2 and the pariser 3 and the ground.
  • the winding direction (start of winding) of each coil is indicated by a black circle.
  • the palisters 7 and 8 are connected to stop the continuation of the arresters 5 and 6 when the noise application is finished.
  • the coil circuit for differential mode noise of the circuit of the embodiment of FIG. U will be described separately in FIG. 12, and the coil circuit for common mode noise will be separately described in FIG.
  • the circuit shown in Fig. 12 is composed of coils Lll, L12, L13, resistor R11, Pallisters 1, 7 and 2-pole arrester 5.
  • the coils L11, L12, L13 are magnetically coupled to each other.
  • the signal of ISND communication be current IS.
  • the current IS is a current obtained by overlapping a DC current with an AC current of a signal.
  • ISND communication current IS force S when the current flows from the input of the communication line (F) through the coil L11 to the load, coil L12, and the input of the communication line (N), the DC current resistance of the coils Lll and L12 is The voltage drop due to the DC current of the current IS is so small that it can be ignored. Due to the inductance of the coils L11 and L12 and the alternating current of the signal, voltage fluctuation of the signal cycle occurs in each of the coils Lll and L12, but the same applies to the coil L13 magnetically coupled to the coils Lll and L12. Voltage fluctuations of the same period occur.
  • the resistor R11 Since the resistor R11 is connected in parallel with the coil L13, the voltage fluctuation generated in the coil L13 causes the coil L13 and the resistor R11 to generate an alternating current having a magnitude close to the alternating current of the signal of the current IS. It circulates and flows.
  • the magnitude of the inductance of the coils Lll and L12 is the same.
  • the inductance of the coil L13 is one example, but is twice or more the sum of the inductances of the coils L11 and L12. Of course, the inductance ratio of coils Lll, L12 and L13 can be adjusted according to the protection characteristics of the circuit.
  • FIG. 13 shows the current I S, the current I L13 of the coil L13, and the current I R11 of the resistor R11.
  • the coils L11 and L12 and the coil L13 are magnetically coupled, so that the current I in the coil L13 has the same magnitude as the AC L13 flows and circulates through resistor R11 as current I R11.
  • the resistance of the resistor R11 is reduced, the magnitude of the voltage fluctuation generated in the resistor R11 by the current IR11 can be reduced.
  • the voltage fluctuation in the coils L11 and L12 also decreases.
  • the magnitude of the inductance of the coils L11 and L12 is determined by the magnitude of the noise to be protected, and the magnitude of the resistor R11 is selected by the magnitude of the alternating current of the signal of the current IS.
  • the voltage drop in the coils L11 and L12 can be reduced.
  • Fig. 14 shows the characteristics of the voltage-current characteristics of each part.
  • coils L11 and L12 have large Reverse voltages VL11 and VL12 are generated.
  • a voltage VL13 of the same magnitude as the sum of the reverse voltages of coils L11 and L12 is generated in coil L13.
  • the Norlister 1 conducts, and the current I L13 of the coil L13 and the current I R11 of the resistor R11 flow, so that the voltage VL13 is applied to the coil L13. Since it occurs continuously, the reverse voltage of coils Lll and L12 also occurs continuously. Then, the arrester 5 does not conduct after the application of the continuous reverse voltage 1S noise of the coils Lll and L12. In order to prevent unwanted voltages from being applied to the load, the load should only be subjected to a pariser voltage. Two to six microseconds after noise application, the two-pole arrester 5 conducts, causing a large current IA5 to flow.
  • the current flowing through the varistor 1 is the current I L13 of the coil L13 and the current I R11 of the resistor R11.
  • the current I L13 is limited by the inductance of the coil L13, and the current I R11 is Since it is limited by the resistance of 11, the current of the two-pole arrestor 5 is 1 / several tens of the current I A5, so the varistor 1 can use a varistor with small surge current capacity and small capacitance. .
  • the arrester starts discharging 2 to 6 ⁇ s after the overvoltage is applied, but some arresters start discharging 10 ⁇ s or more later. Even if the discharge of the arrester 5 is delayed by 10 ⁇ sec or more, a voltage higher than the varistor voltage is applied to the varistor 1 until the arrester 5 discharges, the current IL 13 continues to flow through the coil L 13, and Since the reverse voltage occurs continuously, only the varistor voltage is applied to the load.
  • the coil L12 of the communication line (N) can be removed.
  • the circuit is the same as that of the circuit in FIG. 12, so that a large noise can be prevented without applying a voltage higher than the parister voltage to the load.
  • the magnitude of the inductance of the coil L13 is, as one example, that of the coil L11. It is the same size or close to it.
  • the ratio of the inductance of the coils L11 and L13 can be adjusted according to the protection characteristics of the circuit.
  • the circuit in FIG. 16 for common mode noise consists of coils L14, L15, L16, paristers 2, 3, 8 and a three-pole arrester 6.
  • the coils L14, L15, L16 are magnetically coupled to each other. Since the coils L14 and L15 are for the common mode, the voltage drop (fluctuation) in the coils L14 and L15 due to the alternating current of the signal current IS of the ISND communication is very small and negligible. Therefore, a case where a large common 'mode noise is applied between both communication lines (F, N) and ground will be described.
  • the characteristics of the voltage-current characteristics of each part are shown in FIG.
  • the continuous reverse voltage of the coils L14 and L15 is applied between the load and the ground to prevent a large voltage from being applied to the load for 2 to 6 / xsec during which the 3-pole arrester 6 does not conduct after the application of noise. Applies only the parister voltage. Two to six microseconds after noise is applied, the three-pole arrester 6 conducts, a large current IA6 flows, and the voltage VFN-G between both communication lines (F, N) and the ground drops to the parister voltage. Reverse voltage VL14, VL15 of coil L14, L15 and voltage VL16 of coil L16 become 0V.
  • the current I L16 of the coil L16 is almost constant until the noise applied voltage drops to the parister voltage. Flows and then decreases.
  • the current IA6 of the three-pole arrester 6 flows until the applied voltage of the noise decreases to the varistor voltage, and when the applied voltage of the noise decreases to the varistor voltage, the varistor 8 becomes nonconductive and stops.
  • the magnitude of the inductance of the coil L16 is, for example, the same as or close to that of the coils L14 and L15. of course, The ratio of inductors and chairs in coils L14, L15 and L13 can be adjusted according to the protection characteristics of the circuit.
  • the current flowing through the paristers 2 and 3 is the current I L16 of the coil L16, but since the current I L16 is limited by the inductance of the coil L16, the 1 Z number of the current IA 6 of the three-pole arrester 6 Since the current is as small as 10, the varistors 2 and 3 can use varistors with small surge current resistance and small capacitance.
  • coil L17 is connected between the input of communication line (F) and the load
  • coil L19 is connected between the input of communication line (N) and the load
  • a varistor 9, a coil L18, a coil L20, and a varistor 10 are connected in series between both communication lines (F, N) between the input section and the coils L17, L19.
  • a resistor R12 is connected in parallel with 20, and a pariser 11 is connected between the connection point of coil L18 and coil L20 and the ground.
  • a two-pole arrester 5 and a palister 7 are connected in series between both communication lines (F, N), and both electrodes of a three-pole arrester 6 are connected to both communication lines (F, N). Connect a resistor 8 between the electrode and ground.
  • the coils L17 and L18 are magnetically coupled to each other, and the coils L19 and L20 are magnetically coupled to each other.
  • the winding direction of each coil is indicated by a black circle. Paristers 7 and 8 are connected to stop the continuation of arresters 5 and 6 when the noise application ends.
  • a voltage fluctuation of the same period and the same magnitude also occurs in the coil L20 magnetically coupled to the coil L20. Since the resistor R12 is connected in parallel with the coil L18 and coil L20 connected in series, Due to the voltage fluctuations generated at 18 and L20, an alternating current of a magnitude close to the alternating current of the current IS signal flows through the coils L18 and L20 and the resistor R12.
  • the magnitudes of the inductances of the coils L17 and L19 are the same.
  • the inductance of the coils L18 and L20 is one example, but is equal to or close to the magnitude of the inductance of the coils L17 and L19.
  • the ratio of the inductance of the coils L17, L19 and L18, L20 can be adjusted according to the protection characteristics of the circuit.
  • the noristers 9 and 10 conduct, and current flows through the coils L18 and L20 and the resistor R12, so that the voltage continues to the coils L18 and L20. Therefore, the reverse voltage of the coils L17 and L19 also continuously occurs.
  • the load In order to prevent the continuous reverse voltage of coils L17 and L20 from applying a large voltage to the load during 2 to 6 ⁇ 3 ⁇ when the arrester 5 does not conduct after noise is applied, the load must be Only voltage is applied.
  • the two-pole arrester 5 conducts, causing a large current IA5 to flow, and when the voltage VF-N between the two communication lines (F, N) drops to the parister voltage, the coil The reverse voltage of L17 and L19 and the voltage of coils L18 and L20 become OV. Even if the voltage VF-N between the two communication lines (F, N) drops to the varistor voltage, the current in the coils L18 and L20 flows almost constant until the noise applied voltage drops to the palister voltage. , Decrease. The current of the resistor R12 stops when the voltage VF-N between both communication lines (F, N) falls to the varistor voltage.
  • the current IA5 of the two-pole arrester 5 flows until the applied voltage of the noise drops to the varistor voltage, and when the applied voltage of the noise drops to the varistor voltage, the varistor 7 becomes nonconductive and stops.
  • This section describes the case where large common-mode noise is applied between both communication lines (F, N) and ground. Now, assuming that a rise time l wse a fall time of several seconds and a noise with a peak value of 1000 V are applied, a large reverse voltage is generated in the coils L17 and L19 in response to a sudden current change.
  • a voltage of the same magnitude and the same direction as the reverse voltage of the coil L17 is generated in the coil L18, and a voltage of the same magnitude and the same direction as the reverse voltage of the coil L19 is generated in the coil L20.
  • the varistors 9, 10, and 11 conduct, and pass through the varistor 9 and the coil L18 to the varistor 11, and the varistor 10 and the coil
  • a current flows through the parister 11 through L20 a voltage is continuously generated in the coils L18 and L20, so that a reverse voltage of the coils L17 and L19 is also continuously generated.
  • the continuous reverse voltage of the coils L17 and L19 is applied between the load and the ground to prevent large voltage from being applied to the load for 2 to 6 / sec when the 3-pole arrester 6 does not conduct after the noise is applied. Only applies a parister voltage. After 2 to 6 / zsec of noise application, the three-pole arrester 6 conducts, a large current I A6 flows, and the voltage V FN— G between both communication lines (F, N) and the ground drops to the varistor voltage. The reverse voltage of the coils L17 and L19 and the voltage of the coils L18 and L20 become 0 V.
  • the load is not applied with a voltage higher than the parister voltage, so that the load can be protected from a large noise voltage. Even if a large noise voltage is applied, a voltage higher than the pariser voltage is not applied between the load and the ground, so that the load can be protected from a large noise voltage.
  • the current flowing through the varistors 9, 10, and 11 is the current of the coils L18 and L20, but the inductance of the coils L18 and L20. Is smaller than the current I A5 of the two-pole arrestor 5 and the current IA6 of the three-pole arrestor 6 by 1 / several tens. A parister having a small capacitance can be used.
  • the capacitance between both communication lines and the capacitance between both communication lines and ground can be reduced to 20 pF, 1 O pF, or less. It can be used for ISDN communication, ADSL communication, and higher speed communication. It is self-evident that the nolister can be replaced by an avalanche diode or a thyristor (PNPN element) if necessary.
  • PNPN element thyristor
  • the noise prevention circuit of the present invention can transmit a normal high-frequency signal and can reliably prevent a large noise. It can be used for equipment.
  • this noise prevention coil circuit can protect (cut off) lightning surge and harmonic noise in AC and DC power supply lines of commercial power supply, and can be used to protect a wide range of power equipment.

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Abstract

There is provided a noise prevention circuit to be connected between a communication input unit and a communication circuit. When the AC voltage of the high-frequency signal is E, the voltage between coil circuit terminals HS is V, the inner resistance of the load is r in the communication circuit, the ratio of the AC voltage E of the signal against the inter-terminal HS voltage for the input high-frequency signal is V/E <= 0.1, the impedance is small, and the high-frequency signal can flow to the load. The impedance is significantly increased for an abnormally intense noise, thereby preventing flow of the noise into the load.

Description

明 細 書 ノィズ防止コイル回路 技術分野  Description Noise prevention coil circuit Technical field
本発明は、 通信機器等の電子機器の通信入力部における外部からのノイズ の流入を防止する保護回路に関する。 背景技術  The present invention relates to a protection circuit for preventing external noise from flowing into a communication input section of an electronic device such as a communication device. Background art
情報通信は、.専用の通信線、 あるいは、 商用電源の交流電圧線に高周波信 号を流して行うが、 専用の通信線には、 雷による誘導電圧ノイズが発生した り、 また、 交流電圧線には、 雷による誘導電圧ノイズやパワーの大きな電気 機器のオン、 オフによるサージ電圧ノィズが流れたりする。  Information communication is performed by passing high-frequency signals through a dedicated communication line or a commercial power supply AC voltage line, but the dedicated communication line may generate induced voltage noise due to lightning, In some cases, induced voltage noise due to lightning and surge voltage noise due to turning on and off electrical equipment with large power may flow.
従来の高周波回路のノイズ防止方法は、 第 19 図のように、 通信入力部の 線 (H) とグランド間にパリスタゃアレスタ等の定電圧素子を接続し、 負荷 側に抵抗 R30 を直列に接続する。 大きなノイズの流入に対しては、 大きな ノイズ電流が抵抗 R 30 に流れることで抵抗 R 30 に発生する電圧により、 定 電圧素子にかかる電圧を上昇させ、 定電圧素子を機能させて、 高電圧の電流 をグランドに流し、 通信入力部の高電圧を下げることにより、 大きなノイズ が負荷に流れるのを抵抗 R 30で少し弱めている。大きな抵抗値の抵抗を接続 すると、 ノイズを大きく弱めることができるが、 同時に正常な高周波信号も 大きく減衰するために、 抵抗値を大きく設定することはできない。  As shown in Fig. 19, a conventional method for preventing noise in high-frequency circuits is to connect a constant voltage element such as a palister or arrester between the line (H) of the communication input and the ground, and connect a resistor R30 in series with the load. I do. When a large noise current flows through the resistor R30, the voltage generated at the resistor R30 increases the voltage applied to the constant-voltage element, allowing the constant-voltage element to function. By flowing the current to the ground and lowering the high voltage at the communication input, a large amount of noise flowing to the load is slightly reduced by the resistor R30. If a resistor with a large resistance value is connected, noise can be greatly reduced, but at the same time, a normal high-frequency signal is also greatly attenuated, so a large resistance value cannot be set.
また、 信号の周波数が比較的低い低周波回路においては、 第 19図の抵抗 R30の替わりにコイルを接続している。 ノイズが負荷に流れるのをコイルで 防止するためには、 ある程度の大きさのィンダクタンスのコイルが必要であ るために、 低周波回路においては使用できるが、 高周波回路においては、 コ ィルのイ ンピーダンスが大きくなって高周波信号を大きく減衰させるため に、 コイルを使用できない。 従って、 高周波回路では、 抵抗でノイズを少し 弱めるだけで、 ノイズを十分に防止できないという欠点があった。 高周波信号で行う情報通信において、 この欠点は通信機器や通信ネッ トヮ ークの安全性、 信頼性に関して大きな障害である。 具体的には、 大きい雷サ ージ等のノイズでその地域の多くの通信機器が故障し、 また、 通信ネットヮ ークが寸断するなどの問題があった。 In a low-frequency circuit having a relatively low signal frequency, a coil is connected instead of the resistor R30 in FIG. In order to prevent noise from flowing to the load with a coil, it is necessary to use a coil with a certain amount of inductance, so it can be used in low frequency circuits, but in high frequency circuits, it can be used in coils. The coil cannot be used because the impedance becomes large and the high frequency signal is greatly attenuated. Therefore, high-frequency circuits had the disadvantage that noise could not be sufficiently prevented by merely weakening the noise with a resistor. In information communication using high-frequency signals, this drawback is a major obstacle to the safety and reliability of communication devices and communication networks. Specifically, there were problems such as a large lightning surge or other noise that caused many communication devices in the area to break down, and that the communication network was cut off.
この改善策として、通信の同軸ケーブルに誘導する雷ノイズを吸収するた めに、 同軸ケーブルをトランスの 1次側線とし、 2次側卷線の線条の両端部 間に抵抗を接続した回路 (特開平 7— 3 9 0 7 1 ) がある。 しかしこの回路 は、 同軸ケーブルに適用するものであり、 単線ケーブルに適用できない。 さ らに、 同軸ケーブルに適用した場合であっても、 トランスの 1次側と 2次側 のインダクタンスの大きさが、 正常な高周波信号に対しても、 異常な大きい ノィズに対しても、同じであるため、インダクタンスをあまり大きくすると、 正常な高周波信号を減衰また劣化させることになり、インダクタンスをあま り大きくできない。 そのために、 このトランスのインダクタンスでは、 異常 な大きいノイズを確実に防止することができない。  As a remedy, a circuit in which the coaxial cable is used as the primary side of the transformer and a resistor is connected between both ends of the secondary winding to absorb lightning noise induced in the coaxial cable for communication ( Japanese Patent Laid-Open No. 7-39071) is known. However, this circuit applies to coaxial cables and cannot be applied to single-wire cables. Furthermore, even when applied to coaxial cables, the magnitude of the inductance on the primary and secondary sides of the transformer is the same for both normal high-frequency signals and abnormally large noise. Therefore, if the inductance is too large, a normal high-frequency signal will be attenuated or deteriorated, and the inductance cannot be increased too much. For this reason, this transformer inductance cannot reliably prevent abnormally large noise.
別の改善策として、 第 20図の ISDN回線の雷サージ保護回路のように、 通 信線 (F ) と他方の通信線 (N ) の間に両方向サイリスタ 31 の定電圧素子 を接続し、 両通信線 (F、 N ) とグランドの間に 3極ガスチューブアレスタ 33 (以下、 3極アレスタ) の定電圧素子を接続し、 それらの定電圧素子より 負荷 (通信機器) 側の通信線 (F ) と他方の通信線 (N ) に協調用インピー ダンス 35a、 35b を接続した回路 (特開 2 0 0 2— 3 5 4 6 6 2 ) がある。 協調用インピーダンス 35a、 35b は、 抵抗、 また、 フェライ トコア、 また、 両通信線 (F、 N ) をねじることによるインダクタンスである。  Another improvement is to connect the constant voltage element of the two-way thyristor 31 between the communication line (F) and the other communication line (N) as shown in the ISDN line lightning surge protection circuit in Fig. 20. Connect the constant voltage elements of the 3-pole gas tube arrester 33 (hereinafter, 3-pole arrester) between the communication lines (F, N) and the ground, and connect the communication lines (F) on the load (communication device) side from those constant voltage elements. ) And the other communication line (N) are connected to coordination impedances 35a and 35b (Japanese Patent Application Laid-Open No. 2002-354646). The coordination impedances 35a and 35b are the resistance, the ferrite core, and the inductance caused by twisting both communication lines (F, N).
第 20 図の回路では、 ISDN通信の 160kHzにおいて 60dB以上を確保する ために、 両通信線 (F、 N ) とグランドの間に、 静電容量が数 pFの 3極ァレ スタを用いている。 アレスタは、 過電圧が印加されてから、 2〜 6 sec遅 れて放電を開始するために、その遅れの間に、大きなノイズが負荷に流れるが、 その大きなノイズを弱めるために、 協調用インピーダンス 35a、 35b を接続 している。 しかし、 協調用インピーダンス 35a、 35b のインピーダンスを大 きくすると、 ノイズを大きく弱めることができるが、 同時に正常な高周波信 号も大きく減衰させるために、インピーダンスをあまり大きく設定すること はできない。 In the circuit shown in Fig. 20, a three-pole capacitor with a capacitance of several pF is used between both communication lines (F, N) and ground to secure 60 dB or more at 160 kHz for ISDN communication. . The arrester starts discharging after a delay of 2 to 6 seconds after the overvoltage is applied, and during the delay, large noise flows to the load.To reduce the large noise, the coordinating impedance 35a And 35b are connected. However, if the impedance of the coordinating impedances 35a and 35b is increased, the noise can be greatly reduced. Since the signal is also attenuated, the impedance cannot be set too high.
また、 第 20図の回路の両通信線 (F、 N ) 間は、 両方向サイリ スタ 31で 接続しているが、 两通信線 (F、 N) 間にかかる大きなノイズを両方向サイ リ スタ 31 だけで吸収する (流す) ためには、 短絡電流が大きい両方向サイ リ スタが必要になるが、 短絡電流が大きい両方向サイリ スタは、 静電容量が 数 lOOpFと大きいために、 周波数が比較的低い通信はできるが、 高周波通信 はできない。 また、 高周波通信をするために、 静電容量の小さい両方向サイ リスタを使用すると、 短絡電流が小さく、 大きなノイズを十分に吸収するこ とができないという問題がある。  In addition, the two communication lines (F, N) in the circuit of Fig. 20 are connected by a two-way thyristor 31. A bidirectional thyristor with a large short-circuit current is needed to absorb (flow) with the IGBT, but a bidirectional thyristor with a large short-circuit current has a relatively low frequency due to its large capacitance of several 100 pF. Can do, but not high frequency communication. In addition, if a two-way thyristor with a small capacitance is used for high-frequency communication, the short-circuit current is small and large noise cannot be absorbed sufficiently.
従って、 本発明は、 従来の通信線のノイズ防止回路では、 正常な高周波信 号を減衰させることなく、異常な大きいノイズが負荷に流れるのを防止でき なかった問題点を解決するために、 通信入力部の定電圧素子と負荷 (通信回 路) の間に、 通信の正常な高周波信号に対しては、 非常に小さいインダクタ ンスで高周波信号を流すことができ、雷ノイズやサージ電圧ノイズに対して は、 非常に大きなインピーダンスを発生して、 ノイズが負荷に流れるのを確 実に防止することができ、 さらに、 両通信線間の静電容量と、 両通信線とグ ランド間の静電容量を小さくすることにより高周波信号を流すことができ るノイズ防止コイル回路を提供することを目的としている。 発明の開示  Accordingly, the present invention has been developed to solve the problem that a conventional communication line noise prevention circuit could not prevent abnormal large noise from flowing to a load without attenuating a normal high-frequency signal. For a high-frequency signal with normal communication, a high-frequency signal can flow with a very small inductance between the constant voltage element in the input section and the load (communication circuit). In some cases, a very large impedance can be generated to reliably prevent noise from flowing to the load, and the capacitance between both communication lines and the capacitance between both communication lines and ground can be reduced. It is an object of the present invention to provide a noise prevention coil circuit that allows a high-frequency signal to flow by reducing the noise. Disclosure of the invention
本発明は、 通信入力部と通信回路 (負荷) の間に、 正常な高周波信号に対 しては、 インピーダンスが非常に小さくなり、 また、 異常な大きいノイズに 対しては、ィンピーダンスが非常に大きくなるように構成したコイル回路を 接続して、 正常な高周波信号は減衰させずに負荷に流し、 異常な大きいノィ ズが負荷に流れるのを確実に防止するノィズ防止コイル回路を実現したも のである。 図面の箇単な説明 第 1図は、通信入力部と負荷の間に接続した本発明のノィズ防止コイル回 路を説明する図である。 According to the present invention, the impedance between a communication input section and a communication circuit (load) is extremely small for a normal high-frequency signal, and extremely low for an abnormally large noise. By connecting a coil circuit that is configured to be large, a normal high-frequency signal flows to the load without attenuation, and a noise prevention coil circuit that reliably prevents abnormal large noise from flowing to the load is realized. is there. Brief description of drawings FIG. 1 is a diagram illustrating a noise prevention coil circuit of the present invention connected between a communication input unit and a load.
第 2図は、 ノイズ防止コイル回路の第 1の実施例を説明する図である。 第 3図は、 第 2図のノイズ防止コイル回路の特性図である。  FIG. 2 is a diagram illustrating a first embodiment of a noise prevention coil circuit. FIG. 3 is a characteristic diagram of the noise prevention coil circuit of FIG.
第 4図は、 ノィズ防止コイル回路の第 2の実施例を説明する図である。 第 5図は、 ノィズ防止コイル回路の第 3の実施例を説明する図である。 第 6図は、 ノィズ防止コイル回路の第 4の実施例を説明する図である。 第 7図は、 ノイズ防止コイル回路の第 5の実施例を説明する図である。 第 8図は、 ノイズ防止コイル回路の第 6の実施例を説明する図である。 第 9図は、 ノイズ防止コイル回路の第 7の実施例を説明する図である。 第 10図は、 ノイズ防止コイル回路の第 8の実施例を説明する図である。 第 11図は、 ノイズ防止コイル回路の第 9の実施例を説明する図である。 第 12図は、 第 9の実施例のディファレンシャル · モード部を説明する図 である。  FIG. 4 is a diagram for explaining a second embodiment of the noise prevention coil circuit. FIG. 5 is a diagram for explaining a third embodiment of the noise prevention coil circuit. FIG. 6 is a diagram illustrating a fourth embodiment of the noise prevention coil circuit. FIG. 7 is a diagram for explaining a fifth embodiment of the noise prevention coil circuit. FIG. 8 is a diagram for explaining a sixth embodiment of the noise prevention coil circuit. FIG. 9 is a diagram for explaining a seventh embodiment of the noise prevention coil circuit. FIG. 10 is a diagram for explaining an eighth embodiment of the noise prevention coil circuit. FIG. 11 is a diagram for explaining a ninth embodiment of a noise prevention coil circuit. FIG. 12 is a diagram for explaining a differential mode unit according to the ninth embodiment.
第 13図は、 第 12図のノイズ防止コイル回路の特性図である。  FIG. 13 is a characteristic diagram of the noise prevention coil circuit of FIG.
第 14図は、第 12図のノイズ防止コイル回路にノイズが印加した場合の電 圧電流特性図である。  FIG. 14 is a voltage-current characteristic diagram when noise is applied to the noise prevention coil circuit of FIG.
第 15図は、第 12図のノイズ防止コイル回路の別の回路を説明する図であ る。  FIG. 15 is a diagram for explaining another circuit of the noise prevention coil circuit of FIG.
第 16図は、 第 9の実施例のコモン · モード部を説明する図である。  FIG. 16 is a diagram for explaining a common mode unit of the ninth embodiment.
第 17図は、第 16図のノイズ防止コイル回路にノイズが印加した場合の電 圧電流特性図である。  FIG. 17 is a voltage-current characteristic diagram when noise is applied to the noise prevention coil circuit of FIG.
第 18図は、 ノイズ防止コイル回路の第 10の実施例を説明する図である。 第 19図は、 従来例の第 1の雷防護回路を説明する図である。  FIG. 18 is a diagram for explaining a tenth embodiment of the noise prevention coil circuit. FIG. 19 is a diagram illustrating a first lightning protection circuit of a conventional example.
第 20図は、 従来例の第 2の雷防護回路を説明する図である。 発明を実施するための最良の形態  FIG. 20 is a diagram illustrating a second lightning protection circuit of the conventional example. BEST MODE FOR CARRYING OUT THE INVENTION
図面にもとづき以下、 発明の実施例の詳細を説明する。  Embodiments of the present invention will be described below in detail with reference to the drawings.
第 1図は、 通信入力部 (端子 H ) と通信回路 (端子 S、 負荷側) の間に本 発明のノイズ防止コイル回路を接続したものであり、通信信号の交流電圧を E、コイル回路の端子 Hと端子 S間の電圧を V、負荷の内部抵抗を r とする。 電源に並列に定電圧素子を接続する。 Fig. 1 shows the connection of the noise prevention coil circuit of the present invention between the communication input section (terminal H) and the communication circuit (terminal S, load side). E, V is the voltage between terminals H and S of the coil circuit, and r is the internal resistance of the load. Connect a constant voltage element in parallel with the power supply.
第 1図により、本発明のノイズ防止コイル回路の正常な高周波信号に対す るインピーダンスの大きさを説明する。  FIG. 1 illustrates the magnitude of the impedance of the noise prevention coil circuit of the present invention with respect to a normal high-frequency signal.
高周波信号が流れる時のコイル回路のィンピーダンスの大きさの指標と して、 信号の交流電圧 Eと端子 H S間の電圧 Vの比 (VZE) をとることが できる。 すなわち、 コイル回路の内部抵抗が、 負荷の内部抵抗 rにく らべて 無視できなくなる大きさになると、 大きな電圧が端子 H S間に発生し、 V/ Eは大きくなる。 VZEの値がいく ら以下なら無視できると言う明確な基準 はないが、 一般的には V "Eく = 0. 1の場合、 コイル回路のインピーダン スは許容される大きさの範囲であると言える。 /E > 0. 1の場合は、 コ ィル回路における信号の減衰が大きくなり好ましくない。  As an index of the magnitude of the impedance of the coil circuit when a high-frequency signal flows, the ratio (VZE) of the signal AC voltage E to the voltage V between the terminals HS can be taken. That is, when the internal resistance of the coil circuit becomes so large that it cannot be ignored compared to the internal resistance r of the load, a large voltage is generated between the terminals HS and V / E increases. There is no clear criterion that the value of VZE is negligible below, but in general, when V "E = 0.1, the impedance of the coil circuit is within the allowable range. If / E> 0.1, the signal attenuation in the coil circuit increases, which is not preferable.
本発明のノィズ防止コイル回路は、正常な高周波信号に対してインピーダ ンスが小さく、信号の交流電圧 Eと端子 HS間の電圧 Vの比が VZE< = 0. 1になり、異常な大きいノイズに対してインピーダンスが非常に大きくなり、 ノィズが負荷に流れるのを確実に防止できるコイル回路である。  The noise prevention coil circuit of the present invention has a small impedance with respect to a normal high-frequency signal, and the ratio of the AC voltage E of the signal to the voltage V between the terminals HS becomes VZE <= 0.1, resulting in abnormally large noise. On the other hand, the coil circuit has a very high impedance and can reliably prevent noise from flowing to the load.
第 2図は、 本発明のノイズ防止コイル回路の第 1の実施例であり、 コイル L 1にコンデンサ C 1を並列に接続したコイル回路である。端子 Hを入力側 とし、 端子 Sを負荷側とする。 コイル L 1のインダクタンスは、 入力端子 H に流れ込む大きなノイズを防止するのに必要な大きさである。 今、 第 2図の L C並列回路を第 1図のコイル回路に置き換えて、 コイル L 1のインダクタ ンス L = 5 mH、 負荷内部抵抗 Γ = 2 0 0 Ωとする。 入力高周波信号の周波 数 f とコンデンサ C 1の容量 Cに対する V/Eの大きさを、 表 1に示す。 コ ンデンサ C 1の容量 C = 1 0 0 p Fの場合、 V/Eく = 0. 1になるのは、 信号の周波数 f >約 5 OMH zである。 また、 コンデンサ C 1の容量 C= 1 n Fの場合、 VZE < = 0. 1になるのは、 信号の周波数 f >約 5 MH zで ある。 コイル L 1のインダクタンス L = 5 mHは 1例で、 これに限定するも のではなく、 コイルのィンダクタンスとコンデンサの容量と信号の周波数の 値は、 あくまでも、 使用条件、 取付け場所等に合わせて調整する。 従って、入力端子 Hに流れ込む大きなノイズを防止するのに必要な大きさ のィンダクタンスのコイル L 1に、入力高周波信号 I Sに対して信号の交流 電圧 Eと端子 H S間の電圧 Vの比が V Z E < = 0 . 1になる容量 Cのコンデ ンサ C 1を並列に接続することにより、高周波信号 I Sを大きく減衰させる ことなく負荷に流すことができる。 FIG. 2 shows a first embodiment of a noise prevention coil circuit according to the present invention, which is a coil circuit in which a capacitor C1 is connected in parallel to a coil L1. Terminal H is the input side and terminal S is the load side. The inductance of the coil L1 is large enough to prevent large noise flowing into the input terminal H. Now, replace the LC parallel circuit in Fig. 2 with the coil circuit in Fig. 1, and let the inductance of coil L1 be L = 5 mH and the load internal resistance Γ = 200 Ω. Table 1 shows the magnitude of V / E with respect to the frequency f of the input high-frequency signal and the capacitance C of the capacitor C1. If the capacitance C1 of the capacitor C1 is 100 pF, V / E = 0.1 is obtained when the signal frequency f> about 5 OMHz. When the capacitance C1 of the capacitor C1 is 1 nF, VZE <= 0.1 is obtained when the signal frequency f> about 5 MHz. The inductance L = 5 mH of the coil L1 is an example, and the value of the inductance of the coil, the capacitance of the capacitor and the frequency of the signal are not limited to the above, but may be adjusted according to the use conditions, the mounting location, etc. adjust. Therefore, the inductance L1 of the inductance required to prevent the large noise flowing into the input terminal H has the ratio of the signal AC voltage E to the input high-frequency signal IS and the voltage V between the terminals HS equal to VZE. By connecting the capacitor C1 having a capacitance C satisfying <= 0.1 in parallel, the high-frequency signal IS can be supplied to the load without greatly attenuating.
表 1に示すように、 周波数の低い入力信号に対して、 コンデンサ C 1の容 量 Cを大きくすることにより、信号の交流電圧 Eと端子 H S間の電圧 Vの比 を V / Eく = 0 . 1にすることができるが、 コンデンサ容量 Cが大きくなる と、雷ノィズまたスパークノィズ等の 1 O O k H z力、ら数 1 0 0 k H zのノ ィズも流れ易くなるために、 コンデンサ容量 Cをあまり大きく出来ない。 コ ンデンサ C 1の容量 Cの大きさの上限は、 異常なノィズに対して、 信号の交 流電圧 Eと端子 H S間の電圧 Vの比が V / E > 0 . 5の範囲が好ましい。 第 3図に、正常な高周波信号がコイル L 1とコンデンサ C 1を流れるよう すを示す。 コイル L 1には、 高周波信号 I Sの直流分の一定電流 I L 1が流 れ、 コンデンサ C 1には、 充放電電流として交流分の振幅電流 I C 1が流れ る。 そして、 出力端子 Sから負荷に、 高周波信号 I Sが流れる。  As shown in Table 1, by increasing the capacitance C of the capacitor C1 for a low-frequency input signal, the ratio of the AC voltage E of the signal to the voltage V between the terminals HS becomes V / E = 0. However, if the capacitance C of the capacitor increases, the noise of 100 000 kHz, such as thunder noise and spark noise, and the noise of several hundred kHz can easily flow. Capacity C cannot be too large. The upper limit of the size of the capacitance C of the capacitor C1 is preferably such that the ratio of the signal alternating voltage E to the voltage V between the terminals HS is V / E> 0.5 with respect to abnormal noise. Fig. 3 shows how a normal high-frequency signal flows through coil L1 and capacitor C1. A constant current I L1 of the DC component of the high-frequency signal IS flows through the coil L1, and an amplitude current I C1 of the AC component flows as a charge / discharge current through the capacitor C1. Then, the high-frequency signal IS flows from the output terminal S to the load.
また、 入力端子 Hに大きなノィズが流れ込む場合、 コンデンサ C 1 の容量 は、高周波信号の交流分の振幅電流を流すことができる程度の小さい容量で あるので、 大きなノイズはコイル L 1を流れようとするが、 大きいノイズに よる急激な電流変化 (増大) に対しては、 コイル L 1は大きいインダクタン スとして機能して大きなィンピーダンスが発生するために、大きいノイズが 負荷に流れるのを確実に防止することができる。  When a large noise flows into the input terminal H, the capacitance of the capacitor C 1 is small enough to allow the amplitude current of the alternating current of the high-frequency signal to flow. However, in response to a sudden current change (increase) due to large noise, the coil L1 functions as a large inductance and generates a large impedance, so it is necessary to ensure that large noise flows to the load. Can be prevented.
コイル L 1をインダクタンス可変型にする、 また、 コンデンサ C 1を容量 可変型にすることにより、 使用場所、 使用条件、 異常状況に合わせて、 最適 な状態のノイズ防止コイル回路に調整できる。 可変方法は、 直列方式 (直列 の値の変更) でも、 また、 並列方式 (並列の値の変更) でもよく、 そして、 手動でも自動でも可能である。  By changing the coil L1 to a variable inductance type and the capacitor C1 to a variable capacitance type, it is possible to adjust the noise prevention coil circuit in the optimum state according to the place of use, use conditions, and abnormal conditions. The variable method can be a serial method (changing the value of the series) or a parallel method (changing the value of the parallel), and can be manual or automatic.
同様に、 方形波の高周波信号 I Sに対しても、 コンデンサの容量を方形波 の高周波信号 I Sに合わせて選ぶことにより流すことができる。  Similarly, a square-wave high-frequency signal IS can be passed by selecting the capacitance of the capacitor according to the square-wave high-frequency signal IS.
【表 1】
Figure imgf000009_0001
Figure imgf000009_0002
第 4図は、 本発明のコイル回路の第 2の実施例であり、 第 2図のコイル L 1とコンデンサ C 1の並列回路に、 コイル L 5を直列に接続したコイル回路 である。端子 Hを入力側とし、端子 Sを負荷側とする。コイル L 1と L 5は、 磁気けつごうしていない。
【table 1】
Figure imgf000009_0001
Figure imgf000009_0002
FIG. 4 shows a second embodiment of the coil circuit of the present invention, which is a coil circuit in which a coil L5 is connected in series to a parallel circuit of the coil L1 and the capacitor C1 in FIG. Terminal H is the input side and terminal S is the load side. Coils L 1 and L 5 are not magnetically sensitive.
入力信号 I Sにおいて、 信号の交流電圧 Eと、 コイル L 1とコンデンサ C 1の並列回路の電圧 Vの比が V/E > 0. 1になる場合は、 コイル L 1とコ ンデンサ C 1の並列回路にコイル L 5を直列に接続し、 コンデンサ C 1 とコ ィル L 5を直列共振させることにより、 コイル回路全体のインピーダンスを 小さくすることができる。  In the input signal IS, if the ratio between the signal AC voltage E and the voltage V of the parallel circuit of the coil L1 and the capacitor C1 is V / E> 0.1, the parallel connection of the coil L1 and the capacitor C1 By connecting the coil L5 in series to the circuit and causing the capacitor C1 and the coil L5 to resonate in series, the impedance of the entire coil circuit can be reduced.
1例として、 コィノレ L 1のインダクタンス L = 5 mH、 コンデンサ C 1の 容量 C= I n F, 負荷内部抵抗 r = 200 Ωにおいて、 入力信号の周波数 f = 2MH zの場合、 表 1から VZE- 0. 2である。 今、 コイル L 5のイン ダクタンス L- 6 μ Ηとすると、 コイル L 1 とコンデンサ C 1の並列回路に おける電圧とコイル L 5における電圧とは逆相で、 これらの電圧はほぼ等し くなり、 等価的にはコイル回路全体が短絡された形となり、 V/E- 0. 0 2になる。 これにより、 このコイル回路は、 高周波信号 I Sを減衰させず、 位相をずらさずに負荷に流すことができる。 As an example, if the inductance of the capacitor L 1 is L = 5 mH, the capacitance of the capacitor C 1 is C = I n F, the load internal resistance is r = 200 Ω, and the frequency of the input signal f = 2 MHz, Table 1 shows that VZE- 0.2. Now, assuming that the inductance of coil L5 is L-6 μΗ, the voltage in the parallel circuit of coil L1 and capacitor C1 and the voltage in coil L5 are in opposite phases, and these voltages are almost equal. And equivalently, the entire coil circuit is short-circuited, resulting in V / E-0.02. This allows the coil circuit to flow the load without attenuating the high-frequency signal IS and without shifting the phase.
コイル L 5のインダクタンスを可変にすることにより、 位相を可変でき、 必要な位相の進み具合に、 位相を合わせることができ、 また、 高周波信号の 周波数に合わせてコイル回路全体のインピーダンスを小さく、 あるいは、 必 要な値に調整することができる。  By varying the inductance of the coil L5, the phase can be varied, the phase can be adjusted according to the required progress of the phase, and the impedance of the entire coil circuit can be reduced according to the frequency of the high-frequency signal, or , It can be adjusted to the required value.
入力端子 Hに大きなノイズが流れ込む場合、 第 1の実施例と同様に、 コィ ル L 1が、 大きなノイズが負荷に流れるのを確実に防止する。  When a large noise flows into the input terminal H, the coil L1 reliably prevents the large noise from flowing to the load, as in the first embodiment.
第 5図は、 本発明のコイル回路の第 3の実施例であり、 コイル L 2に、 コ ィル L 3とコンデンサ C 3の直列回路を並列に接続したコイル回路である。 端子 Hを入力側とし、 端子 Sを負荷側とする。 コイル L 2と L 3は、 入力端 子 H側を巻き始め (黒丸) として磁気結合している。  FIG. 5 shows a coil circuit according to a third embodiment of the present invention, in which a series circuit of a coil L3 and a capacitor C3 is connected in parallel to a coil L2. Terminal H is the input side and terminal S is the load side. The coils L2 and L3 are magnetically coupled starting from the input terminal H side (black circle).
コイル L 2は、入力端子 Hに流れ込む大きなノイズを防止するのに必要な 大きさのインダクタンスである。 コイル L 2とコイル L 3は、 巻き始めが同 じで、磁気結合しているため、コイル L 2を流れる電流 I L 2の交流電流は、 高周波信号 I Sを負荷に流すとともに、 コンデンサ C 3の充放電に従って、 コイル L 3とコンデンサ C 3を電流 I C 3として流れ循環するので、 コンデ ンサの容量を高周波信号 I Sとコイル L 2と L 3のィンダクタンスの組み 合わせに合わせて選ぶことにより、入力端子 Hと出力端子 Sの間のィンダク タンスは等価的に小さくなり、 高周波信号 I Sを流すことができる。  The coil L2 has an inductance large enough to prevent a large noise flowing into the input terminal H. Since the coil L2 and the coil L3 have the same winding start and are magnetically coupled, the alternating current of the current IL2 flowing through the coil L2 allows the high-frequency signal IS to flow to the load and to charge the capacitor C3. In accordance with the discharge, the coil L 3 and the capacitor C 3 flow as current IC 3 and circulate.Therefore, by selecting the capacity of the capacitor according to the combination of the high-frequency signal IS and the inductance of the coils L 2 and L 3, the input terminal The inductance between H and the output terminal S becomes equivalently small, and the high-frequency signal IS can flow.
1例として、 コイル L 2、 L 3のインダクタンスを、 L 2 = 5mH、 L 3 = 500 μ Η、 コンデンサ C 3の容量 C= 3 n F、 負荷内部抵抗 r = 200 Ωにおいて、 入力信号の周波数 f = 2 OMH zの場合、 V/E = 0. 03で あ ?。  As an example, if the inductance of coils L2 and L3 is L2 = 5mH, L3 = 500μΗ, capacitance of capacitor C3 C = 3nF, load internal resistance r = 200Ω, frequency of input signal If f = 2 OMHz, V / E = 0.03.
入力端子 Hに大きなノイズが流れ込む場合、 コンデンサ C 3の容量は、 コ ィル L 2と L 3との組み合わせで、高周波信号の電流を流す程度の小さい容 量であるので、 大きなノイズはコイル L 2を流れようとするが、 大きいノィ ズによる急激な電流変化に対しては、 コイル L 2は大きいィンダクタンスと して機能し、 大きなインピーダンスが発生するために、 負荷にノイズが流れ るのを確実に防止することができる。 また、 コイル L 3は、 異常時にコンデ ンサ C 3に突入電流が流れるのを抑えるはたらきもする。 When a large noise flows into the input terminal H, the capacitance of the capacitor C3 is small enough to flow the high-frequency signal current by the combination of the coils L2 and L3. However, the coil L2 functions as a large inductance, and a large impedance is generated when a sudden current change due to a large noise occurs. Can be reliably prevented. Further, the coil L 3 also serves to suppress the inrush current from flowing through the capacitor C 3 in the event of an abnormality.
コイル L 2がノィズを防止した時、 コイル L 2に大きい逆電圧が発生する が、 コイル L 2と磁気結合したコイル L 3にも、 コイル L 2と L 3のそれぞ れのインダクタンスの大きさに関係して電圧が発生するために、 コンデンサ C 3には、 コイル L 2の電圧とコイル L 3の電圧の差の電圧のみがかかる。 従って、 コイル L 3は、 コンデンサ C 3に大きな電圧がかかるのを防ぐこと ができる。  When the coil L2 prevents noise, a large reverse voltage is generated in the coil L2.However, the inductance of the coils L2 and L3 is also large in the coil L3 magnetically coupled to the coil L2. Therefore, only the voltage of the difference between the voltage of the coil L2 and the voltage of the coil L3 is applied to the capacitor C3. Therefore, the coil L3 can prevent a large voltage from being applied to the capacitor C3.
第 6図は、 本発明のコイル回路の第 4の実施例であり、 コイル L 2に、 ィル L 3とコンデンサ C 3の直列回路を並列に接続した第 3の実施例のコ ィル回路に、 コイル L 5を直列に接続したコイル回路である。 端子 Hを入力 側とし、 端子 Sを負荷側とする。 コイル L 2と L 3は、 磁気結合し、 コイル L 2、 L 3と L 5は、 磁気結合していない。  FIG. 6 shows a fourth embodiment of the coil circuit of the present invention. The coil circuit of the third embodiment has a coil L2 and a series circuit of a coil L3 and a capacitor C3 connected in parallel. And a coil circuit in which a coil L5 is connected in series. Terminal H is the input side, and terminal S is the load side. Coils L2 and L3 are magnetically coupled, and coils L2, L3 and L5 are not magnetically coupled.
このコイル回路は、 第 2の実施例と同様に、 コイル L 2と L 3とコンデン サ C 2のコイル回路における等価ィンダクタンスに合わせて、 コイル L 5の インダクタンスを選ぶことにより、 コイル L 2と L 3とコンデンサ C 3の回 路における電圧とコイル L 5における電圧とは逆相で、 これらの電圧はほぼ 等しくなり、等価的にはコイル回路全体が短絡された形となる。これにより、 このコイル回路は、 高周波信号 I Sを減衰させず、 位相をずらさずに負荷に 流すことができる。  As in the second embodiment, this coil circuit is connected to coil L2 by selecting the inductance of coil L5 in accordance with the equivalent inductance in the coil circuit of coils L2 and L3 and capacitor C2. The voltage in the circuit of L3 and capacitor C3 and the voltage in coil L5 are in opposite phases, and these voltages are almost equal, equivalently, the whole coil circuit is short-circuited. This allows the coil circuit to flow to the load without attenuating the high-frequency signal IS and without shifting the phase.
コイル L 5のィンダクタンスを可変にすることにより、 位相を可変でき、 必要な位相の進み具合に、 位相を合わせることができ、 また、 高周波信号の 周波数に合わせてコイル回路全体のインピーダンスを小さく、 あるいは、 必 要な値に調整することができる。  By varying the inductance of the coil L5, the phase can be varied, the phase can be adjusted according to the required progress of the phase, and the impedance of the entire coil circuit can be reduced according to the frequency of the high-frequency signal. Alternatively, it can be adjusted to the required value.
入力端子 Hに大きなノイズが流れ込む場合、 コイル L 2が、 大きなノイズ が負荷に流れるのを確実に防止する。  When large noise flows into the input terminal H, the coil L2 reliably prevents large noise from flowing into the load.
第 7図は、 本発明のコイル回路の第 5の実施例であり、 コイル L 2に、 コ ィル L 3とコンデンサ C 3の直列回路を並列に接続した第 3の実施例のコ ィル回路のコイル L 3とコンデンサ C 3の接合箇所とグランドの間に 2個 のツエナーダイォード D 2、 D 3を逆向き直列に接続したコイル回路である 端子 Hを入力側とし、 端子 Sを負荷側とする。 コイル L 2と L 3は、 入力端 子 H側を巻き始めとして、 磁気結合している。 コイル L 2と L 3とコンデン サ C 2の組み合わせは第 3の実施例と同じであり、 同じ機能の説明は省略す る。 FIG. 7 shows a fifth embodiment of the coil circuit of the present invention. The coil of the third embodiment in which a series circuit of a coil L3 and a capacitor C3 is connected in parallel to a coil L2. This is a coil circuit in which two Zener diodes D2 and D3 are connected in series in the reverse direction between the joint of the circuit coil L3 and capacitor C3 and ground. Terminal H is the input side and terminal S is the load side. The coils L2 and L3 are magnetically coupled starting from the input terminal H side. The combination of the coils L2 and L3 and the capacitor C2 is the same as in the third embodiment, and the description of the same function is omitted.
入力端子 Hに大きなノイズが流れ込む場合、 コイル L 2は大きいィンダク タンスとして機能して、 負荷にノイズが流れるのを防止するが、 その時、 コ ィル L 3とコンデンサ C 2の接続箇所の電圧が上昇してッヱナ一ダイォー ド D 2、 D 3が導通し、 コイル L 3からグランドに電流が流れる。 グランド に流れる電流は、 コンデンサ C 3を流れないために、 コイル L 3をコイルの 巻き始めから卷き終わりに向かって流れる。 それにより、 コイル L 2には卷 き終わりから巻き始めに向かって電流を流そうとする電圧が発生して、 コィ ル L 2はノイズが負荷に流れるのをより強く防止する。  When a large noise flows into the input terminal H, the coil L2 functions as a large inductance to prevent the noise from flowing to the load, but at that time, the voltage at the connection point between the coil L3 and the capacitor C2 is reduced. Ascending, the diode diodes D 2 and D 3 conduct, and current flows from the coil L 3 to the ground. The current flowing to the ground does not flow through the capacitor C3, and therefore flows through the coil L3 from the beginning to the end of the coil. As a result, a voltage is generated in the coil L2 that causes a current to flow from the end of the winding toward the beginning of the winding, and the coil L2 more strongly prevents noise from flowing to the load.
また、 入力端子 Hの電圧が大きくマイナスに下がる負のノイズがかかる場 合は、ツエナーダイォード D 2、D 3が導通して、ッヱナ一ダイォード D 2、 D 3からコイル L 3に電流が流れるために、 コイル L 2には、 巻き始めから 巻き終わりに向かって電流を流そうとする電圧が発生して、 コイル L 2は、 負荷から入力端子 Hに向かって負のノイズが流れるのを防止する。  When negative noise is applied to the input terminal H, which drops to a large negative voltage, zener diodes D2 and D3 conduct, and current flows from the zener diodes D2 and D3 to the coil L3. As a result, coil L2 generates a voltage that causes current to flow from the beginning of winding to the end of winding, and coil L2 prevents negative noise from flowing from the load to input terminal H. I do.
第 8図は、 本発明のコイル回路の第 6の実施例であり、 端子 Hと端子 Sの 間にコイル L 2とコイル L 3を並列接続し、 端子 Hとグランドの間に、 コィ ル L 4と逆向き直列に接続した 2個のッヱナ一ダイォード D 2、 D 3を直列 に接続したコイル回路である。端子 Hを入力側とし、端子 Sを負荷側とする。 コイル L 2と L 3と L 4は、入力端子 H側を巻き始めとして磁気結合してい る。 コイル L 2と L 3と L 4の各コイル単体のィンダクタンスの大きさは、 正常な高周波信号 I Sが正確に流れ、 ノイズに対しては大きなインピーダン スが発生して、 ノイズを防止できるように決める。  FIG. 8 shows a sixth embodiment of the coil circuit of the present invention, in which coil L2 and coil L3 are connected in parallel between terminal H and terminal S, and coil L is connected between terminal H and ground. This is a coil circuit in which two zener diodes D 2 and D 3 connected in series in the opposite direction to 4 are connected in series. Terminal H is the input side and terminal S is the load side. The coils L2, L3, and L4 are magnetically coupled starting from the input terminal H side. The magnitude of the inductance of each of the coils L2, L3 and L4 is determined so that the normal high-frequency signal IS flows accurately, and a large impedance is generated for noise, thus preventing noise. Decide.
1例として、 コイル L 2、 L 3、 L 4のインダクタンスを、 L 2 = 1 50 μ H, L 3 = 1 35 i H, L 4= 140 /zH、 負荷内部抵抗 r = 200 Ωに おいて、 V/E = 0. 0 3 5である。 このコイル回路は、 コイルだけで構 成しているため、 信号の周波数を変えても、 VZEの値は同じである。 入力端子 Hに正常なサイン波形や方形波の高周波信号 I Sが入る場合、 コ ィル L 2には、 コイル L 2からコイル L 3へ循環する電流も流れるために、 コイル L 2の等価ィンダクタンスは非常に小さくなり、入力端子 Hから負荷 に高周波信号 I Sが流れる。 As an example, Oite the inductance of the coil L 2, L 3, L 4 , L 2 = 1 50 μ H, L 3 = 1 35 i H, L 4 = 140 / zH, load the internal resistance r = 200 Omega , V / E = 0. Since this coil circuit is composed of only coils, the value of VZE is the same even if the frequency of the signal is changed. When a normal sine wave or square wave high-frequency signal IS is input to the input terminal H, a current circulating from the coil L2 to the coil L3 flows through the coil L2, so that the equivalent inductance of the coil L2 is obtained. Becomes very small, and the high-frequency signal IS flows from the input terminal H to the load.
入力端子 Hに大きなノイズが流れ込む場合、そのノイズにより入力端子 H の電圧が上昇すると、 ッヱナ一ダイオード D 2、 D 3が導通して、 コイル L 4を通ってグランドへ電流が流れる。 コイル L 4に大きな電流が流れると、 コイル L 4に大きな逆電圧が発生し、 コイル L 4と磁気結合しているコイル L 2と L 3に逆向きの電圧が発生して、 コイル L 2と L 3はノイズが負荷に 流れるのを防止する。  When a large noise flows into the input terminal H and the voltage at the input terminal H rises due to the noise, the zener diodes D2 and D3 conduct, and a current flows to the ground through the coil L4. When a large current flows through the coil L4, a large reverse voltage is generated in the coil L4, and opposite voltages are generated in the coils L2 and L3 which are magnetically coupled to the coil L4. L3 prevents noise from flowing to the load.
入力端子 Hの電圧が大きくマイナスに下がる負のノイズがかかる場合は、 ツエナーダイオード D 2、 D 3が導通して、 ッヱナ一ダイオード D 2、 D 3 からコイル L 4に逆方向の電流が流れるために、 コイル L 2と L 3は負荷か ら入力端子 Hに向かって負のノィズが流れるのを防止する。  When negative voltage is applied, the voltage at the input terminal H drops to a large negative value, the zener diodes D 2 and D 3 conduct, and the current flows in the opposite direction from the zener diodes D 2 and D 3 to the coil L 4. In addition, coils L2 and L3 prevent negative noise from flowing from the load toward input terminal H.
第 9図は、 本発明のコイル回路の第 7の実施例であり、 端子 Hと端子 Sの 間に,コイル L 2を接続し、 端子 Hとグランドの間に、 コイル L 3とコンデン サ C 4の並列回路に逆向き直列に接続した 2個のツエナーダイォード D 2、 D 3を直列に接続したコイル回路である。 端子 Hを入力側とし、 端子 Sを負 荷側とする。 コイル L 2と L 3は入力端子 H側を巻き始めとし、 コイル L 2 と L 3は磁気結合している。 コイル L 2と L 3の各コイル単体のィンダクタ ンスの大きさを正常な高周波信号 I Sが正確に流れ、 ノイズに対しては大き なインピーダンスが発生してノイズを防止できるように決める。  FIG. 9 shows a seventh embodiment of the coil circuit of the present invention, in which a coil L2 is connected between a terminal H and a terminal S, and a coil L3 and a capacitor C are connected between the terminal H and the ground. This is a coil circuit in which two Zener diodes D 2 and D 3 connected in series in the opposite direction to the parallel circuit 4 are connected in series. Terminal H is the input side and terminal S is the load side. The coils L2 and L3 start winding around the input terminal H side, and the coils L2 and L3 are magnetically coupled. The magnitude of the inductance of each of the coils L2 and L3 is determined so that the normal high-frequency signal I S flows accurately, and a large impedance is generated for noise to prevent noise.
入力端子 Hに正常なサイン波形や方形波の高周波信号 I Sが入る場合、正 常な高周波信号 I Sが流れることによりコイル L 2に逆電圧が発生すると、 コイル L 3にも同じ大きさの電圧が発生するが、 第 1の実施例と同様に、 コ ィル L 3に発生した電圧により、 コイル L 3とコンデンサ C 4を循環する電 流が流れることにより、コイル L 3における電圧は小さくなる。そのために、 コイル L 2の等価ィンダクタンスは非常に小さくなり、入力端子 Hから負荷 に高周波信号 I Sが流れる。 入力端子 Hに大きなノイズが流れ込む場合、そのノイズにより入力端子の 電圧が上昇して、 ツエナーダイオード D 2、 D 3が導通すると、 コンデンサ C 4からはグランドへ電流が流れず、 コイル L 3を通ってグランドへ電流が 流れるため、 コイル L 3に大きな逆電圧が発生し、 コイル L 3と磁気結合し ているコイル L 2に逆向きの電圧が発生して、 コイル L 2はノィズが負荷に 流れるのを防止する。 If a normal sine waveform or square wave high-frequency signal IS is input to the input terminal H and a reverse voltage is generated in the coil L2 due to the flow of the normal high-frequency signal IS, a voltage of the same magnitude is also applied to the coil L3. However, as in the first embodiment, the voltage generated in the coil L3 causes a current circulating in the coil L3 and the capacitor C4 to flow, so that the voltage in the coil L3 decreases. Therefore, the equivalent inductance of the coil L2 becomes very small, and the high-frequency signal IS flows from the input terminal H to the load. When large noise flows into the input terminal H, the noise causes the voltage at the input terminal to rise, and when the Zener diodes D 2 and D 3 conduct, no current flows from the capacitor C 4 to ground, but through the coil L 3. Current flows to the ground, a large reverse voltage is generated in coil L3, and a reverse voltage is generated in coil L2, which is magnetically coupled to coil L3, and noise flows through coil L2 to the load To prevent
入力端子 Hの電圧が大きくマイナスに下がる負のノイズがかかる場合は、 ツエナーダイオード D 2、 D 3が導通して、 ツエナーダイオード D 2、 D 3 からコイル L 3に電流が流れるために、 コイル L 2は負荷から入力端子 Hに 向かって負のノィズが流れるのを防止する。  When the voltage at the input terminal H is negative and the voltage at the input terminal H drops significantly, the Zener diodes D 2 and D 3 conduct, and current flows from the Zener diodes D 2 and D 3 to the coil L 3, so that the coil L 2 prevents negative noise from flowing from the load toward the input terminal H.
第 10図は、 本発明のコイル回路の第 8の実施例であり、 端子 Hを入力端 子とし、 端子 Sを負荷側の端子とし、 端子 Hと端子 Sの間にェンハンスメン ト型の第 1の MO S F ET (以下、 MOS (M l) とする) とコイル L 2と 第 2の MO S F E T (以下、 MO S (M 2 ) とする) を接続する。 端子 Hに MO S (Ml ) のドレインを接続し、 MO S (Ml) のソースにコイル L 2 の卷き始めを接続し、 コイル L 2の巻き終わりに MO S (M 2 ) のソースを 接続し、 MO S (M 2) の ドレインを端子 Sに接続する。 コイル L 3の巻き 始めは、 コイル L 2の巻き終わりに接続し、 コイル L 3の巻き終わりとグラ ンドの間に逆向き直列に接続した 2個のツエナーダイォ一ド D 2、 D 3を直 列に接続する。 コイル L 3にコンデンサ C 4を並列に接続する。 コイル L 2 とコイル L 3は、 卷き方向が同じであり、 磁気結合している。 2個の MO S FIG. 10 shows an eighth embodiment of the coil circuit according to the present invention, in which a terminal H is used as an input terminal, a terminal S is used as a load-side terminal, and an enhancement-type first terminal is provided between terminals H and S. (Hereinafter referred to as MOS (Ml)), the coil L2 and the second MOS FET (hereinafter referred to as MOS (M2)). Connect the drain of MO S (Ml) to terminal H, connect the start of coil L 2 to the source of MO S (Ml), and connect the source of MO S (M 2) to the end of coil L 2 Then, connect the drain of MOS (M 2) to terminal S. The beginning of winding of coil L3 is connected to the end of winding of coil L2, and two zener diodes D2 and D3 connected in series in reverse direction between the end of winding of coil L3 and ground are connected in series. Connect to. Connect capacitor C 4 in parallel with coil L 3. The coil L2 and the coil L3 have the same winding direction and are magnetically coupled. 2 MO S
(Ml、 M2) は、 エンハンスメントの P型である。 入力端子 Hとグランド の間に抵抗 R 2と抵抗 R 3を直列に接続し、 MO S (Ml ) と MO S (M 2 ) のグートは、抵抗 R 2と抵抗 R 3の接続箇所に接続する。正常時、 MO S (M 1、 M2) が導通状態になり高周波信号が流れるように抵抗 R 2と R 3を選 ぶ。 抵抗 R 2と R 3の抵抗値は大きい。 (Ml, M2) is the P-type of enhancement. Connect the resistor R2 and the resistor R3 in series between the input terminal H and the ground, and connect the MOST (Ml) and MOS (M2) guts to the connection point of the resistor R2 and the resistor R3. . Under normal conditions, select resistors R2 and R3 so that MOS (M1, M2) is conducting and high-frequency signals flow. The resistance values of resistors R2 and R3 are large.
コイル L 2は、 コンデンサ C 4と並列接続したコイル L 3と磁気結合して いるために、 コイル L 2は非常に小さいィンダクタンスのコイルと等価にな り、 正常な高周波信号 I Sを負荷に流すことができる。 入力端子 Hにプラスの大きなノイズが流れ込む場合、そのノイズにより入 力端子の電圧が上昇して、 ツエナーダイオード D 2、 D 3が導通すると、 電 流はコンデンサ C 4を流れず、 コイル L 3を通ってグランドへ流れるため、 コイル L 3に大きな逆電圧が発生し、 コイル L 3と磁気結合しているコイル L 2に逆向きの電圧が発生して、 コイル L 2はノイズが負荷に流れるのを防 止する。 Since the coil L2 is magnetically coupled with the coil L3 connected in parallel with the capacitor C4, the coil L2 is equivalent to a coil having a very small inductance, and a normal high-frequency signal IS flows to the load. be able to. When a large positive noise flows into the input terminal H, the noise causes the voltage at the input terminal to rise, and when the Zener diodes D 2 and D 3 conduct, the current does not flow through the capacitor C 4 but flows through the coil L 3. As a result, a large reverse voltage is generated in coil L3, and a reverse voltage is generated in coil L2, which is magnetically coupled to coil L3. Is prevented.
そして、 MO S (M2) のゲートは入力端子 Hと抵抗 R 2で接続している ので、 コイル L 2に大きな電圧が発生すると MO S (M 2) のゲー トの電圧 が上がり、 MO S (M2) は不導通状態になるため、 入力端子 Hに大きなノ ィズが印加している間、 MO S (M2) はノイズを完全に遮断することがで ぎる。  Since the gate of MOS (M2) is connected to the input terminal H and the resistor R2, when a large voltage is generated in the coil L2, the voltage of the gate of MOS (M2) rises, Since M2) is in a non-conductive state, MOS (M2) can completely cut off noise while large noise is applied to the input terminal H.
もちろん、 コイル L 2で発生する電圧を検出して、 MO S (M2) のゲー ト電圧を制御することにより MO S (M2) を不導通状態にすることもでき る。  Of course, by detecting the voltage generated in the coil L2 and controlling the gate voltage of the MOS (M2), the MOS (M2) can be turned off.
入力端子 Hにマイナスの大きなノィズが流れ込む場合、そのノィズにより 入力端子の電圧が降下して、 ッヱナ一ダイオード D 2、 D 3が導通すると、 電流はコンデンサ C 4を流れず、 コイル L 3を通ってグランドから入力端子 Hへ流れるため、 コイル L 3に大きな逆電圧が発生し、 コイル L 3と磁気結 合しているコイル L 2に逆向きの電圧が発生して、 コイル L 2はノィズが負 荷から入力端子 Hに流れるのを防止する。  When a large negative noise flows into the input terminal H, the noise causes the voltage of the input terminal to drop, and when the zener diodes D2 and D3 conduct, the current does not flow through the capacitor C4 but flows through the coil L3. Flow from ground to the input terminal H, a large reverse voltage is generated in the coil L3, and a reverse voltage is generated in the coil L2 which is magnetically coupled to the coil L3. Prevents the load from flowing to input terminal H.
そして、 MO S (M l ) のゲートはグランドと抵抗 R 3で接続しているの で、 コイル L 2に逆向きの大きな電圧が発生すると MO S (Ml) のゲート の電圧が上がり、 MO S (M l ) が不導通状態になるために、 入力端子 Hに マイナスの大きなノイズが印加している間、 MO S (Ml) はノイズを完全 に遮断することができる。  Since the gate of MO S (Ml) is connected to the ground by the resistor R3, when a large voltage in the opposite direction is generated in the coil L2, the voltage of the gate of MO S (Ml) rises, Since (M l) is in a non-conductive state, MOS (Ml) can completely block the noise while a large negative noise is applied to the input terminal H.
もちろん、 コイル L 2で発生する電圧を検出して、 MO S (Ml) のゲー ト電圧を制御することにより MO S (M l ) を不導通状態にすることもでき る。 また、 N型の MO S F ETによっても構成することができる。  Of course, by detecting the voltage generated in the coil L2 and controlling the gate voltage of the MOS (Ml), the MOS (Ml) can be turned off. Further, it can also be constituted by an N-type MOS FET.
第 11 図は、 本発明のコイル回路の第 9の実施例であり、 通信線 (F) と 通信線 (N) に接続した負荷を、 ディファレンシャル · モードノイズとコモ ン ·モードノイズから保護するためのノイズ防止コイル回路である。 通信線FIG. 11 shows a ninth embodiment of the coil circuit according to the present invention. The load connected to the communication line (F) and the communication line (N) is connected to the differential mode noise and the common mode noise. This is a noise prevention coil circuit to protect from non-mode noise. Communication line
(F、 N) の入力部と負荷 (通信機器) の間に、 ディファ レンシャル 'モー ドノィズ用のノィズ防止コィノレ回路とコモン'モードノィズ用のノィズ防止 コイル回路を接続する。 通信線 (F) の入力部と負荷の間にコイル L11 とコ ィル L14 を直列に接続し、 通信線 (N) の入力部と負荷の間にコイル L 12 とコイル L15 を直列に接続する。 入力部とコイル Lll、 L12 の間の两通信 線 (F、 N) 間に、 コイル L 13 と抵抗 R 11 とパリスァ 1、 7、 8と 2極ァ レスタ 5と 3極ァレスタ 6を接続する。 コイル L 13の 1端を通信線 (F) に 接続し、 コイル L 13の他端と通信線 (N) の間にパリスタ 1を接続し、 コィ ル L13 と並列に抵抗 R11 を接続する。 両通信線 (F、 N) の間に 2極ァレ スタ 5とバリスタ 7を直列に接続し、 両通信線 (F、 N) に 3極ァレスタ 6 の両端電極を接続し、 3極ァレスタの中間電極とグランドの間にパリスタ 8 を接続する。 通信線 (F) のコイル L11 とコイル L 14の接続箇所と通信線Connect a noise prevention coil circuit for differential 'mode noise' and a noise prevention coil circuit for common 'mode noise' between the (F, N) input section and the load (communication equipment). Connect coil L11 and coil L14 in series between the input of the communication line (F) and the load, and connect coil L12 and coil L15 in series between the input of the communication line (N) and the load. . Connect coil L13, resistor R11, parisers 1, 7, 8 and 2-pole arrester 5 and 3-pole arrestor 6 between the communication lines (F, N) between the input section and coils Lll and L12. One end of the coil L13 is connected to the communication line (F), the palister 1 is connected between the other end of the coil L13 and the communication line (N), and a resistor R11 is connected in parallel with the coil L13. A two-pole arrester 5 and a varistor 7 are connected in series between both communication lines (F, N), and both electrodes of a three-pole arrestor 6 are connected to both communication lines (F, N). Connect a parister 8 between the intermediate electrode and the ground. Communication line (F) connection between coil L11 and coil L14 and communication line
(N) のコイル L 12 とコイル L 15 の接続箇所の間に、 パリスタ 2、 3を直 列に接続し、 ノ リスァ 2とパリスァ 3の接続箇所とグランドの間に、 コイル L16を接続する。 各コイルの巻き方向 (卷き始め) は、 黒丸で示している。 また、 パリスタ 7、 8は、 ノイズの印加が終わった時に、 アレスタ 5、 6の 続流を止めるために接続している。 In the (N), between the connection point of the coil L12 and the coil L15, connect the paristers 2 and 3 in series, and connect the coil L16 between the connection point of the noriser 2 and the pariser 3 and the ground. The winding direction (start of winding) of each coil is indicated by a black circle. Also, the palisters 7 and 8 are connected to stop the continuation of the arresters 5 and 6 when the noise application is finished.
第 U 図の実施例の回路のディファレンシャル ·モードノィズ用のコイル 回路部を第 12図において、 コモン . モードノイズ用のコイル回路部を第 16 図において、 別々に説明する。 第 12図の回路は、 コイル Lll、 L12、 L 13 と抵抗 R 11 とパリスタ 1、 7と 2極アレスタ 5で構成している。コイル L 11、 L 12, L13は、 互いに磁気結合している。 いま、 ISND通信の信号を電流 I Sとする。電流 I Sは、直流電流に、信号の交流電流が重なった電流である。 ISND通信の電流 I S力 S、通信線 (F) の入力部からコイル L11 を通って負 荷、 コイル L12、 通信線 (N) の入力部へ流れる場合、 コイル Lll、 L 12 の直流電流抵抗は、数 10m Ωと非常に小さいために、電流 I Sの直流電流に よる電圧降下は無視できるほど小さい。 コイル L 11、 L12のインダクタンス と信号の交流電流により、 コイル Lll、 L12の各々に信号周期の電圧変動が 発生するが、 コイル Lll、 L12 と磁気結合しているコイル L13 にも、 同じ 周期の同じ大きさの電圧変動が発生する。 コイル L13 には、 抵抗 R11 が並 列に接続しているので、 コイル L 13に発生した電圧変動により、 コイル L 13 と抵抗 R11を、電流 I Sの信号の交流電流に近い大きさの交流電流が循環し て流れる。 コイル Lll、 L12のインダクタンスの大きさは、 同じである。 コ ィル L 13 のインダクタンスは、 1例であるが、 コイル L 11、 L 12 のインダ クタンスの大きさの合計の 2倍か、 それに近い大きさである。 もちろん、 回 路の保護特性に合わせて、 コイル Lll、 L12 と L13 のインダクタンスの割 合は調整することができる。 The coil circuit for differential mode noise of the circuit of the embodiment of FIG. U will be described separately in FIG. 12, and the coil circuit for common mode noise will be separately described in FIG. The circuit shown in Fig. 12 is composed of coils Lll, L12, L13, resistor R11, Pallisters 1, 7 and 2-pole arrester 5. The coils L11, L12, L13 are magnetically coupled to each other. Now, let the signal of ISND communication be current IS. The current IS is a current obtained by overlapping a DC current with an AC current of a signal. ISND communication current IS force S, when the current flows from the input of the communication line (F) through the coil L11 to the load, coil L12, and the input of the communication line (N), the DC current resistance of the coils Lll and L12 is The voltage drop due to the DC current of the current IS is so small that it can be ignored. Due to the inductance of the coils L11 and L12 and the alternating current of the signal, voltage fluctuation of the signal cycle occurs in each of the coils Lll and L12, but the same applies to the coil L13 magnetically coupled to the coils Lll and L12. Voltage fluctuations of the same period occur. Since the resistor R11 is connected in parallel with the coil L13, the voltage fluctuation generated in the coil L13 causes the coil L13 and the resistor R11 to generate an alternating current having a magnitude close to the alternating current of the signal of the current IS. It circulates and flows. The magnitude of the inductance of the coils Lll and L12 is the same. The inductance of the coil L13 is one example, but is twice or more the sum of the inductances of the coils L11 and L12. Of course, the inductance ratio of coils Lll, L12 and L13 can be adjusted according to the protection characteristics of the circuit.
電流 I Sとコイル L13の電流 I L13と抵抗 R 11の電流 I R11を、 第 13図 に示す。 第 12図のように、 コイル L 11、 L 12とコイル L 13は、 磁気結合し ているので、 コイル L13に、 電流 I Sの信号の交流電流と同じ大きさで、 向 きが逆の電流 I L13が流れ、 抵抗 R11に電流 I R11 として循環して流れる。 抵抗 R11 の抵抗の大きさを小さくすると、 電流 IR11 によって、 抵抗 R11 に発生する電圧変動の大きさを小さくすることができる。抵抗 R11における 電圧変動の大きさが小さくなると、 コイル L 11、 L12における電圧変動も小 さくなる。 従って、 保護すべきノイズの大きさにより、 コイル L 11、 L 12 のインダクタンスの大きさを決定し、電流 I Sの信号の交流電流の大きさに より、 抵抗 R11 の抵抗の大きさを選ぶことにより、 コイル L 11、 L12 にお ける電圧降下を小さくすることができる。  FIG. 13 shows the current I S, the current I L13 of the coil L13, and the current I R11 of the resistor R11. As shown in Fig. 12, the coils L11 and L12 and the coil L13 are magnetically coupled, so that the current I in the coil L13 has the same magnitude as the AC L13 flows and circulates through resistor R11 as current I R11. When the resistance of the resistor R11 is reduced, the magnitude of the voltage fluctuation generated in the resistor R11 by the current IR11 can be reduced. As the magnitude of the voltage fluctuation in the resistor R11 decreases, the voltage fluctuation in the coils L11 and L12 also decreases. Therefore, the magnitude of the inductance of the coils L11 and L12 is determined by the magnitude of the noise to be protected, and the magnitude of the resistor R11 is selected by the magnitude of the alternating current of the signal of the current IS. The voltage drop in the coils L11 and L12 can be reduced.
次に、 通信線 (F) と通信線 (N) の間に、 大きなノイズが印加された場 合について説明する。 各部の電圧電流特性の特徴は第 14図に示す。 いま、 仮に、 立上り時間 l /xsec、 立下り時間数 10μ secで、 波高値が 1000Vのノ ィズが印加されたとすると、 コイル L 11、 L 12には、 急激な電流変化に対し て、 大きな逆電圧 VL11、 VL12が発生する。 同時に、 コイル L13にも、 コ ィル L11 と L12 の逆電圧の合計と同じ大きさの電圧 VL13 が発生する。 そ の後、 パリスタ 1にパリスタ電圧以上の電圧が加わると、 ノ リスタ 1は導通 して、 コイル L13の電流 I L13 と抵抗 R11の電流 I R11 が流れることによ り、 コイル L13に電圧 VL13が継続して発生するために、 コイル Lll、 L 12 の逆電圧も継続して発生する。 そして、 コイル Lll、 L12の継続する逆電圧 1S ノイズの印加後のアレスタ 5が導通しない 2〜 6 μ sec間、 ノイズの大 きな電圧が負荷に加わるのを防ぐために、 負荷には、 パリスタ電圧しか加わ らない。 ノイズ印加の 2〜 6 μ sec後、 2極アレスタ 5が導通して、 大きな 電流 I A5が流れて、 两通信線間 (F、 N ) の電圧 V F— Nがパリスタ電圧 に下がると、 コイル L l l、 L 12 の逆電圧 VL11、 VL12とコイル L 13の電圧 VL13は、 O Vになる。 コイル L 13の電流 I L13は、 両通信線間 (F、 N ) の電圧 V F— Nがパリスタ電圧に下がっても、 ノイズの印加電圧がバリスタ 電圧に下がるまでの間、 ほぼ一定で流れ、 その後、 減少する。 抵抗 R 11の電 流 I RUは、 両通信線間 (F、 N ) の電圧 V F— Nがバリスタ電圧に下がる と止まる。 2極アレスタ 5の電流 I A5は、 ノイズの印加電圧がパリ スタ電 圧に下がるまでの間流れて、 ノィズの印加電圧がバリスタ電圧に下がると、 バリスタ 7が不導通になり止まる。 Next, the case where a large noise is applied between the communication line (F) and the communication line (N) will be described. Fig. 14 shows the characteristics of the voltage-current characteristics of each part. Now, assuming that a rise time of l / xsec, a fall time of 10 μsec, and a noise with a peak value of 1000 V are applied, coils L11 and L12 have large Reverse voltages VL11 and VL12 are generated. At the same time, a voltage VL13 of the same magnitude as the sum of the reverse voltages of coils L11 and L12 is generated in coil L13. Thereafter, when a voltage equal to or higher than the parister voltage is applied to the parister 1, the Norlister 1 conducts, and the current I L13 of the coil L13 and the current I R11 of the resistor R11 flow, so that the voltage VL13 is applied to the coil L13. Since it occurs continuously, the reverse voltage of coils Lll and L12 also occurs continuously. Then, the arrester 5 does not conduct after the application of the continuous reverse voltage 1S noise of the coils Lll and L12. In order to prevent unwanted voltages from being applied to the load, the load should only be subjected to a pariser voltage. Two to six microseconds after noise application, the two-pole arrester 5 conducts, causing a large current IA5 to flow. 两 When the voltage VF—N between the communication lines (F, N) drops to the palister voltage, the coil L The reverse voltages VL11 and VL12 of ll and L12 and the voltage VL13 of the coil L13 become OV. Even if the voltage VF-N between the two communication lines (F, N) drops to the varistor voltage, the current I L13 of the coil L13 flows almost constant until the noise applied voltage drops to the varistor voltage. , Decrease. The current I RU of the resistor R11 stops when the voltage VF-N between the two communication lines (F, N) drops to the varistor voltage. The current IA5 of the two-pole arrester 5 flows until the applied voltage of the noise decreases to the varistor voltage. When the applied voltage of the noise decreases to the varistor voltage, the varistor 7 becomes nonconductive and stops.
従って、 両通信線間に大きなノイズ電圧が印加しても、 負荷には、 パリス タ電圧以上の電圧は加わらないので、負荷を大きなノィズ電圧から保護する ことができる。 また、 バリスタ 1に流れる電流は、 コイル L 13の電流 I L13 と抵抗 R 11 の電流 I R11 であるが、 電流 I L13は、 コイル L 13 のインダク タンスにより制限され、 電流 I R11は、 抵抗 R 11 の抵抗で制限されるので、 2極ァレスタ 5の電流 I A5の 1 /数 10の小さい電流であるので、 パリスタ 1はサージ電流耐量の小さい、静電容量の小さいバリスタを使用することが できる。  Therefore, even if a large noise voltage is applied between the two communication lines, a voltage higher than the par- sistor voltage is not applied to the load, so that the load can be protected from a large noise voltage. The current flowing through the varistor 1 is the current I L13 of the coil L13 and the current I R11 of the resistor R11.The current I L13 is limited by the inductance of the coil L13, and the current I R11 is Since it is limited by the resistance of 11, the current of the two-pole arrestor 5 is 1 / several tens of the current I A5, so the varistor 1 can use a varistor with small surge current capacity and small capacitance. .
アレスタは、 過電圧印加後 2〜 6 μ sec遅れて放電を開始するとしている が、 アレスタによっては、 10 μ sec以上遅れて放電を開始するものもある。 アレスタ 5の放電が 10 μ sec以上遅れても、アレスタ 5が放電するまでバリ スタ 1にパリスタ電圧以上の電圧が加わり、 コイル L 13 に電流 I L 13 が流 れ続け、 コイル L ll、 L 12の逆電圧は継続して発生するので、 負荷にはバリ スタ電圧しか加わらない。  The arrester starts discharging 2 to 6 µs after the overvoltage is applied, but some arresters start discharging 10 µs or more later. Even if the discharge of the arrester 5 is delayed by 10 μsec or more, a voltage higher than the varistor voltage is applied to the varistor 1 until the arrester 5 discharges, the current IL 13 continues to flow through the coil L 13, and Since the reverse voltage occurs continuously, only the varistor voltage is applied to the load.
第 15図の回路で示すように、 第 12図の回路の 1方の通信線 (N ) がグラ ンドに接続している場合は、通信線(N )のコイル L 12を外すことができる。 そして、 その他は、 第 12 図の回路と同様であるので、 負荷にはパリスタ電 圧以上の電圧は加わらずに、 大きなノイズを防止することができる。 この場 合、 コイル L 13 のインダクタンスの大きさは、 1例として、 コイル L 11 と 同じか、 それに近い大きさである。 もちろん、 回路の保護特性に合わせて、 コイル L 11 と L 13のインダクタンスの割合は調整することができる。 As shown in the circuit of FIG. 15, when one communication line (N) of the circuit of FIG. 12 is connected to the ground, the coil L12 of the communication line (N) can be removed. In other respects, the circuit is the same as that of the circuit in FIG. 12, so that a large noise can be prevented without applying a voltage higher than the parister voltage to the load. In this case, the magnitude of the inductance of the coil L13 is, as one example, that of the coil L11. It is the same size or close to it. Of course, the ratio of the inductance of the coils L11 and L13 can be adjusted according to the protection characteristics of the circuit.
次に、 コモン ' モードノイズ用の第 16図の回路は、 コイル L14、 L15、 L 16とパリスタ 2、 3、 8と 3極アレスタ 6で構成している。 コイル L 14、 L15、 L16 は、 互いに磁気結合している。 コイル L14、 L 15 は、 コモン ' モード用であるので、 ISND通信の信号電流 ISの交流電流によるコイル L14、 L15における電圧降下 (変動) は、 非常に小さく無視できる大きさである。 従って、 両通信線 (F、 N) とグランドの間に、 コモン ' モー ドの大きなノ ィズが印加された場合について説明する。 各部の電圧電流特性の特徴は、 第 7図に示す。 いま、 立上り時間 1 /xsec、 立下り時間数 10 μ secで、 波高値が 1000Vのノイズが印加されたとすると、 コイル L 14、 L15 には、 急激な電 流変化に対して、 大きな逆電圧 VL14、 VL15 が発生する。 同時に、 コイル L16 にも、 コイル L14、 L15 の逆電圧と同じ大きさの電圧 VL16が発生す る。 その後、 パリスタ 2、 3にパリスタ電圧以上の電圧が加わると、 ノ リス タ 2、 3は導通して、 コイル L16の電流 I L16が流れることにより、 コイル L16 に電圧 VL16が継続して発生するために、 コイル L14、 L15の逆電圧 も継続して発生する。 そして、 コイル L14、 L15の継続する逆電圧が、 ノィ ズの印加後の 3極アレスタ 6が導通しない 2〜 6 /xsec間、 大きな電圧が負 荷に加わるのを防ぐために、 負荷とグランド間には、 パリスタ電圧しか加わ らない。 ノイズ印加の 2〜 6 μ sec後、 3極アレスタ 6が導通して、 大きな 電流 IA6が流れて、 両通信線 (F、 N) とグランド間の電圧 VFN - Gがパリ スタ電圧に下がると、 コイル L14、 L15の逆電圧 VL14、 VL15とコイル L 16の電圧 VL16は、 0 Vになる。コイル L 16の電流 I L16は、両通信線(F、 N) とグランド間の電圧 VFN - Gがパリスタ電圧に下がっても、 ノイズの印 加電圧がパリスタ電圧に下がるまでの間、 ほぼ一定で流れ、 その後、 減少す る。 3極アレスタ 6の電流 I A6は、 ノイズの印加電圧がバリスタ電圧に下 がるまでの間流れて、 ノイズの印加電圧がパリスタ電圧に下がると、 バリス タ 8が不導通になり止まる。 コイル L16のインダクタンスの大きさは、 1例 として、 コイル L14、 L15 と同じか、 それに近い大きさである。 もちろん、 回路の保護特性に合わせて、 コイル L14、 L15 と L13 のインダクタ、イスの 割合は調整することができる。 Next, the circuit in FIG. 16 for common mode noise consists of coils L14, L15, L16, paristers 2, 3, 8 and a three-pole arrester 6. The coils L14, L15, L16 are magnetically coupled to each other. Since the coils L14 and L15 are for the common mode, the voltage drop (fluctuation) in the coils L14 and L15 due to the alternating current of the signal current IS of the ISND communication is very small and negligible. Therefore, a case where a large common 'mode noise is applied between both communication lines (F, N) and ground will be described. The characteristics of the voltage-current characteristics of each part are shown in FIG. Assuming that noise with a rise time of 1 / xsec, a fall time of 10 μsec, and a peak value of 1000 V is applied, a large reverse voltage VL14 is applied to the coils L14 and L15 in response to a sudden current change. , And VL15 occur. At the same time, a voltage VL16 of the same magnitude as the reverse voltage of the coils L14 and L15 is generated in the coil L16. After that, when a voltage higher than the parister voltage is applied to the paristers 2 and 3, the nolisters 2 and 3 conduct, and the current I L16 of the coil L16 flows, so that the voltage VL16 is continuously generated in the coil L16. In addition, the reverse voltage of the coils L14 and L15 also continuously occurs. Then, the continuous reverse voltage of the coils L14 and L15 is applied between the load and the ground to prevent a large voltage from being applied to the load for 2 to 6 / xsec during which the 3-pole arrester 6 does not conduct after the application of noise. Applies only the parister voltage. Two to six microseconds after noise is applied, the three-pole arrester 6 conducts, a large current IA6 flows, and the voltage VFN-G between both communication lines (F, N) and the ground drops to the parister voltage. Reverse voltage VL14, VL15 of coil L14, L15 and voltage VL16 of coil L16 become 0V. Even if the voltage VFN-G between the two communication lines (F, N) and the ground drops to the parister voltage, the current I L16 of the coil L16 is almost constant until the noise applied voltage drops to the parister voltage. Flows and then decreases. The current IA6 of the three-pole arrester 6 flows until the applied voltage of the noise decreases to the varistor voltage, and when the applied voltage of the noise decreases to the varistor voltage, the varistor 8 becomes nonconductive and stops. The magnitude of the inductance of the coil L16 is, for example, the same as or close to that of the coils L14 and L15. of course, The ratio of inductors and chairs in coils L14, L15 and L13 can be adjusted according to the protection characteristics of the circuit.
従って、 両通信線とグランド間に大きなノイズ電圧が印加しても、 負荷と グランド間には、 パリスタ電圧以上の電圧は加わらないので、 負荷を大きな ノィズ電圧から保護することができる。 また、 パリスタ 2、 3に流れる電流 は、 コイル L16 の電流 I L16であるが、 電流 I L16は、 コイル L 16 のイン ダクタンスにより制限されるため、 3極アレスタ 6の電流 I A 6の 1 Z数 1 0の小さい電流であるので、 パリスタ 2、 3はサージ電流耐量の小さい、 静 電容量の小さいバリスタを使用することができる。  Therefore, even if a large noise voltage is applied between the two communication lines and the ground, a voltage higher than the parister voltage is not applied between the load and the ground, so that the load can be protected from a large noise voltage. In addition, the current flowing through the paristers 2 and 3 is the current I L16 of the coil L16, but since the current I L16 is limited by the inductance of the coil L16, the 1 Z number of the current IA 6 of the three-pole arrester 6 Since the current is as small as 10, the varistors 2 and 3 can use varistors with small surge current resistance and small capacitance.
第 18図は、 通信線 (F) の入力部と負荷の間にコイル L 17を接続し、 通 信線 (N) の入力部と負荷の間にコイル L 19を接続する。 入力部とコイル L 17、 L19 の間の両通信線 (F、 N) 間に、 バリスタ 9とコイル L 18 とコィ ル L 20とバリスタ 10を直列に接続し、 直列接続のコイル L 18、 L 20に並列 に抵抗 R12を接続し、 コイル L18とコイル L20の接続箇所とグランド間に パリスタ 11 を接続する。 両通信線 (F、 N) の間に 2極アレスタ 5とパリ スタ 7を直列に接続し、 両通信線 (F、 N) に 3極アレスタ 6の両端電極を 接続し、 3極ァレスタの中間電極とグラン ドの間にパリ スタ 8を接続する。 コイル L 17 と L18は互いに磁気結合し、 また、 コイル L19と L20は互いに 磁気結合している。各コイルの卷き方向は、黒丸で示している。パリスタ 7、 8は、 ノイズの印加が終わった時に、 アレスタ 5、 6の続流を止めるために 接続している。  In Fig. 18, coil L17 is connected between the input of communication line (F) and the load, and coil L19 is connected between the input of communication line (N) and the load. A varistor 9, a coil L18, a coil L20, and a varistor 10 are connected in series between both communication lines (F, N) between the input section and the coils L17, L19. A resistor R12 is connected in parallel with 20, and a pariser 11 is connected between the connection point of coil L18 and coil L20 and the ground. A two-pole arrester 5 and a palister 7 are connected in series between both communication lines (F, N), and both electrodes of a three-pole arrester 6 are connected to both communication lines (F, N). Connect a resistor 8 between the electrode and ground. The coils L17 and L18 are magnetically coupled to each other, and the coils L19 and L20 are magnetically coupled to each other. The winding direction of each coil is indicated by a black circle. Paristers 7 and 8 are connected to stop the continuation of arresters 5 and 6 when the noise application ends.
第 18図の回路に ISDN通信の信号電流 I Sが、 通信線 (F) の入力部から コイル L 17を通って負荷、コイル L 19、通信線(N)の入力部へ流れる場合、 図 12の回路と同様に、 コイル L17、 L 19の直流電流抵抗は、 数 10m Ωと非 常に小さいために、電流 I Sの直流電流による電圧降下は無視できるほど小 さレ、。 コイル L 17、 L 19のインダクタンスと信号の交流電流により、 コイル L17、 L19 の各々に信号周期の電圧変動が発生するが、 コイル L17 と磁気 結合しているコイル L18 にも、 また、 コイル L 19 と磁気結合しているコィ ル L20にも、 同じ周期の同じ大きさの電圧変動が発生する。直列接続のコィ ル L 18とコイル L20には、 抵抗 R 12が並列に接続しているので、 コィノレ L 18 と L20に発生した電圧変動により、 コイル L18、 L20と抵抗 R 12を、 電 流 I Sの信号の交流電流に近い大きさの交流電流が循環して流れる。 コイル L17、 L 19 のインダクタンスの大きさは、 同じである。 コイル L18、 L 20 のインダクタンスは、 1例であるが、 コイル L 17、 L 19のインダクタンスの 大きさと同じか、 それに近い大きさである。 もちろん、 回路の保護特性に合 わせて、 コイル L17、 L19 と L18、 L20 のインダクタンスの割合は調整す ることができる。 In the circuit of Fig. 18, when the signal current IS of the ISDN communication flows from the input of the communication line (F) through the coil L17 to the load, coil L19, and the input of the communication line (N), As with the circuit, the DC current resistance of the coils L17 and L19 is very small, several tens of milliohms, so the voltage drop due to the DC current of the current IS is negligibly small. Due to the inductance of the coils L17 and L19 and the alternating current of the signal, a voltage fluctuation of the signal cycle occurs in each of the coils L17 and L19.The coil L18 magnetically coupled to the coil L17 also includes the coil L19. A voltage fluctuation of the same period and the same magnitude also occurs in the coil L20 magnetically coupled to the coil L20. Since the resistor R12 is connected in parallel with the coil L18 and coil L20 connected in series, Due to the voltage fluctuations generated at 18 and L20, an alternating current of a magnitude close to the alternating current of the current IS signal flows through the coils L18 and L20 and the resistor R12. The magnitudes of the inductances of the coils L17 and L19 are the same. The inductance of the coils L18 and L20 is one example, but is equal to or close to the magnitude of the inductance of the coils L17 and L19. Of course, the ratio of the inductance of the coils L17, L19 and L18, L20 can be adjusted according to the protection characteristics of the circuit.
次に、 通信線 (F) と通信線 (N) の間に、 ディファ レンシャル · モード の大きなノイズが印加された場合について説明する。 いま、 仮に、 立上り時 間 l ^sec^ 立下り時間数 ΙΟμ secで、 波高値が 1000Vのノイズが印加され たとすると、 コイル L 17、 L19には、 急激な電流変化に対して、 大きな逆電 圧が発生する。 同時に、 コイル L18 にはコイル L17 の逆電圧と同じ大きさ で同じ向きの電圧が、 コイル L20 にはコイル L 19 の逆電圧と同じ大きさで 同じ向きの電圧が、 発生する。 その後、 バリスタ 9、 10にバリスタ電圧以上 の電圧が加わると、 ノ リスタ 9、 10は導通して、 コイル L 18 と L20と抵抗 R12に電流が流れることにより、 コイル L18 と L20に電圧が継続して発生 するために、 コイル L17、 L19の逆電圧も継続して発生する。 そして、 コィ ル L17、 L20の継続する逆電圧が、 ノイズの印加後のアレスタ 5が導通しな い 2 ~ 6 μ3θθ間、 大きな電圧が負荷に加わる'のを防ぐために、 負荷には、 パリ スタ電圧しか加わらない。 ノイズ印加の 2〜 6 μ sec後、 2極アレスタ 5が導通して、 大きな電流 I A5が'流れて、 両通信線間 (F、 N) の電圧 V F— Nがパリスタ電圧に下がると、コイル L 17、 L 19の逆電圧とコイル L 18、 L20 の電圧は、 O Vになる。 コイル L18、 L20 の電流は、 両通信線間 (F、 N) の電圧 VF— Nがバリスタ電圧に下がっても、 ノイズの印加電圧がパリ スタ電圧に下がるまでの間、 ほぼ一定で流れ、 その後、 減少する。 抵抗 R12 の電流は、 両通信線間 (F、 N) の電圧 VF—Nがバリスタ電圧に下がると 止まる。 2極アレスタ 5の電流 I A5は、 ノイズの印加電圧がパリスタ電圧 に下がるまでの間流れて、 ノイズの印加電圧がバリスタ電圧に下がると、 バ リ スタ 7が不導通になり止まる。 両通信線 (F、 N) とグランドの間に、 コモン ' モー ドの大きなノイズが 印加された場合について説明する。 いま、 立上り時間 l wse 立下り時間 数 10 secで、波高値が 1000Vのノイズが印加されたとすると、 コイル L 17、 L19には、 急激な電流変化に対して、 大きな逆電圧が発生する。 同時に、 コ ィル L18 にはコイル L 17 の逆電圧と同じ大きさで同じ向きの電圧が、 コィ ル L20 にはコイル L 19 の逆電圧と同じ大きさで同じ向きの電圧が、 発生す る。 その後、 パリスタ 9、 10、 11にバリスタ電圧以上の電圧が加わると、 パ リスタ 9、 10、 11 は導通して、 ノ リスタ 9とコイル L18 を通ってバリスタ 11 に、 また、 ノ リスタ 10 とコイル L20を通ってパリスタ 11に電流が流れ ることにより、 コイル L 18 と L 20 に電圧が継続して発生するために、 コィ ル L17、 L 19の逆電圧も継続して発生する。 Next, the case where large noise in the differential mode is applied between the communication line (F) and the communication line (N) will be described. Now, assuming that the rise time l ^ sec ^ the number of fall times is ΙΟμsec and the noise with a peak value of 1000 V is applied, the coils L17 and L19 have a large reverse voltage due to a sudden current change. Pressure develops. At the same time, a voltage having the same magnitude and the same direction as the reverse voltage of the coil L17 is generated in the coil L18, and a voltage having the same magnitude and the same direction as the reverse voltage of the coil L19 is generated in the coil L20. After that, when a voltage higher than the varistor voltage is applied to the varistors 9 and 10, the noristers 9 and 10 conduct, and current flows through the coils L18 and L20 and the resistor R12, so that the voltage continues to the coils L18 and L20. Therefore, the reverse voltage of the coils L17 and L19 also continuously occurs. In order to prevent the continuous reverse voltage of coils L17 and L20 from applying a large voltage to the load during 2 to 6 μ3θθ when the arrester 5 does not conduct after noise is applied, the load must be Only voltage is applied. Two to six microseconds after noise application, the two-pole arrester 5 conducts, causing a large current IA5 to flow, and when the voltage VF-N between the two communication lines (F, N) drops to the parister voltage, the coil The reverse voltage of L17 and L19 and the voltage of coils L18 and L20 become OV. Even if the voltage VF-N between the two communication lines (F, N) drops to the varistor voltage, the current in the coils L18 and L20 flows almost constant until the noise applied voltage drops to the palister voltage. , Decrease. The current of the resistor R12 stops when the voltage VF-N between both communication lines (F, N) falls to the varistor voltage. The current IA5 of the two-pole arrester 5 flows until the applied voltage of the noise drops to the varistor voltage, and when the applied voltage of the noise drops to the varistor voltage, the varistor 7 becomes nonconductive and stops. This section describes the case where large common-mode noise is applied between both communication lines (F, N) and ground. Now, assuming that a rise time l wse a fall time of several seconds and a noise with a peak value of 1000 V are applied, a large reverse voltage is generated in the coils L17 and L19 in response to a sudden current change. At the same time, a voltage of the same magnitude and the same direction as the reverse voltage of the coil L17 is generated in the coil L18, and a voltage of the same magnitude and the same direction as the reverse voltage of the coil L19 is generated in the coil L20. . After that, when a voltage higher than the varistor voltage is applied to the varistors 9, 10, and 11, the varistors 9, 10, and 11 conduct, and pass through the varistor 9 and the coil L18 to the varistor 11, and the varistor 10 and the coil When a current flows through the parister 11 through L20, a voltage is continuously generated in the coils L18 and L20, so that a reverse voltage of the coils L17 and L19 is also continuously generated.
そして、 コイル L17、 L19の継続する逆電圧が、 ノイズの印加後の 3極ァ レスタ 6が導通しない 2〜 6 / sec間、 大きな電圧が負荷に加わるの防ぐた めに、 負荷とグランド間には、 パリ スタ電圧しか加わらない。 ノイズ印加の 2〜6 /zsec後、 3極アレスタ 6が導通して、 大きな電流 I A6が流れて、 両 通信線(F、N)とグランド間の電圧 V FN— Gがバリスタ電圧に下がると、 コイル L17、 L19 の逆電圧とコイル L18、 L20 の電圧は、 0 Vになる。 コ ィル L18、 L20の電流は、 両通信線 (F、 N) とグランド間の電圧 V F N— Gがバリスタ電圧に下がっても、 ノイズの印加電圧がバリスタ電圧に下がる までの間、 ほぼ一定で流れ、 その後、 減少する。 3極アレスタ 6の電流 I A 6は、 ノイズの印加電圧がパリスタ電圧に下がるまでの間流れて、 ノイズの 印加電圧がパリスタ電圧に下がると、 バリスタ 8が不導通になり止まる。 ま た、 ノ リスタ 9、 10、 11のパリ スタ電圧は、 パリスタ 7、 8のバリスタ電圧 の 1 Z 2である。  Then, the continuous reverse voltage of the coils L17 and L19 is applied between the load and the ground to prevent large voltage from being applied to the load for 2 to 6 / sec when the 3-pole arrester 6 does not conduct after the noise is applied. Only applies a parister voltage. After 2 to 6 / zsec of noise application, the three-pole arrester 6 conducts, a large current I A6 flows, and the voltage V FN— G between both communication lines (F, N) and the ground drops to the varistor voltage. The reverse voltage of the coils L17 and L19 and the voltage of the coils L18 and L20 become 0 V. Even if the voltage between both communication lines (F, N) and ground VFN-G drops to the varistor voltage, the current of coils L18 and L20 is almost constant until the noise applied voltage drops to the varistor voltage. Flow, and then decrease. The current IA 6 of the three-pole arrester 6 flows until the applied voltage of the noise decreases to the varistor voltage, and when the applied voltage of the noise decreases to the varistor voltage, the varistor 8 becomes nonconductive and stops. Further, the varistor voltage of the nolisters 9, 10, and 11 is 1Z2 of the varistor voltage of the varistors 7 and 8.
従って、 两通信線間に大きなノイズ電圧が印加しても、 負荷には、 パリス タ電圧以上の電圧は加わらないので、負荷を大きなノィズ電圧から保護する ことができ、 両通信線とグランド間に大きなノイズ電圧が印加しても、 負荷 とグランド間には、 パリスタ電圧以上の電圧は加わらないので、 負荷を大き なノイズ電圧から保護することができる。 また、 バリスタ 9、 10、 11に流れ る電流は、 コイル L18、 L20の電流であるが、 コイル L18、 L20 のインダ クタンスにより制限され、 2極ァレスタ 5の電流 I A5、また、 3極アレスタ 6の 電流 IA6 の 1 /数 10の小さい電流であるので、 パリスタ 9、 10、 11はサー ジ電流耐量の小さい、 静電容量の小さいパリスタを使用することができる。 ディファ レンシャノレ . モード用とコモン . モード用の回路を合わせて、 両 通信線間の静電容量と両通信線とグランド間の静電容量を、 2 0 pF、 1 O p F、 あるいは、 それ以下にすることができるので、 ISDN通信、 ADSL通信、 また、 もっと高速の通信を行うことができる。 ノ リスタを、 必要により、 ァ パランシェ . ダイオー ドやサイリ スタ (PNPN素子) に置換えられることは 自明である。 産業上の利用可能性 Therefore, even if a large noise voltage is applied between the communication lines, the load is not applied with a voltage higher than the parister voltage, so that the load can be protected from a large noise voltage. Even if a large noise voltage is applied, a voltage higher than the pariser voltage is not applied between the load and the ground, so that the load can be protected from a large noise voltage. The current flowing through the varistors 9, 10, and 11 is the current of the coils L18 and L20, but the inductance of the coils L18 and L20. Is smaller than the current I A5 of the two-pole arrestor 5 and the current IA6 of the three-pole arrestor 6 by 1 / several tens. A parister having a small capacitance can be used. By combining the circuits for mode and common mode, the capacitance between both communication lines and the capacitance between both communication lines and ground can be reduced to 20 pF, 1 O pF, or less. It can be used for ISDN communication, ADSL communication, and higher speed communication. It is self-evident that the nolister can be replaced by an avalanche diode or a thyristor (PNPN element) if necessary. Industrial applicability
以上述べたように、 本発明のノイズ防止回路は、 正常な高周波信号は流す ことができ、 大きなノィズは確実に防止することができるために、 情報通信 機器、 及び、 通信インターフェイスを有する広範囲な電子機器等に使用でき る。 また、 このノイズ防止コイル回路は、 商用電源の交流、 直流の電力供給 線における雷サージ、 高調波ノイズを防護 (遮断) できるので、 広範囲の電 力機器等の保護にも使用できる。  As described above, the noise prevention circuit of the present invention can transmit a normal high-frequency signal and can reliably prevent a large noise. It can be used for equipment. In addition, this noise prevention coil circuit can protect (cut off) lightning surge and harmonic noise in AC and DC power supply lines of commercial power supply, and can be used to protect a wide range of power equipment.

Claims

請 求 の 範 囲 The scope of the claims
1. 通信入力部と通信回路の間に接続するコイル回路において、正常な高 周波信号に対しては、 信号の交流電圧 Eと前記コイル回路における電圧 Vの比が、 V/Eく = 0. 1の小さいインピーダンスになり、 異常な大 きいノィズに対しては、 V/E > 0. 5の非常に大きいインピーダンス になるノィズ防止コイル回路。  1.In a coil circuit connected between the communication input section and the communication circuit, for a normal high-frequency signal, the ratio between the signal AC voltage E and the voltage V in the coil circuit is V / E = 0. A noise prevention coil circuit that has a small impedance of 1 and has a very large impedance of V / E> 0.5 for abnormally large noise.
2. コイル(L 1 )にコンデンサ (C 1 ) を並列に接続する請求項 1記載の ノィズ防止コイル回路。  2. The noise prevention coil circuit according to claim 1, wherein a capacitor (C 1) is connected in parallel to the coil (L 1).
3. 可変型のコイル(L 1 )にコンデンサ (C 1 ) を並列に接続する請求項 1記載のノィズ防止コイル回路。  3. The noise prevention coil circuit according to claim 1, wherein a capacitor (C 1) is connected in parallel to the variable coil (L 1).
4. コイル(L 1 )に可変型のコンデンサ (C 1 ) を並列に接続する請求項 1記載のノイズ防止コイル回路。  4. The noise prevention coil circuit according to claim 1, wherein a variable capacitor (C1) is connected in parallel to the coil (L1).
5. 可変型のコイル(L 1 )に可変型のコンデンサ (C 1 ) を並列に接続す る請求項 1記載のノィズ防止コイル回路。  5. The noise prevention coil circuit according to claim 1, wherein a variable capacitor (C1) is connected in parallel to the variable coil (L1).
6. コイル (L 1 ) とコンデンサ (C 1 ) の並列回路に、 前記並列回路の 電圧と逆相でほぼ等しい電圧を発生するコイル (L 5) を直列に接続す る請求項 1記載のノィズ防止コイル回路。  6. The noise according to claim 1, wherein a coil (L5) that generates a voltage substantially equal to the voltage of the parallel circuit in an opposite phase is connected in series to a parallel circuit of the coil (L1) and the capacitor (C1). Prevention coil circuit.
7. コイル (L 1 ) とコンデンサ (C 1 ) の並列回路に、 前記並列回路の 電圧と逆相でほぼ等しい電圧を発生する可変型のコイル (L 5) を直列 に接続する請求項 1記載のノィズ防止コイル回路。  7. The variable coil (L5) for generating a voltage substantially equal to the voltage of the parallel circuit in the opposite phase to the parallel circuit of the coil (L1) and the capacitor (C1) is connected in series to the parallel circuit of the coil (L1) and the capacitor (C1). Noise prevention coil circuit.
8. コイル (L 2) に、 コイル (L 3) とコンデンサ (C 3) の直列回路 を並列に接続し、 前記コイル (L 2、 L 3 ) は巻き始めを同じとして、 磁気結合している請求項 1記載のノィズ防止コイル回路。  8. A series circuit of a coil (L3) and a capacitor (C3) is connected in parallel to the coil (L2), and the coils (L2, L3) are magnetically coupled with the same winding start. The noise prevention coil circuit according to claim 1.
9. コイル (L 2) に、 コイル (L 3) とコンデンサ (C 3) の直列回路 を並列に接続し、 前記コイル (L 2、 L 3) は卷き始めを同じとして、 磁気結合している回路にコイル (L 5) を直列に接続する請求項 1記載 のノィズ防止コイル回路。  9. A series circuit of a coil (L3) and a capacitor (C3) is connected in parallel to the coil (L2), and the coils (L2, L3) are magnetically coupled with the same winding start. The noise prevention coil circuit according to claim 1, wherein a coil (L5) is connected in series to the circuit.
1 0. コイル (L 2) に、 コイル (L 3) とコンデンサ (C 3) の直列回路 を並列に接続し、 前記コイル (L 2、 L 3) は巻き始めを同じとして、 磁気結合している回路の前記コイル (L 3) と前記コンデンサ (C 3) の接続箇所とグランドの間に、 2個のツエナーダイォード (D 2、 D 3) を逆向き直列に接続する請求項 1記載のノイズ防止コイル回路。 10 0. A series circuit of a coil (L 3) and a capacitor (C 3) is connected in parallel to the coil (L 2), and the coils (L 2 and L 3) are magnetically coupled with the same winding start. The coil (L 3) and the capacitor (C 3) 2. The noise prevention coil circuit according to claim 1, wherein two Zener diodes (D2, D3) are connected in series in opposite directions between the connection point of (1) and the ground.
1. 通信入力部と通信回路の間に接続するコイル回路において、入力端子 と通信回路の間にコイル (L 2) とコイル (L 3) を並列に接続し、 入 力端子とグランドの間に、 コイル (L 4) と逆向き直列の 2個のッヱナ 一ダイォード (D 2、 D 3) を直列に接続し、 前記コイル (L 2、 L 3、 L 4) は卷き始めを同じとして、 磁気結合している請求項 1記載のノィ ズ防止コイル回路。  1. In the coil circuit connected between the communication input section and the communication circuit, connect the coil (L2) and the coil (L3) in parallel between the input terminal and the communication circuit, and connect between the input terminal and the ground. A coil (L 4) and two zener diodes (D 2, D 3) connected in series in the opposite direction are connected in series, and the coils (L 2, L 3, L 4) have the same winding start, 2. The noise prevention coil circuit according to claim 1, wherein the coil circuit is magnetically coupled.
2. 通信入力部と通信回路の間に接続するコイル回路において、入力端子 と通信回路の間にコイル(L 2)を接続し、入力端子とグランドの間に、 コイル (L 3) とコンデンサ (C 4) の並列回路と逆向き直列の 2個の ツエナーダイォード (D 2、 D 3) を直列に接続し、前記コイル (L 2" L 3) は巻き始めを同じとして、 磁気結合している請求項 1記載のノィ ズ防止コイル回路。  2. In the coil circuit connected between the communication input section and the communication circuit, connect the coil (L2) between the input terminal and the communication circuit, and connect the coil (L3) and capacitor ( The parallel circuit of C 4) and two Zener diodes (D 2, D 3) connected in reverse series are connected in series, and the coil (L 2 "L 3) is magnetically coupled with the same winding start. The noise prevention coil circuit according to claim 1.
3. 通信入力端子にエンハンスメ ント型の第 1 の MO S F ETのドレイ ンを接続し、 前記第 1の MO S F ETのソースにコイル (L 2) の巻き 始めを接続し、 前記コイル (L 2) の卷き終りにエンハンスメ ン ト型の 第 2の MO S F E Tのソースを接続し、 前記第 2の MO S F E Tの ドレ ィンを通信回路に接続し、 コイル(L 3) の卷き始めを、前記コイル(L 2) の巻き終りに接続し、 前記コイル (L 3) の卷き終り とグランドの 間に 2個のツエナーダイオード (D 2、 D 3 ) を逆向き直列に接続し、 前記コイル (L 3) にコンデンサ (C 4) を並列に接続し、 前記コイル 3. Connect the drain of the enhancement-type first MOSFET to the communication input terminal, connect the start of winding of the coil (L2) to the source of the first MOSFET, and connect the coil (L At the end of the winding of 2), the source of the enhancement type second MOSFET is connected, the drain of the second MOS FET is connected to the communication circuit, and the winding of the coil (L3) is started. Is connected to the end of the winding of the coil (L 2), and two Zener diodes (D 2, D 3) are connected in series in the reverse direction between the end of the winding of the coil (L 3) and the ground; A capacitor (C 4) is connected in parallel with the coil (L 3).
(L 2、 L 3) は磁気結合し、 前記通信入力端子とグランドの間に抵抗 (R 2) と抵抗 (R 3) を直列に接続し、 前記第 1の MO S F E Tのゲ ートと前記第 2の MO S F ETのゲートを、 前記抵抗 (R 2) と前記柢 抗 (R 3) の接続箇所に接続している請求項 1記載のノイズ防止コイル 回路。 (L2, L3) are magnetically coupled, a resistor (R2) and a resistor (R3) are connected in series between the communication input terminal and the ground, and the gate of the first MOS FET and the 2. The noise prevention coil circuit according to claim 1, wherein a gate of the second MOSFET is connected to a connection point between the resistor (R 2) and the resistor (R 3).
4. 通信線 (F) の入力部と負荷の間にコイル (L11) を接続し、 通信線 (N) の入力部と負荷の間にコイル (L12) を接続し、 両通信線 (F、 4. Connect the coil (L11) between the input of the communication line (F) and the load, and connect the coil (L12) between the input of the communication line (N) and the load.
N) の入力部間に、 コイル (L13) とパリスタ ( 1 ) を接続し、 前記コ ィル (L13) と並列に抵抗 (R11) を接続し、 両通信線 (F、 N) の入 力部間に 2極アレスタ (5) とパリスタ (7) を直列に接続し、 前記コ ィル (Lll、 L12、 L 13) が磁気結合しているディファ レンシャル ' モ ードノイズ用回路と、 通信線 (F) の入力部と負荷の間にコイル (L14) を接続し、通信線(N) の入力部と負荷の間にコイル(L15) を接続し、 パリスタ (2) とパリスタ (3) を直列に接続し、 前記パリスァ (2) と前記パリスァ (3) の接続箇所とグランドの間に、 コイル (L16) を 接続し、 両通信線 (F、 N) の入力部間に 3極アレスタ (6) の両端電 極を接続し、 前記 3極アレスタ (6) の中間電極とグランドの間にバリ スタ (8) を接続し、 前記コイル (L14、 L15、 L16) が磁気結合して いるコモン · モードノィズ用回路を直列に接続するノィズ防止コイル回 路。 N), connect a coil (L13) and a parister (1) between the input A resistor (R11) is connected in parallel with the coil (L13), and a two-pole arrester (5) and a pariser (7) are connected in series between the inputs of both communication lines (F, N). (Lll, L12, L13) are coupled magnetically to the differential mode noise circuit, and the coil (L14) is connected between the input of the communication line (F) and the load, and the communication line (N) A coil (L15) is connected between the input section and the load, and a pariser (2) and a pariser (3) are connected in series. A connection is made between the pariser (2) and the pariser (3) connection point and ground. Connect the coil (L16), connect the electrodes at both ends of the three-pole arrester (6) between the inputs of both communication lines (F, N), and connect the ground between the intermediate electrode of the three-pole arrester (6) and the ground. A varistor (8) is connected to the coil, and a common mode noise circuit in which the coils (L14, L15, L16) are magnetically coupled is connected in series. Prevention coil circuit.
5. 前記コイル(L 13)のインダクタンスの大きさは、前記コイル(Lll、 L 12) のインダクタンスの大きさの合計の 2倍か、 それに近い大きさで あり、前記コイル (L16) のインダクタンスの大きさは、前記コイル (L 14、 L15) と同じか、 それに近い大きさである請求項 14記載のノイズ 防止コイル回路。 5. The magnitude of the inductance of the coil (L13) is twice or close to the sum of the magnitudes of the inductances of the coils (Lll, L12). 15. The noise prevention coil circuit according to claim 14, wherein the size is equal to or close to the size of the coils (L14, L15).
6. 通信線 (F) の入力部と負荷の間にコイル (L11) に接続し、 通信線 (F) の入力部とグランド間に、 コイル (L13) とバリスタ ( 1 ) を直 列に接続し、 前記コイル (L13) と並列に抵抗 (R11) を接続し、 通信 線 (F) とグランド間に 2極アレスタ (5) とパリスタ (7) を直列に 接続する請求項 1 4記載のディファ レンシャル ' モードノイズ用のノィ ズ防止コイル回路。 6. Connect the coil (L11) between the input of the communication line (F) and the load, and connect the coil (L13) and the varistor (1) in series between the input of the communication line (F) and the ground. The differential circuit according to claim 14, wherein a resistor (R11) is connected in parallel with the coil (L13), and a two-pole arrester (5) and a palister (7) are connected in series between the communication line (F) and the ground. Rental モ ー ド A noise prevention coil circuit for mode noise.
7. 通信線 (F) の入力部と負荷の間にコイル (L17) を接続し、 通信線 (N) の入力部と負荷の間にコイル (L19) を接続し、 入力部とコイル (L17、 L 19) の間の両通信線 (F、 N) 間に、 ノ リ スタ (9) とコィ ル (L18) とコイル (L20) とパリスタ (10) を直列に接続し、 直列接 続の前記コイル (L18、 L20) に並列に抵抗 (R12) を接続し、 前記コ ィル (L18) と前記コイル (L20) の接続箇所とグランド間にバリスタ (11) を接続し、 両通信線 (F、 N) の間に 2極アレスタ (5) とパリ スタ (7) を直列に接続し、 两通信線 (F、 N) に 3極アレスタ (6) の両端電極を接続し、 前記 3極アレスタ (6) の中間電極とグランドの 間にパリ スタ (8) を接続し、 前記コイル (L17、 L18) は磁気結合し、 また、 前記コイル (L19、 L20) は磁気結合しているノイズ防止コイル 回路。 7. Connect a coil (L17) between the input part of the communication line (F) and the load, and connect a coil (L19) between the input part and the load of the communication line (N). Between the two communication lines (F, N) between L and L 19), a series connection of a nolister (9), a coil (L18), a coil (L20) and a palister (10) is made. A resistor (R12) is connected in parallel to the coil (L18, L20), and a varistor (11) is connected between the connection point between the coil (L18) and the coil (L20) and ground, and both communication lines ( F, N) between the two-pole arrester (5) and Paris (7) are connected in series. (4) Connect both ends of the three-pole arrester (6) to the communication lines (F, N), and connect a parister ( 8), wherein the coils (L17, L18) are magnetically coupled, and the coils (L19, L20) are magnetically coupled.
PCT/JP2004/015574 2003-10-14 2004-10-14 Noise prevention coil circuit WO2005036741A1 (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258853A (en) * 2010-06-11 2011-12-22 Murata Mfg Co Ltd Variable inductor device
WO2016167171A1 (en) * 2015-04-17 2016-10-20 株式会社村田製作所 Resonant circuit, band stop filter and band pass filter
WO2023276879A1 (en) * 2021-07-02 2023-01-05 株式会社村田製作所 Filter device, antenna device, and antenna module

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05267059A (en) * 1992-03-20 1993-10-15 Tdk Corp Noise-eliminated lamination type electronic component
JPH09275421A (en) * 1995-12-04 1997-10-21 Fujitsu Ltd Communication information terminal equipment
JPH11205063A (en) * 1998-01-13 1999-07-30 Mitsubishi Materials Corp Band stop filter component
JPH11330889A (en) * 1998-05-19 1999-11-30 Nec Corp Electromagnetic interference suppressing device for lan system
JP2000196391A (en) * 1998-12-24 2000-07-14 Mitsubishi Materials Corp Filter
JP2002114048A (en) * 2000-10-11 2002-04-16 Honda Motor Co Ltd Power transmission mechanism

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5261456A (en) * 1975-11-15 1977-05-20 Matsushita Electric Works Ltd Power line carrier deleting filter
JPS60167510A (en) * 1984-02-10 1985-08-30 Matsushita Electric Ind Co Ltd Block filter
JPS6315512U (en) * 1986-07-15 1988-02-01
JPH061878B2 (en) * 1987-03-06 1994-01-05 株式会社村田製作所 Noise filter
JPH07336176A (en) * 1993-07-23 1995-12-22 Toko Inc Laminated lc low-pass filter
JP3863674B2 (en) * 1998-10-05 2006-12-27 三洋電機株式会社 Common mode filter

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05267059A (en) * 1992-03-20 1993-10-15 Tdk Corp Noise-eliminated lamination type electronic component
JPH09275421A (en) * 1995-12-04 1997-10-21 Fujitsu Ltd Communication information terminal equipment
JPH11205063A (en) * 1998-01-13 1999-07-30 Mitsubishi Materials Corp Band stop filter component
JPH11330889A (en) * 1998-05-19 1999-11-30 Nec Corp Electromagnetic interference suppressing device for lan system
JP2000196391A (en) * 1998-12-24 2000-07-14 Mitsubishi Materials Corp Filter
JP2002114048A (en) * 2000-10-11 2002-04-16 Honda Motor Co Ltd Power transmission mechanism

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258853A (en) * 2010-06-11 2011-12-22 Murata Mfg Co Ltd Variable inductor device
WO2016167171A1 (en) * 2015-04-17 2016-10-20 株式会社村田製作所 Resonant circuit, band stop filter and band pass filter
US10530322B2 (en) 2015-04-17 2020-01-07 Murata Manufacturing Co., Ltd. Resonant circuit, band elimination filter, and band pass filter
WO2023276879A1 (en) * 2021-07-02 2023-01-05 株式会社村田製作所 Filter device, antenna device, and antenna module

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