WO2005013469A1

WO2005013469A1 - Dc power supply

Info

Publication number: WO2005013469A1
Application number: PCT/JP2003/009817
Authority: WO
Inventors: Yasuo Kuwabara
Original assignee: Fujitsu Access Limited
Priority date: 2003-08-01
Filing date: 2003-08-01
Publication date: 2005-02-10
Also published as: AU2003252334A1; JP4195032B2; JPWO2005013469A1

Abstract

A DC power supply in which a full-wave rectifier circuit converts the AC current outputted from an AC power supply into a DC current, the DC current is passed through a high-frequency suppressing circuit and a smoothing circuit, and a stable DC voltage is outputted by means of a DC-DC converter. When no load is connected, or when the input capacity of the load is below a predetermined value, the high-frequency suppressing circuit is made to oscillate intermittently, thereby reducing the power consumption.

Description

Specification DC power supply technology

The present invention is a DC power supply that converts AC output from an AC power supply into DC with a full wave rectification circuit, passes through a high frequency suppression circuit and a smoothing circuit, and then outputs a stable DC voltage using a DC-DC converter. It is applied to the device.

In particular, the present invention relates to a DC power supply device suitable for reducing power consumption by suppressing power consumption in a high frequency suppression circuit when the load is not loaded or when the input capacitance of the load is less than a predetermined value. . Background art

As an example of the above-described DC power supply device, an adapter of a notebook computer will be described as an example.

The laptop adapter (hereinafter simply referred to as the adapter) consumes some power even when the notebook bath is off. In addition, the adapter's output voltage is generally a worldwide specification that supports 100 to 240 V.

Such an adapter is equipped with a high frequency suppression circuit (PFC circuit) to improve the power factor. In particular, 7 5 Watt of the notebook computer input capacitance is, be equipped with a high-frequency suppression circuitry is, the Japan Information Technology Industries Association _(JEITA: Japan ti丄ectronice and Information Technology Industries Association) established Te ¾ constant Yo' of It is done.

A conventional notebook computer adapter will be described as an example using FIG.

In FIG. 7, 1 is an AC power supply (outlet), 2 is a full wave rectification circuit, 3 is a high frequency suppression circuit (PFC circuit), 4 is a smoothing capacitor, 5 is a DC-DC converter, and LP is a full wave rectification circuit 2. The plus line, LM, is the minus line of the full-wave rectifier circuit 2.

Here, the high frequency suppression circuit 3 includes a choke coil 3 1, an auxiliary feed wire 3 2 and an FET 3 It consists of three, a resistor R 34 and a commutation diode D 35.

In addition, in the high frequency suppression circuit 3, the positive line LP is connected to the I C 8 through the start resistance R 1 and the capacitor 7 as illustrated. Also, as shown in the figure, the auxiliary wire 32 of the high frequency suppression circuit 3 is connected to I C 8 through the diode D 1 and the resistor R 2.

In addition, I C 8 is configured to output a pulse for controlling on / off of the FET 33 to the gate of the FET 33 when a predetermined voltage determined in advance is supplied.

The DC--DC converter 5 includes a transformer T and an FET 51. The DC-DC converter 5 may be a flyback converter, a forward converter, or another type. Therefore, the detailed configuration of the DC-DC converter 5 is not shown.

In the DC--DC converter 5, the plus line LP is connected to I C 11 via the startup resistor R 3 as shown. Further, as shown in the figure, an auxiliary winding (pack-up winding) 12 is provided in the transformer T of the DC-DC converter 5. The auxiliary winding 12 is provided with a diode D 2 and a capacitor 10 as shown, and is configured to supply power to I C 11.

In addition, I C 11 is configured to output a pulse for performing on-off control of the FET 51 to the gate of the FET 51 when a predetermined voltage determined in advance is supplied. Next, the operation of the conventional adapter shown in FIG. 7 will be described.

The user connects the adapter's power cord to an AC power source (outlet) 1. This will start the adapter.

The full-wave rectifier circuit 2 full-wave rectifies the input alternating current and outputs it to the high frequency suppression circuit 3.

The capacitor 7 is charged via the plus line LP and the start-up resistor R 1 when the adapter starts up. As a result, the voltage generated across the capacitor 7 is supplied to the IC 8 as the voltage V cc, and when the voltage V cc exceeds a predetermined voltage, the IC 8 starts to operate. When IC 8 starts to operate, it outputs a pulse to the gate of FET 3 3 to control FET 3 3 on and off. Therefore, F ET 3 3 power on Z-off operation of the high frequency suppression circuit 3 is started. Thereby, both ends of the smoothing capacitor 4 High voltage is generated. However, when charging capacitor 7 with start-up resistor R1, IC 8 can output only a few pulses. Before this pulse disappears, a voltage is induced in the auxiliary winding 32 of the choke coil 31 to secure the voltage V cc for operating the IC 8 through the diode D 1 and the resistor R 2. As a result, the IC 8 can maintain a stable voltage V cc that can be operated continuously, and can control the FET 3 3 continuously to turn on and off.

Similarly, in the DC-DC converter 5, the capacitor 10 is charged via the positive line L P and the start-up resistor R3. As a result, the voltage generated across the capacitor 10 is supplied to the IC 11 as the voltage V c c, and when the voltage V c c exceeds a predetermined voltage, the IC 11 starts to operate. When I C 1 1 starts operating, it outputs a pulse to the gate of F ET 5 1 to control FET 5 1 on / off. Therefore, the FET 51 of the DC—DC converter 5 starts the on-Z-off operation. However, when charging capacitor 10 with start-up resistor R3, I C 1 1 can output only a few pulses. Therefore, before the pulse disappears, the output of the auxiliary winding 12 of the transformer T is rectified by the diode D 2 and the capacitor 10 is charged to ensure a sufficient voltage V cc for continuing the operation of the IC 1 1 Do. Thus, the DC-DC converter 5 supplies power to a not-shown notebook computer (load).

As described above, the high frequency suppression circuit 3 of the conventional adapter shown in FIG. 7 operates the FET 3 3 with the start resistance R 1 and the capacitor 7 when the power is turned on, and then the auxiliary winding 3 It is operated using a voltage of 2. Similarly, when the power is turned on, the DC-DC converter 5 operates the FET 51 with the start-up resistor R 3 and the capacitor 10 and then operates using the output of the auxiliary winding 12. Thus, the adapter outputs a predetermined DC power.

However, the above-described prior art has the following problems.

The DC power supply described above operates even under no load condition or when the input capacity of the load is less than 75 watts. However, as mentioned above, the DC power supply device is not obligated to provide a high frequency suppression circuit when there is no load or when the input capacity of the load is less than 75 watts.

Therefore, high-speed operation with no load or with a load input capacity of less than 75 watts. Operating a DC power supply equipped with a wave suppression circuit consumes unnecessary power, resulting in power loss. Specifically, the power required for the switching operation of the FET 33 for operating the high frequency suppression circuit 3 and the power required for operating the IC 8 are wasted. Note that, even if the high frequency wave suppression circuit 3 does not operate, the DC power supply device having the configuration shown in FIG. 7 performs AC-DC conversion without any problem.

In order to suppress unnecessary power consumption in the high frequency suppression circuit, there is a technology in which a circuit for stopping the operation of the high frequency suppression circuit is provided when the input capacity of the load is equal to or less than a predetermined value. 0 0 0 3 3 3 4 5 3). Disclosure of the invention

It is an object of the present invention to operate a DC power supply equipped with a high frequency suppression circuit under no load or in a state where the input capacity is less than a predetermined fixed capacity (for example, less than 75 watts), An object of the present invention is to provide a DC power supply device in which power loss is suppressed by intermittently operating the high frequency suppression circuit.

Here, to perform the operation of the high-frequency suppression circuit intermittently is in the first period in the no-load state or in the state where the input capacity of the load is less than a fixed capacity! After the high frequency suppression circuit is operated, the operation of the high frequency suppression circuit is stopped for a second period, which means that the first period and the second period are repeated. Further, operation of the high frequency suppression circuit in the first period means outputting a plurality of pulses for on / off controlling the switching element in the high frequency suppression circuit during the first period.

Specifically, the above object is achieved as follows.

The first invention comprises an AC power supply, a full wave rectification circuit for full wave rectification of AC output from the AC power supply, a high frequency suppression circuit for removing high frequency components from the output of the full wave rectification circuit, and a high frequency suppression circuit. The DC-DC converter is a DC power supply device that consists of a smoothing capacitor that smoothes the output, and a DC-DC converter that converts the voltage across the smoothing capacitor DC to DC and outputs a constant voltage. The IC consists of an auxiliary winding of a transformer, an IC that outputs a pulse for on / off control of switching elements in the high-frequency suppression circuit, and an IC drive circuit that acquires a voltage for driving the IC from the auxiliary winding of the transformer ing. According to the first invention, the voltage for driving I c can be obtained from the auxiliary winding of the transformer. Here, the auxiliary winding of the transformer reduces its output when the input capacity of the load is less than a fixed capacity. Therefore, since the voltage that can be acquired from the auxiliary winding of the transformer is low, the IC driving state and the non-driving state occur alternately. As a result, it is possible to perform intermittent oscillation in which a period in which the switching element provided in the high frequency suppression circuit is on / off controlled and a period in which the switching element is not on / off controlled alternate. Therefore, it is possible to provide a DC power supply apparatus which can suppress power loss when no load or input capacity of load is less than a fixed capacity.

In the second invention, the IC drive circuit extracts current from the end of the auxiliary winding, stores it in the capacitor through a series circuit of diode and resistor, and applies the voltage generated in the capacitor to the V cc terminal of the IC. Drive the IC.

According to the second invention, when the voltage induced by the auxiliary winding is low, the IC driving state and the non-driving state can be alternately switched, and intermittent oscillation can be performed in the high frequency suppression circuit. it can.

In the third invention, the IC drive circuit draws current from the middle tap of the auxiliary winding, stores it in the capacitor through the diode, and applies the voltage generated in the capacitor to the V cc input terminal of the IC to drive the IC. .

According to the third invention, it is possible to switch between the driving state and the non-driving state alternately, and intermittent oscillation can be performed in the high frequency suppression circuit.

In the fourth to sixth inventions, a z-word is provided in front of the capacitor.

According to the fourth to sixth inventions, the zener diode stabilizes the operation of the IC, so that the high frequency suppression circuit can stably oscillate intermittently. Brief description of the drawings

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a waveform diagram for explaining the operation of the first embodiment of the present invention. FIG. 3 is a waveform diagram for explaining the operation of the first embodiment of the present invention. FIG. 4 is a waveform chart for explaining the operation of the first embodiment of the present invention. FIG. 5 is a circuit diagram showing a second embodiment of the present invention.

FIG. 6 is a circuit diagram showing a third embodiment of the present invention.

FIG. 7 is a view showing an example of a conventional notebook computer adapter. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described.

First Embodiment

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. In FIG. 1, the same parts as in the prior art shown in FIG. The first embodiment shown in FIG. 1 differs from the prior art shown in FIG. 7 in the following points.

First, the start resistance R1 is not provided. Second, the auxiliary winding 32 is not provided in the high frequency suppression circuit 3. Third, the diode D1 and the resistance R2 are not provided. It is. Furthermore, fourthly, as shown in the figure, the diode D 3, the resistor R 4 and the capacitor 13 are provided on the side where the diode D 2 of the auxiliary feed line 12 is connected.

The operation of the first embodiment shown in FIG. 1 will be described below with reference to the waveform chart shown in FIG. The waveform diagram shown in FIG. 2 is that under no-load operation (with no load on the output side of the DC-DC converter 5).

The user connects the adapter's power cord to an AC power source (outlet) 1 (see time t1 in Fig. 2). This will start the adapter. The full-wave rectifier circuit 2 full-wave rectifies the input alternating current and outputs it to the high frequency suppression circuit 3. Thus, when the input voltage from the outlet is, for example, AC voltage 100 V, 14 1 V is generated as a DC voltage across smoothing capacitor 4 (time t 1 to time in FIG. 2 (c)). t 3). The voltage of the smoothing capacitor 4 is maintained at approximately 14 1 V until time t 3 shown in FIG. 2, whereby a predetermined voltage (approximately 2 0 V, approximately 2 0 V, predetermined to the IC 11 via the starting resistor R 3). See Fig. 2 (b). Force Voltage Supplyed as Vcc. As a result, I C 1 1 starts operation (see times t 1 to t 2 in FIG. 2 (b)).

When the IC 1 1 starts operation, the IC 1 1 outputs a pulse for controlling the FET 5 1 of the DC-DC converter 5 on / off to the gate of the FET 5 1. By this, The FET 5 1 of the DC--DC converter 5 is on / off controlled, and the DC--DC converter 5 starts operation.

When the DC-to-DC converter 5 starts operating, an output voltage (about 20 V) is generated at the DC-to-DC converter 5 (see time t2 in Fig. 2 (d)).

As in the prior art, the operation of I C 11 through the start-up resistor R 3 disappears only by outputting a few pulses, and the operation of I C 11 also stops as it is.

However, with the start of operation of DC-DC converter 5, the current induced in auxiliary line 12 is rectified by diode D2, smoothed by capacitor 10, and supplied to IC 11 as voltage V cc. . Thus, the DC-DC converter 5 continues to operate.

Also, the current induced in the auxiliary winding 12 is supplied to the capacitor 13 via the diode D 3 and the resistor R 4 to charge the capacitor 13. As a result, a voltage (about 18 V, see FIG. 2 (a)) sufficient for the continuous operation of I C 8 is secured and supplied as a voltage V c c. Therefore, as shown at time t3 in FIG. 2 (a), I C 8 starts operation and outputs a pulse to the gate of the FET 33 of the high frequency suppression circuit 3. As a result, the smoothing capacitor 4 generates a voltage of about 380 V at its both ends (see time t3 in FIG. 2 (c)).

When time passes and time t 4 is reached, as described above, since this operation is a no-load operation, the induced voltage of the auxiliary winding 12 decreases (the induced current decreases). As a result, the amount of charge accumulated in capacitor 13 decreases, and the voltage across capacitor 13 alternates between exceeding and not exceeding the voltage necessary to operate I C 8. Then, oscillation is performed when the voltage across the capacitor 13 exceeds the required voltage value, and oscillation is not performed when the voltage does not exceed the required voltage value. Therefore, intermittent oscillation is repeated (see arrow A in Fig. 2 (a)).

The intermittent oscillation will be described in detail with reference to FIG. At time t 4 (after arrow A in FIG. 2 (a)), as described above, when the voltage across the capacitor 13 exceeds the required voltage value, oscillation (between B and C in the figure) is performed. Conduct and do not perform vibration at timings not exceeding (between C and B in the figure). FIG. 3 is a waveform diagram showing this state.

That is, the voltage V cc power supplied to the IC 8 is required to operate the SIC 8 When the voltage value is exceeded, IC 8 starts outputting a pulse that turns on / off F ET 3 3 of high frequency suppressor 3 (see B in the figure). After that, when the drive of IC 8 stops (¥ <c supplied to 18 decreases) (see C in the figure), IC 8 outputs the pulse to control FET 3 3 of high frequency suppressor 3 on and off. Stop. During the oscillation period (between B and C in the figure), the IC 8 outputs a large number of pulses and performs on / off control of the FET 3 a large number of times. However, since there is a period during which oscillation does not occur (between C and B in the figure), the power can be greatly suppressed.

FIG. 4 is a waveform diagram showing the results of experiments where an electronic load device was attached to the load side in the first embodiment.

In FIG. 4, the period from time t0 to t1 is a period in which the electronic load device is set to no load (the output current is OA). When loading is performed gradually using an electronic load device at time t1, as shown in the figure, the output current exceeds 0.2 A at time t2. Then, over the period from time t0 to t2, the high frequency suppression circuit 3 performs intermittent oscillation.

When the output current exceeds 0.2 A at time t 2, the high frequency suppressor 3 switches to the normal operation. Normal operation is performed in the period from time t2 to t3 (period in which the load is gradually increased and then the load is gradually decreased).

At times t3 to t4, when the output current decreases to 0.2 A to OA, as shown in the figure, the high frequency suppression circuit 3 switches to intermittent oscillation.

In the above description, the no-load output current is described as OA, but in the case of a laptop computer etc., the power supply of the notebook PC etc. is usually turned off.

An input current of about 3 OmA flows. Even in such a state, the high frequency suppression circuit 3 performs intermittent oscillation and contributes to power suppression.

As apparent from the above description, according to the first embodiment, since the high frequency suppression circuit performs intermittent oscillation at no load or when the input capacity of the load is less than a fixed capacity, continuous operation is performed as in the conventional technique. Power consumption can be significantly reduced compared to oscillation. Also, compared to the DC power supply shown in Figure 7, the cost is reduced because no additional parts are required.

According to the first embodiment, by changing the capacitance of the capacitor 13, The oscillation period can be varied.

Further, according to the first embodiment, the resistor R 4 always carries a constant voltage among the voltages output from the auxiliary power supply line 12. Therefore, the voltage (V c c) of the capacitor 13 is allowed to rise and fall.

Furthermore, according to the first embodiment, there is an advantage that the number of parts is reduced as compared with the prior art. ■

Second Embodiment

FIG. 5 is a circuit diagram showing a second embodiment of the present invention. In FIG. 5, the same parts as those of the first embodiment shown in FIG. The second embodiment shown in FIG. 5 is different from the first embodiment shown in FIG. 1 in the following points.

First, while in the first embodiment shown in FIG. 1, a line is drawn from the end of the auxiliary winding 12 to the diode D 3, in the second embodiment shown in FIG. The point is that a line is drawn to the diode D 3 from the middle of the line 1 2 (intermediate tap). In other words, reducing the number.

Second, the resistor R 4 provided in the first embodiment shown in FIG. 1 is not provided in the second embodiment shown in FIG.

Specifically, the second embodiment differs from the first embodiment only in that the resistance component of the resistor R 4 is imposed on the auxiliary winding 12. That is, in the second embodiment, a low voltage is taken out from the auxiliary winding 12, and a resistance value corresponding to the resistor R 4 is imposed on the auxiliary winding 12. In other words, the second embodiment uses the resistance component in the auxiliary winding 12 to play the role of the resistance 14 of the first embodiment.

The operation of the second embodiment is the same as the operation of the first embodiment, so the description will be omitted.

According to the second embodiment, since the high frequency suppression circuit performs intermittent oscillation at no load or when the input capacitance of the load is less than a predetermined capacitance, power consumption can be reduced more than when continuous oscillation is performed as in the prior art. Consumption can be greatly reduced. Also, compared to the DC power supply shown in Figure 7, the cost is reduced because no additional parts are required.

According to the second embodiment, by changing the capacitance of the capacitor 13, The oscillation period can be varied.

Furthermore, according to the second embodiment, there is an advantage that the number of parts is reduced as compared with the prior art.

Third Embodiment

FIG. 6 is a circuit diagram showing a third embodiment of the present invention. In FIG. 6, the same parts as those of the first embodiment shown in FIG. The third embodiment shown in FIG. 6 is different from the first embodiment shown in FIG. 1 in the following points.

That is, in the first embodiment shown in FIG. 1, the resistor R 4 and the capacitor 13 are directly connected. However, in the third embodiment shown in FIG. 6, as shown, a Zener diode 14 is provided in front of the capacitor 13. The Zener diode 14 is to make the voltage V c c supplied to the I c 8 constant in order to stabilize the operation. Specifically, the voltage V c c is not supplied to I c 8 unless the voltage V c c supplied to the zener diode 14 becomes equal to or higher than the zener voltage. Therefore, since the high frequency suppression circuit 3 does not start if the load value of the DC power supply device does not exceed a certain fixed value, it is possible to suppress unnecessary power consumption.

The third embodiment can be applied also in the first and second embodiments by providing the Zener diode 14 in the front stage of the capacitor 13. The operation of the third embodiment is the same as the operation of the first embodiment, so the description will be omitted.

According to the third embodiment, since the high frequency suppression circuit performs intermittent oscillation at no load or when the input capacitance of the load is less than a predetermined capacitance, power consumption can be reduced more than in the case of continuous oscillation as in the prior art. Consumption can be greatly reduced. Also, compared to the DC power supply shown in Figure 7, the cost is reduced because no additional parts are required.

According to the third embodiment, the oscillation period can be varied by changing the capacitance of the capacitor 13.

Further, according to the third embodiment, the resistor R 4 always carries a constant voltage among the voltages output from the auxiliary winding 12. Therefore, the voltage (Vcc) of the capacitor 13 can be increased or decreased. Furthermore, according to the third embodiment, there is an advantage that the number of parts is reduced as compared with the prior art. Industrial Applicability

According to the present invention, when operating a DC power supply provided with a high frequency suppression circuit, no load or when the input capacity of the load is less than a predetermined value (for example, the input capacity is 75 watts) Power loss can be suppressed by oscillating the high frequency suppression circuit intermittently.

Here, the DC-DC converter used for the DC power supply may be a flyback converter, a forward converter, or another converter. Furthermore, the switching element provided in the high frequency suppression circuit is not limited to FET, but may be IGBT or the like.

Furthermore, since it is usually necessary to provide a dedicated circuit to suppress the power loss of the high frequency suppression circuit, the number of parts increases. However, according to the present invention, the number of parts can be reduced as compared with the prior art, and the power loss of the high frequency suppression circuit can be suppressed.

Claims

The scope of the claims

(1) AC power supply, full wave rectification circuit for full wave rectification of AC output from the AC power supply, high frequency suppression circuit for removing high frequency components from output of the full wave rectification circuit, output of the high frequency suppression circuit A DC power supply device comprising: a smoothing capacitor for smoothing; and a DC-DC converter for DC-DC converting the voltage at both ends of the smoothing capacitor and outputting a constant voltage,

A transformer auxiliary feed line provided in the DC-DC converter;

I C which outputs a pulse for on / off controlling the switching element in the high frequency suppression circuit;

An IC drive circuit for obtaining a voltage for driving the IC from the auxiliary feed line of the transformer;

A direct current power supply device characterized by comprising:

(2) In the direct current power supply device according to claim 1,

The IC drive circuit takes out current from the end of the auxiliary winding, stores it in a capacitor through a series circuit of a diode and a resistor, applies a voltage generated in the capacitor to the V cc terminal of the IC, and DC power supply device characterized by driving.

(3) In the DC power supply device according to claim 1,

The IC drive circuit takes out current from the middle tap of the auxiliary winding, stores it in a capacitor through a diode, applies a voltage generated in the capacitor to the V cc input terminal of the IC, and drives the IC. A direct current power supply device characterized by

(4) In the DC power supply device according to claim 1,

A DC power supply device characterized by providing a Zener diode in front of the capacitor.

(5) In the DC power supply device according to claim 2,

(6) In the DC power supply device according to claim 3,

A direct current power supply characterized in that a Zener diode is provided in front of the capacitor. moth

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