WO2004086225A1 - Systeme informatique virtuel - Google Patents

Systeme informatique virtuel Download PDF

Info

Publication number
WO2004086225A1
WO2004086225A1 PCT/JP2003/003522 JP0303522W WO2004086225A1 WO 2004086225 A1 WO2004086225 A1 WO 2004086225A1 JP 0303522 W JP0303522 W JP 0303522W WO 2004086225 A1 WO2004086225 A1 WO 2004086225A1
Authority
WO
WIPO (PCT)
Prior art keywords
computer
cpu
computers
abnormality
computer system
Prior art date
Application number
PCT/JP2003/003522
Other languages
English (en)
Japanese (ja)
Inventor
Hiroaki Otsuka
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2003/003522 priority Critical patent/WO2004086225A1/fr
Publication of WO2004086225A1 publication Critical patent/WO2004086225A1/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0784—Routing of error reports, e.g. with a specific transmission path or data flow
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0712—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a virtual computing platform, e.g. logically partitioned systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit

Definitions

  • the present invention relates to a computer system including a plurality of computers and employing a hardware redundant configuration.
  • Patent Documents 1 to 4 Conventionally, as a general high availability system, for example, the technologies of Patent Documents 1 to 4 below are known.
  • a general-purpose computer server for example, combining multiple IA (Intel Architecture) servers to secure redundancy
  • IA Intelligent Architecture
  • the general-purpose servers that make up the virtual machine execute processing synchronously. Then, the status of each general-purpose server is monitored mutually, and if a difference in the status is detected, it is determined that an error has occurred.
  • the hardware status does not match between the computers, an abnormal status is detected.
  • the memory usage of each general-purpose server, the number of iZo accesses, the number of running processes, etc. must be the same.
  • the computers constituting the virtual machine execute processing in synchronization so that these states always match.
  • each general-purpose server is subject to mutual status monitoring as described above.
  • Such hardware status as the temperature of the CFU is excluded from mutual monitoring.
  • Such non-monitored hardware includes, for example, a fan of a CPU, a bit error of a memory accessed by the CPU, and the like. If a failure occurs in the hardware of each general-purpose server individually, synchronization is lost.
  • Non-patent document 1
  • Patent Document 1
  • Patent Document 2
  • Japanese Patent Application Laid-Open No. 11-27296 discloses the invention.
  • the present invention is such a virtual computer system, in which a plurality of computers execute a synchronization process to configure a virtual computer system and provide a normal function when each of the computers is in a synchronized state.
  • Each computer is A first processing unit that functions on the virtual computer system, and a second processing unit that individually functions on each of the computers,
  • the second processing unit has means for notifying the occurrence of the notified abnormality.
  • the first processing unit detects an abnormality on each computer as an abnormality on the virtual machine system.
  • the abnormality refers to, for example, an abnormality of hardware or the like attached to each computer.
  • the abnormality in the virtual computer system is not an abnormality in each of the computers to be subjected to the synchronization processing, but refers to, for example, an abnormality in such a single computer when the virtual computer system is regarded as a single computer.
  • the abnormality detected on the virtual machine is converted into information indicating the abnormality on the computer, and is notified to the second processing unit.
  • the information indicating the abnormality on the computer is, for example, information indicating an actual abnormality occurrence position on the computer. Therefore, the second processing unit can notify the user of the abnormality as an abnormality on the computer, for example.
  • the first processing unit and the second processing unit may be included in a computer constituting a single server device.
  • the first processing unit and the second processing unit may be included in different computers configuring different server devices.
  • a plurality of computers execute a synchronization process to configure a virtual computer system, and provide a normal function when each of the computers is in a synchronized state.
  • the abnormality detected on the virtual machine is converted into information indicating the abnormality on the computer. And notifying the information.
  • the present invention may be a program that causes a computer or other device, machine, or the like to realize any of the above functions.
  • a program may be recorded on a recording medium readable by a computer or the like.
  • FIG. 1 is a schematic diagram of a computer system according to an embodiment of the present invention
  • FIG. 2 is a diagram showing an outline of the operation of the computer system.
  • FIG. 3 is a hardware configuration diagram of the computer 1 (or the computer 2) shown in FIG.
  • FIG. 4 shows an outline of the synchronization process.
  • F I G. 5 is an example of a hardware management table on computer 1,
  • F I G. 6 is an example of the hardware management table on Computer 2,
  • FIG.7 is an example of a hardware management table on a virtual machine.
  • FIG. 8 is a flowchart showing the failure detection processing in the computer system.
  • FIG. 9 and FIG. 0 are computers according to a modification of the present embodiment
  • FIG. 3 is a diagram showing the configuration of FIG. BEST MODE FOR CARRYING OUT THE INVENTION
  • Fig. 1 shows a schematic diagram of the computer system.
  • This computer system includes a computer 1 and a computer 2.
  • Calculator 1 and Calculator 2 both have similar components.
  • Calculator 1 has CPUs 1 and 1 and 2 and memories 13 and 14 and a hard disk It has 15 and 16 and network interfaces 17 and 18.
  • the computer 2 has CPUs 21 and 22, memories 23 and 24, hard disks 25 and 26, and network interfaces 27 and 28.
  • the CPUs 12 and 22 synchronize with each other to form a virtual computer system. That is, the CPU 12 executes information processing by the memory 14, the hard disk 16 and the network interface 18.
  • the CPU 22 uses the memory 24, the hard disk 26, and the network interface 28 to execute the same information processing as the CPU 12 in synchronization with the CPU 12.
  • access to input / output devices for example, hard disks 15 and 16 and network interfaces 17 and 18 is controlled by the CPU 11.
  • access to the hard disks 25 and 26, the network interfaces 27 and 28, etc. is controlled by the CPU 21. That is, both CPU 11 and PU 21 operate as input / output processors.
  • the CPU 12 accesses the hard disk 16 through the CPU 11.
  • the CPU 12 accesses the network interface 18 through the CPU 11.
  • the CPU 22 accesses the hard disk 26 through the CPU 21.
  • the CPU 22 accesses the network interface 28 through the CPU 21.
  • both the CPUs 12 and 22 provide information processing functions as main processors.
  • the terminal 30 on the network is connected to the computer system via one of the network interfaces 18 and 19 to the system.
  • the terminal 30 When the terminal 30 is connected to the computer system through the network interface 18, the terminal 30 is provided with the information processing function of the CPU 12 through the CPU 11. At this time, the network interface 28 is in the standby state ⁇ o.
  • the CPU The virtual computer system that operates on the CPU 12 and the CPU 22 uses the network interface 28 instead of the network interface 18 for communication with the network. Specifically, the CPUs 12 and 22 switch the interface of the data link layer corresponding to the node on the network of the computer system from the net hook interface 18 to 28.
  • the terminal 30 accesses the computer system through the network interface 28.
  • the terminal 30 is actually provided with the information processing function from the CPU 22 via the network interface 28 and the CPU 21.
  • the CPU 22 executes processing in synchronization with the CPU 12. Therefore, even if the route to the terminal 30 is switched from the network interface 18 to the network interface 28, the terminal 30 can continue to receive the information processing function provided before the switching.
  • the route to the terminal 30 is similarly switched from the network interface 18 to the network interface 28. For this reason, the terminal 30 can continuously receive the information processing function provided from the CPU 12 before the failure occurs.
  • the hard disk 16 has a mirror relationship with the hard disk 26. That is, the CPU 12 writes the same contents to the hard disk 16 and the hard disk 26 via the CPU 11 and the CPU 21. Therefore, for example, when a failure occurs in the hard disk 16, the CPU 12 can read data from the hard disk 26.
  • the terminal 30 continues to provide the information processing function executed before the failure from the CPU 12. This is the same also when the terminal 30 is provided with the information processing function from the CPU 22.
  • the terminal 30 can continue the information processing being executed before the failure occurs.
  • this system cannot monitor hardware attached to the CPU 12 itself, for example, the memory 14, or a temperature sensor (not shown) of the CPU 12, a fan (not shown) of the CPU 12, and the like. These hardware does not always have the same state as the hardware attached to the corresponding CPU 22 in normal operation in which no failure has occurred.
  • the temperature of the CPU 12 does not always match the temperature of the CPU 22 within a predetermined allowable range. Further, there may be a case where the fan of the CPU 12 stops in an allowable range and the fan of the CPU 22 does not stop.
  • the computer system according to the present embodiment has a function of monitoring resources attached to the CPUs 12 and 22 by placing the resources under the control of a program on the virtual computer system formed by the CPUs 12 and 22. provide.
  • Fig. 2 shows an overview of the operation of this computer system.
  • the virtual computer system is formed by the CPUs 12 and 22. Then, information processing is executed on this virtual computer system.
  • a resource management program for managing resources attached to the CPU 12 and the CPU 22 is executed on this virtual computer system. Then, the resource management program detects a hardware failure. This hardware failure is detected by the resource management program on the virtual machine via the CPU 12 or the CPU 22.
  • the resource management program on the virtual machine does not treat each resource as hardware having a redundant configuration. That is, the resource management program manages resources not as hardware subject to synchronization processing included in the redundantly configured CPUs 12 and 22, but as independent hardware on a virtual computer. Therefore, even if a failure occurs in the hardware attached to either the CPU 12 or the CPU 22, it is not determined that the synchronization is abnormal.
  • This hardware failure is notified to the OS on the virtual machine system (arrow A1). Then, the OS on the virtual computer system notifies the computer that manages the display devices such as light-emitting diodes (called a real computer in FIG. 2) of the hardware failure information (A2). The real computer turns on the light emitting diode and the like based on the notification (A3).
  • the OS on the virtual computer system notifies the computer that manages the display devices such as light-emitting diodes (called a real computer in FIG. 2) of the hardware failure information (A2).
  • the real computer turns on the light emitting diode and the like based on the notification (A3).
  • Fig. 3 shows the hardware configuration of computer 1 shown in Fig. 1.
  • the hardware configuration diagram of the computer 2 is the same as that of FIG. 3, and therefore, the description thereof is omitted.
  • Calculator 1 has CPUs 11 and 12, chipset 41 (Northbridge in FIG.3), and chipset 46.
  • the CPU 11 provides an information processing function.
  • the CPU 12 provides an input / output management function. Therefore, in the computer 1, the CPU 11 accesses various input / output devices via the CPU 12.
  • a memory slot 42 and an input / output chip 43 are connected to the chipset 41.
  • a memory board on which a DRAM is mounted is mounted in the memory slot 42.
  • Part of the memory connected to the memory slot 42 is under the control of the CPU 11, and part of the memory is under the control of the CPU 21.
  • PCI buses are connected to the input / output chip 43. These PCI buses are provided with a number of slots, one of which, for example, slot 44 has other slots. An interface card for communication with Computer 1 is installed.
  • the CPU 12 accesses the slot 44 through the CPU 11. Then, it communicates with the CPU of the computer 2 by the communication interface. With this configuration, computer 1 (CPU 12) synchronizes with computer 2 to form a virtual computer system.
  • an SCS I (Small Computer System Interface) controller 45 and the like are connected to the PC I node.
  • the chipset 41 is further connected to a chipset 46 via a PCI bus.
  • the chip set 46 is connected to a server management chip 51, an EE PROM (Electronically Erasable and Programmable Read Only Memory) 51, and a front panel 52 through an SM (Server Management) bus.
  • EE PROM Electrically Erasable and Programmable Read Only Memory
  • SM Server Management
  • the server management chip 51 monitors each hardware of the computer 1, and executes a test / maintenance function.
  • On the front panel 52 a light emitting diode and the like are mounted, and the state of the computer 1 is displayed.
  • the chipset 46 is further connected to a flash memory 53 storing BIOS and an extended input / output chip 54 via an Industrial Standard Architecture (ISA) bus.
  • the expansion input / output chip 54 is connected to a serial port, a parallel port, a port for a floppy disk (registered trademark), a keyboard, a mouse, and the like.
  • the chipset 46 includes an IDE (Integrated Drive Electronics) port, a USB (Universal Serial Bus) port, and the like.
  • a video controller 47, a LAN controller 48, and other PCI slots are connected on a PCI bus connecting the chipset 41 and 46.
  • Fig. 4 shows an overview of the synchronization process in this computer system.
  • a virtual computer is configured by the synchronous processing of the CPUs 12 and 22.
  • the hardware attached to the CPU 12, the memory 14, and the CPU 12 constitutes the real computer resources 51.
  • CPU22 S memory 24 and hardware attached to CPU22 Make up resource 52.
  • the CPU 11 functions as an input / output processor of the CPU 12.
  • the memory 13 stores a boot record, a device driver, and the like, and is executed by the CPU 11 together with the BIOS on the flash memory.
  • the hardware accessed by the CPU 11, the memory 13 and the CPU 11 constitutes the real computer resource 53.
  • the CPU 21 functions as an input / output processor of the CPU 22.
  • the memory 23 stores a boot record, a device driver, and the like, and is executed by the CPU 21 together with the BIOS on the flash memory.
  • the hardware accessed by the CPU 21, the memory 23, and the CPU 21 constitutes an actual computer resource 54.
  • a synchronous processing program for executing synchronous processing is installed in the CPU 12 and the CPU 22, and each constitutes a virtual machine.
  • This synchronous processing program is combined with the OS originally running on the CPU 12 (and 22) to function as a virtual machine OS.
  • Such a synchronization processing program is provided, for example, by Marathon Technologies Corporation of the United States.
  • the processing executed by the CPU 12 is notified to the CPU 22, and the same processing is executed by the CPU 22.
  • Input / output to / from hardware via CPU 11 (for example, writing to a hard disk, reading from a hard disk, etc.) is performed via CPU 11 and CPU 21 in a redundant manner. (Mirror). That is, the hard disks included in the real computer resources 53 and 54 constitute a mirror disk.
  • FI G. 5 is an example of a hardware management table on Calculator 1
  • FI G. 6 is
  • FIG. 7 is an example of a hardware management table on machine 2
  • FIG. 7 is an example of a hardware management table on a virtual machine.
  • FIGS. 5 to 7 has a field in which the No. and the target are paired.
  • No. is information that identifies the hardware managed in each field.
  • the target is information that specifies hardware managed in the field.
  • a to E etc. are, for example, information indicating a memory area (for example, a page of a physical memory).
  • a to E and the like may be, for example, a temperature sensor output unit of a CPU, a sensor indicating a fan state, and the like.
  • the numbers shown in FIG. 5, 6 etc. are, for example, the physical addresses on computer 1 (or 2) for these hardware.
  • FIG.5 and 6 indicate that the hardware information attached to each computer 1 and 2 is managed individually for each computer 1 and 2. As described above, when the hardware attached to the computers 1 and 2 is managed individually for each of the computers 1 and 2, the hardware status between the computers 1 and 2 may not be matched.
  • FIG. 7 is an example of a table for managing hardware on such a virtual machine system.
  • the table shown in FIG. 7 manages resources belonging to the CPUs 12 and 22 as common resources of the virtual machine system. For this reason, a function of managing the CPU 12 and the CPU 22 as resources of the virtual machine system without providing the object of the synchronization process is provided.
  • FIG. 8 is a flowchart showing a failure detection process in the computer system.
  • the processing of S1 to S3 is executed by a program on CPU 12 (or CPU 22) constituting the virtual machine system.
  • S4 and S5 are executed by a program on CPU 11 (or CPU 21) constituting the real computer.
  • the actual computer refers to a computer that executes the processing independently of the computer 1 (or 2) independently of the synchronous processing.
  • the CPU 14 manages the memory 14 (see FIG. 1), detects an abnormal value of the temperature sensor output (not shown) of the CPU 12, and detects an abnormality of the fan (not shown) of the CPU 12.
  • the CPU 12 constituting the virtual computer system polls the status of hardware attached to itself. Therefore, the above-mentioned fault is detected by this polling (S1). Then, the CPU 12 specifies the location of the failure based on, for example, the hardware management table shown in FIG. Therefore, the failure location is detected as a hardware failure on the virtual machine system.
  • the CPU 12 converts the detected fault location into an actual fault location in the CPU 12 (for example, information on the real address space of the CPU 12) (S2). Then, the CPU 12 notifies the data indicating the failure location to the CPU 22 constituting the real computer (S3). The CPU 22 receives the notified data (S4). Then, the CPU 22 displays an abnormality on an input / output interface, for example, a display lamp on the front panel 52 on the SM bus shown in FIG. 3 or a display device on the video interface 47 on the PCI bus ( S 5).
  • an input / output interface for example, a display lamp on the front panel 52 on the SM bus shown in FIG. 3 or a display device on the video interface 47 on the PCI bus ( S 5).
  • the resources attached to the CPU 12 or the CPU 22 constituting the virtual machine are managed as resources common to the virtual machines, and the state is detected. Therefore, the state of the resources attached to the CPU 12 or 22 can be detected without causing a failure in the synchronous processing of the virtual machine.
  • the computer system converts the failure from the management on the virtual machine to the actual management of the computer 1 (or the computer 2) alone, and hands it over to the real computer.
  • the fault location is converted from management information on the virtual machine to management information on the real machine. Therefore, the actual fault location on Computer 1 (or Computer 2) (for example, the location on Computers 1 and 2 based on the physical address) can be displayed on the front panel or display device.
  • FIG. 9 and FIG. 10 are diagrams showing the configuration of a computer system according to a modification of the present embodiment.
  • the computer system is configured by the computer 1 having the CPUs 11 and 12 and the computer 2 having the CPUs 21 and 22.
  • implementation of the present invention is not limited to such a configuration.
  • FIGS. 9 and 10 show examples in which a virtual computer is constituted by four computers 101 to 104.
  • the computers 101 to 104 are also called, for example, general-purpose servers.
  • the configuration of each of the computers 101 and 104 is the same as that shown in FIG.
  • the computer 101 when the computer 101 constitutes a virtual computer system, only the CPU and the memory function. Therefore, the computer 101 uses the resources of the computer 103 for the components including the input / output portion, for example, the input / output chip 43, the chipset 46, the LAN controller 48, etc. shown in FIG.
  • the computer 103 provides a hard disk, a network interface (equivalent to the LAN controller 48 of FIG. 3), etc. as the input / output processor that provides the input / output part. Offer.
  • the relationship between the computer 101 and the computer 103 as described above is the same in the computer 102 and the computer 104.
  • the computer 103 and the computer 104 provide the computer 101 with a hard disk having a mirror configuration. That is, the write instruction from the computer 101 to the hard disk of the computer 103 is also executed to the hard disk of the computer 104.
  • the computer 103 and the computer 104 provide the computer 102 with a hard disk having a mirror configuration. That is, the write command from the computer 102 to the hard disk of the computer 104 is also executed to the hard disk of the computer 103.
  • each of the computers 101 to 104 may be provided with a communication card 110.
  • the communication card 110 is mounted, for example, in a slot 44 on a PCI bus shown in FIG.
  • the calculation 101 communicates with the computers 103 and 104 via the communication card 110.
  • the computer 103 and the computer 104 function as an input / output processor.
  • the computer 101 also sends an input / output command to the computer 103 to the computer 104.
  • the computer 102 recognizes the processing to be executed in synchronization with the input / output processing in the computers 103 and 104.
  • the computer 101 and the computer 102 synchronize with each other through computers 103 and 104 which are input / output processors.
  • the computer 101 and the computer 102 constitute a virtual computer system.
  • Such a virtual computer system is provided by Marathon Technologies Corooration in the United States.
  • the computer 101 and the computer 102 may execute the processing from S1 to S3 shown in FIG. Further, when a failure location is detected, the computers 101 and 102 may notify the computers 103 and 104 of the failure location. The computer 103 and the computer 104 may receive the notification and display the failure location on the front panel or a display device.
  • a program that causes a computer or other device or machine (hereinafter, referred to as a computer, etc.) to realize any of the above functions can be recorded on a recording medium readable by a computer or the like.
  • the function can be provided by causing a computer or the like to read and execute the program on the recording medium.
  • a computer-readable recording medium is a recording medium that stores information such as data and programs by electrical, magnetic, optical, mechanical, or chemical action and can be read by a computer.
  • Examples of such a recording medium that can be removed from a computer include a flexible disk, a magneto-optical disk, a CD-R0M, a CD-R / W, a DVD, a DAT, an 8 ram tape, and a memory card.
  • a recording medium fixed to a computer or the like includes a hard disk and a ROM (read only memory).
  • the present invention can be used for monitoring a hardware attached to each computer in a computer system in which a plurality of computers realize a virtual machine having a redundant configuration.
  • a system that performs synchronous processing by statistical processing regardless of a majority decision it is possible to monitor the hardware of each computer without impairing the synchronous processing.
  • the present invention can be used in the information equipment industry such as a computer.

Abstract

L'invention concerne un système informatique virtuel dans lequel plusieurs ordinateurs (1, 2) exécutent un traitement de synchronisation en vue de constituer un système informatique virtuel offrant une fonction normale lorsque les ordinateurs sont dans un état synchronisé. Les ordinateurs (1, 2) comprennent des premières unités de traitement (12, 22) fonctionnant sur le système informatique virtuel et des secondes unités de traitement (11, 21) fonctionnant respectivement sur les ordinateurs respectifs. Les premières unités de traitement (12, 22) comportent des moyens permettant de détecter une erreur des ordinateurs (1, 2) en tant qu'erreur du système informatique virtuel et des moyens permettant de convertir l'erreur détectée sur les ordinateurs virtuels en informations indiquant une erreur sur les ordinateurs (1, 2) et à rapporter ces informations aux secondes unités de traitement (11, 21). Ces secondes unités de traitement (11, 21) comportent des moyens permettant de notifier la génération de l'erreur rapportée.
PCT/JP2003/003522 2003-03-24 2003-03-24 Systeme informatique virtuel WO2004086225A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2003/003522 WO2004086225A1 (fr) 2003-03-24 2003-03-24 Systeme informatique virtuel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2003/003522 WO2004086225A1 (fr) 2003-03-24 2003-03-24 Systeme informatique virtuel

Publications (1)

Publication Number Publication Date
WO2004086225A1 true WO2004086225A1 (fr) 2004-10-07

Family

ID=33045114

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2003/003522 WO2004086225A1 (fr) 2003-03-24 2003-03-24 Systeme informatique virtuel

Country Status (1)

Country Link
WO (1) WO2004086225A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7918483B2 (en) 2005-07-22 2011-04-05 Thyssenkrupp Presta Ag Adjustable steering column for a motor vehicle

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6282440A (ja) * 1985-10-07 1987-04-15 Toshiba Corp 複合系電子計算機システム
JPH05265790A (ja) * 1992-03-19 1993-10-15 Yokogawa Electric Corp マイクロプロセッサ装置
WO1999003038A1 (fr) * 1997-07-11 1999-01-21 Marathon Technologies Corporation Detection de defaillance active
JPH1185714A (ja) * 1997-09-05 1999-03-30 Hitachi Ltd 計算機二重化システムの実行資源制御プログラム
WO1999026133A2 (fr) * 1997-11-14 1999-05-27 Marathon Technologies Corporation Systeme informatique presentant une resilience et une tolerance face aux defaillances

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6282440A (ja) * 1985-10-07 1987-04-15 Toshiba Corp 複合系電子計算機システム
JPH05265790A (ja) * 1992-03-19 1993-10-15 Yokogawa Electric Corp マイクロプロセッサ装置
WO1999003038A1 (fr) * 1997-07-11 1999-01-21 Marathon Technologies Corporation Detection de defaillance active
JPH1185714A (ja) * 1997-09-05 1999-03-30 Hitachi Ltd 計算機二重化システムの実行資源制御プログラム
WO1999026133A2 (fr) * 1997-11-14 1999-05-27 Marathon Technologies Corporation Systeme informatique presentant une resilience et une tolerance face aux defaillances

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7918483B2 (en) 2005-07-22 2011-04-05 Thyssenkrupp Presta Ag Adjustable steering column for a motor vehicle

Similar Documents

Publication Publication Date Title
US7313717B2 (en) Error management
US20040221198A1 (en) Automatic error diagnosis
US10846159B2 (en) System and method for managing, resetting and diagnosing failures of a device management bus
US11349733B2 (en) Method and system for automatic detection and alert of changes of computing device components
US7797394B2 (en) System and method for processing commands in a storage enclosure
US9798615B2 (en) System and method for providing a RAID plus copy model for a storage network
US11228518B2 (en) Systems and methods for extended support of deprecated products
US10853204B2 (en) System and method to detect and recover from inoperable device management bus
US11640377B2 (en) Event-based generation of context-aware telemetry reports
Shibin et al. On-line fault classification and handling in IEEE1687 based fault management system for complex SoCs
JP4640071B2 (ja) 情報処理装置、情報処理復旧方法及び情報処理復旧プログラム
US11126486B2 (en) Prediction of power shutdown and outage incidents
JP6828558B2 (ja) 管理装置、管理方法及び管理プログラム
WO2004086225A1 (fr) Systeme informatique virtuel
JP4495248B2 (ja) 情報処理装置、障害処理方法
US11307871B2 (en) Systems and methods for monitoring and validating server configurations
JP5335150B2 (ja) 計算機装置及びプログラム
JP2013254354A (ja) コンピュータ装置及びソフトウェア管理方法及びプログラム
Lee et al. NCU-HA: A lightweight HA system for kernel-based virtual machine
US11836100B1 (en) Redundant baseboard management controller (BMC) system and method
Lundin et al. Significant advances in Cray system architecture for diagnostics, availability, resiliency and health
WO2012114498A1 (fr) Appareil de traitement d'informations
US11742054B2 (en) Memory power fault resilience in information handling systems
US11422744B2 (en) Network-wide identification of trusted disk group clusters
JP5832408B2 (ja) 仮想計算機システム及びその制御方法

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): JP US

NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP