WO2004084484A1 - Procede de conversion cryptographique de donnees numeriques - Google Patents
Procede de conversion cryptographique de donnees numeriques Download PDFInfo
- Publication number
- WO2004084484A1 WO2004084484A1 PCT/RU2003/000098 RU0300098W WO2004084484A1 WO 2004084484 A1 WO2004084484 A1 WO 2004084484A1 RU 0300098 W RU0300098 W RU 0300098W WO 2004084484 A1 WO2004084484 A1 WO 2004084484A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- tsiφροvyχ
- dannyχ
- ποdsτanοvοκ
- uπρavlyaemyχ
- chτο
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
Definitions
- the invention is subject to electronic communications and computer technology, and it is personal to communications and electronic communications devices that are used to protect and secure communications.
- PBBCs allow for a few processing rounds, each of which is listed above.
- 3 Blag ⁇ da ⁇ ya is ⁇ lz ⁇ vaniyu u ⁇ avlyaem ⁇ y ⁇ e ⁇ atsii ⁇ e ⁇ es ⁇ an ⁇ v ⁇ i, ⁇ aya ⁇ bladae ⁇ b ⁇ lshim chisl ⁇ m m ⁇ di ⁇ i ⁇ atsy in s ⁇ s ⁇ be - ⁇ i ⁇ e d ⁇ s ⁇ igae ⁇ sya b ⁇ lee vys ⁇ aya ⁇ s ⁇ avneniyu with ⁇ assm ⁇ ennymi above anal ⁇ gami s ⁇ y ⁇ s ⁇ ⁇ lineyn ⁇ mu ⁇ i ⁇ analizu ⁇ i neb ⁇ lsh ⁇ m including ⁇ aund ⁇ v ⁇ e ⁇ b ⁇ az ⁇ vaniya.
- FIG. 7 schematic diagram of the widening of BCD using PBCD and C for the formation of an amplifying vector
- the discrete structure of each cycle is selected from the distribution of the required non-linearity of the converted and the consumable consumable.
- EXAMPLE 3 The 128-bit BCD is supported by widespread analogous initial data in Example 2 (Fig. 8). The distinction in the use of BCD in this case is included in that, in order to ensure the possibility of expanding the used BCD without knowing what is used 13 ⁇ m ⁇ schyu u ⁇ avlyayuscheg ⁇ ve ⁇ a, s ⁇ mi ⁇ vann ⁇ g ⁇ ⁇ ⁇ aund ⁇ v ⁇ mu ⁇ d ⁇ lyuchu ⁇ g] and PBTSD ⁇ 2 ⁇ sle cheg ⁇ ⁇ e ⁇ b ⁇ azuyu ⁇ PBTSD ⁇ 2 ⁇ m ⁇ schyu u ⁇ avlyayuscheg ⁇ ve ⁇ a, s ⁇ mi ⁇ vann ⁇ g ⁇ ⁇ ⁇ aund ⁇ v ⁇ mu ⁇ d ⁇ lyuchu ⁇ r1 and ⁇ e ⁇ b ⁇ az ⁇ vann ⁇ m
- the UESB implements the operation of a small-sized converter (() the source of a small signal is dependent on a small one).
- ⁇ a ⁇ ig. 86, 8c and 8d show a schematic illustration of the ESBD ⁇ 3 / b 8 2 / ⁇ and ⁇ 2/2 , respectively.
- the UESB of type ⁇ 2 / ⁇ and ⁇ 2/2 carry out the elementary installed accessories of type 2x2, and the UESB of type 3 / ⁇ - type 3x3.
- ⁇ sego ⁇ 14 there are 24 variants of the 2x2 and 40320 variants of the 3x3 downloads available.
- Encryption is an encryption process that includes encryption and expansion procedures. Partitioning is part of the encryption procedure, which is included in the process of converting the original signal to an encrypted part of the system.
- Variable Processor - A processable processor, which is used in connection with the process, is used as a separate signal.
Abstract
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2003266732A AU2003266732A1 (en) | 2003-03-17 | 2003-03-17 | Method for the cryptographic conversion of digital data blocks |
PCT/RU2003/000098 WO2004084484A1 (fr) | 2003-03-17 | 2003-03-17 | Procede de conversion cryptographique de donnees numeriques |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/RU2003/000098 WO2004084484A1 (fr) | 2003-03-17 | 2003-03-17 | Procede de conversion cryptographique de donnees numeriques |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004084484A1 true WO2004084484A1 (fr) | 2004-09-30 |
Family
ID=33029146
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/RU2003/000098 WO2004084484A1 (fr) | 2003-03-17 | 2003-03-17 | Procede de conversion cryptographique de donnees numeriques |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2003266732A1 (fr) |
WO (1) | WO2004084484A1 (fr) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5442705A (en) * | 1993-03-11 | 1995-08-15 | Nec Corporation | Hardware arrangement for enciphering bit blocks while renewing a key at each iteration |
DE19960047A1 (de) * | 1999-01-29 | 2000-08-17 | Ibm | Verfahren und Einheit zur sicheren Informationsbehandlung in einem kryptographischen Informationsverarbeitungssystem |
RU2188513C2 (ru) * | 1997-11-28 | 2002-08-27 | Открытое акционерное общество "Московская городская телефонная сеть" | Способ криптографического преобразования l-битовых входных блоков цифровых данных в l-битовые выходные блоки |
EP1292067A1 (fr) * | 2001-09-08 | 2003-03-12 | Amphion Semiconductor Limited | Appareil de cryptage/décryptage par blocs pour Rijndael/AES |
-
2003
- 2003-03-17 AU AU2003266732A patent/AU2003266732A1/en not_active Abandoned
- 2003-03-17 WO PCT/RU2003/000098 patent/WO2004084484A1/fr not_active Application Discontinuation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5442705A (en) * | 1993-03-11 | 1995-08-15 | Nec Corporation | Hardware arrangement for enciphering bit blocks while renewing a key at each iteration |
RU2188513C2 (ru) * | 1997-11-28 | 2002-08-27 | Открытое акционерное общество "Московская городская телефонная сеть" | Способ криптографического преобразования l-битовых входных блоков цифровых данных в l-битовые выходные блоки |
DE19960047A1 (de) * | 1999-01-29 | 2000-08-17 | Ibm | Verfahren und Einheit zur sicheren Informationsbehandlung in einem kryptographischen Informationsverarbeitungssystem |
EP1292067A1 (fr) * | 2001-09-08 | 2003-03-12 | Amphion Semiconductor Limited | Appareil de cryptage/décryptage par blocs pour Rijndael/AES |
Also Published As
Publication number | Publication date |
---|---|
AU2003266732A1 (en) | 2004-10-11 |
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