Current mirror
The present invention relates to a current mirror for generating a constant input current/output current ratio. The current mirror comprises an output transistor having a base, an emitter and a collector. A current flowing through the collector of said output transistor constitutes an output current of said current mirror. The collector of said output transistor is connectable to an output circuit.
Fig. 1 shows a simple current mirror according to the state of the art. An input current source supplying an input current Iin to an input conductor of the circuit is shown in Fig. 1. The input conductor is connected to the base of an output transistor Tout and the base and collector of an input transistor T;n. Thus, the input transistor may be regarded as a diode which has an anode connected to the input current source. The forward voltage drop across the base and emitter of the input transistor Tjn may be regarded as being constant for typical currents. The emitter of the input transistor T;n is connected to an input resistor Rιn that in turn is connected to ground potential. The collector current of the output transistor Tout constitutes the output current lout of the current mirror. The emitter of the output transistor Tout is connected to an output resistor Rout that in turn is connected to ground potential. An arbitrary output circuit (not shown) is connected to the collector of the output transistor Tout. Thus, an output voltage Uout between the collector of the output transistor Toutand ground potential is supplied. This output voltage Uout constitutes the supply voltage of the arbitrary output circuit. The output voltage depends in particular on the input impedance of the output circuit. The resistors Rjn and Rout are optional, i.e. the conventional current mirror may be implemented without using these resistors. In case resistors are not used the mirror ratio Iou./ Iin depends alone on the size of the transistors Tjn and Tout. Under normal operating conditions the mirror ratio K of the conventional current mirror may be determined by the following equation: K = Iout Iin = n/(l + n/B).
B is the current gain of both transistors Tou. and Tj„. The current gain of both transistors is chosen to be equal, n stands for the ratio between the emitter area of the output transistor Tout and the input transistor T;n. If input and output resistors Rin and Rout are used, the quotient Rjn/Rout is chosen to be equal to n. In this case the above equation also describes
the conventional current mirror containing input and output resistors. The output resistor Rout increases the output impedance of the current mirror and reduces the current noise. In order for the current mirror to work properly the collector-emitter voltage of the output transistor Uce(Tout) has to be larger than the saturation voltage of the output transistor UCe,sat(T0ut) and lower than the collector-emitter break down voltage Ubrce(T0ut) of tlie output transistor. If the collector-emitter voltage of the output transistor Uoe(Tout) exceeds the break down voltage due to fluctuations in the output voltage U0ut, the current mirror does not operate accurately anymore, i.e. the mirror ratio is changed. By increasing the voltage drop across the output resistor Rout the output voltage Uout may be increased, since Uout equals Uce(T0Ut) + Ur0ut. wherein Urout depicts the voltage drop cross the output resistor RoUt. As a draw back the minimum output voltage Uout is also increased. It is good to increase the output voltage range of the current mirror in order to provide for a stable and accurate operation of the current mirror, even if output voltage fluctuations occur. This can be achieved by providing an output transistor Tout that has a large collector-emitter break down voltage Ubrce (Tout)- However, modern silicon and silicon-germanium transistors used in integrated circuits are designed to operate at constantly increasing frequencies, which in turn leads to reducing the break down voltages of these transistors. It is therefore desirable to provide a current mirror that operates correctly even if the collector-emitter voltage of the output transistor UCe(T0ut) exceeds the break down voltage of the output transistor. When the output transistor Tout is operated in the break down region, an additional current flows from the collector of transistor Tout into its base. These base currents are generated because of an avalanche effect occurring at the base- collector junction of the transistor Tout. The size of the avalanche current is equivalent to: Iav = (M - l)Is*exp(Ube/Uτ). Ube stands for the base/emitter voltage of the output transistor Tout. UT is the temperature voltage of the output transistor. Is is the reverse saturation current of the output transistor. M is a factor that depends on the collector-base voltage of the output transistor Ucb(Tout). If the collector-base voltage of the output transistor is lower than the collector-base break down voltage, than the factor M is approximately equal to 1. The avalanche current may be neglected. Factor M may be calculated from: M = 1/[1 - (U0b(Tout) BVCBO)L]. The typical value for L is 3 and the BVCBO is the collector-base break down voltage at open emitter. As can be seen from this formula, factor M approaches infinity for U<b(T0Ut) close to the collector-base break down voltage BVCBO. If the avalanche current is taken into account, the mirror ratio of the current mirror according to Fig. 1 may be described by the following formula:
K = Iout/Im = n*M/[l + n B - n (M - 1)].
Since M depends on the collector base voltage of the output transistor UCb(T0Ut) the mirror ratio depends on the output voltage. The avalanche current flowing into the base of the output transistor Tout reduces the base current of the output transistor Tout. Since the current source in Fig. 1 produces a constant current, which is equivalent to the base current of the output transistor and the current flowing through the input resistor Rm, a reduction in the base current of the output transistor is compensated by an increase of the current flowing through the input resistor Rιn. An increased current flow through the input resistor R,„ in rum leads to an increased voltage drop cross the input resistor, since U = R I. A constant voltage drop across the base emitter junction of the input transistor Tm may be assumed under normal operating conditions. Therefore, the base voltage of the output transistor Tout increases. Finally, the increased base voltage of the output transistor increases the collector current (=output current) of the output transistor Tout- In order to prevent an increase of the output current, the base voltage of the output transistor must be maintained on a constant level. An improved current mirror according to the state of the art is shown in Fig. 2.
In Figures 1 and 2 the same reference signs depict the same components. In Fig. 2 a buffer transistor Tbutr and a buffer resistor Rbuff have been added to the circuit of Fig. 1. The base of the buffer transistor Tbutr is connected to the input conductor of the input current source Im. The collector of the buffer transistor Tbuffis connected to an input voltage source providing a constant input voltage Um. The emitter of said buffer transistor connects with the base of the output transistor Tout and the buffer resistor Rbuff. The resistors Rm, Rbutr and RoUt are all connected to ground potential. The size of the input transistor Tm and the size of the buffer transistor Tbutr are dimensioned in such a way, that the base current flowing into the buffer transistor is negligible compared to the current flowing through the input transistor Tm. Therefore, the base voltage of the buffer transistor Tbutr is approximately equal to Rιn * Im plus a constant voltage drop across the input transistor T,n. The base voltage of the buffer transistor Tbutr may be assumed to be constant. The input voltage source, the buffer transistor Tbutr and the buffer resistor Rbutr constitute as a first approximation a current source providing a fairly constant current flowing through the buffer resistor Rbutr- As long as the current flowing through the buffer resistor Rb tr is held constant, the base voltage of the output transistor is left unchanged. The primary purpose of inserting the buffer transistor and the buffer resistor into the current mirror is to maintain a constant base voltage at the output transistor Tout, even if a negative avalanche current is inserted into the buffer of the output transistor. The effect of a negative base current in the output transistor Tout due to an
avalanche break down on the circuit of Fig. 2 may be explained in detail in the following way. The negative base current adds to the current flowing through the buffer resistor Rbuff. Consequently, the emitter voltage of the buffer transistor is raised. Since the base voltage of the buffer transistor Tbutr is approximately constant, a rise in the emitter voltage of the transistor Tbutr leads to a reduced base emitter voltage drop at the buffer transistor Tbutr- As a consequence the emitter current of the buffer transistor Tbuff is reduced. The current mirror of Fig. 2 has several drawbacks. The current flowing constantly through the buffer resistor Rbutr leads to increased power dissipation of the current mirror. The functioning of the circuit is limited by the size of the current flowing through the buffer transistor Rbuff. If the negative base current flowing to the base of the output transistor Tout is equal to a larger than the current flowing through the buffer resistor under normal operating conditions, an increase in the buffer current cannot be compensated by reducing the emitter current emanating from the buffer transistor Cbut . In order to reduce the power dissipation of the circuit of Fig. 2, the buffer current has to be reduced. In order to compensate for large negative base currents of the output transistor Cout, the buffer current has to be increased. Consequently an improvement in the maximum output voltage Uout can only be obtained at the cost of extra power dissipation.
It is therefore object of the present invention to provide a current mirror for generating a constant mirror ratio that has reduced power dissipation and operates accurately for a large output voltage range.
The problem is solved by a current mirror for generating a constant mirror ratio comprising an output transistor. The current flowing through the collector of the output transistor constitutes the output current of the current mirror. The collector of said output transistor may be used to supply a current to an arbitrary output circuit. Thus, an output voltage will be supplied to the collector of the output transistor. The output voltage will in general be depending on the arbitrary output circuit. The current mirror comprises an output voltage dependent bias current generator, which is connected to the base of the output transistor. The bias current generator generates a bias current in a bias conductor connected to the base of the output transistor. The bias current depends on the output voltage. In other words, the output voltage controls the bias current generated by the bias current generator. The purpose of the bias current generator is to prevent an avalanche base current from affecting the base-emitter voltage of the output transistor and thereby increase the output current. The output voltage of the current mirror is related to the avalanche base current of the output transistor. The output voltage controls both the avalanche current in the
base of the output transistor and the value of the bias current generated by the bias current generator. If the bias current is chosen to be approximately equal to the avalanche base current of the output transistor, the avalanche base current does not affect the output current of the current mirror. Whenever an avalanche current flows into the base of the output transistor this current is guided trough the bias conductor by the bias current generator.
Therefore the output transistor may be operated with collector emitter voltages exceeding the collector-emitter break down voltage BVCEO without affecting the accuracy of the current mirror. Since the bias current may be approximately zero for low output voltages, the power dissipation is reduced at low output voltages. Preferably the bias current generator of the current mirror according to the present invention is adapted to generating no bias current until the output voltage has reached a predetermined value. This value corresponds preferably to the minimum output voltage generating a negative base current in the output transistor. An additional current mirror, called the bias current mirror, may generate the bias current. Therefore, the bias current is controlled by the input current into the bias current mirror. If the input current to the bias current mirror is a function of the output voltage, then the bias current mirror generates a bias current depending on the value of the output voltage. The output voltage is transformed into an input current to the bias current mirror by connecting the input of the bias current with the output voltage via a bias resistor. In order to define the predetermined value, whereupon the bias current is generated, one or plural bias diodes may be connected in line with the bias current mirror input and the bias resistor. Any type of diode may be chosen such as PN-diodes, NPN-diodes, PNP-diodes or Schottky-diodes. The input current into a bias current mirror is approximately zero as long as the voltage drop between the output voltage and the bias current mirror input is lower than the sum of the forward voltages of the base diodes. Therefore, no bias current is generated until the output voltage has exceeded a predetermined value.
The current mirror according to the present invention may comprise a buffer adapted to generating a constant buffer current and a buffer conductor connected to the base of the output transistor. The buffer may comprise a buffer resistor and a buffer transistor connected to an input voltage source as depicted in Fig. 2. The buffer represents an additional way of compensating the negative base currents of the output transistor. Therefore the operating range for the output voltage can be increased even further. Preferred embodiments of the present invention are described with reference to the appended figures hereafter.
Fig. 1 shows a simple current mirror according to the stale of the art,
Fig. 2 shows a current mirror with a buffer according to the state of the art,
Fig. 3 shows a first embodiment of the current mirror according to the present invention,
Fig. 4 shows a second embodiment of the current mirror according to the present invention, and
Fig. 5 shows a third embodiment of the current mirror according to the present invention.
In all figures 1 to 5 an output current Iout is provided to an arbitrary output circuit (not shown). The collector of the output transistor Uout is connected to the output circuit. The output circuit is connected to ground potential. Thus Uout constitutes both the output voltage of the current mirrors shown in Fig. 1 to 5 and the voltage supplied to the arbitrary output circuit. The size of the output voltage Uout depends on the output circuit and particularly on the input impedance of the output circuit.
The first embodiment of the present invention shown in Fig. 3 comprises a conventional current mirror 18 as shown in Fig. 1 and a bias current generator 12. Identical reference signs in Fig. 1 and 3 depict the same components. Please refer to the chapter state of the art for a detailed description of the conventional current mirror 18. The bias current generator 12 is connected via a bias conductor with the base of the output transistor Tout- The output voltage Uout of the conventional current mirror 18 is connected with the bias current generator 12, in order to control the bias current lb, which is generated in the bias conductor. At a predetermined output voltage Uout the collector-emitter voltage at the output transistor Tout is equal to or larger than the collector-emitter break down voltage of the output transistor Tout- As a result a negative base current is injected into the base of the output transistor T0ut- The bias current generator is adapted to generate a bias current, if the output voltage exceeds the predetermined output voltage Uout generating the negative base current in the output transistor T0llt. The bias current is approximately equal to the current injected into the base of the output transistor Tout. Thus the negative base current of the output transistor Tout does not add to the current flowing through the input resistor R;n. The base voltage of the output transistor Tou is held constant, even if a negative base current is injected into its base. The
bias current generator 12 comprises a simple current mirror 10. An output current of the current mirror 12 constitutes the bias current lb of the bias current generator 12. The bias current mirror comprises a bias output transistor 14. The collector of the bias output transistor 14 is connected to the base of the output transistor Tout via the bias conductor. The base voltage of the output transistor Tout constitutes an output voltage of the bias current mirror 10. The bias current mirror 10 comprises a bias input transistor 16. The base and collector of the bias input transistor 16 are connected to the base of the bias output transistor 14. The input current of the bias current mirror 10 is formed by the sum of the currents flowing through the base and collector of the input transistor 16. The bias current mirror corresponds to the conventional current mirror 18 without input resistor Rιn and output resistor Rout. The current ratio of the bias current mirror is determined by the emitter area ratio of the output transistor 14 and input transistor 16 of the bias current mirror. Since the base voltage of the output transistor Tout is lower than the output voltage Uout, the output voltage of the bias current mirror 10 is lower than the output voltage Uout of the conventional current mirror 18. The bias current mirror is designed to operate under normal working conditions, i.e. the collector- emitter voltage of the output transistor 14 of the bias current mirror is greater than the saturation voltage and lower than the collector-emitter break down voltage of the output transistor 14. An increase of the input current of the bias current mirror 10 leads to a proportional increase of the output c rent lb. Finally the output voltage Uout is connected to the input of the current mirror 10 via a bias resistor R and a bias diode Db. As a first approximation, the bias diode Db and the transistor 16 functioning as npn-diode do not to conduct any current unless their forward voltage is reached. The predetermined value for the output voltage corresponds to the sum of the forward voltages of the diode Db and the npn- diode 16. No bias current lb is generated unless the predetermined value for the output voltage is reached or exceeded. The input current of the bias current mirror 10 corresponds to (Uout - FV(Db) - FV(16))/RD, wherein FV stands for the forward voltages of the bias diode Db and the npn-diode 16.
Fig. 4 shows a second embodiment of the present invention. The bias current generator 12 of Fig. 3 is connected to another current generator 20 comprising a buffer transistor Tr-Uff and a current resistor RBUIΪ- The bias current generator 12 is connected to the base and collector of the output transistor Tout in the same way as in Fig. 3. As in the circuit of Fig. 2, the buffer transistor TButr is biased with a fixed current flowing through transistor 22 and the buffer resistor Rβuff- A negative base current of the output transistor Tout adds to the current flowing through the buffer resistor Rsuff- If the output voltage Uout is greater than
the voltage drop across the output resistor Rout added to the collector-emitter break down voltage of the output transistor Tout, the base current of the output transistor Tout decreases and consequently the emitter current of the buffer transistor TβUff lowers. The current mirror 20 alone would become non-functional if the negative base current of the output transistor Tout is equal to or greater than the fixed buffer current. The voltage at the base of the output transistor Tout would rise and the base-emitter junction of the buffer transistor TβUff would become reverse biased. The voltage at the collector of the input transistor Tm would drop and the input transistor T,n would come into saturation region. Owing to the use of the bias current generator 12 the current mirror 20 may be operated at larger output voltages and larger negative base currents. If the output voltage Uout approaches the predetermined value, the negative base current equals approximately the fixed buffer current of the current mirror 20. The bias current generator 12 is dimensioned in such a way that a bias current lb is generated, if the predetermined value for the output voltage Uout is reached. Therefore, the maximum output voltage for the current mirror according to the second embodiment is larger than the maximum output voltage of the current mirror 20 alone. The bias current generator 12 may be used with a current mirror of Fig. 2 instead of the current mirror 20 in Fig. 4.
Fig. 5 shows a third embodiment of the current mirror according to the present invention. The third embodiment comprises a current mirror 24, which represents an improvement of the current mirror of Fig. 2. The bias current generator 12 is connected to the output transistor Tout in the same way as in Fig. 3 and 4. The current mirror comprises a buffer 26 that contains both npn-transistors 30, 32 and pnp-transistors 34, 36. A current source 38 is included in the buffer 26 in order to generate a buffer reference current Ibr. The buffer reference current Ibr can be either independent of the input voltage Uιn or increase with the input voltage Um in order to compensate for negative base currents of the output transistor Tout at high output voltages Uout. Compared to the buffer from Fig. 2 the buffer 26 has half the output impedance for a given bias current K*IBΓ. The bias current K*IBΓ is the current flowing in the collector of transistor 36.
It is clear to the person skilled in the art, that the present invention may be implemented in various ways not explicitly mentioned in this application. The previous embodiments are only exemplary and do not limit the scope of the invention. The invention is defined by the following claims.