WO2004021414A3 - Integrated circuit arrangements, in particular capacitor arrangements and corresponding production method - Google Patents
Integrated circuit arrangements, in particular capacitor arrangements and corresponding production method Download PDFInfo
- Publication number
- WO2004021414A3 WO2004021414A3 PCT/DE2003/002677 DE0302677W WO2004021414A3 WO 2004021414 A3 WO2004021414 A3 WO 2004021414A3 DE 0302677 W DE0302677 W DE 0302677W WO 2004021414 A3 WO2004021414 A3 WO 2004021414A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- arrangements
- integrated circuit
- production method
- corresponding production
- particular capacitor
- Prior art date
Links
- 239000003990 capacitor Substances 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000005530 etching Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28568—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
An integrated circuit arrangement (12) is disclosed, amongst other things, in which the thickness (D2a) of an etching stop layer (18a) is matched to the etching process such that contact holes (26, 28) of varying depths can be precisely etched as far as a top electrode (16a) and a base electrode (10a).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10236890.2 | 2002-08-12 | ||
DE2002136890 DE10236890A1 (en) | 2002-08-12 | 2002-08-12 | Integrated circuit arrangements, in particular capacitor arrangements, and associated manufacturing processes |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2004021414A2 WO2004021414A2 (en) | 2004-03-11 |
WO2004021414A3 true WO2004021414A3 (en) | 2004-07-29 |
Family
ID=31196968
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2003/002677 WO2004021414A2 (en) | 2002-08-12 | 2003-08-08 | Integrated circuit arrangements, in particular capacitor arrangements and corresponding production method |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE10236890A1 (en) |
TW (1) | TW200405548A (en) |
WO (1) | WO2004021414A2 (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0465044A2 (en) * | 1990-06-27 | 1992-01-08 | AT&T Corp. | Method of etching for integrated circuits with planarized dielectric |
US6211059B1 (en) * | 1999-10-29 | 2001-04-03 | Nec Corporation | Method of manufacturing semiconductor device having contacts with different depths |
EP1109223A1 (en) * | 1999-12-13 | 2001-06-20 | Matsushita Electronics Corporation | Semiconductor device and method for fabricating the same |
US20020033493A1 (en) * | 2000-09-21 | 2002-03-21 | Tomomi Yamanobe | Semiconductor storage device and its manufacturing method |
WO2002058117A2 (en) * | 2001-01-17 | 2002-07-25 | International Business Machines Corporation | Metal-insulator-metal capacitor in copper |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3149817B2 (en) * | 1997-05-30 | 2001-03-26 | 日本電気株式会社 | Semiconductor device and method of manufacturing the same |
US5906948A (en) * | 1998-04-17 | 1999-05-25 | Vanguard International Semiconductor Corporation | Method for etching high aspect-ratio multilevel contacts |
WO2002003458A1 (en) * | 2000-06-30 | 2002-01-10 | Sony Corporation | Semiconductor device and its manufacturing method |
-
2002
- 2002-08-12 DE DE2002136890 patent/DE10236890A1/en not_active Withdrawn
-
2003
- 2003-07-08 TW TW92118641A patent/TW200405548A/en unknown
- 2003-08-08 WO PCT/DE2003/002677 patent/WO2004021414A2/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0465044A2 (en) * | 1990-06-27 | 1992-01-08 | AT&T Corp. | Method of etching for integrated circuits with planarized dielectric |
US6211059B1 (en) * | 1999-10-29 | 2001-04-03 | Nec Corporation | Method of manufacturing semiconductor device having contacts with different depths |
EP1109223A1 (en) * | 1999-12-13 | 2001-06-20 | Matsushita Electronics Corporation | Semiconductor device and method for fabricating the same |
US20020033493A1 (en) * | 2000-09-21 | 2002-03-21 | Tomomi Yamanobe | Semiconductor storage device and its manufacturing method |
WO2002058117A2 (en) * | 2001-01-17 | 2002-07-25 | International Business Machines Corporation | Metal-insulator-metal capacitor in copper |
Also Published As
Publication number | Publication date |
---|---|
DE10236890A1 (en) | 2004-03-04 |
TW200405548A (en) | 2004-04-01 |
WO2004021414A2 (en) | 2004-03-11 |
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