DRIVING OF A LIQUID CRYSTAL DISPLAY
The invention relates to a driver circuit for driving a LCD display, a method of driving a LCD display, and to a display apparatus comprising such a driver circuit.
JP-A-04050997 discloses a liquid crystal display control circuit which reduces the electric power consumption of the liquid crystal display in a standby state. In the standby state, a low frequent oscillator is used to AC-drive the liquid crystal display at a frequency which is low with respect to a frequency used during normal operation.
It is a drawback of this control circuit that at low .frequencies a flicker becomes visible.
It is an object of the invention to provide a driver circuit for driving a LCD display which enables a low power consumption mode with an improved flicker behavior. A first aspect of the invention provides a driver circuit for driving a LCD display as claimed in claim 1. A second aspect of the invention provides a method of driving a LCD display as claimed in claim 5. A third aspect of the invention provides a display apparatus comprising a driver circuit for driving a LCD display as claimed in claim 6. Advantageous embodiments are defined in the dependent claims. The LCD display has a matrix of display cells which have a transmission characteristic changing from minimum transmission at a first voltage level across the display cells to a maximum transmission at a second voltage level across the display cells. The driver circuit comprises a drive voltage circuit which supplies a drive voltage across the display cells having two drive voltage values only, a first drive voltage -value is selected to obtain a minimum transmission, and a second drive voltage value is selected to obtain a maximum transmission. A difference between trie first drive voltage value and the second drive voltage is larger than a difference between the first voltage level and the second voltage level.
The drive voltage has two levels only. Consequently, in a color display this means that only 8 colors can be displayed. The two levels of the drive voltage are selected to
overdrive the display cells. The drive voltage which causes the minimum transmission is selected such that the drive voltage is allowed to change in a predetermined voltage range towards the maximum transmission without substantially changing the minimum transmission of the display cells. Thus in the predetermπxed voltage range the transmission of the display cells stays substantially at the minimum transmission. The drive voltag;e which causes the maximum transmission is selected such that trie drive voltage is allowed to change in a predetermined voltage range towards the minimum transmission without substantially changing the maximum transmission of the display cells. Thus in the predetermined voltage range the transmission of the display cells stays substantially at the maximum tran-smission. As the display cells are addressed once in an addressing period of ttie total display to receive an appropriate drive voltage, the display cells have to store the appropriate drive voltage during the addressing period. The display cells are not completely isolated outside the addressing period, thus, some charge stored in the display cells will leak away and the voltage across the cell changes. In prior art LCD display driving, the changing voltage causes a change in the transmission. The difference in transmission of the display cells at the instant they are addressed and at the end of the addressing period (usually a field period) may cause flicker. The flicker will be more visible the longer the addressing period lasts because the difference in transmission becomes larger. Moreover, human visτιal perception is more sensitive to lower frequencies. The overdriving of the display cells allows an amount of leakage o charge to occur without substantially affecting the transmission of the display cells. Consequently, the flicker will become substantially less for a same addressing period, or a longer ad<iressing period (or a lower refresh rate) is allowed before the flicker becomes annoyingly "visible. The advantage of a long addressing period is that the charging or de-charging of the display cells has to occur less often and thus the dissipation in the LCD display decreases.
To conclude, the overdriving of the display cells enables to decrease the refresh rate without observing an annoying flicker.
In an embodimerxt as defined in claim 2, the LCD display is driven, in a known line inversion mode. However, as overdriving is applied, due to the low leakage very low refresh rates are possible without an annoyingly visible line flicker.
In an embodiment as defined in claim 3, the low refresh rate during the low power mode of the LCD display is obtained by skipping fields. For example, onhy once in ten fields, an addressing of the display cells is performed. During the other fields, the LCD display is not addressed and the power consumption is "very low. The skipping of complete
fields is simple as the usual way of addressing can be used in the non-skipped fields. Usually, the field is the period in time the complete picture to be displayed is supplied to the LCD display. If an interlaced display is required, the field period may alternatively either compxrise the odd or the even rows of the picture. In an embodiment as defined in claim 4, the LCD display is driven in a known frame inversion mode. However, as overdriving is applied, due to low leakage a lower refresh rates is possible as in the prior axt without an annoyingly visible field flicker. It is even possible to display streaming video at a low refresh rate without an annoyingly visits le frame flicker. These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.
In the drawings: Fig. 1 shows a block diagram of a LCD apparatus in accordance with the invention,
Fig. 2 shows a transmission characteristic of a LCL cell, and Figs. 3 show waveforms for elucidating the operation of the LCD apparatms of Fig. 1.
Fig. 1 shows a block diagram of a LCD apparatus in accordance with the invention. The LCD apparatus comprises a matrix of liquid crystal cells 100 which are associated with intersections of data electrodes 10 and select electrodes 11. A data driver 3 receives input data DA, for example a digital video signal, and supplies data voltages NDi (ND1 to VDm) to the data electrodes 10. A select driver 2 supplies select pulses NSj (NS1 to VSn) to the select electrodes 11.
A controller circuit 4 receives horizontal synchronization pulses HSY and. vertical synchronization pulses NSY belonging to the video signal DA, and supplies the timing information CS2 to the data driver 3, and the timing information CSl to the select driver 2. The controller circuit 4 controls the select driver 2 to successively select the select electrodes 11 during a field period TF (shown in Fig. 3) between two consecutive vertical synchronization pulses NSY. Usually, one of the select electrodes 11 is selected during at. line period occurring between two consecutive horizontal synchronization pulses HSY. The
controller circuit 4 further controls the data driver 3 to supply the data voltages NDi to the display cells 100 associated with the selected select electrode 11.
The controller circuit 4 comprises a timer 40 which receives the vertical synchronization signal NSY to control the select driver 2 and the data driver- 3 to address the LCD display 1 only once out of an integer number of fields. For example, trie data in the LCD cells 100 is refreshed every tenth field. For an input video with a field repetition frequency of 50Hz, this causes a refresh of the data in the LCD cells at a refresh frequency of 5Hz. If this low refresh rate is combined with the known line inversion drive wherein the voltage across the LCD cells 100 changes polarity in successive lines, and is combined with the overdriving in accordance with the invention, the flicker is not annoyingly visible. Further, it appeared that a very acceptable amount of flicker occurs if the overdriving is combined with the known field inversion wherein the voltage across the LCD cells 100 changes polarity in successive fields at field repetition, frequencies of 40Hz. Without the overdriving, a field repetition frequency of about 60 to 70 Hz is required to obtain the same perception of the amount of flicker.
The video processor 5 receives a composite video signal DI, and supplies the input data DA, the horizontal synchronization signal HSY and the vertical synchronization signal NSY. The video processor 5 may receive separate video data and synchronization signals. Fig. 2 shows a transmission characteristic TC of a display cell 100. The amount of transmission TR is denoted along the vertical axis as a percentage. The horizontal axis denotes the voltage NDC across the display cell 100.
The transmission characteristic TR is symmetrical with respect to the voltage NDC across the display cell 100. The same transmission TR occurs independent on the polarity of the voltage NDC. hi the example shown, the display cell has a full transmission if the absolute voltage across the display cell 100 is lower than the second voltage level NL2. A zero transmission occurs if the absolute voltage across the display cell 100 is larger than the first voltage level NL1. The difference between the first voltage level NL1 ^and the second voltage level NL2 is denoted by DI1. Instead of such a normally-white LCD, also a normally- black LCD can be used.
The overdriving is obtained by selecting a first drive voltage NDR1 which has an absolute value larger than the absolute value of the first voltage level VLl, and by selecting a second drive voltage NDR2 which has an absolute value smaller- than the absolute
value of the second voltage level NL2. The difference between the first drive voltage NDR1 and the second drive voltage NDR2 is denoted by DI2.
A display cell 100 in which the first drive voltage NDR1 is stored, will keep the minimum transmission until the voltage drops below the first voltage level VLL . A display cell 100 in which the first drive voltage NDR2 is stored, will keep the maximum transmission until the voltage rises above the second voltage level NL2. In prior art LCD displays, the drive voltages are in the range from NL1 to NL2 to be able to display multiple colors with an optimal linearity. In an embodiment in accordance with the invention the drive voltage has one of the two extreme values NDR1 or NDR2. In a LCD display with display cells 100 associated with three primary colors (usually Red, Green, and Blue) only 8 colors can be produced. However, due to the overdriving, the charge in the display cells 1 00 may leak much more before the transmission TR starts changing substantially. Consequently, a same amount of flicker as in the prior art will occur at a much lower refresh rate.
Figs. 3 show waveforms for elucidating the operation of the LCD apparatus of Fig. 1. Fig. 3 A shows the select voltages NS1, NS2, ..., VSn during a normal operating condition of the LCD apparatus, wherein the refresh period TR1 is equal to the field period TF . Fig. 3B shows the select voltages VS1, VS2, ..., VSn dαiring a low power operating state of the LCD apparatus. In this example, the LCD display is driven in the field inversion mode: the polarity of the select voltages NS1, NS2, ..., NSn changes every field TF and every line as shown in Fig. 3 A. The polarity of the data voltages VDl to NDm supplied to the selected select electrode 11 is opposite to the corresponding one of ttie select voltages VS1-, NS2, ..., NSn.
Fig. 3B shows a refresh period TR2 which is a factor 2 larger than tl e refresh period TR1 shown in Fig. 3 A. Other factors are possible. It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be a.ole to design many alternative embodiments without departing from the scope of the appended claims.
For example, the LCD may be of a type which has a minimal transmission when the absolute value of the voltage across the display cell 100 is smaller than Che voltage NL2. The maximum transmission is obtained at voltages aczross the display cell with an absolute value larger than the voltage NL1. The minimum transmission may be larger than zero, and the maximum transmission may be less than 100 .
The invention is also useful for the known combined line and field inversion drive schemes. However the lowest power consumption will be reached at field inversion only.
In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps other than those listed in a claim. The invention can be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the device claim enumerating several means, several of these means can be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.