WO2003081664A3 - Method for transferring elements between substrates - Google Patents

Method for transferring elements between substrates Download PDF

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Publication number
WO2003081664A3
WO2003081664A3 PCT/FR2003/000905 FR0300905W WO03081664A3 WO 2003081664 A3 WO2003081664 A3 WO 2003081664A3 FR 0300905 W FR0300905 W FR 0300905W WO 03081664 A3 WO03081664 A3 WO 03081664A3
Authority
WO
WIPO (PCT)
Prior art keywords
substrates
transferring elements
degradation
bonding layer
substrate
Prior art date
Application number
PCT/FR2003/000905
Other languages
French (fr)
Other versions
WO2003081664A2 (en
Inventor
Bernard Aspar
Olivier Rayssac
Franck Fournel
Original Assignee
Commissariat Energie Atomique
Bernard Aspar
Olivier Rayssac
Franck Fournel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat Energie Atomique, Bernard Aspar, Olivier Rayssac, Franck Fournel filed Critical Commissariat Energie Atomique
Priority to JP2003579275A priority Critical patent/JP2005532674A/en
Priority to US10/508,917 priority patent/US20050178495A1/en
Priority to EP03725311A priority patent/EP1493181A2/en
Publication of WO2003081664A2 publication Critical patent/WO2003081664A2/en
Publication of WO2003081664A3 publication Critical patent/WO2003081664A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Particle Formation And Scattering Control In Inkjet Printers (AREA)
  • Dicing (AREA)

Abstract

The invention concerns a method for transferring at least an element from a donor substrate to a target substrate (40). The invention is characterized in that it consists in securing the element to a handle-substrate via a bonding layer (32) capable of degradation and in producing a degradation of the bonding layer during a step which consists in releasing the element to be transferred. The invention is applicable to the transfer of components.
PCT/FR2003/000905 2002-03-25 2003-03-21 Method for transferring elements between substrates WO2003081664A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2003579275A JP2005532674A (en) 2002-03-25 2003-03-21 Method for transferring elements from substrate to substrate
US10/508,917 US20050178495A1 (en) 2002-03-25 2003-03-21 Method for transferring elements between substrates
EP03725311A EP1493181A2 (en) 2002-03-25 2003-03-21 Method for transferring elements between substrates

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR02/03693 2002-03-25
FR0203693A FR2837620B1 (en) 2002-03-25 2002-03-25 METHOD FOR TRANSFERRING SUBSTRATE SUBSTRATE ELEMENTS

Publications (2)

Publication Number Publication Date
WO2003081664A2 WO2003081664A2 (en) 2003-10-02
WO2003081664A3 true WO2003081664A3 (en) 2004-04-01

Family

ID=27799237

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2003/000905 WO2003081664A2 (en) 2002-03-25 2003-03-21 Method for transferring elements between substrates

Country Status (5)

Country Link
US (1) US20050178495A1 (en)
EP (1) EP1493181A2 (en)
JP (1) JP2005532674A (en)
FR (1) FR2837620B1 (en)
WO (1) WO2003081664A2 (en)

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FR2842647B1 (en) * 2002-07-17 2004-09-17 Soitec Silicon On Insulator LAYER TRANSFER METHOD
FR2850390B1 (en) 2003-01-24 2006-07-14 Soitec Silicon On Insulator METHOD FOR REMOVING A PERIPHERAL GLUE ZONE WHEN MANUFACTURING A COMPOSITE SUBSTRATE
US7122095B2 (en) 2003-03-14 2006-10-17 S.O.I.Tec Silicon On Insulator Technologies S.A. Methods for forming an assembly for transfer of a useful layer
JP4610982B2 (en) * 2003-11-11 2011-01-12 シャープ株式会社 Manufacturing method of semiconductor device
FR2866982B1 (en) * 2004-02-27 2008-05-09 Soitec Silicon On Insulator METHOD FOR MANUFACTURING ELECTRONIC COMPONENTS
FR2866983B1 (en) * 2004-03-01 2006-05-26 Soitec Silicon On Insulator REALIZING AN ENTITY IN SEMICONDUCTOR MATERIAL ON SUBSTRATE
EP1571705A3 (en) 2004-03-01 2006-01-04 S.O.I.Tec Silicon on Insulator Technologies Process of making a semiconductor structure on a substrate
DE102004048202B4 (en) * 2004-09-30 2008-05-21 Infineon Technologies Ag Method for separating surface-mountable semiconductor components and for equipping them with external contacts
FR2877142B1 (en) * 2004-10-21 2007-05-11 Commissariat Energie Atomique METHOD OF TRANSFERRING AT LEAST ONE MICROMETRIC OR MILLIMETRIC SIZE OBJECT USING A POLYMER HANDLE
FR2895562B1 (en) 2005-12-27 2008-03-28 Commissariat Energie Atomique METHOD FOR RELAXATION OF A CONCEALED THIN LAYER
JP2007251080A (en) * 2006-03-20 2007-09-27 Fujifilm Corp Fixing method for plastic substrate, circuit substrate, and manufacturing method therefor
JP4958287B2 (en) * 2007-05-30 2012-06-20 東京応化工業株式会社 Peeling method in peeling device
US7520951B1 (en) 2008-04-17 2009-04-21 International Business Machines (Ibm) Corporation Method of transferring nanoparticles to a surface
FR2935537B1 (en) * 2008-08-28 2010-10-22 Soitec Silicon On Insulator MOLECULAR ADHESION INITIATION METHOD
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
FR2943177B1 (en) 2009-03-12 2011-05-06 Soitec Silicon On Insulator METHOD FOR MANUFACTURING A MULTILAYER STRUCTURE WITH CIRCUIT LAYER REPORT
FR2947380B1 (en) 2009-06-26 2012-12-14 Soitec Silicon Insulator Technologies METHOD OF COLLAGE BY MOLECULAR ADHESION.
US9847243B2 (en) 2009-08-27 2017-12-19 Corning Incorporated Debonding a glass substrate from carrier using ultrasonic wave
JP5590837B2 (en) * 2009-09-15 2014-09-17 キヤノン株式会社 Relocation of functional areas
EP2339614A1 (en) * 2009-12-22 2011-06-29 Imec Method for stacking semiconductor chips
JP5943544B2 (en) * 2010-12-20 2016-07-05 株式会社ディスコ Manufacturing method of laminated device and laminated device
CN104507853B (en) 2012-07-31 2016-11-23 索泰克公司 The method forming semiconductor equipment
DE102014014422A1 (en) * 2014-09-29 2016-03-31 Siltectra Gmbh Combined wafer production process with a hole-containing receiving layer
FR3137491A1 (en) * 2022-06-30 2024-01-05 Commissariat à l'Energie Atomique et aux Energies Alternatives Process for manufacturing a paved structure
FR3140707A1 (en) * 2022-10-06 2024-04-12 Soitec METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING PAVERS

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0703609A1 (en) * 1994-09-22 1996-03-27 Commissariat A L'energie Atomique Process of manufacturing a structure having a thin semiconductor layer on a substrate
US5618739A (en) * 1990-11-15 1997-04-08 Seiko Instruments Inc. Method of making light valve device using semiconductive composite substrate
EP0924769A1 (en) * 1997-07-03 1999-06-23 Seiko Epson Corporation Method of transferring thin film devices, thin film device, thin film integrated circuit device, active matrix substrate, liquid crystal display, and electronic apparatus
EP0977252A1 (en) * 1998-07-30 2000-02-02 Commissariat A L'energie Atomique Selective transfer of elements from one support to another support
EP1041624A1 (en) * 1999-04-02 2000-10-04 Interuniversitair Microelektronica Centrum Vzw Method of transferring ultra-thin substrates and application of the method to the manufacture of a multilayer thin film device
FR2796491A1 (en) * 1999-07-12 2001-01-19 Commissariat Energie Atomique METHOD FOR TAKING OFF TWO ELEMENTS AND DEVICE FOR IMPLEMENTING SAME
US6232136B1 (en) * 1990-12-31 2001-05-15 Kopin Corporation Method of transferring semiconductors

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US5455202A (en) * 1993-01-19 1995-10-03 Hughes Aircraft Company Method of making a microelectric device using an alternate substrate
US5591678A (en) * 1993-01-19 1997-01-07 He Holdings, Inc. Process of manufacturing a microelectric device using a removable support substrate and etch-stop
US6214733B1 (en) * 1999-11-17 2001-04-10 Elo Technologies, Inc. Process for lift off and handling of thin film materials
JP2002075915A (en) * 2000-08-25 2002-03-15 Canon Inc Device and method for separating sample
US6638835B2 (en) * 2001-12-11 2003-10-28 Intel Corporation Method for bonding and debonding films using a high-temperature polymer
FR2842650B1 (en) * 2002-07-17 2005-09-02 Soitec Silicon On Insulator PROCESS FOR PRODUCING SUBSTRATES, IN PARTICULAR FOR OPTICS, ELECTRONICS OR OPTO-ELECTRONICS

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5618739A (en) * 1990-11-15 1997-04-08 Seiko Instruments Inc. Method of making light valve device using semiconductive composite substrate
US6232136B1 (en) * 1990-12-31 2001-05-15 Kopin Corporation Method of transferring semiconductors
EP0703609A1 (en) * 1994-09-22 1996-03-27 Commissariat A L'energie Atomique Process of manufacturing a structure having a thin semiconductor layer on a substrate
EP0924769A1 (en) * 1997-07-03 1999-06-23 Seiko Epson Corporation Method of transferring thin film devices, thin film device, thin film integrated circuit device, active matrix substrate, liquid crystal display, and electronic apparatus
EP0977252A1 (en) * 1998-07-30 2000-02-02 Commissariat A L'energie Atomique Selective transfer of elements from one support to another support
EP1041624A1 (en) * 1999-04-02 2000-10-04 Interuniversitair Microelektronica Centrum Vzw Method of transferring ultra-thin substrates and application of the method to the manufacture of a multilayer thin film device
FR2796491A1 (en) * 1999-07-12 2001-01-19 Commissariat Energie Atomique METHOD FOR TAKING OFF TWO ELEMENTS AND DEVICE FOR IMPLEMENTING SAME

Non-Patent Citations (1)

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Title
HAMAGUCHI T ET AL: "NOVEL LSI/SOI WAFER FABRICATION USING DEVICE LAYER TRANSFER TECHNIQUE", INTERNATIONAL ELECTRON DEVICES MEETING. WASHINGTON, DEC. 1 - 4, 1985, WASHINGTON, IEEE, US, December 1985 (1985-12-01), pages 688 - 691, XP000842673 *

Also Published As

Publication number Publication date
JP2005532674A (en) 2005-10-27
EP1493181A2 (en) 2005-01-05
FR2837620A1 (en) 2003-09-26
WO2003081664A2 (en) 2003-10-02
US20050178495A1 (en) 2005-08-18
FR2837620B1 (en) 2005-04-29

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