WO2003075233A3 - Smart card and method for avoiding software bug on such a smart card - Google Patents

Smart card and method for avoiding software bug on such a smart card Download PDF

Info

Publication number
WO2003075233A3
WO2003075233A3 PCT/FR2003/000637 FR0300637W WO03075233A3 WO 2003075233 A3 WO2003075233 A3 WO 2003075233A3 FR 0300637 W FR0300637 W FR 0300637W WO 03075233 A3 WO03075233 A3 WO 03075233A3
Authority
WO
WIPO (PCT)
Prior art keywords
smart card
software bug
code
addresses
data
Prior art date
Application number
PCT/FR2003/000637
Other languages
French (fr)
Other versions
WO2003075233A2 (en
Inventor
Jean-Luc Dauvois
Original Assignee
Canal Plus Technologies
Jean-Luc Dauvois
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canal Plus Technologies, Jean-Luc Dauvois filed Critical Canal Plus Technologies
Priority to EP03720652A priority Critical patent/EP1485885A2/en
Priority to AU2003224229A priority patent/AU2003224229A1/en
Priority to KR10-2004-7013516A priority patent/KR20050007436A/en
Priority to JP2003573612A priority patent/JP2005519403A/en
Priority to MXPA04008351A priority patent/MXPA04008351A/en
Publication of WO2003075233A2 publication Critical patent/WO2003075233A2/en
Publication of WO2003075233A3 publication Critical patent/WO2003075233A3/en

Links

Classifications

    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/10—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
    • G07F7/1008—Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/341—Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/0806—Details of the card
    • G07F7/0833—Card having specific functional components
    • G07F7/084—Additional components relating to data transfer and storing, e.g. error detection, self-diagnosis
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/846—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by choosing redundant lines at an output stage

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Business, Economics & Management (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • General Business, Economics & Management (AREA)
  • Strategic Management (AREA)
  • Computer Security & Cryptography (AREA)
  • Accounting & Taxation (AREA)
  • Quality & Reliability (AREA)
  • Stored Programmes (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The invention concerns a smart card whereof the component includes a central unit (10), a code memory (16) wherein is stored an original code comprising at least a software bug which cannot be corrected, a data/code memory (14) in a zone (15) of which are stored a substitution code free of software bug, as well as the addresses of the software bug(s), a mechanism (11) for intercepting the central unit addresses which verifies the hardware addresses which are executed, wherein the mechanism (11) intercepting the addresses includes an address intercepting and substituting unit (12) which enables the central unit to be rerouted when it detects an address or a set of addresses of software bug and a data multiplexer (13) enabling either the memory code data (16) when there is no rerouting, or the data of the data/memory code (14) to be taken into account by the central unit (10). The invention also concerns a method for avoiding a software bug in such a smart card.
PCT/FR2003/000637 2002-03-01 2003-02-27 Smart card and method for avoiding software bug on such a smart card WO2003075233A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
EP03720652A EP1485885A2 (en) 2002-03-01 2003-02-27 Smart card and method for avoiding software bug on such a smart card
AU2003224229A AU2003224229A1 (en) 2002-03-01 2003-02-27 Smart card and method for avoiding software bug on such a smart card
KR10-2004-7013516A KR20050007436A (en) 2002-03-01 2003-02-27 Smart card and method for avoiding software bug on such a smart card
JP2003573612A JP2005519403A (en) 2002-03-01 2003-02-27 Method for avoiding logic bug of smart card and smart card
MXPA04008351A MXPA04008351A (en) 2002-03-01 2003-02-27 Smart card and method for avoiding software bug on such a smart card.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0202620A FR2836736A1 (en) 2002-03-01 2002-03-01 CHIP CARD AND METHOD FOR AVOIDING FAULTY LOGIC ON SUCH A CHIP CARD
FR02/02620 2002-03-01

Publications (2)

Publication Number Publication Date
WO2003075233A2 WO2003075233A2 (en) 2003-09-12
WO2003075233A3 true WO2003075233A3 (en) 2004-03-04

Family

ID=27741362

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2003/000637 WO2003075233A2 (en) 2002-03-01 2003-02-27 Smart card and method for avoiding software bug on such a smart card

Country Status (7)

Country Link
EP (1) EP1485885A2 (en)
JP (1) JP2005519403A (en)
KR (1) KR20050007436A (en)
AU (1) AU2003224229A1 (en)
FR (1) FR2836736A1 (en)
MX (1) MXPA04008351A (en)
WO (1) WO2003075233A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2905543B1 (en) * 2006-08-30 2009-01-16 Viaccess Sa SECURITY PROCESSOR AND METHOD AND RECORDING MEDIUM FOR CONFIGURING THE BEHAVIOR OF THIS PROCESSOR.

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2471004A1 (en) * 1979-11-30 1981-06-12 Dassault Electronique Control of access to semiconductor memories - uses access controller requiring validating inputs before opening and gate linking address bus and address decoder circuits
GB2136992A (en) * 1983-03-18 1984-09-26 Georg V Coza Method and System of Ensuring Integrity of Data in an Electronic Memory
US4945535A (en) * 1987-08-25 1990-07-31 Mitsubishi Denki Kabushiki Kaisha Information processing unit
US5353253A (en) * 1992-10-14 1994-10-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
EP0645714A1 (en) * 1993-09-20 1995-03-29 STMicroelectronics S.A. Dynamic redundancy circuit for integrated circuit memory
US5758056A (en) * 1996-02-08 1998-05-26 Barr; Robert C. Memory system having defective address identification and replacement
US5935258A (en) * 1997-03-04 1999-08-10 Micron Electronics, Inc. Apparatus for allowing data transfers with a memory having defective storage locations

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2471004A1 (en) * 1979-11-30 1981-06-12 Dassault Electronique Control of access to semiconductor memories - uses access controller requiring validating inputs before opening and gate linking address bus and address decoder circuits
GB2136992A (en) * 1983-03-18 1984-09-26 Georg V Coza Method and System of Ensuring Integrity of Data in an Electronic Memory
US4945535A (en) * 1987-08-25 1990-07-31 Mitsubishi Denki Kabushiki Kaisha Information processing unit
US5353253A (en) * 1992-10-14 1994-10-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
EP0645714A1 (en) * 1993-09-20 1995-03-29 STMicroelectronics S.A. Dynamic redundancy circuit for integrated circuit memory
US5758056A (en) * 1996-02-08 1998-05-26 Barr; Robert C. Memory system having defective address identification and replacement
US5935258A (en) * 1997-03-04 1999-08-10 Micron Electronics, Inc. Apparatus for allowing data transfers with a memory having defective storage locations

Also Published As

Publication number Publication date
AU2003224229A8 (en) 2003-09-16
EP1485885A2 (en) 2004-12-15
AU2003224229A1 (en) 2003-09-16
MXPA04008351A (en) 2004-11-26
JP2005519403A (en) 2005-06-30
KR20050007436A (en) 2005-01-18
FR2836736A1 (en) 2003-09-05
WO2003075233A2 (en) 2003-09-12

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