WO2003069770A3 - Ein-punkt-modulator mit pll-schaltung - Google Patents

Ein-punkt-modulator mit pll-schaltung Download PDF

Info

Publication number
WO2003069770A3
WO2003069770A3 PCT/DE2003/000146 DE0300146W WO03069770A3 WO 2003069770 A3 WO2003069770 A3 WO 2003069770A3 DE 0300146 W DE0300146 W DE 0300146W WO 03069770 A3 WO03069770 A3 WO 03069770A3
Authority
WO
WIPO (PCT)
Prior art keywords
modulator
pll circuit
point
circuit
delta
Prior art date
Application number
PCT/DE2003/000146
Other languages
English (en)
French (fr)
Other versions
WO2003069770A2 (de
Inventor
Markus Hammes
Puma Giuseppe Li
Waasen Stefan Van
Original Assignee
Infineon Technologies Ag
Markus Hammes
Puma Giuseppe Li
Waasen Stefan Van
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Markus Hammes, Puma Giuseppe Li, Waasen Stefan Van filed Critical Infineon Technologies Ag
Publication of WO2003069770A2 publication Critical patent/WO2003069770A2/de
Publication of WO2003069770A3 publication Critical patent/WO2003069770A3/de
Priority to US10/917,101 priority Critical patent/US7453325B2/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0933—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop using fractional frequency division in the feedback loop of the phase locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0925—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop applying frequency modulation at the divider in the feedback loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

Die Erfindung betrifft einen Ein-Punkt-Modulator (1) mit einer PLL-Schaltung (2). In dem Rückkoppelzweig der PLL-Schaltung (2) ist ein programmierbarer Frequenzteiler (7) angeordnet, dessen Steueranschluss mit einem Schaltungszweig zum Einprägen eines digitalen Modulationssignals (15) verbunden ist. Der Schaltungszweig enthält einen Sigma-Delta-Modulator (9), welcher wiederum ein digitales Filter (24) mit einer Übertragungsfunktion H(z) aufweist. Die Rauschübertragungsfunktion NTF(z) des Sigma-Delta-Modulators (9) ist durch die Funktion NTF(z) = 1 - H(z) gegeben.
PCT/DE2003/000146 2002-02-12 2003-01-20 Ein-punkt-modulator mit pll-schaltung WO2003069770A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/917,101 US7453325B2 (en) 2002-02-12 2004-08-12 Single point modulator having a PLL circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10205680A DE10205680B4 (de) 2002-02-12 2002-02-12 Ein-Punkt-Modulator mit PLL-Schaltung
DE10205680.3 2002-02-12

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/917,101 Continuation US7453325B2 (en) 2002-02-12 2004-08-12 Single point modulator having a PLL circuit

Publications (2)

Publication Number Publication Date
WO2003069770A2 WO2003069770A2 (de) 2003-08-21
WO2003069770A3 true WO2003069770A3 (de) 2004-01-08

Family

ID=27634888

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2003/000146 WO2003069770A2 (de) 2002-02-12 2003-01-20 Ein-punkt-modulator mit pll-schaltung

Country Status (4)

Country Link
US (1) US7453325B2 (de)
CN (1) CN100490303C (de)
DE (1) DE10205680B4 (de)
WO (1) WO2003069770A2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2409383B (en) * 2003-12-17 2006-06-21 Wolfson Ltd Clock synchroniser
US7714666B2 (en) 2006-06-15 2010-05-11 Mediatek Inc. Phase locked loop frequency synthesizer and method for modulating the same
WO2008055208A1 (en) * 2006-11-01 2008-05-08 New Jersey Institute Of Technology Aerogel-based filtration of gas phase systems
US7634041B2 (en) 2006-12-28 2009-12-15 Mediatek Inc. Phase locked loop frequency synthesizer
US20080212658A1 (en) * 2007-03-01 2008-09-04 Ahmadreza Rofougaran Method and system for communication of signals using a direct digital frequency synthesizer (ddfs)
US20080258942A1 (en) * 2007-04-23 2008-10-23 Infineon Technologies Ag Sigma-delta multiplier, phase-locked loop with extended tuning range and methods for generating rf signals
US8428212B2 (en) * 2008-01-30 2013-04-23 Intel Mobile Communications GmbH Frequency synthesis using upconversion PLL processes
US8554159B2 (en) * 2010-04-09 2013-10-08 Intel Mobile Communications GmbH Direct FM/PM modulation
US9035682B2 (en) 2012-12-29 2015-05-19 Motorola Solutions, Inc. Method and apparatus for single port modulation using a fractional-N modulator
US8803627B1 (en) 2013-12-03 2014-08-12 Innophase Inc. Wideband direct DCO modulator with in-band compensation
US9484859B2 (en) 2014-11-05 2016-11-01 Mediatek Inc. Modulation circuit and operating method thereof
US10623008B2 (en) * 2015-04-30 2020-04-14 Xilinx, Inc. Reconfigurable fractional-N frequency generation for a phase-locked loop
US10293904B2 (en) * 2016-05-13 2019-05-21 Wind + Wing Technologies, Inc. Deployable wingsail for container ships
CN108566200A (zh) * 2018-04-27 2018-09-21 上海顺久电子科技有限公司 一种分频器控制器电路、锁相环及芯片

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5629701A (en) * 1992-01-28 1997-05-13 Tapani Ritoniemi Cascaded Nth order (N>2) feedforward sigma-delta modulators
EP0940922A1 (de) * 1998-03-03 1999-09-08 Motorola Semiconducteurs S.A. Frequenzsynthetisierer
US5986512A (en) * 1997-12-12 1999-11-16 Telefonaktiebolaget L M Ericsson (Publ) Σ-Δ modulator-controlled phase-locked-loop circuit
US6236703B1 (en) * 1998-03-31 2001-05-22 Philsar Semiconductor Inc. Fractional-N divider using a delta-sigma modulator

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5959562A (en) * 1997-09-03 1999-09-28 Analog Devices, Inc. Sigma-delta modulator and method for operating such modulator
DE19929167A1 (de) 1999-06-25 2000-12-28 Siemens Ag Modulator und Verfahren zur Phasen- oder Frequenzmodulation mit einer PLL-Schaltung

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5629701A (en) * 1992-01-28 1997-05-13 Tapani Ritoniemi Cascaded Nth order (N>2) feedforward sigma-delta modulators
US5986512A (en) * 1997-12-12 1999-11-16 Telefonaktiebolaget L M Ericsson (Publ) Σ-Δ modulator-controlled phase-locked-loop circuit
EP0940922A1 (de) * 1998-03-03 1999-09-08 Motorola Semiconducteurs S.A. Frequenzsynthetisierer
US6236703B1 (en) * 1998-03-31 2001-05-22 Philsar Semiconductor Inc. Fractional-N divider using a delta-sigma modulator

Also Published As

Publication number Publication date
US20050025276A1 (en) 2005-02-03
US7453325B2 (en) 2008-11-18
WO2003069770A2 (de) 2003-08-21
CN100490303C (zh) 2009-05-20
DE10205680B4 (de) 2010-06-02
DE10205680A1 (de) 2003-08-28
CN1633745A (zh) 2005-06-29

Similar Documents

Publication Publication Date Title
WO2003069770A3 (de) Ein-punkt-modulator mit pll-schaltung
CA2233233A1 (en) Frequency controlling circuit for digital television transmission
WO1996008865A3 (en) Quadrature modulator with integrated distributed rc filters
AU2003294636A1 (en) Phase-locked loop comprising a sigma-delta modulator
AU2003216552A1 (en) Sigma-delta modulator controlled phase locked loop with a noise shaped dither
HK1170079A1 (en) Analogue digital delay locked loop
WO2003032493A3 (de) Abgleichverfahren für eine nach dem zwei-punkt-prinzip arbeitende pll-schaltung und pll-schaltung mit einer abgleichvorrichtung
WO2004028000A3 (en) Complex-if digital receiver
AU2002311522A1 (en) Radio receiver using a feedback loop to compensate i/q amplitude errors, and method
WO2006057649A3 (en) Direct conversion delta-sigma transmitter
EP1304826A3 (de) Wellenformerzeugung für Interplexmodulation
WO2002013397A3 (en) Constrained-envelope transmitter and method therefor
EP0905917A3 (de) Multimodusfunkkommunikationssystem
WO2004042932A3 (en) Converter, circuit and method for compensation of non-idealities in continuous time sigma delta converters
WO2007014377A3 (en) Managing spectra of modulated signals in a communication network
WO2004095700A3 (en) Reconfigurable baseband filter
WO2002005432A3 (en) Sigma-delta modulator with an adjustable feedback factor
WO2003017496A3 (en) Multiplexed analog to digital converter
SE0004031L (sv) Direkt digital amplitudmodulator
CA2291118A1 (en) Clock regeneration circuit
WO1999048202A3 (en) Converter with programmable gain control
EP2019485A3 (de) System zur Steuerung eines Klasse-D-Verstärkers
WO2001011785A3 (de) Kaskadierter sigma-delta-modulator
WO2003007131A3 (en) Circuits, systems and methods for volume control in 1-bit digital audio systems
WO2004068717A3 (en) Current dac code independent switching

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): CN JP US

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): DE DK FI FR GB SE

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 20038038021

Country of ref document: CN

Ref document number: 10917101

Country of ref document: US

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP