WO2003055163A1 - Procede et appareil de circuit permettant de regler le dephasage de frequence d'un systeme de communication sans fil ofdm - Google Patents

Procede et appareil de circuit permettant de regler le dephasage de frequence d'un systeme de communication sans fil ofdm Download PDF

Info

Publication number
WO2003055163A1
WO2003055163A1 PCT/CN2002/000906 CN0200906W WO03055163A1 WO 2003055163 A1 WO2003055163 A1 WO 2003055163A1 CN 0200906 W CN0200906 W CN 0200906W WO 03055163 A1 WO03055163 A1 WO 03055163A1
Authority
WO
WIPO (PCT)
Prior art keywords
frequency offset
exp
circuit
offset compensation
approximate
Prior art date
Application number
PCT/CN2002/000906
Other languages
English (en)
Chinese (zh)
Inventor
Jie Chen
Chunlei Cai
Guoliang Shou
Nanjian Wu
Jun Yang
Original Assignee
Beijing Lhwt Microelectronics Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Lhwt Microelectronics Inc. filed Critical Beijing Lhwt Microelectronics Inc.
Priority to AU2002354170A priority Critical patent/AU2002354170A1/en
Publication of WO2003055163A1 publication Critical patent/WO2003055163A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2657—Carrier synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2668—Details of algorithms
    • H04L27/2673—Details of algorithms characterised by synchronisation parameters
    • H04L27/2675—Pilot or known symbols

Definitions

  • the invention relates to a frequency offset compensation method and a circuit device in the field of wireless communication, in particular to a method for frequency offset compensation of an OFDM (Orthogonal Frequency Division Multiplexing) communication system and a circuit device obtained by the method.
  • OFDM Orthogonal Frequency Division Multiplexing
  • the received signal> will include the frequency offset shown in the following formula.
  • ⁇ 2 ⁇ //, which is the frequency deviation angle generated within one clock
  • ⁇ / is the frequency deviation
  • ⁇ is the system sampling frequency.
  • frequency offset compensation must be performed on the received signal.
  • a method of approximately calculating the value of £ ⁇ (>> 2 ⁇ ⁇ for frequency offset compensation was invented, that is, a method of frequency offset compensation in wireless communication systems.
  • the method is based on The frequency offset compensation method of a wireless communication system based on IEEE802.11a or HiperLAN2 standard, and the purpose of frequency offset compensation is to use frequency offset compensation to correct the phase change caused by frequency offset, so that within 64 samples of an OFDM signal There is almost no change in phase. Therefore, as long as the 64 compensation values are obtained, frequency offset compensation can be performed.
  • the calculation expression is as follows:
  • Figure 1 is a schematic diagram of the dichotomous angle, where ⁇ and ⁇ are arbitrary angles less than 75 °.
  • Figure 2 is the first scheme of the frequency offset compensation circuit.
  • Figure 3 is the second scheme of the frequency offset compensation circuit. detailed description
  • FIG. 2 and 3 provide reference schemes for two specific circuits that implement this frequency offset compensation. They are frequency offset compensation digital circuit devices composed of at least one sine or cosine approximation circuit, a group of frequency offset compensation circuits, a selection circuit, and a digital multiplier, and at least one sine and cosine approximation circuit and a group of frequency offset compensation.
  • a digital-analog mixed frequency offset compensation circuit device composed of a circuit, an AD conversion circuit, and a digital-analog mixed multiplier.
  • the common feature of these two devices is the sine and cosine approximation loops. At least two signal output ends of the signal output end are the same as the signal output end of this loop. .

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

La présente invention concerne un procédé et un appareil de circuit permettant de corriger le déphasage de fréquence dans un système de communication OFDM (multiplexage par répartition orthogonale de la fréquence). La valeur pic obtenue à partir de la corrélation d'un filtre de correspondance permet de calculer l'exposant de l'erreur de phase au lieu de l'erreur de phase causée par le décalage de la fréquence. On utilise par la suite l'approximation de exp(jnΔυ)(n=-32,-31, 31,32) afin de corriger le décalage de la fréquence. Le procédé de cette invention présente l'avantage de ne pas accumuler d'erreur de correction à mesure que le temps passe et de mettre en oeuvre un procédé de calcul rapide qui utilise un circuit réalisable simple.
PCT/CN2002/000906 2001-12-20 2002-12-20 Procede et appareil de circuit permettant de regler le dephasage de frequence d'un systeme de communication sans fil ofdm WO2003055163A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002354170A AU2002354170A1 (en) 2001-12-20 2002-12-20 Method and circuit appartus for comrensating frequency offset of ofdm wireless communication system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN01144558.0 2001-12-20
CNB011445580A CN1207881C (zh) 2001-12-20 2001-12-20 Ofdm无线通信系统频偏补偿的方法及其电路装置

Publications (1)

Publication Number Publication Date
WO2003055163A1 true WO2003055163A1 (fr) 2003-07-03

Family

ID=4677668

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2002/000906 WO2003055163A1 (fr) 2001-12-20 2002-12-20 Procede et appareil de circuit permettant de regler le dephasage de frequence d'un systeme de communication sans fil ofdm

Country Status (3)

Country Link
CN (1) CN1207881C (fr)
AU (1) AU2002354170A1 (fr)
WO (1) WO2003055163A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104702383A (zh) * 2013-12-09 2015-06-10 晨星半导体股份有限公司 取样频率误差计算电路与方法以及信号接收电路与方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0607496A1 (fr) * 1993-01-21 1994-07-27 Industrial Technology Research Institute Détecteur différentiel à un bit pour signaux GMSK avec compensation d'un décalage de fréquence
US5548617A (en) * 1994-05-19 1996-08-20 Samsung Elctronics, Co., Ltd. Digital VSB detector with bandpass phase tracker using rader filters, as for use in an HDTV receiver
US5812927A (en) * 1997-02-10 1998-09-22 Lsi Logic Corporation System and method for correction of I/Q angular error in a satellite receiver
JP2000228656A (ja) * 1999-02-05 2000-08-15 Jisedai Digital Television Hoso System Kenkyusho:Kk Ａｆｃ回路
US20010012988A1 (en) * 1999-12-30 2001-08-09 Mario Motz Sensor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0607496A1 (fr) * 1993-01-21 1994-07-27 Industrial Technology Research Institute Détecteur différentiel à un bit pour signaux GMSK avec compensation d'un décalage de fréquence
US5548617A (en) * 1994-05-19 1996-08-20 Samsung Elctronics, Co., Ltd. Digital VSB detector with bandpass phase tracker using rader filters, as for use in an HDTV receiver
US5812927A (en) * 1997-02-10 1998-09-22 Lsi Logic Corporation System and method for correction of I/Q angular error in a satellite receiver
JP2000228656A (ja) * 1999-02-05 2000-08-15 Jisedai Digital Television Hoso System Kenkyusho:Kk Ａｆｃ回路
US20010012988A1 (en) * 1999-12-30 2001-08-09 Mario Motz Sensor

Also Published As

Publication number Publication date
AU2002354170A1 (en) 2003-07-09
CN1207881C (zh) 2005-06-22
CN1427596A (zh) 2003-07-02

Similar Documents

Publication Publication Date Title
CN109150780B (zh) 一种基于信道状态信息的WiFi ToF测距定位系统
KR101138698B1 (ko) 이동통신 시스템에서의 주파수 옵셋 추정 방법 및 그 장치
CN101667989B (zh) 信号载波频率及相位估计方法及装置
US20130051433A1 (en) Chirp Receiver
CN101726720A (zh) 接收设备、移动角估计方法、程序和无线通信系统
US7787357B2 (en) OFDM frequency offset estimation apparatus and method
CN101299735B (zh) 一种载波频率偏移估计的方法和系统
JPH08242190A (ja) 周波数変移の補正装置及びその方法
EP1423956B1 (fr) Demodulation de signaux modules en phase transmis sur plusieurs porteuses
JP3915247B2 (ja) 受信方法及び受信装置
TW201038028A (en) Carrier recovery device and related method
JP6938591B2 (ja) 物体検出又はデータ伝送のための信号処理システム及び信号処理方法
NO20040539L (no) Satellitt vandrebolge rorforsterker tilkoplet ikke-linearitets maling.
AU2002332824A1 (en) Reception of a plurality of phase-modulated signals
WO2003055163A1 (fr) Procede et appareil de circuit permettant de regler le dephasage de frequence d'un systeme de communication sans fil ofdm
JP3739078B2 (ja) 電波源の位置検出システム
CN1281039C (zh) 将载波相位旋转减到最小的方法和接收机
US10298249B1 (en) Time error and gain offset estimation in interleaved analog-to-digital converters
WO2012132185A1 (fr) Dispositif d'émission-réception
US6697439B1 (en) Carrier acquisition in a DC/MA system
US20220171020A1 (en) Determining distance between two radio transceivers
WO2003055115A1 (fr) Procede de detection d'un decalage de frequence dans un systeme de communication sans fil ofdm et dispositif associe
JP2003188846A (ja) 通信装置および周波数偏差推定方法
WO2021038628A1 (fr) Dispositif radar et procédé de mesure de distance
JP3711253B2 (ja) ユニークワード検出方法および受信装置

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SD SE SG SK SL TJ TM TN TR TT TZ UA UG US UZ VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LU MC NL PT SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP