WO2003032065A1 - Liquid crystal display - Google Patents

Liquid crystal display Download PDF

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Publication number
WO2003032065A1
WO2003032065A1 PCT/JP2002/010157 JP0210157W WO03032065A1 WO 2003032065 A1 WO2003032065 A1 WO 2003032065A1 JP 0210157 W JP0210157 W JP 0210157W WO 03032065 A1 WO03032065 A1 WO 03032065A1
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WO
WIPO (PCT)
Prior art keywords
liquid crystal
film
display device
crystal display
injection path
Prior art date
Application number
PCT/JP2002/010157
Other languages
French (fr)
Japanese (ja)
Inventor
Takenobu Asakawa
Original Assignee
Matsushita Electric Industrial Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co., Ltd. filed Critical Matsushita Electric Industrial Co., Ltd.
Publication of WO2003032065A1 publication Critical patent/WO2003032065A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1341Filling or closing of cells

Definitions

  • the present invention relates to a liquid crystal display device.
  • liquid crystal display devices have been widely used as display devices for AV / OA equipment products.
  • miniaturization and compactness are achieved in designing, assembling, circuit mounting, housing or modularization of a liquid crystal display panel including a pair of substrates and the like.
  • FIG. 6 is a schematic plan sectional view of a conventional liquid crystal display device
  • FIG. 7 is a side sectional view taken along line VII-VII 'of FIG.
  • the liquid crystal display device of this example is of an active matrix drive type
  • FIGS. 6 and 7 show a liquid crystal display element among the components of the liquid crystal display device.
  • an active matrix substrate hereinafter, referred to as a TFT array substrate
  • a counter substrate 102 is arranged in pairs, and a liquid crystal 4 is sandwiched between the substrates 101 and 102.
  • the TFT array substrate 101 has an insulating transparent glass substrate 1, and an inner surface of the glass substrate 1 has a wiring layer 201, a protective film 8a, a pixel electrode 202, and an alignment film. 3a are sequentially formed.
  • the wiring layer 201 includes a plurality of gate lines and source lines, a thin film transistor (TFT) that is a switching element, and an insulating layer that insulates them. You. Partitioned by these gate lines and source lines and including TFT Area constitutes one pixel. A plurality of pixels are formed in a matrix on the TFT array substrate 101, and an aggregate of such pixels constitutes a display area A of the liquid crystal display device.
  • a protective film 8a is formed so as to cover the wiring layer 201 and protect the TFT, and further, a pixel electrode 202 is formed for each pixel on the protective film 8a.
  • the film 3a is formed.
  • the opposite substrate 102 has an insulating transparent glass substrate 2 and the inner surface of the glass substrate 2 has a color finoletor 203 and a protective film 8 b for protecting the color filter 203.
  • an ITO 9 as a counter electrode and an alignment film 3b are sequentially formed.
  • the TFT array substrate 1 and the counter substrate 2 are bonded together using a liquid crystal sealing sealant 5.
  • the liquid crystal encapsulating sealant 5 forms a space in which the liquid crystal 4 is injected between the two substrates 101 and 102 so that the liquid crystal 4 does not leak out, and a liquid crystal injection path 7 for injecting the liquid crystal 4 is formed. It is arranged to form.
  • the liquid crystal injection path 7 is sealed by the liquid crystal sealing agent 6 after the liquid crystal 4 is injected into the space.
  • the ends of the substrates 101 and 102 on the liquid crystal injection path 7 side and the end of the display area A on the liquid crystal injection path 7 side are required.
  • the distance b must be designed to be small. However, if the distance b is too small, the liquid crystal sealing agent 6 may flow into the display area A from the liquid crystal injection path 7 when the liquid crystal injection path 7 is sealed as shown in area C. You.
  • the first problem that occurs when the liquid crystal encapsulant 6 enters the inside of the display area A is that the liquid crystal encapsulant 6 reaches the display area A in the curing process and is cured, so that the liquid crystal 4 inside the display area A is hardened. This hinders the display and causes display unevenness in that part.
  • the second problem is that in the curing step, the liquid crystal encapsulant 6 is not completely cured and mixes with the liquid crystal 4, thereby disturbing the orientation of the liquid crystal 4 and causing display unevenness. Thus, the liquid crystal display device becomes defective due to display unevenness. Therefore, the distance b is long It has to be sufficient (for example, 5 mm), which has hindered the miniaturization of liquid crystal display devices.
  • a liquid crystal display device includes: a pair of substrates each having at least a film element including an electrode film formed on one main surface; A liquid crystal layer filled with liquid crystal molecules is formed so as to face each other with a gap therebetween, and the gap is formed between each of the electrode films of the pair of substrates in the gap.
  • a liquid crystal sealing portion is formed so as to surround a display area, which is an aggregate of pixels including the liquid crystal layer sandwiched therebetween, and to form a liquid crystal injection path, and is surrounded by the liquid crystal sealing portion.
  • a liquid crystal display device in which the liquid crystal injection path is sealed with a liquid crystal encapsulant after the liquid crystal molecules are filled from the liquid crystal injection path into the filled space to form the liquid crystal layer.
  • At least one end of the film is the liquid crystal
  • a step is formed between the liquid crystal injection port side end of the stop and the end of the display area, so that a step is formed between the stop and the substrate, and the step is 0.1 lwm or more. 20 zm or less.
  • a step of not less than 0.1 ⁇ and not more than 20 ⁇ is formed depending on the thickness of the film. Therefore, the step prevents the liquid crystal encapsulant from entering the display area. Becomes possible.
  • the step is not less than 0.2 ⁇ and not more than ⁇ . According to this configuration, it is possible to effectively prevent the liquid crystal encapsulant from entering, and at the same time, it is possible to effectively reduce the size and the size of the device.
  • one end of the film is disposed between the end of the liquid crystal sealing portion on the side of the liquid crystal injection port and the end of the display area.
  • the step is formed between the liquid crystal injection port side end of the liquid crystal sealing portion and the display area end, so that the liquid crystal sealing agent does not penetrate from the intermediate region to the back. Is prevented. Therefore, the intrusion of the liquid crystal sealant into the display area located deeper than the intermediate region is more effectively prevented.
  • the step may be formed including at least a protective film. Further, the step may be formed to include the electrode film and the or the alignment film.
  • the protective film is conventionally thicker in structure than the electrode film and the alignment film, it is suitable for forming the step having the above-described height.
  • the step may be formed by arranging one end of each of a plurality of membranes of the membrane element so as to coincide with each other.
  • a step is formed by matching one ends of the stacked films.
  • a large step can be formed.
  • the height of the step is determined by the total thickness of a plurality of films, it is possible to form the above-described step even if the thickness of each film is small. Therefore, it is possible to reduce the thickness of the entire device.
  • FIG. 1 is a schematic plan sectional view of the liquid crystal display device according to the first embodiment.
  • FIG. 2 is a side sectional view of the liquid crystal display device taken along line II of FIG.
  • FIG. 3 is a side sectional view of the liquid crystal display device according to the second embodiment.
  • FIG. 4 is a side sectional view of the liquid crystal display device according to the third embodiment.
  • FIG. 5 is a preliminary sectional view of a liquid crystal display device according to a fourth embodiment.
  • FIG. 6 is a schematic plan sectional view of a conventional liquid crystal display device.
  • FIG. 7 is a side sectional view taken along line VII-VII ′ of FIG.
  • FIG. 1 is a schematic plan sectional view of the liquid crystal display device according to the first embodiment
  • FIG. 2 is a side sectional view taken along line II in FIG.
  • FIGS. 1 and 2 show only the liquid crystal display element among the main components of the liquid crystal display device, and other components, for example, a lighting device such as a backlight or the above-described device. Illustration of an element driving structure for actually performing display is omitted.
  • the liquid crystal display element of the liquid crystal display device has a liquid crystal 4 sandwiched between an active matrix substrate (TF array substrate) 101 and a counter substrate 102. It is configured.
  • the TFT array substrate 101 is provided with a plurality of source lines and gate lines that are orthogonal to each other in a plan view, and a region defined by the gate lines and the source lines is one. A pixel.
  • a well-known TF # is provided as a switching element for each pixel, and a pixel electrode divided for each pixel is formed.
  • the liquid crystal display device according to the embodiment is an active drive type display device in which a TFT is formed for each pixel.
  • the display area A is configured by forming a plurality of the pixels in a matrix shape.
  • a source driver and a gate driver for driving the above-mentioned source line and gate line are mounted around the liquid crystal display element.
  • a control device for controlling the driver and the gate driver is provided.
  • the control device outputs a control signal to each of the gate driver and the source driver according to a video signal input from the outside.
  • the gate driver outputs a gate signal to the gate line to turn on the switching element (TFT) of each pixel sequentially, while the source driver adjusts the timing to the image via the source line.
  • the signal is sequentially input to the pixel electrode of each pixel.
  • the liquid crystal is modulated, the transmittance of light emitted from a lighting device such as a backlight changes, and an image corresponding to the image signal appears in the eyes of a person viewing the liquid crystal display device.
  • the TFT array substrate 101 has an insulating transparent glass substrate 1, on which a plurality of gate lines are arranged in parallel at predetermined intervals and these gate lines are provided. A plurality of source lines orthogonal to the line in plan view are arranged at predetermined intervals while being insulated from the gate line by an insulating layer. As described above, the area of one pixel is determined by the gate line and the source line. In each pixel, a TFT is formed as a switching element at the intersection of the gate line and the source line, and the gate line is connected to the gate electrode of the TFT and the source of the TFT is formed. The source line is connected to the electrode.
  • the source line, the gate line, the TFT, and the insulating layers that insulate them are collectively illustrated as a wiring layer 201.
  • a protective film 8a that protects the TFT and functions as an interlayer insulating film with the pixel electrode is formed so as to cover the wiring layer 201.
  • a pixel electrode 202 divided for each pixel is formed on the protective film 8a.
  • Each pixel In the above, the pixel electrode 202 is electrically connected to the drain region of the TFT.
  • an alignment film 3a is formed on this pixel electrode 202.
  • the thickness of the protective film 8a is 3 m, and here, a photosensitive acrylic resin film is used.
  • the thickness of the alignment film 3a is 0.1 ⁇ .
  • an opposing substrate 102 facing the TFT array substrate 101 has an insulating transparent glass substrate 2, and a color filter 203 is provided on the inner surface of the glass substrate 2.
  • a protective film 8b for protecting 203, an IT-9 serving as a counter electrode, and an alignment film 3b are sequentially formed.
  • the thickness of the protective film 8b is 3 ⁇ m, and an acrylic film is used similarly to the above-mentioned protective film 8a.
  • the thickness of IT 09 is 0.1 l ⁇ m.
  • the thickness of the alignment film 3b is 0.1 ⁇ .
  • the TF array substrate 101 and the opposing substrate 102 are spaced at a predetermined distance by a spacer (not shown) so that the surfaces on which the respective films are formed face each other and have a gap. They are arranged and bonded with a liquid crystal sealing sealant 5.
  • the liquid crystal sealing sealant 5 is disposed between the substrates 101 and 102 so as to surround the display area ⁇ in a plan view and form a liquid crystal injection path 7 which is a path for injecting the liquid crystal 4. Have been. Thereby, the liquid crystal 4 is injected between the two substrates 101 and 102 to form a space that does not leak.
  • the liquid crystal 4 is injected through the liquid crystal injection path 7 into a space surrounded by the TFT array substrate 101, the opposite substrate 102, and the liquid crystal sealing agent 5, and fills the space. ing.
  • the liquid crystal injection path 7 is sealed by the liquid crystal sealing agent 6 after the liquid crystal 4 is injected into the space.
  • the liquid crystal encapsulant 6 for example, a photocurable acryl resin or a thermosetting epoxy resin is used.
  • the width of the liquid crystal injection path 7 is about 0.5 to 5 cm.
  • the distance b from the end of the display area A to the end of the TFT array substrate 1 and the end of the counter substrate 2 on the liquid crystal encapsulant injection side is 0.25 cm.
  • the protective film 8a is not formed on the entire surface of the TFT array substrate 101, and the display layer is formed from the end of the TFT array substrate 101 on the liquid crystal injection path 7 side.
  • the glass substrate 1 is exposed in a predetermined region up to the area A without the protective film 8a being provided. That is, the end of the protective film 8a on the liquid crystal injection path 7 side extends from the end of the TFT array substrate 101 on the liquid crystal injection path 7 side to the end of the display area A on the liquid crystal injection path 7 side. It is formed at a predetermined position.
  • a step is formed between the TFT array substrate 101 and the protective film 8a. The height of this step corresponds to the thickness of the protective film 8a, and is specifically 3 ⁇ .
  • the protective film 8 b is not formed on the entire surface of the counter substrate 102, and the end of the protective film 8 b on the liquid crystal injection path 7 side is opposite to the liquid crystal injection path 7 on the counter substrate 2. It is formed at a predetermined position in the range from the end to the end of the display area A on the liquid crystal injection path 7 side.
  • a step is formed between the opposing substrate 102 and the protective film 8b symmetrically with the step on the TFT array substrate 101 side. The height of this step corresponds to the thickness of the protective film 8b, and is specifically 3 ⁇ m.
  • steps of 3 / zm are formed between the TFT array substrate 101 and the protective film 8a, and between the opposing substrate 102 and the protective film 8b. I have. Therefore, when the liquid crystal injection path 7 is sealed with the liquid crystal sealant 6, the liquid crystal sealant 6 does not penetrate deeper than the step. In other words, the liquid crystal sealing agent 6 does not penetrate into the region B where the protective films 8a and 8b are not formed, that is, the region corresponding to the liquid crystal injection path 7. Therefore, even when the distance b is small, the liquid crystal encapsulant 6 does not reach the display area A, and therefore the liquid crystal encapsulant 6 does not disturb the orientation of the liquid crystal 4.
  • the step may be formed at any position in the range from the end of the TFT array substrate 101 and the counter substrate 102 on the liquid crystal injection path 7 side to the end of the display area A on the liquid crystal injection path 7 side.
  • the TFT array is used. Since the protective films 8a and 8b have steps formed on the substrate 101 and the counter substrate 102 with a height high enough to prevent the liquid crystal encapsulant 6 from entering, the distance b Even if the size is reduced, the liquid crystal sealant 6 does not enter the inside of the display area A. Therefore, the liquid crystal encapsulant 6 does not disturb the orientation of the liquid crystal 4, and it is possible to reduce the size and the size of the device while preventing display unevenness. Further, in such a configuration, since the existing protective films 8a and 8b are used, the device can be manufactured easily and at low cost without largely changing the manufacturing process of the device.
  • the thicknesses of the protective films 8a and 8b on the TFT array substrate 101 side and the counter substrate 102 side are 3 ⁇ m, but the protective films 8a and 8b
  • the thickness is not limited to the above as long as it is a film thickness capable of forming a step capable of preventing the liquid crystal encapsulant 6 from entering, and specifically, about 0.1 to 20 ⁇ , more preferably 0.2 to: about ⁇ ⁇ , more preferably 0.6 to 8 ⁇ .
  • the greater the thickness of the protective films 8a and 8b the larger the step becomes. Therefore, the above-described effect of preventing intrusion becomes large. The time required for the film formation process becomes longer, the throughput decreases, and the productivity decreases.
  • the step on the TFT array substrate 1 side is formed by the protective film 8a functioning as an interlayer insulating film with the pixel electrode.
  • the step may be formed by a silvation film, or the step may be formed by an interlayer insulating film and a passivation film.
  • a passivation film a SiN-based film is preferably used, and its thickness is 0.1 to 5 m.
  • the thickness of the protective film 8a on the TFT array substrate 101 and the thickness of the protective film 8b on the counter substrate 102 are the same has been described, but the protective films 8a, 8 The thickness of b may be different within the above range.
  • FIG. 3 is a side sectional view of the liquid crystal display device according to the second embodiment.
  • the liquid crystal display device according to the second embodiment is different from the liquid crystal display device according to the first embodiment in that the end of the ITO 9 on the liquid crystal injection path 7 side is a protective film 8b.
  • the end of the pixel electrode 202 on the liquid crystal injection path 7 side matches the protective film 8a.
  • the ends of the matching ITO 9 and the protective film 8b form a step between the counter substrate 102 and the ends of the matching pixel electrode 202 and the protective film 8a.
  • a step is formed with the TFT array substrate 101.
  • the thickness of the pixel electrode 202 is 0.2 mm, and the thickness of the ITO 9 is 0.2 ⁇ , so that in this embodiment, the pixel electrode 202 is formed on the TFT array substrate 101 side.
  • the step formed was 3.2 m, and the step formed on the counter substrate 2 side was 3.2 ⁇ .
  • the end of the pixel electrode 202 is made to coincide with the end of the protective film 8a, and the end of the ITO 9 is made to coincide with the end of the protective film 8b. It is possible to form a larger step than the step formed only by the protective film 8a and the protective film 8b. Therefore, the effects described in the first embodiment are more effectively achieved.
  • Other configurations of the liquid crystal display device according to the second embodiment are the same as those of the liquid crystal display device according to the first embodiment.
  • the film thickness of the pixel electrode 202 is 0.2111 and the film thickness of 1T09 is 0.2 ⁇ m is described.
  • the thickness of the electrode is not limited to this.
  • the pixel electrode 202 may have a thickness of about 0.05 to 0.5 m
  • the IT09 may have a thickness of 0.05 to 0.5 ⁇ . Les ,.
  • the step formed between IT 09 and the protective film 8 b and the step formed between the pixel electrode 202 and the protective film 8 a have such a height that the liquid crystal encapsulant 6 can be prevented from penetrating, Specifically, as long as the thickness is 0.1 ⁇ m or more, the combination of the thickness of the ITO 9 and the protective film 8b and the combination of the thickness of the pixel electrode 202 and the protective film 8a are arbitrary. .
  • the pixel electrode 20 If the film thickness of IT 22 and IT ⁇ 9 is too large, the light transmittance will decrease, and the step will be too large, and the coverage of the film above the pixel electrodes 202 and I ⁇ 09 will decrease. The possibility of step breakage increases.
  • the upper limits of the pixel electrodes 202 and I ⁇ 09 be about 20 ⁇ or less.
  • the liquid crystal display according to the third embodiment of the present invention is an improvement of the liquid crystal display according to the first embodiment of the present invention.
  • FIG. 4 is a side sectional view of the liquid crystal display device according to the third embodiment. As shown in FIG. 4, the difference between the liquid crystal display device according to the third embodiment and the liquid crystal display device according to the first embodiment is that the above-described step is not caused by the protective films 8a and 8b but by the IT 09 And the alignment film 3b, and the pixel electrode 202 and the alignment film 3a.
  • the protective film 8a and the protective film 8b are formed on the entire surface of the TFT array substrate 101 and the opposing substrate 102, and accordingly, the protective film 8a and the TFT array substrate No step is formed between the protective film 8b and the protective film 8b and the opposing substrate 102.
  • the thickness of the protective films 8a and 8b is 3 m.
  • the ITO 9 is not formed on the entire surface of the protective film 8 b, and the display area A from the end of the counter substrate 102 on the liquid crystal injection path 7 side. The protective film 8b is exposed in the predetermined region up to this point without the ITO 9 being present.
  • the alignment film 3 is arranged so that the end on the liquid crystal injection path 7 side coincides with the end of the ITO 9. In other words, the ends of the ITO 9 and the alignment film 3b on the liquid crystal injection path 7 side coincide, and from the end of the protective film 8b on the liquid crystal injection path 7 side to the end of the display area A on the liquid crystal injection path 7 side. Is formed at a predetermined position in the range. As a result, a step is formed between the protective film 8b and these alignment films 3b and IT09. In this case, the thickness of IT09 is 0.2 jum and the orientation is Since the thickness of the film 3b is 0.2 ⁇ m, the step is 0.4 ⁇ .
  • the pixel electrode 202 is not formed on the entire surface of the protective film 8a, and is displayed from the end of the TFT array substrate 101 on the liquid crystal injection path 7 side.
  • the protective film 8a is exposed without the pixel electrode 202.
  • the alignment film 3a is provided so that the end on the side of the liquid crystal injection path 7 coincides with the end of the pixel electrode 202. In other words, the ends of the pixel electrode 202 and the alignment film 3a on the liquid crystal injection path 7 side coincide, and the liquid crystal injection path 7 of the display area A starts from the end of the protective film 8a on the liquid crystal injection path 7 side.
  • the protective film 8a is 0.2 ⁇ m and the thickness of the alignment film 3a is 0.2 / m, the step is 0.4 ⁇ m. .
  • a step is formed on the TFT array substrate 101 side and the counter substrate 102 side, which is sufficient to prevent the intrusion of the liquid crystal sealant.
  • the same effects as the effects described above in Embodiment 1 are achieved.
  • Other configurations of the liquid crystal display device according to the third embodiment are the same as those of the liquid crystal display device according to the first embodiment.
  • the thicknesses of the pixel electrode 202, the ITO 9, and the alignment films 3a and 3b are not limited to those described above, and the height of the liquid crystal encapsulant 6 can be prevented.
  • the thickness of the pixel electrode 202, the ITO 9, and the alignment films 3a and 3b may be other than this, as long as a step of 0.1 m or more can be formed.
  • the combination of the thickness of the pixel electrode 202 and the alignment film 3a and the combination of the thickness of the ITO 9 and the alignment film 3b are also arbitrary.
  • the film thickness of the pixel electrode 202 is about 0.05 to 0.5 / ⁇
  • the film thickness of ITO 9 is about 0.05 to 0.5111
  • the orientation film 3 is formed.
  • the thickness of 3, 3b may be about 0.05 to 0.5 ⁇ m.
  • the thickness of the alignment film 3a and the thickness of the alignment film 3b may be different. Note that the pixel electrodes 202 and If the film thickness is too thick, the disadvantages described above in Embodiment 2 occur. If the film thickness of the alignment films 3 a and 3 b is too large, it is difficult to control the distance between the substrates (cell gap). .
  • the liquid crystal display according to the fourth embodiment of the present invention is an improvement of the liquid crystal display according to the first embodiment of the present invention.
  • FIG. 5 is a side sectional view of the liquid crystal display device according to the fourth embodiment. As shown in FIG. 5, the difference between the liquid crystal display device according to the fourth embodiment and the liquid crystal display device according to the first embodiment is that the above-described step is newly formed instead of the protective films 8a and 8b. This is a point formed by the formed liquid crystal sealant intrusion prevention films 10a and 10b.
  • the liquid crystal sealant intrusion prevention film 10a is formed so as to cover the protection film 8a, and in the counter substrate 102, the protection film 8b is formed.
  • a liquid crystal sealant intrusion prevention film 10b is formed so as to cover the substrate.
  • the liquid crystal sealing agent intrusion prevention films 10 a and 10 b are not formed on the entire surfaces of the glass substrates 1 and 2, and are formed between the end on the liquid crystal injection path 7 side and the display area A. In the predetermined region, the glass substrates 1 and 2 are exposed without the liquid crystal sealant intrusion prevention films 10a and 10b.
  • the ends of the liquid crystal sealing agent intrusion prevention films 10a and 10b extend from the end of the glass substrates 1 and 2 on the liquid crystal injection path 7 side to the end of the display area A on the liquid crystal injection path 7 side. It is formed at a predetermined position in the range.
  • steps are formed between the glass substrate 1 and the liquid crystal sealant intrusion prevention film 10a, and between the glass substrate 2 and the liquid crystal sealant intrusion prevention film 10b.
  • the thickness of the liquid crystal sealant intrusion prevention films 10a and 10b is 5 m
  • the height of the step is 5 ⁇ .
  • the thickness of the protective films 8a and 8b is 3 m.
  • a step is formed on the TFT array substrate 101 side and the counter substrate 102 side, which is sufficient to prevent the intrusion of the liquid crystal sealant.
  • the same effect as described above in Embodiment 1 The effect is achieved.
  • Other configurations of the liquid crystal display device according to the fourth embodiment are the same as those of the liquid crystal display device according to the first embodiment.
  • the film thickness of the liquid crystal sealant intrusion prevention films 10a and 10b is not limited to the above, but may be a step having a height capable of preventing the liquid crystal sealant 6 from intruding. If it is about 1 m, it may be other than this. Further, the liquid crystal sealing agent intrusion prevention film 10a and the liquid crystal sealing agent intrusion prevention film 10b may have different thicknesses, or the alignment films 3a and 3b and the pixel electrodes 202 , And Z or ITO 9 may be included in the step. If the thickness of the liquid crystal sealing agent intrusion prevention films 10a and 10b is too thick, the same disadvantages as in the case of Embodiment 1 where the thickness of the protective films 8a and 8b are too thick. Therefore, the upper limit of the film thickness is set to about 8 ⁇ m.
  • the films formed on the active matrix substrate (TFT array substrate) and the counter substrate is provided, and the ends of the films are formed on the liquid crystal injection path side of the two substrates.
  • the liquid crystal is formed so as to be positioned between the liquid crystal injection path and the end of the display area on the liquid crystal injection path side, and the height of the step is such that the liquid crystal encapsulant does not enter the display area.
  • the step prevents the liquid crystal encapsulant from entering the display area, and a good liquid crystal display device with no display unevenness can be obtained.
  • Embodiments 1 to 4 the case where a photocurable acrylic resin or a thermosetting epoxy resin is used as the liquid crystal encapsulant has been described. Other than this may be used. Liquid crystal encapsulants have different viscosities depending on their types, and therefore have different fluidities depending on the types of encapsulants, and therefore, the penetration into the display area is also different. Therefore, it is preferable to appropriately set the height of the step, specifically, the film thickness of the film forming the step, depending on the type of the liquid crystal encapsulant.
  • the step in the present invention is 0.1 to 20 ⁇ m. Any value within the range of m may be used, but more preferably 0.2 to 10 ⁇ , and still more preferably Is 0.6 to 8 Aim.
  • the step is lower than 0.1 nm, it is difficult to sufficiently prevent the liquid crystal encapsulant from entering.
  • the step is higher than 20 / m, the effect of preventing the infiltration of the liquid crystal encapsulant increases, but the overall thickness of the liquid crystal display device increases, so the liquid crystal display device must be made thinner and smaller. In addition, it becomes difficult, and the time required for the step forming step becomes longer, thereby decreasing throughput and reducing productivity.
  • the step on the active matrix substrate (TFT array substrate) side and the step on the counter substrate side may have the same height or different heights. It is also assumed that the penetration of the liquid crystal encapsulant into the display area is affected by the width of the liquid crystal injection path. Therefore, it is preferable that the step is appropriately set in consideration of the width of the liquid crystal injection path.
  • the active matrix drive liquid crystal display device including the TFT array substrate has been described.
  • the present invention relates to a simple matrix drive liquid crystal display device. Is also applicable. From the above description, many modifications and other embodiments of the present invention are obvious to one skilled in the art. Accordingly, the above description is to be construed as illustrative only and is provided for the purpose of teaching those skilled in the art the best mode of carrying out the invention. The details of its structure and Z or function may be substantially changed without departing from the spirit of the invention.
  • the liquid crystal display device according to the present invention is useful as a thin and small display device used for AV / OA equipment products and the like.

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  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
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  • Crystallography & Structural Chemistry (AREA)
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Abstract

A liquid crystal display in which uneven display due to liquid crystal sealant (6) intruding into a display area (A) from a liquid crystal injection path (7) is eliminated by locating the end part of at least one kind of film formed on a pair of substrates (1, 2) between of the end part of the substrates (1, 2) the liquid crystal injection path (7) side and of the end part of the display area (A)the liquid crystal injection path (7) side and forming a level difference of 0.1-20μm between the films (8a, 8b) and the substrates (1, 2). The liquid crystal display is useful as a thin and small display for use in AV/OA apparatus products.

Description

 Light
液晶表示装置 Liquid crystal display
〔技術分野〕 〔Technical field〕
本発明は液晶表示装置に関するものである。  The present invention relates to a liquid crystal display device.
 Thread
 Rice field
〔技術背景〕  [Technical background]
最近、 A V · O A機器製品等の表示装置と して、 液晶表示装置が多く 利用されている。 これら液晶表示装置では、 一対の基板等を含む液晶表 示パネルの組み立て · 回路実装 · ハウジングまたはモジュール化等の設 計において、 小型化 · コンパク ト化が図られている。  Recently, liquid crystal display devices have been widely used as display devices for AV / OA equipment products. In these liquid crystal display devices, miniaturization and compactness are achieved in designing, assembling, circuit mounting, housing or modularization of a liquid crystal display panel including a pair of substrates and the like.
第 6図は従来の液晶表示装置の概略平面断面図であり、 第 7図は第 6 図の VII— VII' 線における側方断面図である。本例の液晶表示装置はァ クティブマ ト リ クス駆動型であり、 第 6図及び第 7図では、 液晶表示装 置の構成要素のうちの液晶表示素子について示している。 第 6図及び第 7図に示すよ うに、 液晶表示装置では、 アクティブマ ト リ クス基板 (以 下、 T F Tア レイ基板と呼ぶ) 1 0 1 と、 この T F Tア レイ基板 1 0 1 に対向する対向基板 1 0 2 とが対になって配設され、 両基板 1 0 1, 1 0 2の間に液晶 4が挟持されている。  FIG. 6 is a schematic plan sectional view of a conventional liquid crystal display device, and FIG. 7 is a side sectional view taken along line VII-VII 'of FIG. The liquid crystal display device of this example is of an active matrix drive type, and FIGS. 6 and 7 show a liquid crystal display element among the components of the liquid crystal display device. As shown in FIGS. 6 and 7, in a liquid crystal display device, an active matrix substrate (hereinafter, referred to as a TFT array substrate) 101 is opposed to the TFT array substrate 101. A counter substrate 102 is arranged in pairs, and a liquid crystal 4 is sandwiched between the substrates 101 and 102.
T F Tァレイ基板 1 0 1は絶縁性の透明なガラス基板 1 を有し、 ガラ ス基板 1 の内面には、 配線層 2 0 1 と、 保護膜 8 a と、 画素電極 2 0 2 と、 配向膜 3 a とが順次形成されている。 ここでは図示を省略している が、 配線層 2 0 1 は、 複数のゲー ト線及びソース線と、 スィ ツチング素 子である薄膜トランジスタ (T F T ) と、 これらを絶縁する絶縁層を含 んで構成される。 このゲート線及びソース線で区画されかつ T F Tを含 む領域が 1つの画素を構成している。 T F Tアレイ基板 1 0 1 には、 マ ト リ クス状に複数の画素が形成されており、 このよ うな画素の集合体が 液晶表示装置の表示エリア Aを構成している。 そして、 配線層 2 0 1 を 覆って T F Tを保護するよ うに保護膜 8 aが形成され、さ らにその上に、 画素毎に区分されて画素電極 2 0 2が形成されると ともに、 配向膜 3 a が形成されている。 The TFT array substrate 101 has an insulating transparent glass substrate 1, and an inner surface of the glass substrate 1 has a wiring layer 201, a protective film 8a, a pixel electrode 202, and an alignment film. 3a are sequentially formed. Although not shown here, the wiring layer 201 includes a plurality of gate lines and source lines, a thin film transistor (TFT) that is a switching element, and an insulating layer that insulates them. You. Partitioned by these gate lines and source lines and including TFT Area constitutes one pixel. A plurality of pixels are formed in a matrix on the TFT array substrate 101, and an aggregate of such pixels constitutes a display area A of the liquid crystal display device. Then, a protective film 8a is formed so as to cover the wiring layer 201 and protect the TFT, and further, a pixel electrode 202 is formed for each pixel on the protective film 8a. The film 3a is formed.
一方、 対向基板 1 0 2は絶縁性の透明なガラス基板 2 と有し、 ガラス 基板 2の内面には、 カラーフィノレタ 2 0 3 と、 カラーフィルタ 2 0 3を 保護するための保護膜 8 b と、 対向電極たる I T O 9 と、 配向膜 3 b と が順次形成されている。 T F Tアレイ基板 1 と対向基板 2 とは液晶封止 用シール剤 5を用いて貼り合わされている。 液晶封止用シール剤 5は、 両基板 1 0 1、 1 0 2間に液晶 4が注入されて漏れない空間を形成する と ともに、 液晶 4を注入するための通路である液晶注入路 7を形成する よ うに配設されている。 液晶注入路 7は、 液晶 4が前記空間に注入され た後に、 液晶封止剤 6によって封止される。  On the other hand, the opposite substrate 102 has an insulating transparent glass substrate 2 and the inner surface of the glass substrate 2 has a color finoletor 203 and a protective film 8 b for protecting the color filter 203. And an ITO 9 as a counter electrode and an alignment film 3b are sequentially formed. The TFT array substrate 1 and the counter substrate 2 are bonded together using a liquid crystal sealing sealant 5. The liquid crystal encapsulating sealant 5 forms a space in which the liquid crystal 4 is injected between the two substrates 101 and 102 so that the liquid crystal 4 does not leak out, and a liquid crystal injection path 7 for injecting the liquid crystal 4 is formed. It is arranged to form. The liquid crystal injection path 7 is sealed by the liquid crystal sealing agent 6 after the liquid crystal 4 is injected into the space.
ここで、 液晶表示装置を小型化 · コンパク ト化するためには、 液晶注 入路 7側の両基板 1 0 1、 1 0 2の端部と表示ェリァ Aの液晶注入路 7 側の端部との距離 bを小さく設計する必要がある。 しかし、 距離 bを小 さく しすぎると、エリア Cで示すように、液晶注入路 7を封止する際に、 液晶注入路 7から液晶封止剤 6が表示エリ ァ A内部に流れ込む恐れがあ る。  Here, in order to reduce the size and size of the liquid crystal display device, the ends of the substrates 101 and 102 on the liquid crystal injection path 7 side and the end of the display area A on the liquid crystal injection path 7 side are required. The distance b must be designed to be small. However, if the distance b is too small, the liquid crystal sealing agent 6 may flow into the display area A from the liquid crystal injection path 7 when the liquid crystal injection path 7 is sealed as shown in area C. You.
液晶封止剤 6が表示ェリァ Aの内側に入り込むことで生じる第 1 の問 題は、 液晶封止剤 6は硬化工程において表示ェリァ Aに達して硬化する ため、 表示エリア A内部の液晶 4を阻害すること となり、 その部分の表 示ムラを発生させることである。 また、 第 2の問題は、 前記硬化工程に おいて液晶封止剤 6が完全に硬化せず液晶 4 と混ざり合う ことによって 液晶 4の配向性を乱し、表示ムラを発生させることである。このよ うに、 表示ムラによって液晶表示装置が不良となる。 したがって、 距離 bの長 さを十分 (例えば 5 m m ) に取る必要が有り、 これが液晶表示装置の小 型化の妨げとなっていた。 The first problem that occurs when the liquid crystal encapsulant 6 enters the inside of the display area A is that the liquid crystal encapsulant 6 reaches the display area A in the curing process and is cured, so that the liquid crystal 4 inside the display area A is hardened. This hinders the display and causes display unevenness in that part. The second problem is that in the curing step, the liquid crystal encapsulant 6 is not completely cured and mixes with the liquid crystal 4, thereby disturbing the orientation of the liquid crystal 4 and causing display unevenness. Thus, the liquid crystal display device becomes defective due to display unevenness. Therefore, the distance b is long It has to be sufficient (for example, 5 mm), which has hindered the miniaturization of liquid crystal display devices.
〔発明の開示〕 [Disclosure of the Invention]
本発明はかかる従来技術の問題点に鑑みてなされたものであって、 小 型化、 コンパク ト化が図られると ともに、 液晶封止剤による表示ムラを 防止することが可能な液晶表示装置を提供することを目的と している。 そして、 これらの目的を達成するために、 本発明に係る液晶表示装置 は、 少なく とも電極膜を含む膜要素が一方の主面に形成された一対の基 板が、 前記一方の主面同士が対向するよ うに間隙を有して配置され、 前 記間隙に液晶分子が充填された液晶層が形成されると ともに、 前記間隙 において前記一対の基板の各前記電極膜と前記電極膜の間に挟まれた 前記液晶層とを含んで構成される画素の集合体である表示エリ アを囲 みかつ液晶注入路を形成するよ うに液晶封止部が形成され、 前記液晶封 止部で囲まれた空間に前記液晶注入路から前記液晶分子が充填された 後に前記液晶注入路が液晶封止剤によつて封止されて前記液晶層が形 成された液晶表示装置において、 前記膜要素のうちの少なく とも一種の 膜の一端部が前記液晶封止部の液晶注入口側端部から前記表示ェリ ァ の端部までの間に配置されるこ とによ り前記基板との間に段差が形成 され、かつ、前記段差が 0 . l w m以上 2 0 z m以下であるものである。 かかる構成によれば、 前記膜の厚みによって 0 . Ι μ πι以上 2 0 μ πι 以下の段差が形成されるため、 この段差により、 液晶封止剤が表示エリ ァに侵入するのを防止することが可能となる。 特に、 かかる構成では、 液晶封止部の液晶注入口側端部から表示エリ ア端部までの距離を短く しても、 表示ェリ ァへの液晶封止剤の侵入を防止することが可能となる c したがって、 この液晶表示装置では、 表示ムラの発生を防止して良好な 表示を実現しつつ、 装置の小型化及びコンパク ト化を図ることが可能と なる。 前記段差が、 0 . 2 μ πι以上 Ι Ο μ πι以下であることが好ま しい。 かかる構成によれば、 液晶封止剤の侵入を効果的に防止することが可 能になると同時に、 装置の小型化及びコンパク ト化を効果的に図ること が可能となる。 The present invention has been made in view of the problems of the related art, and provides a liquid crystal display device that can be reduced in size and compact and that can prevent display unevenness due to a liquid crystal encapsulant. It is intended to provide. In order to achieve these objects, a liquid crystal display device according to the present invention includes: a pair of substrates each having at least a film element including an electrode film formed on one main surface; A liquid crystal layer filled with liquid crystal molecules is formed so as to face each other with a gap therebetween, and the gap is formed between each of the electrode films of the pair of substrates in the gap. A liquid crystal sealing portion is formed so as to surround a display area, which is an aggregate of pixels including the liquid crystal layer sandwiched therebetween, and to form a liquid crystal injection path, and is surrounded by the liquid crystal sealing portion. A liquid crystal display device in which the liquid crystal injection path is sealed with a liquid crystal encapsulant after the liquid crystal molecules are filled from the liquid crystal injection path into the filled space to form the liquid crystal layer. At least one end of the film is the liquid crystal A step is formed between the liquid crystal injection port side end of the stop and the end of the display area, so that a step is formed between the stop and the substrate, and the step is 0.1 lwm or more. 20 zm or less. According to such a configuration, a step of not less than 0.1 μππι and not more than 20 μππι is formed depending on the thickness of the film. Therefore, the step prevents the liquid crystal encapsulant from entering the display area. Becomes possible. In particular, in such a configuration, even if the distance from the liquid crystal injection port side end of the liquid crystal sealing portion to the display area end can be reduced, it is possible to prevent the liquid crystal sealing agent from entering the display area. become c Therefore, in the liquid crystal display, while achieving excellent display by preventing the occurrence of display unevenness, it is possible to reduce the size and compact of the apparatus. It is preferable that the step is not less than 0.2 μπι and not more than Ομπι. According to this configuration, it is possible to effectively prevent the liquid crystal encapsulant from entering, and at the same time, it is possible to effectively reduce the size and the size of the device.
前記膜の一端部が、 前記液晶封止部の液晶注入口側端部と前記表示ェ リァの端部との中間に配置されることが好ましい。  It is preferable that one end of the film is disposed between the end of the liquid crystal sealing portion on the side of the liquid crystal injection port and the end of the display area.
かかる構成によれば、 液晶封止部の液晶注入口側端部と表示ェリ ァ端 部との中間に前記段差が形成されるため、 この中間領域から奥への液晶 封止剤の侵入が防止される。 したがって、 前記中間領域より も奥に位置 する表示エリアへの液晶封止剤の侵入が、 よ り効果的に防止される。 前記段差が、 少なく とも保護膜を含んで形成されてもよい。 また、 前 記段差が、 前記電極膜及びノまたは配向膜を含んで形成されてもよい。 かかる構成では、 液晶表示装置を構成する液晶表示素子が従来から備 える構成要素を利用して段差が形成されるため、 大幅な製造工程の変更 なく容易にかつ低コス トで、 表示ムラが防止された小型でコンパク トな 表示装置を得ることができる。 特に、 保護膜は、 構造上、 電極膜や配向 膜に比べて従来から膜厚が厚いので、 前述のよ うな高さの段差を形成す るのに適している。  According to this configuration, the step is formed between the liquid crystal injection port side end of the liquid crystal sealing portion and the display area end, so that the liquid crystal sealing agent does not penetrate from the intermediate region to the back. Is prevented. Therefore, the intrusion of the liquid crystal sealant into the display area located deeper than the intermediate region is more effectively prevented. The step may be formed including at least a protective film. Further, the step may be formed to include the electrode film and the or the alignment film. In such a configuration, since the liquid crystal display element constituting the liquid crystal display device forms a step using a conventionally provided component, display unevenness is prevented easily and at low cost without a significant change in the manufacturing process. Thus, a compact and compact display device can be obtained. In particular, since the protective film is conventionally thicker in structure than the electrode film and the alignment film, it is suitable for forming the step having the above-described height.
前記段差が、 前記膜要素のうちの複数の膜の各一端部を一致させて配 置することによ り形成されてもよい。  The step may be formed by arranging one end of each of a plurality of membranes of the membrane element so as to coincide with each other.
かかる構成では、 積層した複数の膜の一端部を一致させることにより 段差が形成される。 このよ うな構成では、 複数の膜を積層するため、 大 きな段差を形成することが可能となる。 あるいは、 かかる構成では、 複 数の膜の合計の膜厚によ り前記段差の高さが決まるため、 各膜の膜厚が 薄くても、 前述の高さの段差を形成することが可能となり、 よって、 装 置全体の薄型化を図ることが可能となる。  In such a configuration, a step is formed by matching one ends of the stacked films. In such a configuration, since a plurality of films are stacked, a large step can be formed. Alternatively, in such a configuration, since the height of the step is determined by the total thickness of a plurality of films, it is possible to form the above-described step even if the thickness of each film is small. Therefore, it is possible to reduce the thickness of the entire device.
本発明の上記目的、 特徴、 及び利点は、 添付図面参照の下、 以下の好 適な実施態様の詳細な説明から明らかにされる。 〔図面の簡単な説明〕 The above objects, features and advantages of the present invention will be apparent from the following detailed description of preferred embodiments with reference to the accompanying drawings. [Brief description of drawings]
第 1図は、 実施の形態 1 にかかる液晶表示装置の概略平面断面図であ る。  FIG. 1 is a schematic plan sectional view of the liquid crystal display device according to the first embodiment.
第 2図は、 第 1図の II一 ΙΓ 線における液晶表示装置の側方断面図で ある。  FIG. 2 is a side sectional view of the liquid crystal display device taken along line II of FIG.
第 3図は、 実施の形態 2にかかる液晶表示装置の側方断面図である。 第 4図は、 実施の形態 3にかかる液晶表示装置の側方断面図である。 第 5図は、 実施の形態 4にかかる液晶表示装置の速報断面図である。 第 6図は、 従来の液晶表示装置の概略平面断面図である。  FIG. 3 is a side sectional view of the liquid crystal display device according to the second embodiment. FIG. 4 is a side sectional view of the liquid crystal display device according to the third embodiment. FIG. 5 is a preliminary sectional view of a liquid crystal display device according to a fourth embodiment. FIG. 6 is a schematic plan sectional view of a conventional liquid crystal display device.
第 7図は、 第 6図の VII— VII ' 線における側方断面図である。  FIG. 7 is a side sectional view taken along line VII-VII ′ of FIG.
〔発明を実施するための最良の形態〕 [Best mode for carrying out the invention]
以下、 本発明の実施の形態について、 図面を参照しながら説明する。 (実施の形態 1 )  Hereinafter, embodiments of the present invention will be described with reference to the drawings. (Embodiment 1)
第 1図は、 実施の形態 1 にかかる液晶表示装置の概略平面断面図であ り、 第 2図は、 第 1図の II一 ΙΓ 線における側面断面図である。 なお、 第 1図及び第 2図では、 液晶表示装置の主な構成要素のうちの液晶表示 素子のみを示しており、 これ以外の構成要素、 例えば、 バックライ トな どの照明装置や、 前記素子で実際に表示を行うための素子駆動構造等に ついては、 図示を省略している。  FIG. 1 is a schematic plan sectional view of the liquid crystal display device according to the first embodiment, and FIG. 2 is a side sectional view taken along line II in FIG. FIGS. 1 and 2 show only the liquid crystal display element among the main components of the liquid crystal display device, and other components, for example, a lighting device such as a backlight or the above-described device. Illustration of an element driving structure for actually performing display is omitted.
第 1図及び第 2図に示すよ うに、 液晶表示装置の液晶表示素子は、 ァ クティブマ ト リ クス基板 (T F Τァレイ基板) 1 0 1 と対向基板 1 0 2 との間に液晶 4が挟持されて構成されている。 後述するように、 T F T ァレイ基板 1 0 1 には、 平面視において互いに直交する複数のソース線 及びゲー ト線が配設されており、 このゲー ト線及びソース線で区画され た領域が 1 つの画素を構成している。 そして、 T F Tア レイ基板 1 0 1 には、 画素毎にスイ ッチング素子と して周知の T F Τが配設されると と もに、 画素毎に区分された画素電極が形成されている。 このよ う に、'本 実施の形態の液晶表示装置は、 画素毎に T F Tが形成されたァクティブ 駆動型の表示装置である。 As shown in FIGS. 1 and 2, the liquid crystal display element of the liquid crystal display device has a liquid crystal 4 sandwiched between an active matrix substrate (TF array substrate) 101 and a counter substrate 102. It is configured. As will be described later, the TFT array substrate 101 is provided with a plurality of source lines and gate lines that are orthogonal to each other in a plan view, and a region defined by the gate lines and the source lines is one. A pixel. Then, on the TFT array substrate 101, a well-known TF # is provided as a switching element for each pixel, and a pixel electrode divided for each pixel is formed. Like this, the book The liquid crystal display device according to the embodiment is an active drive type display device in which a TFT is formed for each pixel.
液晶表示装置では、 前記画素がマ ト リ タス状に複数形成されて表示ェ リア Aが構成されている。 ここでは図示を省略しているが、 前述のソー ス線及びゲー ト線を駆動させるためのソース ドライバ及びゲー ト ドライ バが液晶表示素子の周辺に取り付けられており、 さ らに、 前記ソース ド ライバ及びゲー ト ドライバを制御する制御装置が配設されている。 この よ うに構成された液晶表示装置では、 制御装置が、 外部から入力される 映像信号に応じて、 ゲー ト ドライバ及びソース ドライバにそれぞれ制御 信号を出力する。 すると、 ゲー ト ドライバがゲー ト線にゲー ト信号を出 力して各画素のスイ ッチング素子 (T F T ) を順次オンさせ、 一方、 ソ ース ドライバが、 それにタイ ミングを合わせてソース線を通じて映像信 号を各画素の画素電極に順次入力する。 それにより、 液晶が変調され、 バックライ ト等の照明装置から出射される光の透過率が変化して、 液晶 表示装置を観察する人の目に、 映像信号に対応する映像が映る。  In the liquid crystal display device, the display area A is configured by forming a plurality of the pixels in a matrix shape. Although not shown here, a source driver and a gate driver for driving the above-mentioned source line and gate line are mounted around the liquid crystal display element. A control device for controlling the driver and the gate driver is provided. In the liquid crystal display device configured as described above, the control device outputs a control signal to each of the gate driver and the source driver according to a video signal input from the outside. Then, the gate driver outputs a gate signal to the gate line to turn on the switching element (TFT) of each pixel sequentially, while the source driver adjusts the timing to the image via the source line. The signal is sequentially input to the pixel electrode of each pixel. As a result, the liquid crystal is modulated, the transmittance of light emitted from a lighting device such as a backlight changes, and an image corresponding to the image signal appears in the eyes of a person viewing the liquid crystal display device.
T F Tァレイ基板 1 0 1は絶縁性の透明なガラス基板 1 を有し、 この ガラス基板 1上に、 複数のゲー ト線が所定間隔で平行に配設されると と もに、 これらのグー ト線と平面視において直交する複数のソース線が、 絶縁層によ りゲー ト線と絶縁された状態で、所定間隔で配設されている。 このゲー ト線と ソース線とによって、 前述のよ うに、 1つの画素の領域 が決まる。 そして、 各画素では、 ゲー ト線とソース線との交差部にスィ ツチング素子と して T F Tが形成されており、 T F Tのゲー ト電極にゲ 一ト線が接続されると ともに、 T F Tのソース電極にソース線が接続さ れている。 ここでは、 ソース線、 ゲー ト線、 T F T、 及びこれらを絶縁 する絶縁層をまとめて配線層 2 0 1 と して図示している。 そして、 T F Tを保護すると ともに画素電極との層間絶縁膜と して機能する保護膜 8 aが、 配線層 2 0 1 を覆う よ うに形成されている。 さらに、 保護膜 8 a 上には、 画素毎に区分された画素電極 2 0 2が形成されている。 各画素 において、 画素電極 2 0 2は、 T F Tの ドレイ ン領域に電気的に接続し ている。 この画素電極 2 0 2上には、 配向膜 3 aが形成されている。 保 護膜 8 aの膜厚は 3 mであり、 ここでは感光性のァク リル系の樹脂膜 が用いられている。 また、 配向膜 3 aの膜厚は、 0. 1 μ ιηである。 一方、 前記 T F Tァレイ基板 1 0 1 と対向する対向基板 1 0 2は、 絶 縁性の透明なガラス基板 2を有し、 ガラス基板 2の内面には、 カラーフ ィルタ 2 0 3 と、 このカラーフィルタ 2 0 3を保護するための保護膜 8 b と、 対向電極たる I T〇 9 と、 配向膜 3 b とが順次形成されている。 保護膜 8 bの膜厚は 3 μ mであり、 前述の保護膜 8 a と同様にァク リル 系の膜が用いられている。 また、 I T 09の膜厚は 0. l ^ mである。 また、 配向膜 3 bの膜厚は、 0. Ι μ πιである。 The TFT array substrate 101 has an insulating transparent glass substrate 1, on which a plurality of gate lines are arranged in parallel at predetermined intervals and these gate lines are provided. A plurality of source lines orthogonal to the line in plan view are arranged at predetermined intervals while being insulated from the gate line by an insulating layer. As described above, the area of one pixel is determined by the gate line and the source line. In each pixel, a TFT is formed as a switching element at the intersection of the gate line and the source line, and the gate line is connected to the gate electrode of the TFT and the source of the TFT is formed. The source line is connected to the electrode. Here, the source line, the gate line, the TFT, and the insulating layers that insulate them are collectively illustrated as a wiring layer 201. Then, a protective film 8a that protects the TFT and functions as an interlayer insulating film with the pixel electrode is formed so as to cover the wiring layer 201. Further, on the protective film 8a, a pixel electrode 202 divided for each pixel is formed. Each pixel In the above, the pixel electrode 202 is electrically connected to the drain region of the TFT. On this pixel electrode 202, an alignment film 3a is formed. The thickness of the protective film 8a is 3 m, and here, a photosensitive acrylic resin film is used. The thickness of the alignment film 3a is 0.1 μιη. On the other hand, an opposing substrate 102 facing the TFT array substrate 101 has an insulating transparent glass substrate 2, and a color filter 203 is provided on the inner surface of the glass substrate 2. A protective film 8b for protecting 203, an IT-9 serving as a counter electrode, and an alignment film 3b are sequentially formed. The thickness of the protective film 8b is 3 μm, and an acrylic film is used similarly to the above-mentioned protective film 8a. The thickness of IT 09 is 0.1 l ^ m. The thickness of the alignment film 3b is 0.1 μππ.
T F Τァレイ基板 1 0 1 と対向基板 1 0 2 とは、 上記各膜が形成され た面が対向し、 かつ、 間隙を有するよ うに図示されないスぺーサによつ て所定の間隔をあけて配置され、 液晶封止用シール剤 5で貼り合わされ ている。 液晶封止用シール剤 5は、 平面視において表示エリア Αを囲み かつ液晶 4を注入するための通路である液晶注入路 7を形成するよ うに 両基板 1 0 1, 1 0 2間に配設されている。それにより、両基板 1 0 1, 1 0 2間に液晶 4が注入されて漏れない空間を形成している。液晶 4は、 液晶注入路 7を介して、 T F Tァレイ基板 1 0 1 と対向基板 1 0 2 と液 晶封止用シール剤 5で囲まれて形成された空間中に注入され、 前記空間 を満たしている。液晶注入路 7は、液晶 4が前記空間に注入された後に、 液晶封止剤 6によって封止される。 液晶封止剤 6 と しては、 例えば光硬 化型アタ リル系樹脂や熱硬化型エポキシ樹脂等が用いられる。 液晶注入 路 7の幅は、 0. 5〜5 c m程度である。 また、 液晶封止剤注入側にお ける表示エリ ァ Aの端部から T F Tァ レイ基板 1及び対向基板 2の端部 までの距離 bは、 0. 2 5 c mである。  The TF array substrate 101 and the opposing substrate 102 are spaced at a predetermined distance by a spacer (not shown) so that the surfaces on which the respective films are formed face each other and have a gap. They are arranged and bonded with a liquid crystal sealing sealant 5. The liquid crystal sealing sealant 5 is disposed between the substrates 101 and 102 so as to surround the display area 表示 in a plan view and form a liquid crystal injection path 7 which is a path for injecting the liquid crystal 4. Have been. Thereby, the liquid crystal 4 is injected between the two substrates 101 and 102 to form a space that does not leak. The liquid crystal 4 is injected through the liquid crystal injection path 7 into a space surrounded by the TFT array substrate 101, the opposite substrate 102, and the liquid crystal sealing agent 5, and fills the space. ing. The liquid crystal injection path 7 is sealed by the liquid crystal sealing agent 6 after the liquid crystal 4 is injected into the space. As the liquid crystal encapsulant 6, for example, a photocurable acryl resin or a thermosetting epoxy resin is used. The width of the liquid crystal injection path 7 is about 0.5 to 5 cm. The distance b from the end of the display area A to the end of the TFT array substrate 1 and the end of the counter substrate 2 on the liquid crystal encapsulant injection side is 0.25 cm.
ここで、 保護膜 8 aは T F Tァレイ基板 1 0 1上の全面に形成されて はおらず、 T F Tァレイ基板 1 0 1の液晶注入路 7側の端部から表示ェ リ ァ Aまでの間の所定領域は保護膜 8 aが配設されずにガラス基板 1が 露出している。 つま り、 保護膜 8 aの液晶注入路 7側の端部が、 T F T ァレイ基板 1 0 1 の液晶注入路 7側の端部から表示ェリァ Aの液晶注入 路 7側の端部までの範囲の所定の位置に形成されている。 このよ うな構 造とすることで、 T F Tアレイ基板 1 0 1 と保護膜 8 a との間に段差が 形成される。 この段差の高さは保護膜 8 aの厚さに相当し、 具体的には 3 μ ηιである。 同様に、 保護膜 8 bは対向基板 1 0 2上の全面に形成さ れてはおらず、 保護膜 8 bの液晶注入路 7側の端部が、 対向基板 2の液 晶注入路 7側の端部から表示ェリァ Aの液晶注入路 7側の端部までの範 囲の所定の位置に形成されている。 このよ うな構造とすることで、 対向 基板 1 0 2 と保護膜 8 b との間に、 前記 T F Tァレイ基板 1 0 1側の段 差と対称に段差が形成される。 この段差の高さは保護膜 8 bの厚さに相 当し、 具体的には 3 μ mである。 Here, the protective film 8a is not formed on the entire surface of the TFT array substrate 101, and the display layer is formed from the end of the TFT array substrate 101 on the liquid crystal injection path 7 side. The glass substrate 1 is exposed in a predetermined region up to the area A without the protective film 8a being provided. That is, the end of the protective film 8a on the liquid crystal injection path 7 side extends from the end of the TFT array substrate 101 on the liquid crystal injection path 7 side to the end of the display area A on the liquid crystal injection path 7 side. It is formed at a predetermined position. With such a structure, a step is formed between the TFT array substrate 101 and the protective film 8a. The height of this step corresponds to the thickness of the protective film 8a, and is specifically 3 μηι. Similarly, the protective film 8 b is not formed on the entire surface of the counter substrate 102, and the end of the protective film 8 b on the liquid crystal injection path 7 side is opposite to the liquid crystal injection path 7 on the counter substrate 2. It is formed at a predetermined position in the range from the end to the end of the display area A on the liquid crystal injection path 7 side. With such a structure, a step is formed between the opposing substrate 102 and the protective film 8b symmetrically with the step on the TFT array substrate 101 side. The height of this step corresponds to the thickness of the protective film 8b, and is specifically 3 μm.
前述したよ うに、 T F Tアレイ基板 1 0 1 と保護膜 8 a との間、 およ び、 対向基板 1 0 2 と保護膜 8 b との間には、 3 /z mの段差がそれぞれ 形成されている。 このため、 液晶注入路 7を液晶封止剤 6で封止する場 合に、 液晶封止剤 6が前記段差より奥に侵入しない。 つま り、 保護膜 8 a 、 8 bが形成されていない領域 B、 すなわち液晶注入路 7に相当する 領域よ り奥には、 液晶封止剤 6が侵入することはない。 したがって、 距 離 bが小さい場合であっても表示ェリァ Aに液晶封止剤 6が達すること はなく 、 それゆえ、 液晶封止剤 6が液晶 4の配向性を乱すことはない。 前記段差は、 T F Tァレイ基板 1 0 1及び対向基板 1 0 2の液晶注入路 7側の端部から表示ェリァ Aの液晶注入路 7側の端部までの範囲の任意 の位置に形成すればよいが、 液晶注入路 7内に前記段差を形成すること が特に好ましい。 それによ り、 表示エリ ア Aへの液晶封止剤 6の侵入を 確実に防止することが可能となり、 表示ェリア Aにおける表示ムラの発 生を効果的に防止することが可能となる。  As described above, steps of 3 / zm are formed between the TFT array substrate 101 and the protective film 8a, and between the opposing substrate 102 and the protective film 8b. I have. Therefore, when the liquid crystal injection path 7 is sealed with the liquid crystal sealant 6, the liquid crystal sealant 6 does not penetrate deeper than the step. In other words, the liquid crystal sealing agent 6 does not penetrate into the region B where the protective films 8a and 8b are not formed, that is, the region corresponding to the liquid crystal injection path 7. Therefore, even when the distance b is small, the liquid crystal encapsulant 6 does not reach the display area A, and therefore the liquid crystal encapsulant 6 does not disturb the orientation of the liquid crystal 4. The step may be formed at any position in the range from the end of the TFT array substrate 101 and the counter substrate 102 on the liquid crystal injection path 7 side to the end of the display area A on the liquid crystal injection path 7 side. However, it is particularly preferable to form the step in the liquid crystal injection path 7. This makes it possible to reliably prevent the liquid crystal encapsulant 6 from entering the display area A, and to effectively prevent display unevenness in the display area A.
以上のよ うに、 実施の形態 1 にかかる液晶表示装置では、 T F Tァレ ィ基板 1 0 1上および対向基板 1 0 2上に、 液晶封止剤 6侵入を防止す るのに十分な高さの段差が保護膜 8 a、 8 bにより形成されているので、 距離 b を小さく しても、 液晶封止剤 6が表示エリア Aの内側に侵入しな レ、。 そのため、 液晶封止剤 6が液晶 4の配向性を乱すことはなく、 表示 ムラを防ぎつつ、 装置の小型化及びコンパク ト化を図ることが可能とな る。 また、 このよ うな構成では、 既存の保護膜 8 a, 8 bを用いている ため、 装置の製造工程を大きく変更することなく、 容易にかつ低コス ト で製造することが可能である。 As described above, in the liquid crystal display device according to the first embodiment, the TFT array is used. Since the protective films 8a and 8b have steps formed on the substrate 101 and the counter substrate 102 with a height high enough to prevent the liquid crystal encapsulant 6 from entering, the distance b Even if the size is reduced, the liquid crystal sealant 6 does not enter the inside of the display area A. Therefore, the liquid crystal encapsulant 6 does not disturb the orientation of the liquid crystal 4, and it is possible to reduce the size and the size of the device while preventing display unevenness. Further, in such a configuration, since the existing protective films 8a and 8b are used, the device can be manufactured easily and at low cost without largely changing the manufacturing process of the device.
なお、 上記においては、 T F Tアレイ基板 1 0 1側及び対向基板 1 0 2側の保護膜 8 a, 8 bの膜厚を 3 μ mと しているが、 保護膜 8 a, 8 bの膜厚は、 液晶封止剤 6 の侵入を防止できる段差を形成可能な膜厚で あれば上記に限定されるものではなく 、 具体的には 0 . 1〜2 0 μ ιη程 度、 より好ましく は 0 . 2〜 : Ι Ο μ πι程度、 さらに好ましく は 0 . 6〜 8 μ ιηであればよレ、。 なお、 保護膜 8 a, 8 b の膜厚が厚いほど段差が 大き くなるので前述の侵入防止効果は大きく なる力 膜厚が厚すぎると、 液晶表示装置全体の厚さが厚く なり、 また、 膜形成工程に要する時間が 長く なり、 スループッ トが低下して生産性が低下する。 したがって、 保 護膜 8 a, 8 bの膜厚の上限は上記とする。 また、 本実施の形態では、 画素電極との層間絶縁膜と して機能する保護膜 8 a によ り T F Tアレイ 基板 1側の段差が形成されているが、 層間絶縁膜以外に、 T F Tのパッ シベーシヨ ン膜で段差を形成してもよく 、 又は、 層間絶縁膜とパッシベ ーション膜とによって段差を形成してもよい。 パッシベーショ ン膜と し ては、 S i N系の膜が好適に用いられ、 その膜厚は 0 . 1〜 5 mであ る。 また、 上記においては、 T F Tアレイ基板 1 0 1側の保護膜 8 a と 対向基板 1 0 2側の保護膜 8 bの膜厚とが同一である場合について説明 したが、 保護膜 8 a , 8 bの膜厚は、 上記の範囲内でそれぞれ異なって いてもよい。  In the above description, the thicknesses of the protective films 8a and 8b on the TFT array substrate 101 side and the counter substrate 102 side are 3 μm, but the protective films 8a and 8b The thickness is not limited to the above as long as it is a film thickness capable of forming a step capable of preventing the liquid crystal encapsulant 6 from entering, and specifically, about 0.1 to 20 μιη, more preferably 0.2 to: about 程度 μπι, more preferably 0.6 to 8μιη. It should be noted that the greater the thickness of the protective films 8a and 8b, the larger the step becomes. Therefore, the above-described effect of preventing intrusion becomes large. The time required for the film formation process becomes longer, the throughput decreases, and the productivity decreases. Therefore, the upper limit of the thickness of the protective films 8a and 8b is as described above. Further, in the present embodiment, the step on the TFT array substrate 1 side is formed by the protective film 8a functioning as an interlayer insulating film with the pixel electrode. The step may be formed by a silvation film, or the step may be formed by an interlayer insulating film and a passivation film. As the passivation film, a SiN-based film is preferably used, and its thickness is 0.1 to 5 m. In the above description, the case where the thickness of the protective film 8a on the TFT array substrate 101 and the thickness of the protective film 8b on the counter substrate 102 are the same has been described, but the protective films 8a, 8 The thickness of b may be different within the above range.
(実施の形態 2 ) 本発明の実施の形態 2にかかる液晶表示装置は、 本発明の実施の形態 1 にかかる液晶表示装置を改良したものである。 第 3図は、 実施の形態 2にかかる液晶表示装置の側面断面図である。 第 3図に示すよ う に、 実 施の形態 2にかかる液晶表示装置が実施の形態 1 にかかる液晶表示装置 と異なる点は、 液晶注入路 7側の I T O 9の端部が保護膜 8 bの端部と 一致し、 かつ、 液晶注入路 7側の画素電極 2 0 2の端部が保護膜 8 a と 一致するという点である。 つまり、 一致する I T O 9 と保護膜 8 b との 端部が、 対向基板 1 0 2 との間で段差を形成し、 また、 一致する画素電 極 2 0 2 と保護膜 8 a との端部が、 T F Tア レイ基板 1 0 1 との間で段 差を形成している。 ここで、画素電極 2 0 2の厚さは 0. 2 ΠΙであり、 I T O 9の厚さは 0. 2 μ πιであるので、 本実施の形態では、 T F Tァ レイ基板 1 0 1側に形成された段差は 3. 2 mであり、 対向基板 2側 に形成された段差は 3. 2 μ πιである。 このよ うに、 画素電極 2 0 2の 端部を保護膜 8 a の端部と一致させると ともに、 I T O 9の端部を保護 膜 8 bの端部と一致させることによ り、 保護膜 8 a及び保護膜 8 bだけ で形成した段差に比べて、 さらに大きな段差を形成することができる。 したがって、 実施の形態 1 において前述した効果が、 よ り有効に奏され る。 なお、 実施の形態 2にかかる液晶表示装置のその他の構成は、 実施 の形態 1 にかかる液晶表示装置と同様である。 (Embodiment 2) The liquid crystal display according to the second embodiment of the present invention is an improvement of the liquid crystal display according to the first embodiment of the present invention. FIG. 3 is a side sectional view of the liquid crystal display device according to the second embodiment. As shown in FIG. 3, the liquid crystal display device according to the second embodiment is different from the liquid crystal display device according to the first embodiment in that the end of the ITO 9 on the liquid crystal injection path 7 side is a protective film 8b. And the end of the pixel electrode 202 on the liquid crystal injection path 7 side matches the protective film 8a. In other words, the ends of the matching ITO 9 and the protective film 8b form a step between the counter substrate 102 and the ends of the matching pixel electrode 202 and the protective film 8a. However, a step is formed with the TFT array substrate 101. Here, the thickness of the pixel electrode 202 is 0.2 mm, and the thickness of the ITO 9 is 0.2 μππ, so that in this embodiment, the pixel electrode 202 is formed on the TFT array substrate 101 side. The step formed was 3.2 m, and the step formed on the counter substrate 2 side was 3.2 μπι. As described above, the end of the pixel electrode 202 is made to coincide with the end of the protective film 8a, and the end of the ITO 9 is made to coincide with the end of the protective film 8b. It is possible to form a larger step than the step formed only by the protective film 8a and the protective film 8b. Therefore, the effects described in the first embodiment are more effectively achieved. Other configurations of the liquid crystal display device according to the second embodiment are the same as those of the liquid crystal display device according to the first embodiment.
なお、 上記においては、 画素電極 2 0 2の膜厚が 0. 2 111でぁり 1 T 09の膜厚が 0. 2 μ mである場合について説明したが、 画素電極 2 0 2及び I T O 9の膜厚はこれに限定されるものではなく、 例えば、 画 素電極 2 0 2は 0. 0 5〜 0. 5 m程度、 I T 09は 0. 0 5〜 0. 5 μ πιであればよレ、。 I T 0 9 と保護膜 8 b とで形成される段差、及び、 画素電極 2 0 2 と保護膜 8 a とで形成される段差が、 液晶封止剤 6の侵 入を阻止可能な高さ、 具体的には 0. 1 μ m以上となるのであれば、 I T O 9及び保護膜 8 bの膜厚の組み合わせ、 ならびに、 画素電極 2 0 2 及び保護膜 8 aの膜厚の組み合わせは任意である。 なお、 画素電極 2 0 2及び I T〇 9の膜厚が厚すぎると、 光の透過率が低下すると ともに、 段差が大き く なりすぎるために画素電極 2 0 2及び I Τ 09 よ り上層の 膜のカバレッジが低下して段切れを発生する可能性が大きく なる。また、 膜形成工程に要する時間が長く なり、 スループッ トが低下して生産性が 低下すると ともに、 装置全体の厚さが厚く なる。 したがって、 画素電極 2 0 2及び I Τ 09の上限は 2 0 μ ηι以下程度するのが好ま しい。 In the above description, the case where the film thickness of the pixel electrode 202 is 0.2111 and the film thickness of 1T09 is 0.2 μm is described. The thickness of the electrode is not limited to this.For example, the pixel electrode 202 may have a thickness of about 0.05 to 0.5 m, and the IT09 may have a thickness of 0.05 to 0.5 μπι. Les ,. The step formed between IT 09 and the protective film 8 b and the step formed between the pixel electrode 202 and the protective film 8 a have such a height that the liquid crystal encapsulant 6 can be prevented from penetrating, Specifically, as long as the thickness is 0.1 μm or more, the combination of the thickness of the ITO 9 and the protective film 8b and the combination of the thickness of the pixel electrode 202 and the protective film 8a are arbitrary. . The pixel electrode 20 If the film thickness of IT 22 and IT〇9 is too large, the light transmittance will decrease, and the step will be too large, and the coverage of the film above the pixel electrodes 202 and IΤ09 will decrease. The possibility of step breakage increases. In addition, the time required for the film forming process is prolonged, the throughput is reduced, the productivity is reduced, and the thickness of the entire device is increased. Therefore, it is preferable that the upper limits of the pixel electrodes 202 and IΤ09 be about 20 μηι or less.
(実施の形態 3 )  (Embodiment 3)
本発明の実施の形態 3にかかる液晶表示装置は、 本発明の実施の形態 1 にかかる液晶表示装置を改良したものである。 第 4図は、 実施の形態 3にかかる液晶表示装置の側面断面図である。 第 4図に示すように、 実 施の形態 3にかかる液晶表示装置が実施の形態 1 にかかる液晶表示装置 と異なる点は、 前述の段差が、 保護膜 8 a, 8 bではなく、 I T 09 と 配向膜 3 b、 及び、 画素電極 2 0 2 と配向膜 3 aによって形成される点 である。  The liquid crystal display according to the third embodiment of the present invention is an improvement of the liquid crystal display according to the first embodiment of the present invention. FIG. 4 is a side sectional view of the liquid crystal display device according to the third embodiment. As shown in FIG. 4, the difference between the liquid crystal display device according to the third embodiment and the liquid crystal display device according to the first embodiment is that the above-described step is not caused by the protective films 8a and 8b but by the IT 09 And the alignment film 3b, and the pixel electrode 202 and the alignment film 3a.
すなわち、 本実施の形態では、 保護膜 8 aおよび保護膜 8 bが、 T F Tァレイ基板 1 0 1および対向基板 1 0 2の全面に形成されており、 よ つて、 保護膜 8 a と T F Tァレイ基板 1 0 1 との間、 及び、 保護膜 8 b と対向基板 1 0 2 との間には、 段差が形成されていない。 この場合の保 護膜 8 a, 8 bの膜厚は、 3 mである。 一方、 対向基板 1 0 2側にお いて、 I T O 9は、 保護膜 8 bの全面には形成されておらず、 対向基板 1 0 2の液晶注入路 7側の端部から表示ェリ ァ Aまでの間の所定領域で は、 I T O 9が存在せずに保護膜 8 bが露出している。 そして、 液晶注 入路 7側の端部がこの I T O 9の端部と一致するよ うに、 配向膜 3 わが 配設されている。 つまり、 I T O 9及び配向膜 3 bの液晶注入路 7側の 端部が一致して、 保護膜 8 bの液晶注入路 7側の端部から表示エリア A の液晶注入路 7側の端部までの範囲の所定の位置に形成されている。 そ れによ り、 保護膜 8 b とこれら配向膜 3 b及び I T0 9 との間に段差が 形成されている。 この場合、 I T 0 9の膜厚が 0. 2 ju mであり、 配向 膜 3 b の膜厚が 0 . 2 μ mであるため、 前記段差は 0 . 4 μ ηιである。 一方、 T F Τァレイ基板 1 0 1側において、 画素電極 2 0 2は、 保護膜 8 a の全面には形成されておらず、 T F Tァレイ基板 1 0 1 の液晶注入 路 7側の端部から表示ェリ ァ Aまでの間の所定領域では、 画素電極 2 0 2が存在せずに保護膜 8 aが露出している。 そして、 液晶注入路 7側の 端部がこの画素電極 2 0 2の端部と一致するよ うに、 配向膜 3 aが配設 されている。 つま り、 画素電極 2 0 2及ぴ配向膜 3 aの液晶注入路 7側 の端部が一致して、 保護膜 8 aの液晶注入路 7側の端部から表示ェリァ Aの液晶注入路 7側の端部までの範囲の所定の位置に形成されている。 それにより、 保護膜 8 a とこれら配向膜 3 a及び画素電極 2 0 2 との間 に段差が形成されている。 この場合、 画素電極 2 0 2の膜厚が 0 . 2 μ mであり、 配向膜 3 aの膜厚が 0 . 2 / mであるため、 前記段差は 0 . 4 μ mであ。。 That is, in the present embodiment, the protective film 8a and the protective film 8b are formed on the entire surface of the TFT array substrate 101 and the opposing substrate 102, and accordingly, the protective film 8a and the TFT array substrate No step is formed between the protective film 8b and the protective film 8b and the opposing substrate 102. In this case, the thickness of the protective films 8a and 8b is 3 m. On the other hand, on the counter substrate 102 side, the ITO 9 is not formed on the entire surface of the protective film 8 b, and the display area A from the end of the counter substrate 102 on the liquid crystal injection path 7 side. The protective film 8b is exposed in the predetermined region up to this point without the ITO 9 being present. The alignment film 3 is arranged so that the end on the liquid crystal injection path 7 side coincides with the end of the ITO 9. In other words, the ends of the ITO 9 and the alignment film 3b on the liquid crystal injection path 7 side coincide, and from the end of the protective film 8b on the liquid crystal injection path 7 side to the end of the display area A on the liquid crystal injection path 7 side. Is formed at a predetermined position in the range. As a result, a step is formed between the protective film 8b and these alignment films 3b and IT09. In this case, the thickness of IT09 is 0.2 jum and the orientation is Since the thickness of the film 3b is 0.2 μm, the step is 0.4 μηι. On the other hand, on the TF array substrate 101 side, the pixel electrode 202 is not formed on the entire surface of the protective film 8a, and is displayed from the end of the TFT array substrate 101 on the liquid crystal injection path 7 side. In a predetermined region up to the area A, the protective film 8a is exposed without the pixel electrode 202. The alignment film 3a is provided so that the end on the side of the liquid crystal injection path 7 coincides with the end of the pixel electrode 202. In other words, the ends of the pixel electrode 202 and the alignment film 3a on the liquid crystal injection path 7 side coincide, and the liquid crystal injection path 7 of the display area A starts from the end of the protective film 8a on the liquid crystal injection path 7 side. It is formed at a predetermined position in the range up to the end on the side. As a result, a step is formed between the protective film 8a, the alignment film 3a, and the pixel electrode 202. In this case, since the thickness of the pixel electrode 202 is 0.2 μm and the thickness of the alignment film 3a is 0.2 / m, the step is 0.4 μm. .
以上の構成を有する本実施形態においても、 T F Tアレイ基板 1 0 1 側及び対向基板 1 0 2側に、 液晶封止剤の侵入を阻止するのに十分な段 差が形成されているため、 実施の形態 1 において前述した効果と同様の 効果が奏される。 なお、 実施の形態 3にかかる液晶表示装置のその他の 構成は、 実施の形態 1 にかかる液晶表示装置と同様である。  Also in the present embodiment having the above-described configuration, a step is formed on the TFT array substrate 101 side and the counter substrate 102 side, which is sufficient to prevent the intrusion of the liquid crystal sealant. The same effects as the effects described above in Embodiment 1 are achieved. Other configurations of the liquid crystal display device according to the third embodiment are the same as those of the liquid crystal display device according to the first embodiment.
なお、 画素電極 2 0 2、 I T O 9及び配向膜 3 a , 3 bの膜厚は上記 に限定されるものではなく、 液晶封止剤 6の侵入を防止可能な高さの段 差、 具体的には 0 . 1 m以上の段差を形成できるのであれば、 画素電 極 2 0 2、 I T O 9及び配向膜 3 a, 3 bの膜厚はこれ以外であっても よい。 また、画素電極 2 0 2 と配向膜 3 a との膜厚の組み合わせ、及び、 I T O 9 と配向膜 3 b との膜厚の組み合わせも任意である。 例えば、 画 素電極 2 0 2の膜厚が 0 . 0 5〜 0 . 5 /ί πι程度であり、 I T O 9の膜 厚が 0 . 0 5〜 0 . 5 111程度でぁり、 配向膜3 3 , 3 bの膜厚が 0 . 0 5〜 0 . 5 μ m程度であつてもよい。 また、 配向膜 3 a と配向膜 3 b とが膜厚が異なつていてもよい。 なお、 画素電極 2 0 2及び 1 丁 0 9 の 膜厚が厚すぎると、実施の形態 2において前述した不利益が生じ、また、 配向膜 3 a , 3 bの膜厚が厚すぎると、 基板間の間隔 (セルギャップ) の制御が困難となる。 The thicknesses of the pixel electrode 202, the ITO 9, and the alignment films 3a and 3b are not limited to those described above, and the height of the liquid crystal encapsulant 6 can be prevented. The thickness of the pixel electrode 202, the ITO 9, and the alignment films 3a and 3b may be other than this, as long as a step of 0.1 m or more can be formed. Further, the combination of the thickness of the pixel electrode 202 and the alignment film 3a and the combination of the thickness of the ITO 9 and the alignment film 3b are also arbitrary. For example, the film thickness of the pixel electrode 202 is about 0.05 to 0.5 / ίπι, the film thickness of ITO 9 is about 0.05 to 0.5111, and the orientation film 3 is formed. The thickness of 3, 3b may be about 0.05 to 0.5 μm. The thickness of the alignment film 3a and the thickness of the alignment film 3b may be different. Note that the pixel electrodes 202 and If the film thickness is too thick, the disadvantages described above in Embodiment 2 occur. If the film thickness of the alignment films 3 a and 3 b is too large, it is difficult to control the distance between the substrates (cell gap). .
(実施の形態 4 )  (Embodiment 4)
本発明の実施の形態 4にかかる液晶表示装置は、 本発明の実施の形態 1 にかかる液晶表示装置を改良したものである。 第 5図は、 実施の形態 4にかかる液晶表示装置の側面断面図である。 第 5図に示すよ うに、 実 施の形態 4にかかる液晶表示装置が実施の形態 1 にかかる液晶表示装置 と異なる点は、 前述の段差が、 保護膜 8 a , 8 bではなく、 新たに形成 された液晶封止剤侵入防止膜 1 0 a , 1 0 bによって形成される点であ る。  The liquid crystal display according to the fourth embodiment of the present invention is an improvement of the liquid crystal display according to the first embodiment of the present invention. FIG. 5 is a side sectional view of the liquid crystal display device according to the fourth embodiment. As shown in FIG. 5, the difference between the liquid crystal display device according to the fourth embodiment and the liquid crystal display device according to the first embodiment is that the above-described step is newly formed instead of the protective films 8a and 8b. This is a point formed by the formed liquid crystal sealant intrusion prevention films 10a and 10b.
すなわち、 本実施の形態の T F Tァレイ基板 1 0 1では、 保護膜 8 a を 覆う よ うに液晶封止剤侵入防止膜 1 0 aが形成され、 また、 対向基板 1 0 2では、 保護膜 8 bを覆う よ うに液晶封止剤侵入防止膜 1 0 bが形成 されている。 そして、 この液晶封止剤侵入防止膜 1 0 a , 1 0 bがガラ ス基板 1 , 2の全面には形成されておらず、 液晶注入路 7側の端部から 表示ェリァ Aまでの間の所定領域では、 液晶封止剤侵入防止膜 1 0 a , 1 0 bが存在せずにガラス基板 1 , 2が露出している。 つまり、 液晶封 止剤侵入防止膜 1 0 a , 1 0 b の端部が、 ガラス基板 1, 2の液晶注入 路 7側の端部から表示ェリァ Aの液晶注入路 7側の端部までの範囲の所 定の位置に形成されている。 それによ り、 ガラス基板 1 と液晶封止剤侵 入防止膜 1 0 a との間、 及び、 ガラス基板 2 と液晶封止剤侵入防止膜 1 0 b との間に段差が形成されている。 この場合、 液晶封止剤侵入防止膜 1 0 a , 1 0 bの膜厚が 5 mであるため、 前記段差の高さは 5 πιで ある。 なお、 ここで、 保護膜 8 a, 8 bの膜厚は 3 mである。 That is, in the TFT array substrate 101 of the present embodiment, the liquid crystal sealant intrusion prevention film 10a is formed so as to cover the protection film 8a, and in the counter substrate 102, the protection film 8b is formed. A liquid crystal sealant intrusion prevention film 10b is formed so as to cover the substrate. The liquid crystal sealing agent intrusion prevention films 10 a and 10 b are not formed on the entire surfaces of the glass substrates 1 and 2, and are formed between the end on the liquid crystal injection path 7 side and the display area A. In the predetermined region, the glass substrates 1 and 2 are exposed without the liquid crystal sealant intrusion prevention films 10a and 10b. In other words, the ends of the liquid crystal sealing agent intrusion prevention films 10a and 10b extend from the end of the glass substrates 1 and 2 on the liquid crystal injection path 7 side to the end of the display area A on the liquid crystal injection path 7 side. It is formed at a predetermined position in the range. As a result, steps are formed between the glass substrate 1 and the liquid crystal sealant intrusion prevention film 10a, and between the glass substrate 2 and the liquid crystal sealant intrusion prevention film 10b. In this case, since the thickness of the liquid crystal sealant intrusion prevention films 10a and 10b is 5 m, the height of the step is 5πι. Here, the thickness of the protective films 8a and 8b is 3 m.
以上の構成を有する本実施形態においても、 T F Tァレイ基板 1 0 1 側及び対向基板 1 0 2側に、 液晶封止剤の侵入を阻止するのに十分な段 差が形成されているため、 実施の形態 1 において前述した効果と同様の 効果が奏される。 なお、 実施の形態 4にかかる液晶表示装置のその他の 構成は、 実施の形態 1 にかかる液晶表示装置と同様である。 Also in the present embodiment having the above-described configuration, a step is formed on the TFT array substrate 101 side and the counter substrate 102 side, which is sufficient to prevent the intrusion of the liquid crystal sealant. The same effect as described above in Embodiment 1 The effect is achieved. Other configurations of the liquid crystal display device according to the fourth embodiment are the same as those of the liquid crystal display device according to the first embodiment.
なお、 液晶封止剤侵入防止膜 1 0 a , 1 0 bの膜厚は上記に限定され るものではなく 、 液晶封止剤 6の侵入を防止可能な高さの段差、 具体的 には 0 . 1 m程度であれば、 これ以外であってもよい。 また、 液晶封 止剤侵入防止膜 1 0 a と液晶封止剤侵入防止膜 1 0 b とが膜厚が異なつ ていてもよく 、 あるいは、 配向膜 3 a, 3 b、 画素電極 2 0 2、 及び Z 又は I T O 9を含んで段差が形成されてもよい。 なお、 液晶封止剤侵入 防止膜 1 0 a , 1 0 bの膜厚が厚すぎると、 実施の形態 1 において前述 した保護膜 8 a, 8 bの膜厚が厚すぎる場合と同様の不利益が生じるた め、 膜厚の上限を 8 μ m程度とする。  The film thickness of the liquid crystal sealant intrusion prevention films 10a and 10b is not limited to the above, but may be a step having a height capable of preventing the liquid crystal sealant 6 from intruding. If it is about 1 m, it may be other than this. Further, the liquid crystal sealing agent intrusion prevention film 10a and the liquid crystal sealing agent intrusion prevention film 10b may have different thicknesses, or the alignment films 3a and 3b and the pixel electrodes 202 , And Z or ITO 9 may be included in the step. If the thickness of the liquid crystal sealing agent intrusion prevention films 10a and 10b is too thick, the same disadvantages as in the case of Embodiment 1 where the thickness of the protective films 8a and 8b are too thick. Therefore, the upper limit of the film thickness is set to about 8 μm.
以上のよ うに、 本発明は、 アクティブマ ト リ クス基板 (T F Tアレイ 基板) と対向基板に形成される膜の少なく とも一種類を、 その端部が前 記両基板の液晶注入路側の端部から表示エリアの前記液晶注入路側の端 部までの間に位置するよ うに配置することで段差を形成し、 かつ、 この 段差を、 液晶封止剤の表示エリアへの侵入防止な高さとする。 それによ り、 液晶表示装置が小型であっても、 前記段差によって液晶封止剤が表 示ェリァ内に侵入することが防止され、 表示ムラが発生しない良好な液 晶表示装置が得られる。  As described above, according to the present invention, at least one of the films formed on the active matrix substrate (TFT array substrate) and the counter substrate is provided, and the ends of the films are formed on the liquid crystal injection path side of the two substrates. The liquid crystal is formed so as to be positioned between the liquid crystal injection path and the end of the display area on the liquid crystal injection path side, and the height of the step is such that the liquid crystal encapsulant does not enter the display area. Thus, even if the liquid crystal display device is small, the step prevents the liquid crystal encapsulant from entering the display area, and a good liquid crystal display device with no display unevenness can be obtained.
ここで、 上記の実施の形態 1〜 4においては、 液晶封止剤と して光硬 化型ァク リル系樹脂又は熱硬化型エポキシ系樹脂を用いる場合について 説明したが、 液晶封止剤はこれ以外であってもよい。 液晶封止剤は、 そ の種類によって粘度がそれぞれ異なるため、 封止剤の種類によって流動 性がそれぞれ異なり、 よって、 表示エリアへの侵入のしゃすさもそれぞ れ異なってく る。 それゆえ、 液晶封入剤の種類によって、 前記段差の高 さ、 具体的には段差を形成する膜の膜厚を適宜設定するのが好ましい また、 本発明における段差は、 0 . 1〜 2 0 μ mの範囲であれば任意 であってもよいが、 よ り好ましくは 0 . 2〜 1 0 μ ηι、 さらに好ましく は 0 . 6〜 8 Ai mである。 ここで、 段差が 0 . l niよ り低いと、 液晶 封止剤の侵入を十分に防止することが困難である。 一方、 段差が 2 0 / mよ り高いと、 液晶封止剤の侵入の阻止効果は高まるが、 液晶表示装置 全体の厚さが厚く なるため、 液晶表示装置の薄型化 · 小型化を図ること が困難となると ともに、 段差形成工程にかかる時間が長く なりスループ ッ トが低下して生産性が低下する等の不利益が生じる。 また、 ァクティ ブマ ト リ クス基板 (T F Tアレイ基板) 側の段差と対向基板側の段差と は、 それぞれ高さが同一であっても、 あるいは異なっていてもよい。 ま た、 表示エリアへの液晶封止剤の侵入は、 液晶注入路の幅の影響も受け ると推察される。 したがって、前記段差は、液晶注入路の幅も考慮して、 適宜設定されるのが好ましい。 Here, in Embodiments 1 to 4, the case where a photocurable acrylic resin or a thermosetting epoxy resin is used as the liquid crystal encapsulant has been described. Other than this may be used. Liquid crystal encapsulants have different viscosities depending on their types, and therefore have different fluidities depending on the types of encapsulants, and therefore, the penetration into the display area is also different. Therefore, it is preferable to appropriately set the height of the step, specifically, the film thickness of the film forming the step, depending on the type of the liquid crystal encapsulant.The step in the present invention is 0.1 to 20 μm. Any value within the range of m may be used, but more preferably 0.2 to 10 μηι, and still more preferably Is 0.6 to 8 Aim. Here, if the step is lower than 0.1 nm, it is difficult to sufficiently prevent the liquid crystal encapsulant from entering. On the other hand, if the step is higher than 20 / m, the effect of preventing the infiltration of the liquid crystal encapsulant increases, but the overall thickness of the liquid crystal display device increases, so the liquid crystal display device must be made thinner and smaller. In addition, it becomes difficult, and the time required for the step forming step becomes longer, thereby decreasing throughput and reducing productivity. In addition, the step on the active matrix substrate (TFT array substrate) side and the step on the counter substrate side may have the same height or different heights. It is also assumed that the penetration of the liquid crystal encapsulant into the display area is affected by the width of the liquid crystal injection path. Therefore, it is preferable that the step is appropriately set in consideration of the width of the liquid crystal injection path.
また、 上記の実施の形態 1〜 4においては、 T F Tアレイ基板を備え たアクティブマ ト リ タス駆動の液晶表示装置について説明したが、 本発 明は、 単純マ ト リ クス駆動の液晶表示装置においても適用可能である。 上記説明から、 当業者にとっては、 本発明の多く の改良や他の実施形 態が明らかである。 従って、 上記説明は、 例示と してのみ解釈されるべ きであり、 本発明を実行する最良の態様を当業者に教示する目的で提供 されたものである。 本発明の精神を逸脱することなく 、 その構造及び Z 又は機能の詳細を実質的に変更できる。  In the first to fourth embodiments, the active matrix drive liquid crystal display device including the TFT array substrate has been described. However, the present invention relates to a simple matrix drive liquid crystal display device. Is also applicable. From the above description, many modifications and other embodiments of the present invention are obvious to one skilled in the art. Accordingly, the above description is to be construed as illustrative only and is provided for the purpose of teaching those skilled in the art the best mode of carrying out the invention. The details of its structure and Z or function may be substantially changed without departing from the spirit of the invention.
〔産業上の利用の可能性〕 [Possibility of industrial use]
本発明に係る液晶表示装置は、 A V · O A機器製品等に用いられる薄 型化 · 小型化が図られた表示装置と して有用である。  INDUSTRIAL APPLICABILITY The liquid crystal display device according to the present invention is useful as a thin and small display device used for AV / OA equipment products and the like.

Claims

求 の 囲 Request box
1 . 少なく とも電極膜を含む膜要素が一方の主面に形成された一対 の基板が、前記一方の主面同士が対向するよ うに間隙を有して配置され、 前記間隙に液晶分子が充填された液晶層が形成されると ともに、 前記間 隙において前記一対の基板の各前記電極膜と前記電極膜の間に挟まれた 前記液晶層とを含んで構成される画素の集合体である表示ェリアを囲み かつ液晶注入路を形成するよ うに液晶封止部が形成され、 前記液晶封止 部で囲まれた空間に前記液晶注入路から前記液晶分子が充填された後に 前記液晶注入路が液晶封止剤によつて封止されて前記液晶層が形成され た液晶表示装置において、 1. A pair of substrates having at least a film element including an electrode film formed on one main surface are arranged with a gap such that the one main surface faces each other, and the gap is filled with liquid crystal molecules. And a liquid crystal layer formed between the electrode films of the pair of substrates and the liquid crystal layer sandwiched between the electrode films in the gap. A liquid crystal sealing part is formed so as to surround the display area and form a liquid crystal injection path, and after the liquid crystal molecules are filled from the liquid crystal injection path into a space surrounded by the liquid crystal sealing part, the liquid crystal injection path is formed. In a liquid crystal display device in which the liquid crystal layer is formed by being sealed with a liquid crystal sealing agent,
前記膜要素のうちの少なく とも一種の膜の一端部が前記液晶封止部の 液晶注入口側端部から前記表示ェリ ァの端部までの間に配置されること により前記基板との間に段差が形成され、 かつ、 前記段差が 0 . 1 / m 以上 2 0 /x m以下であることを特徴とする液晶表示装置。  One end of at least one kind of the film elements is disposed between the liquid crystal injection port side end of the liquid crystal sealing portion and the end of the display area, so that the one end of the film element is disposed between the liquid crystal sealing portion and the substrate. A liquid crystal display device, wherein a step is formed in the liquid crystal display, and the step is not less than 0.1 / m and not more than 20 / xm.
2 . 前記段差が、 0 . 2 μ m以上 1 0 m以下である請求の範囲 1 記載の液晶表示装置。  2. The liquid crystal display device according to claim 1, wherein the step is not less than 0.2 μm and not more than 10 m.
3 . 前記膜の一端部が、 前記液晶封止部の液晶注入口側端部と前記 表示エリァの端部との中間に配置された請求の範囲 1記載の液晶表示装  3. The liquid crystal display device according to claim 1, wherein one end of the film is disposed between a liquid crystal inlet side end of the liquid crystal sealing portion and an end of the display area.
4 . 前記段差が、 少なく とも保護膜を含んで形成される請求の範囲 1記載の液晶表示装置。 4. The liquid crystal display device according to claim 1, wherein the step is formed to include at least a protective film.
5 . 前記段差が、 前記電極膜及び または配向膜を含んで形成され る請求の範囲 1記載の液晶表示装置。  5. The liquid crystal display device according to claim 1, wherein the step is formed including the electrode film and / or the alignment film.
6 . 前記段差が、 前記膜要素のうちの複数の膜の各一端部を一致さ せて配置することによ り形成された請求の範囲 1記載の液晶表示装置。  6. The liquid crystal display device according to claim 1, wherein the step is formed by arranging one ends of a plurality of films of the film element so as to coincide with each other.
PCT/JP2002/010157 2001-10-01 2002-09-30 Liquid crystal display WO2003032065A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0854635A (en) * 1994-08-09 1996-02-27 Matsushita Electric Ind Co Ltd Liquid crystal display element and its production
JPH10123571A (en) * 1996-10-24 1998-05-15 Sharp Corp Liquid crystal display device and its production
US5986736A (en) * 1995-04-26 1999-11-16 Canon Kabushiki Kaisha Liquid crystal device, image display apparatus and image forming apparatus
JP2001066613A (en) * 1999-08-25 2001-03-16 Hitachi Ltd Liquid crystal display element and its manufacture
JP2001318384A (en) * 2000-03-03 2001-11-16 Semiconductor Energy Lab Co Ltd Liquid crystal display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0854635A (en) * 1994-08-09 1996-02-27 Matsushita Electric Ind Co Ltd Liquid crystal display element and its production
US5986736A (en) * 1995-04-26 1999-11-16 Canon Kabushiki Kaisha Liquid crystal device, image display apparatus and image forming apparatus
JPH10123571A (en) * 1996-10-24 1998-05-15 Sharp Corp Liquid crystal display device and its production
JP2001066613A (en) * 1999-08-25 2001-03-16 Hitachi Ltd Liquid crystal display element and its manufacture
JP2001318384A (en) * 2000-03-03 2001-11-16 Semiconductor Energy Lab Co Ltd Liquid crystal display device

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