WO2002091439A1

WO2002091439A1 - Fabrication of a microelectromechanical system (mems) device

Info

Publication number: WO2002091439A1
Application number: PCT/US2002/004829
Authority: WO
Inventors: Mark A. Lucak; Richard D. Harris; Michael J. Knieser; Robert J. Kretschmann
Original assignee: Rockwell Automation Technologies, Inc.
Priority date: 2001-04-26
Filing date: 2002-02-20
Publication date: 2002-11-14
Also published as: WO2002091439A9

Abstract

A method for fabricating MEMS structure (58) includes etching a recess (32) in an upper surface of a substrate (22) that is bonded to a wafer that ultimately forms the MEMS structure. Accordingly, once the etching processes of the wafer are completed, the recess facilitates the realease movable structure (52) within the fabricated MEMS structure without the use of a separate sacrificial material.

Description

FABRICATION OF A MICROELECTROMECHANICAL SYSTEM (MEMS) DEVICE CROSS-REFERENCE TO RELATED APPLICATIONS

BACKGROUND OF THE INVENTION

1. Field of the Invention

[0001] I. The present invention relates to microelectromechanical systems (MEMS) and, in particular, relates to the fabrication of MEMS structures.

[0002] II. The present invention relates to microelectromechanical systems (MEMS) and, in particular, relates to the fabrication of MEMS devices using an internal void.

[0003] LU. The present invention relates to microelectromechanical systems (MEMS) and, in particular, relates to the construction of isolated MEMS devices using surface fabrication techniques.

[0004] IV. The present invention relates to microelectromechanical systems (MEMS) and, in particular, relates to the fabrication of MEMS structures.

[0005] V. The present invention relates to microelectromechanical systems (MEMS) and, in particular, relates to the fabrication of electrically isolated MEMS devices using plating techniques.

[0006] VI. The present invention relates to microelectromechanical systems (MEMS) and, in particular, relates to the fabrication of MEMS components having a protective wafer level cap.

[0007]

2. Discussion of the Related Art I.

[0008] Microelectromechanical Systems (MEMS) components are being progressively introduced into many electronic circuit applications and a variety of micro-sensor applications. Examples of MEMS components are electromechanical motors, radio frequency (RF) switches, high Q capacitors, pressure transducers and accelerometers. In one application, the MEMS structure is an accelerometer having a movable component that, in response to acceleration, is actuated so as to vary the size of a capacitive gap. Accordingly, the electrical output of the MEMS structure provides an indication of the strength of the external stimulus. [0009] One method of fabricating such components, often referred to as surface micro- machining, uses a sacrificial layer, such as silicon dioxide, that is deposited and bonded onto a substrate, such as single crystal silicon which has been covered with a layer of silicon nitride. A MEMS component material, for example polycrystallme silicon, is then deposited on the sacrificial layer, followed by a suitable conductor, such as aluminum, to form an electrical contact with the ambient environment. The silicon layer is then patterned by standard photolithographic techniques and then etched by a suitable reactive ion etching plasma or by wet chemistry to define the MEMS structure and to expose the sacrificial silicon dioxide layer. The sacrificial layer is then etched to release the MEMS component.

[0010] Several disadvantages are associated with fabricating a MEMS structure using a sacrificial layer. First, it requires an etching process that selectively etches the sacrificial layer without reacting with the other materials that will ultimately form the MEMS structure. This limits the materials that may be used when fabricating the MEMS structure. Additionally, the use of a sacrificial layer increases the amount of materials needed to form the MEMS structure, thereby adding cost to the fabrication process. Furthermore, an additional etching step is needed to remove the sacrificial layer, thereby further reducing the efficiency of the fabrication process. In particular, because the structure forming the movable MEMS element is disposed above the sacrificial layer, a significant amount of time is needed to completely undercut the sacrificial layer. [0011] What is therefore needed is an improved method for fabricating a MEMS structure that avoids the inefficiencies associated with the use of a sacrificial layer.

II.

[0012] Microelectromechanical systems (MEMS) components are being progressively introduced into many electronic circuit as well as micro-sensor applications. Examples of MEMS components are electromechanical motors, radio frequency (RF) switches, high Q capacitors, pressure transducers and accelerometers. In one application, the MEMS device is an accelerometer having a movable component that, in response to an external stimulus, is actuated so as to vary the size of a capacitive air gap. Accordingly, the capacitance output of the MEMS device provides an indication of the strength of the acceleration.

[0013] When the MEMS device is an accelerometer, the device comprises a stationary MEMS element that is attached to a nonconductive substrate, and a movable MEMS element that has a substantial portion that is free from mechanical contact with the substrate that is therefore movable with respect to the stationary element. [0014] One method of fabricating such components, often referred to as surface micro- machining, uses a sacrificial layer, such as silicon dioxide, that is deposited and bonded onto a substrate, such as single crystal silicon which has been covered with a layer of silicon nitride. A MEMS component material, for example polycrystallme silicon, is then deposited on the sacrificial layer, followed by a suitable conductor, such as aluminum, to form an electrical contact with the ambient environment. The silicon layer is then patterned by standard photolithographic techniques and then etched by a suitable reactive ion etching plasma or by wet chemistry to define the MEMS structure and to expose the sacrificial layer, which may comprise silicon dioxide. The sacrificial layer is then etched to release the MEMS component.

[0015] Several disadvantages are associated with fabricating a MEMS device using a sacrificial layer. First, it requires the availability of an etching process that is capable of selectively etching the sacrificial layer without reacting with the other materials that will ultimately form the MEMS device. This limits the materials that may be used when fabricating the MEMS device. Additionally, the use of a sacrificial layer increases the amount of materials needed to form the MEMS device, thereby adding cost and complexity to the fabrication process. Furthermore, an additional etching step is needed to remove the sacrificial layer, thereby further reducing the efficiency of the fabrication process. In particular, because the structure forming the movable MEMS element is disposed on top of the sacrificial layer, a significant amount of time is needed to completely undercut the sacrificial layer. In fact, in some instances, holes are first etched through the base of the movable MEMS element in order to permit the etchant to access the sacrificial layer.

[0016] What is therefore needed is an improved method for manufacturing isolated MEMS devices using simplified etching processes that avoids the disadvantages associated with undercutting a sacrificial layer to release the movable MEMS element.

III.

[0017] Microelectromechanical systems (MEMS) components are being progressively introduced into many electronic circuit applications and a variety of micro-sensor applications. Examples of MEMS components are electromechanical motors, radio frequency (RF) switches, high Q capacitors, pressure transducers and accelerometer s. In one application, the MEMS device is an accelerometer having a movable component that, in response to an external stimulus, is actuated so as to vary the size of a capacitive air gap. Accordingly, the capacitance output of the MEMS device provides an indication of the strength of the external stimulus.

[0018] One presently employed method of fabricating MEMS components uses bulk fabrication techniques employing a nonconductive substrate and a prefabricated wafer, such as a silicon-on-insulator (SOI) wafer. The wafer is bonded to the substrate, and is subsequently patterned to produce a MEMS device. Surface fabrication processes may then be used to deposit additional materials on the wafer if so desired. Additional processes are typically performed on the wafer because of the need to remove excess material on these wafers. This increases the amount of time needed to fabricate the MEMS device, and adds cost and complexity to the process. Furthermore, commercially available SOI wafers are generally expensive. SOI wafers are generally desirable when fabricating a MEMS device having sufficient thickness, on the order of 20 microns, which is difficult to attain using other known methods.

[0019] However, when fabricating a MEMS device having less thickness, it is desirable to avoid the use of expensive and limiting SOI wafers. Accordingly, a MEMS device may alternatively be constructed using exclusively surface fabrication processes. The aforementioned disadvantages associated with bulk fabrication are alleviated, since the desired materials are chosen and individually deposited to a desired thickness to fabricate the MEMS device. Furthermore, fabricating a MEMS device using surface fabrication techniques is generally less expensive than using commercially available SOI wafers. [0020] Currently, when using surface fabrication techniques to fabricate a MEMS component, a sacrificial material, such as silicon dioxide, is deposited and patterned onto a substrate, such as single crystal silicon which has been covered with a layer of silicon nitride. A structural material, such as polysilicon, is deposited and patterned on top of the sacrificial material. Thus two materials are deposited onto the substrate to form the MEMS device. The structural material is etched to form a stationary conductive member and a movable MEMS element. The sacrificial material is then selectively etched to release the movable MEMS element from the substrate and the stationary conductive member, thereby rendering the MEMS device operational. This leaves only a single material, the structural material.

[0021] One significant disadvantage associated with current surface fabrication techniques involves the lack of electrical isolation that is achieved. The present inventors have discovered that MEMS devices may be used as a current or voltage sensor, in which the device may receive high voltages at one end of the device, and output an electrical signal at the other end of the device to, for example, a sensor. The output could be a function of the capacitance of the MEMS device, as determined by the position of the movable MEMS element with respect to the stationary element. However, because the entire movable MEMS element achieved using conventional surface fabrication techniques is conductive, the input and output ends of the MEMS device are not sufficiently isolated from one another, thereby jeopardizing those elements disposed downstream of the MEMS output.

[0022] What is therefore needed is a method for fabricating a MEMS device using surface fabrication techniques that provides sufficient electrical isolation for the device.

IV.

[0023] Microelectromechanical systems (MEMS) components are being progressively introduced into many electronic circuit as well as micro-sensor applications. Examples of MEMS components are electromechanical motors, radio frequency (RF) switches, high Q capacitors, pressure transducers and accelerometers. In one application, the MEMS device is an accelerometer having a movable component that, in response to an external stimulus, is actuated so as to vary the size of a capacitive air gap. Accordingly, the capacitance output of the MEMS device provides an indication of the strength of the acceleration.

[0024] When the MEMS device is an accelerometer, the device comprises a stationary MEMS element that is attached to a nonconductive substrate, and a movable MEMS element that has a substantial portion that is free from mechanical contact with the substrate that is therefore movable with respect to the stationary element. [0025] One method of fabricating such components, often referred to as surface micro- machining, uses a sacrificial layer, such as silicon dioxide, that is deposited and bonded onto a substrate, such as single crystal silicon which has been covered with a layer of silicon nitride. A MEMS component material, for example polycrystalline silicon, is then deposited onto the sacrificial layer, followed by a suitable conductor, such as aluminum, to form an electrical contact with the ambient environment. The silicon layer is then patterned by standard photolithographic techniques and then etched by a suitable reactive ion etching plasma or by wet chemistry to define the MEMS structure and to expose the sacrificial layer, which may comprise silicon dioxide. The sacrificial layer is then etched to release the MEMS component.

[0026] Several disadvantages are associated with fabricating a MEMS device using a sacrificial layer. First, it requires the availability of an etching process that is capable of selectively etching the sacrificial layer without reacting with the other materials that will ultimately form the MEMS device. This limits the materials that may be used when fabricating the MEMS device. Additionally, the use of a sacrificial layer increases the amount of materials needed to form the MEMS device, thereby adding cost and complexity to the fabrication process. Furthermore, an additional etching step is needed to remove the sacrificial layer, thereby further reducing the efficiency of the fabrication process. In particular, because the structure forming the movable MEMS element is disposed on top of the sacrificial layer, a significant amount of time is needed to completely undercut the sacrificial layer. In fact, in some instances, holes are first etched through the base of the movable MEMS element in order to permit the etchant to access the sacrificial layer.

[0027] What is therefore needed is an improved reliable method for manufacturing isolated MEMS devices using simplified etching processes that avoids the disadvantages associated with undercutting a sacrificial layer to release the movable MEMS element.

V.

[0028] Microelectromechanical systems (MEMS) components are being progressively introduced into many electronic circuit applications and a variety of micro-sensor applications. Examples of MEMS components are electromechanical motors, radio frequency (RF) switches, high Q capacitors, pressure transducers and accelerometers. In one application, the MEMS device is an accelerometer having a movable component that, in response to acceleration, is actuated so as to vary the size of a capacitive air gap. Accordingly, the current output of the MEMS device provides an indication of the strength of the external stimulus.

[0029] One current method of fabricating such components, often referred to as surface micro-machining, uses a sacrificial layer, such as silicon dioxide, that is deposited and bonded onto a substrate, such as single crystal silicon which has been covered with a layer of silicon nitride. A MEMS component material, for example polycrystalline silicon, is then deposited onto the sacrificial layer, followed by a suitable conductor, such as aluminum, to form an electrical contact with the ambient environment. The silicon layer is then patterned by standard photolithographic techniques and then etched by a suitable reactive ion etching plasma or by wet chemistry to define the MEMS structure and to expose the sacrificial layer, which may comprise silicon dioxide. The sacrificial layer is then etched to release the MEMS component. This leaves only a single material, the structural material.

[0030] One significant disadvantage associated with current surface fabrication techniques involves the lack of electrical isolation that is achieved. The present inventors have discovered that a MEMS device may be used as a current or voltage sensor, in which the device may receive high voltages at one end of the device, and output an electrical signal at the other end of the device to, for example, a sensor. The output could be a function of the capacitance of the MEMS device, as determined by the position of a movable MEMS element with respect to a stationary element. However, because the entire movable MEMS element achieved using conventional surface fabrication techniques is conductive, the input and output ends of the MEMS device are not sufficiently isolated from one another, thereby jeopardizing those elements disposed downstream of the MEMS output.

[0031] Another significant disadvantage associated with current surface fabrication techniques is that the process is inherently limited to thin structural layers (on the order of 1 to 2 μm) due to stresses which may be introduced during the fabrication. The thinness of the layers limits the amount of capacitance that can be obtained in the sensor portion of the MEMS device, and thus limits the magnitude of any output signal. This in turn limits the overall resolution obtainable.

[0032] It is therefore desirable to provide a method for fabricating a MEMS device using surface fabrication techniques having greater thickness than that currently achieved to enhance sensitivity, while providing sufficient electrical isolation for the device.

VI.

[0033] Microelectromechanical system (MEMS) components are being progressively introduced into many electronic circuit applications and a variety of micro-sensor applications. Examples of MEMS components are electromechanical motors, radio frequency (RF) switches, high Q capacitors, pressure transducers and accelerometers. In one application, the MEMS structure is an accelerometer having a movable component that, in response to an external stimulus, is actuated so as to vary the size of a capacitive air gap. Accordingly, the capacitance output of the MEMS structure provides an indication of the strength of the external stimulus.

[0034] One method of fabricating such components, often referred to as surface micro- machining, uses a sacrificial layer such as silicon dioxide that is deposited onto a substrate which is generally single crystal silicon which has been covered with a layer of silicon nitride. A MEMS component material, polycrystalline silicon by way of example, is then deposited onto the sacrificial layer. The silicon layer is then patterned by standard photolithographic techniques and then etched by a suitable reactive ion etching plasma or by wet chemistry to define the MEMS structure and to expose the sacrificial silicon dioxide layer. The sacrificial layer is then etched to release the MEMS component. Such etching and patterning are 'well known by those having ordinary skill in the art, and are described, for example, in M. Madou, Fundamentals of Microfabrication, (CRC Press, Boca Raton, 1997), or G. T. A. Kovacs, Micromachined Transducers Sourcebook, (WCB McGraw-Hill, Boston, 1998).

[0035] It is often desirable to integrate a MEMS structure with an integrated circuit into a single package or onto a single chip. However, many materials are used when fabricating an integrated circuit and during the packaging process, such as water, photoresist, dopants, coatings, etchants, epoxies, etc. The nature of MEMS structures with their inherent mechanical motion is such that the introduction of any of these materials into the structure will most likely render it inoperative. The microscopic mechanical MEMS structure may further be damaged by dirt finding its way into the structure during packaging and handling of the MEMS structure or of the integrated MEMS/circuit pair. Accordingly, a method and apparatus for protecting the MEMS structure from these potential contaminants are desirable.

[0036] What is therefore needed is a method for encapsulating a MEMS structure to protect the device from harmful contaminants and other hazards while still allowing an external electrical connection to the device.

BRIEF SUMMARY OF THE INVENTION

I.

[0037] The present inventors have recognized that a recess may be pre-etched in a substrate for a MEMS structure that facilitates release of the device. [0038] In accordance with an aspect of the invention, a method of fabricating a MEMS structure includes attaching an etchable wafer to an upper surface of a substrate having a recess formed therein. The wafer includes a wafer portion from wliich a movable MEMS structure will be formed. The wafer is attached onto the substrate so that the wafer portion is positioned above the recess. Next, the wafer is etched downwards around the periphery of the movable structure to break through into the recess to release at least part of the movable structure from the substrate. This method therefore foregoes the need to perform substantial undercutting of a sacrificial layer.

E.

[0039] The present inventors have recognized that an internal void may be formed while fabricating a MEMS device that facilitates the release of the movable MEMS element from the substrate while avoiding the difficulties associated with using a sacrificial layer. [0040] In accordance with one aspect of the invention, a method for fabricating a MEMS device onto a substrate having a movable MEMS element portion free from the substrate and disposed adjacent a stationary MEMS element that is in mechanical communication with the substrate, comprises the steps of providing a wafer having opposed first and second surfaces, forming a recess into the first surface to produce a spacer member disposed at a periphery of the recess, mechanically connecting the spacer member to the substrate to form an internal void from the recess, wherein the void is further defined by the substrate, and removing a portion of the wafer into the void so as to release the movable MEMS element from the stationary MEMS element.

in.

[0041] The present inventors have recognized that the addition of an insulating layer to portions of the movable MEMS element of a MEMS device constructed in accordance with surface fabrication techniques provides adequate electrical isolation, thereby allowing the MEMS device to be operable in a wide range of applications. [0042] In accordance with one aspect of the invention, a method is provided for constructing a MEMS device having a first stationary conductive member separated from a second movable conductive member by a variable size gap. The method uses exclusively surface fabrication techniques, and begins by providing a substrate, and depositing a sacrificial material onto the substrate to form a sacrificial layer. An insulating material is deposited onto the sacrificial layer to form an insulating layer. Next, a conductive material is deposited onto the insulating layer to form a conductive layer. A portion of the conductive layer is then etched through to the insulating layer to form the first and second adjacent conductive structures separated by a variable size gap.

A portion of the insulating layer is then etched to provide a base for the second conductive structure. Finally, a portion of the sacrificial layer is etched to release the base and second conductive structure from the substrate.

[0043] In accordance with another aspect of the invention, a wafer level cap is attached to the fabricated MEMS device.

[0044] In accordance with another aspect of the invention, electrical traces are formed within the device that enables electrical communication with the ambient environment.

IV.

[0045] The present invention recognizes that a MEMS structure may be fabricated using an internal void to release the movable MEMS element without using a sacrificial layer. Furthermore, the fabrication process may be made more reliable by pre-patterning a bridge that provides the base of the movable MEMS element.

[0046] In accordance with one aspect of the invention, a method of fabricating a MEMS structure, comprises the steps of 1) providing a wafer having at least a first layer and a second layer, 2) removing a portion of the first layer to form a bridge member, 3) subsequently attaching the wafer to the upper surface of the substrate to form a composite structure having an internal void formed therein, wherein the bridge member is aligned with the internal void, and 4) etching through the upper layer wafer around the periphery of the bridge member to break through into the recess, thereby releasing the bridge from the substrate.

V.

[0047] The present inventors have recognized that a MEMS device may be fabricated using an insulating material, a sacrificial material, a mold material, and a conducting mechanical structural layer that may be plated onto an insulating substrate.

[0048] In accordance with one aspect of the invention, a method for fabricating a MEMS device, comprising the steps of providing a substrate having an upper surface, and depositing a sacrificial layer onto the upper surface of the substrate. A nonconductive layer is then deposited onto the upper surface of the sacrificial layer. Next, a mold is deposited onto the substrate, wherein the mold has at least one void aligned with the insulating layer. A conductive material is then deposited into the at least one void to form conductive elements extending from the nonconductive layer. Finally, the mold and sacrificial layer are removed to release a movable element including the nonconductive layer and conductive layer from the substrate.

[0049] The conductive material may be electroplated or electrolessplated onto the nonconductive layer.

VI.

[0050] The present inventors have recognized that a cap may be bonded to a substrate so as to encapsulate a MEMS structure and provide a seal to protect the device from contaminants and other hazards.

[0051] hi accordance with a first aspect of the invention, a MEMS structure includes a substrate, at least one conductive element that is in mechanical communication with the substrate and that extends therefrom, a movable MEMS element free from the substrate and positioned such that a gap separates the movable MEMS element from the at least one conductive element, at least one electrical trace having a first terminal end in electrical communication with the at least one conductive element and a second terminal end in electrical communication with a peripheral region, and a cap attached to the substrate inside the peripheral region having upper and side walls that encapsulate the at least one conductive element and the movable MEMS element. [0052] The above aspects of the invention are not intended to define the scope of the invention for which purpose claims are provided. In the following description, reference is made to the accompanying drawings, which form a part hereof, and in which there is shown by way of illustration, and not limitation, a preferred embodiment of the invention. Such embodiment does not define the scope of the invention and reference must be made therefore to the claims for this purpose.

BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Reference is hereby made to the following figures in which like reference numerals correspond to like elements throughout, and in which:

I.

[0054] Fig. 1 is a schematic sectional side elevation view of an SOI wafer and a substrate that will form a composite structure in accordance with the preferred embodiment; [0055] Fig. 2 is a sectional side elevation view of the substrate as illustrated in Fig. 1 after performing a standard photolithographic patterning process and an etching procedure;

[0056] Fig. 3 is a sectional side elevation view of the wafer illustrated in Fig. 1 bonded to the substrate illustrated in Fig. 2 to form a composite structure;

[0057] Fig. 4 is a sectional side elevation view of the composite structure illustrated in

Fig. 3 having a portion of the SOI wafer removed and additional layers deposited in accordance with the preferred embodiment;

[0058] Fig. 5 is a sectional side elevation view of the composite structure illustrated in

Fig. 4 having photoresist applied to the upper surface thereof;

[0059] Fig. 6 is a sectional side elevation view of the composite structure illustrated in

Fig. 5 following photolithographic patterning and etching of the topmost layer and photoresist removal;

[0060] Fig. 7 is a sectional side elevation view of the structure illustrated in Fig. 6 after etching a conductive layer of the wafer;

[0061] Fig. 8 is sectional side elevation view of the structure illusfrated in Fig. 7 after further etching the wafer;

[0062] Fig. 9 is a schematic sectional side elevation view of the fabricated structure illustrated in Fig. 8 after further photolithographic patterning and etching of the wafer

[0063] Fig. 10 is a schematic sectional side elevation view of a fabricated MEMS structure constructed in accordance with an alternate embodiment of the invention;

II.

[0064] Fig. 11 is a schematic sectional side elevation view of a MEMS device;

[0065] Fig. 12 is a sectional side elevation view of a wafer having a first and a second layer deposited thereon, and having photoresist deposited thereon and patterned, and usable to fabricate a MEMS device in accordance with a preferred embodiment;

[0066] Fig. 13 is a sectional side elevation view of the wafer illusfrated in Fig. 12 after selectively etching the second layer and bonding the wafer to a substrate to form a composite structure and after depositing and patterning photoresist onto the composite structure;

[0067] Fig. 14A is a sectional side elevation view of the composite structure illustrated in

Fig. 13 after selectively etching the wafer and removing the photoresist;

[0068] Fig. 14B is a sectional side elevation view of the composite structure illustrated in

Fig. 14A after depositing and patterning additional photoresist; [0069] Fig. 15 is a sectional side elevation view of a MEMS device formed after selectively etching the first layer of the composite structure illustrated in Fig. 14B and removing the photoresist;

[0070] Fig. 16 is a sectional side elevation view of a wafer, showing patterned photoresist, used to construct a MEMS device in accordance with an alternate embodiment of the invention;

[0071] Fig. 17 is a sectional side elevation view of the composite structure illusfrated in

Fig. 16 after selectively etching the wafer, removing the photoresist, and depositing a separating layer;

[0072] Fig. 18 is a sectional side elevation view of the wafer illusfrated in Fig. 17 bonded to a substrate to form a composite structure;

[0073] Fig. 19 is a sectional side elevation view of the composite structure illustrated in

Fig 18 after further selectively etching the wafer;

[0074] Fig. 20 is sectional side elevation view of a MEMS device formed after selectively etching the separating layer of the composite structure illustrated in Fig. 19;

[0075] Fig. 21 is a sectional side elevation view of a wafer having a first separating layer deposited thereon, and having photoresist deposited and patterned thereon, and used to construct a MEMS device in accordance with another alternate embodiment;

[0076] Fig. 22 is a sectional side elevation view of the wafer illustrated in Fig. 21 after selectively etching the first separating layer, removing the photoresist, and depositing a second separating layer thereon;

[0077] Fig. 23 is a sectional side elevation view of the wafer illustrated in Fig. 22 bonded to a substrate to form a composite structure;

[0078] Fig. 24 is a sectional side elevation view of a MEMS device after selectively etching the wafer and the second separating layer of the composite structure illusfrated in

Fig. 23;

πi.

[0079] Fig. 25 is a sectional side elevation view of a schematic electrically isolated

MEMS device constructed in accordance with the preferred embodiment;

[0080] Fig. 26 is a schematic sectional side elevation view of a substrate having layers deposited thereon in accordance with the preferred embodiment;

[0081] Fig. 27 is a sectional side elevation view of the structure illustrated in Fig. 26 after etching through the metal and conducting layers; [0082] Fig. 28 is a sectional side elevation view of the structure illustrated in Fig. 27 after etching through the insulating layer;

[0083] Fig. 29 is a sectional side elevation view of the structure illustrated in Fig. 28 after etching through the sacrificial layer to release the MEMS device;

[0084] Fig. 30 is a schematic sectional side elevation view of a substrate having a sacrificial layer layers deposited and patterned thereon in accordance with an alternate embodiment of the invention;

[0085] Fig. 31 is a sectional side elevation view of the structure illusfrated in Fig. 30 having additional layers deposited thereon;

[0086] Fig. 32 is a sectional side elevation view of the structure illustrated in Fig. 31 after etching the various layers to release the movable inner MEMS element;

[0087] Fig. 33 is a schematic sectional side elevation view of a subsfrate having layers deposited thereon in accordance with an alternate embodiment of the invention;

[0088] Fig. 34 is a sectional side elevation view of the structure illustrated in Fig. 33 after etching through the various layers to release the movable MEMS element;

[0089] Fig. 35 is a schematic sectional side elevation view of a substrate having an insulating and sacrificial layer deposited and patterned thereon in accordance with an alternate embodiment of the invention;

[0090] Fig. 36 is a sectional side elevation view of the structure illustrated in Fig. 35 having additional sacrificial material deposited and patterned thereon to form a mold;

[0091] Fig. 37 is a sectional side elevation view of the structure illustrated in Fig. 36 having conductive material deposited into the mold and following a surface planarization step;

[0092] Fig. 38 is a sectional side elevation view of the structure illustrated in Fig. 37 after removing the sacrificial material;

[0093] Fig. 39 is a schematic sectional side elevation view of a subsfrate having traces deposited and patterned thereon in accordance with an alternate embodiment of the invention;

[0094] Fig. 40 is a sectional side elevation view of the structure illusfrated in Fig. 39 having sacrificial and insulating layers deposited and patterned thereon;

[0095] Fig. 41 is a sectional side elevation view of the structure illustrated in Fig. 40 having additional trace material deposited thereon and following a surface planarization step; [0096] Fig. 42 is a sectional side elevation view of the stracture illustrated in Fig. 41 after adding the conducting layers and etching the conducting, insulating and sacrificial layers;

[0097] Fig. 43 is a schematic sectional side elevation view of a wafer level cap in accordance with the preferred embodiment;

[0098] Fig. 44 is a sectional side elevation view of the cap illustrated in Fig. 43 attached to the MEMS structure illustrated in Fig. 42;

[0099] Fig. 45 is a schematic sectional side elevation view of a substrate having traces and insulating material deposited and patterned thereon in accordance with an alternate embodiment of the invention;

[00100] Fig. 46 is a sectional side elevation view of the structure illustrated in Fig.

45 having additional insulating and trace material deposited thereon and following a surface planarization step;

[00101] Fig. 47 is a sectional side elevation view of the structure illustrated in Fig.

46 after removing the middle portion of insulating material;

[00102] Fig. 48 is a sectional side elevation view of the structure illustrated in Fig.

47 after depositing and patterning an additional insulating and a sacrificial layer; [00103] Fig. 49 is a sectional side elevation view of the structure illusfrated in Fig.

48 after depositing and patterning a conductive and metal layer;

[00104] Fig. 50 is a sectional side elevation view of the stracture illustrated in Fig.

49 after etching the insulating and sacrificial layers;

[00105] Fig. 51 is a sectional side elevation view of the cap illustrated in 43 attached to the MEMS structure illustrated in Fig. 50;

IV.

[00106] Fig. 52 is a schematic sectional side elevation view of a MEMS device constructed in accordance with one embodiment;

[00107] Fig. 53 is a sectional side elevation view of a wafer having a first bridge layer and a second layer deposited thereon, and having photoresist deposited thereon and patterned, and usable to fabricate a MEMS device in accordance with one embodiment;

[00108] Fig. 54 is a sectional side elevation view of the wafer illustrated in Fig.

563 after etching the second layer, removing the photoresist, reapplying photoresist, patterning, and etching to form an alignment hole through the wafer and removing the photoresist; [00109] Fig. 55 is a sectional side elevation view of the wafer illustrated in Fig. 54 after having photoresist deposited thereon and patterned to pre-pattern the first layer in accordance with the preferred embodiment;

[00110] Fig. 56 is a sectional side elevation view of the wafer illustrated in Fig. 55 after selectively etching the bridge layer, removing the photoresist, and subsequently bonding the wafer to a substrate to form a composite stracture having an internal void, and thinning the wafer, and after depositing and patterning photoresist onto the composite structure;

[00111] Fig. 57 is a sectional side elevation view of a MEMS device formed after selectively etching the wafer illusfrated in Fig. 56 into the void and removing the photoresist;

[00112] Fig. 58 is a sectional side elevation view of a wafer, showing patterned photoresist, used to constract a MEMS device in accordance with another embodiment of the invention;

[00113] Fig. 59 is a sectional side elevation view of the stracture illustrated in Fig.

58 after selectively etching the wafer, removing the photoresist, and depositing a bridge layer and patteming and etching an alignment hole into the wafer;

[00114] Fig. 60 is a sectional side elevation view of the wafer illustrated in Fig. 59 after selectively etching the bridge layer;

[00115] Fig. 61 is a sectional side elevation view of the wafer illustrated Fig. 60 bonded to a substrate to form a composite stracture having an internal void and thinning the wafer;

[00116] Fig. 62 is a sectional side elevation view of a MEMS device formed after selectively etching the wafer illustrated in Fig. 61;

[00117] Fig. 63 is a sectional side elevation view of a wafer having a first separating layer deposited thereon, and having photoresist deposited and patterned thereon, and used to constract a MEMS device in accordance with another embodiment of the invention;

[00118] Fig. 64 is a sectional side elevation view of the wafer illustrated in Fig. 63 after selectively etching the first separating layer, removing the photoresist, and depositing a second bridge layer thereon and patterning and etching an alignment hole into the wafer; [00119] Fig. 65 is a sectional side elevation view of the wafer illustrated in Fig. 64 after selectively etching the bridge layer, bonding the wafer to the substrate and thimiing the wafer to form a composite structure having an internal void;

[00120] Fig. 66 is a sectional side elevation view of a MEMS device after selectively etching the wafer of the composite stracture illustrated in Fig. 65 into the void;

[00121] Fig. 67 is a schematic sectional side elevation view of an SOI wafer used to fabricate a MEMS stracture in accordance with another embodiment;

[00122] Fig. 68 is a sectional side elevation view of the wafer illusfrated in Fig. 67 after pre-patterning the outer silicon dioxide layer and patterning and etching an alignment hole into the wafer;

[00123] Fig. 69 is a sectional side elevation view of a substrate after etching a recess into its upper surface;

[00124] Fig. 70 is a sectional side elevation view of the wafer illustrated in Fig. 68 connected to the subsfrate illustrated in Fig. 69 to form a composite structure having an internal void formed therein;

[00125] Fig. 71 is a sectional side elevation view of the structure illustrated in Fig.

70 after removing a silicon and insulating layer and depositing a conductive layer; [00126] Fig. 72 is a sectional side elevation view of the structure illustrated in Fig.

71 after applying photoresist to the conductive layer;

[00127] Fig. 73 is a sectional side elevation view of the stracture illustrated in Fig.

72 after etching through the conductive and silicon layers into the void to release the movable MEMS element;

V.

[00128] Fig. 74 is a schematic sectional side elevation view of a MEMS device constructed in accordance with a preferred embodiment of the invention;

[00129] Fig. 75 is a sectional side elevation view of a stracture having a substrate, sacrificial layer, and insulating layer that is used to fabricate the MEMS device illustrated in Fig. 74 in accordance with one embodiment of the invention;

[00130] Fig. 76 is a sectional side elevation view of the stracture illustrated in Fig.

75 having a portion of the insulating and sacrificial layers removed;

[00131] Fig. 77 is a sectional side elevation view of the stracture illustrated in Fig.

76 having a plating mold attached thereto; [00132] Fig. 78 is a sectional side elevation view of the structure illustrated in Fig.

77 after patterning the mold using standard photolithographic techniques;

[00133] Fig. 79 is a sectional side elevation view of the stracture illustrated in Fig.

78 after plating a material onto the insulating layer;

VI.

[00134] Fig. 80 is a sectional side elevation view of a schematic illustration of a wafer having conductive fingers disposed therein constructed in accordance with the preferred embodiment and a substrate;

[00135] Fig. 81a is a sectional side elevation view of the wafer illusfrated in Fig. 80 after silicon dioxide layer deposition and photolithographic definition and etching to form vias therein;

[00136] Fig. 8 lb is a sectional side elevation view of the wafer illustrated in Fig.

81a after conductive polycrystalline silicon or metal deposition and photolithographic definition and etching to form the conductive fingers illusfrated in Fig. 80;

[00137] Fig. 8 lc is a sectional side elevation view of the wafer illustrated in Fig.

81b after silicon dioxide deposition and planarization;

[00138] Fig. 82 is a sectional side elevation view of the substrate illustrated in Fig.

80 after photolithographic definition and etching;

[00139] Fig. 83 is a sectional side elevation view of the wafer bonded to the substrate of Fig. 82 to form a composite stracture;

[00140] Fig. 84 is a sectional side elevation view of the composite structure illustrated in Fig. 83 with a portion of the wafer removed;

[00141] Fig. 85 is a sectional side elevation view of the composite structure illustrated in Fig. 84 having photoresist applied thereto;

[00142] Fig. 86 is a sectional side elevation view of the composite stracture illustrated in Fig. 85 after photolithographic definition and etching of silicon and silicon dioxide layers and photoresist removal;

[00143] Fig. 87 is a perspective view of the schematic structure illustrated in Fig.

86;

[00144] Fig. 88 is a sectional side elevation view of the stracture illusfrated in Figs.

86 and 87 having a protective cap attached thereto; and [00145] Fig. 89 is a perspective view of a plurality of mass produced caps that are configured to be installed in corresponding MEMS structures in accordance with the preferred embodiment.

DETAILED DESCRIPTION OF THE INVENTION I.

[00146] Referring initially to Fig. 1, the components of a MEMS structure include a silicon-on-insulator (SOI) wafer 20 and a subsfrate 22 (which could be either non- conductive or conductive). The wafer 20 includes an upper and lower layer of silicon 26 and 28, respectively, that are separated by a first layer of nonconductive silicon dioxide 24. As will become more apparent from the description below, the thickness of layer 28 will ultimately define the thickness of the resulting MEMS stracture. It should be appreciated that SOI wafers are coimnercially available having thicknesses for layer 28 of between 1 and 100 microns. The thickness of layer 26 may vary between, for example, 350 and 750 microns, and can depend on the diameter of the wafer. Such SOI wafers are commercially available, for example, from Shin-Etsu Handotai Co., Ltd., located in Japan.

[00147] A second layer of silicon dioxide 30 is grown or deposited on the lower surface 29 of the silicon layer 28, for example by using a plasma enhanced chemical vapor deposition process (PECVD) as is understood by those having ordinary skill in the art. Alternatively, layer 30 could comprise silicon nitride. The silicon dioxide layer is added in accordance with the preferred embodiment to facilitate a mechanical connection, that is electrically isolating, between different portions of the MEMS stracture. It should be appreciated, however, that the substrate 22 may be either conducting or nonconducting, and may therefore alternatively comprise high resistivity silicon, crystalline sapphire, crystalline silicon, or poly-crystalline silicon, silicon carbide, or a ceramic such as alumina, aluminum nitrite, and the like, or gallium arsenide. Accordingly, the substrate may be conducting or nonconducting, depending on the fabricated MEMS stracture and its application. It may be desirable to employ a silicon substrate when producing a silicon MEMS stracture to ensure that the thermal and mechanical properties of the substrate and MEMS stracture match to make processing easier and to eliminate the possibility of undesirable thermally induced stresses. On the other hand, it may be desirable to employ non-conducting substrates when very high electrical isolation is necessary. [00148] Referring now to Fig. 2, a recess 32 is formed in the upper surface 23 of the substrate 22 by placing photoresist on the subsfrate and patterning it with standard photolithographic techniques such that, when etched, the portion of the substrate having the photoresist remaining thereon will remain intact, while the exposed material will be removed. Accordingly, to form the recess 32 in the middle portion of the upper surface 23 of the substrate 22, the photoresist is patterned to remain on the outer portions of the upper surface, and the substrate 22 is etched using a plasma etch or wet chemistry etch suitable for the material composition of the subsfrate, as is understood by those having ordinary skill in the art. It should be appreciated that several MEMS structures may be fabricated from a single wafer, and that photoresist in such embodiments is patterned in accordance with the present invention by providing gaps therebetween, wherein the gaps will ultimately define the recesses 32 in the wafer.

[00149] The photoresist is removed to reveal the recess 32 having beveled side walls 33. While the recess 32 is shown as being isotropically etched in the figures, thereby producing the beveled walls 33, it should be appreciated that an anisotropic etching process (for example, using an anisotropic etching plasma) could alternatively be used, which would produce side walls that are substantially perpendicular to the upper surface of the substrate 22. The recess 32 is chosen to be sufficiently deep so as to enable the MEMS stracture to release from the subsfrate 22 after fabrication, as will be described in more detail below.

[00150] While the recess 32 has been described in accordance with the preferred embodiment, other methods of releasing the subsfrate could be implemented as described in patent application entitled "Method for Fabricating an Isolated Micro- Electromechanical System Device Using an Internal Void" filed on even date herewith, the disclosure of which is hereby incorporated by reference as if set forth in its entirety herein.

[00151] Referring now to Fig. 3, the bottom surface 31 of the silicon dioxide layer

30 is bonded to the upper surface 23 of the subsfrate 22. In particular, the wafer 20 is positioned above the insulating subsfrate 22, and is bonded thereto via, for example, high temperature fusion bonding or any other suitable process as understood by those having ordinary skill in the art. Because the wafer 20 does not need to be bonded to the subsfrate 22 using a layer that will need to be undercut in a subsequent procedure, as in prior art fabrication methods, the bond will not be sensitive to temperature elevations that may occur at later stages of the fabrication process. It should be appreciated that, depending on the material chosen for the subsfrate 22, it may be desirable to grow or deposit an oxide layer onto the upper surface 23 thereof prior to the bonding step in order to provide a suitable layer to bond with the lower surface 31 of the silicon dioxide layer 30. [00152] Referring also now to Fig. 4, the relatively thick silicon base layer 26 is mostly removed by a grinding and polishing process, and is finished by subsequently etching in tetramethylammonium hydroxide (TMAH) to expose silicon dioxide layer 24. hi this regard, layer 24 provides an easily controlled etch stop when removing layer 26 as it is not etched by TMAH. The oxide layer 24 is then removed by etching with hydrofluoric acid to reveal an upper surface 27 of the silicon layer 28. The layer 28 remains having the desired uniform thickness, it being appreciated that the final height h of the wafer 20 will correspond generally to the desired height of the resulting fabricated MEMS structure, as will become more apparent from the description below. [00153] The same desired stracture can also be obtained without the use of an SOI wafer, but with a simple silicon wafer instead. Accordingly, the wafer 20 could comprise silicon, silicon carbide, or gallium arsenide. If the wafer 20 is not an SOI wafer, it would be ground and polished to the desired thickness after bonding. The use of commercially available SOI wafers facilitates the attainment of the desired silicon thickness. Also, additional silicon from layer 28 may be removed from the SOI wafer 20, if so desired, by grinding and polishing.

[00154] Next, a conductive layer 36, such as aluminum, is deposited onto the upper surface 27 either by evaporation or sputtering, or any suitable alternative process, as is well known in the art. The conductive aluminum layer 36 will eventually form the electrical contact for the MEMS stracture after the fabrication process has been completed, as will become more apparent from the description below. Alternative suitable conductors may be deposited besides aluminum, such as copper, silver, gold or nickel, or a highly doped semiconductor material such as silicon, silicon carbide, and gallium arsenide, or any other suitable conductive metal that is compatible with the fabrication processes of the present invention. Next, a silicon dioxide layer 38 is deposited onto the upper surface 37 of the aluminum layer 36 to provide protection for the aluminum layer 36 and to provide a mask for future etching of the aluminum and silicon. Alternatively, the layer 38 could comprise silicon nitride. Specifically, the layer 38 may be deposited using the aforementioned PECVD process, or other well known methods. Alternatively, photoresist could be used instead of layer 38 to provide a pattern for etching through both the aluminum and silicon layers 36 and 28. Because layer 38 is subsequently removed regardless during a subsequent fabrication process, as will be described in more detail below, the resulting MEMS structure 58 has the composition whether or not layer 38 is used as a protective layer.

[00155] Once the desired layers are in place, they are etched so as to form the

MEMS stracture in accordance with the preferred embodiment. Referring in particular to Fig. 5, the etching process of the wafer 20 begins by depositing a photoresist layer and patterning by standard photolithographic techniques to leave inner and outer members 42 and 44, respectively, having a gap 41 disposed therebetween that is at least partially aligned with recess 32. As will become more apparent from the description below, gap 41 will become a variable size gap separating a movable MEMS element 52 from a stationary MEMS element 50 (shown in Fig. 9) once the wafer 20 has been completely etched. The recess 32 is disposed in the substrate 22 so as to allow the fabricated movable MEMS element to be released from the substrate upon etching. Accordingly, the wafer 20 is etched into the recess 32, thereby releasing the movable MEMS element, as will be described in more detail below. Advantageously, the movable MEMS element will accordingly be released without the need to undercut a sacrificial layer. It should be appreciated that Fig. 5 is a schematic illustration whose purpose is to illustrate the conceptual placement of the photoresist in relation to the recess 32, and could assume any configuration whatsoever that would produce a suitable MEMS structure and facilitate the release of the movable MEMS element.

[00156] Referring now also to Fig. 6, the upper surface 39 of the silicon dioxide layer 38 is patterned by standard photolithography techniques to produce a stracture which will define the stationary and movable MEMS elements 52 and 50 (shown in Fig. 9), respectively. In accordance with the preferred embodiment, the silicon dioxide layer 38 is etched, for example, by using a dry anisotropic etching plasma, such as trifluoro- methane (CHF₃), commercially known as fluoroform. The etching continues until all silicon dioxide disposed between photoresist members 42 and 44 has been etched, thereby exposing the conductive aluminum layer 36. The photoresist is removed using the appropriate solvent for the photoresist material used. Because the etched silicon dioxide layer 38 is selectively etchable from the remaining materials that comprise wafer 20, layer 38 will therefore provide the stracture necessary to define the etching pattern for subsequent etching processes, as will now be described. As described above, if layer 38 is not present, the photoresist will provide the stracture necessary to define the subsequent etching processes. [00157] Referring to Fig. 7, the aluminum layer 36 is etched, for example, by using an anisotropic etching plasma that selectively etches aluminum, and that does not react to either silicon dioxide or silicon. A chlorine plasma has been found to be suitable for anisotropically dry etching the aluminum layer 36 in accordance with the preferred embodiment. Because the plasma does not react with silicon dioxide or silicon, the resulting etched aluminum structures 36 are vertically aligned with the previously etched silicon dioxide layer 38. Once the aluminum has been etched, the silicon layer 28 is exposed and ready to be etched as will now be described with reference to Fig. 8. [00158] Specifically, the silicon layer 28 is anisotropically dry etched by a process commonly referred to as Deep Reactive Ion Etching (DRIE), which involves setting up a reactive etching environment in a suitably chosen gas by exciting with an inductively coupled plasma (ICP), as is understood by those having ordinary skill in the art. Because silicon dioxide is not etched under the same conditions as silicon, the silicon layer 28 is etched until the silicon dioxide etch stop layer 30 is revealed to produce a pair of stationary outer structures 50 and an inner set of structures 52 that will ultimately define a stationary conductive MEMS element and a movable MEMS element, respectively, as will be described in more detail below.

[00159] Next, referring to Fig. 9, the silicon dioxide layers 30 and 38 are photolithographically patterned and anisotropically etched, for example, in fluoroform, in accordance with the preferred embodiment, though it should be easily appreciated that any suitable etchant may be used. Layers 36 and 28 as well as patterned photoresist aligned with the inner MEMS element 52 (not shown), provide the stracture necessary to define the etching pattern for the etching of layer 30, such that only that silicon dioxide in layer 30 that is aligned with gap 41 is removed. It should be appreciated that the silicon dioxide in layer 30 that is aligned with the gap connects the inner structure 52 to the outer structures 50. Accordingly, etching this silicon dioxide creates stationary outer MEMS elements 50 and additionally releases the movable MEMS element 52 from the substrate 22 without the need to deposit and subsequently undercut a sacrificial layer, as in prior art fabrication techniques. As a result, only those materials that ultimately form the fabricated MEMS structure 58 are used in the fabrication process. The release of the movable MEMS element 52 additionally transforms gap 41 into a variable size gap 41, whose size may be used to define the capacitance of the MEMS structure, as will be described in more detail below. [00160] While layer 38 is removed in accordance with the preferred embodiment, layer 38 could remain as part of the fabricated MEMS stracture 58 to provide a protective layer for the aluminum layer 36.

[00161] The final MEMS stracture 58 therefore includes stationary outer MEMS elements 50, and an inner movable MEMS element 52. It should be appreciated, however, that wafer 20 could alternatively be etched in accordance with the present invention to produce any MEMS stracture having a suitable configuration that facilitates the release of a movable MEMS element. The outer and inner MEMS elements 50 and 52 include a silicon layer 28 separated from the substrate 22 by a non-conductive layer of silicon dioxide 30, thereby providing electrical isolation on the order of 2000 volts. A conductive layer of aluminum 36 is disposed above the silicon layer. In accordance with the preferred embodiment, a wire may be connected to the aluminum layers 36 of the stationary MEMS elements 53 to place the stationary elements in electrical communication with the ambient environment and render the device 58 operable. [00162] The preferred embodiment of the invention could thus be implemented to form a MEMS stracture incorporating a wafer level cap, having electrical leads extending from the base of conductive elements 50 to the ambient environment outside the cap, as described in a patent application entitled "Method for Fabricating an Isolated Microelectromechanical System (MEMS) Device Incorporating a Wafer Level Cap" filed on even date herewith, the disclosure of which is hereby incorporated by reference as if set forth in its entirety herein.

[00163] Referring now to Fig. 10, the MEMS stracture 58 is illustrated in accordance with an alternate embodiment of the invention, wherein the SiO₂ layer 30 has been replaced with a silicon base 45. In order to provide electrical isolation between the inner MEMS structure 52 and outer conductive elements 50, a layer of silicon dioxide 43 is disposed between the silicon 28 and aluminum 36 on the outermost inner MEMS finger disposed proximal the interface between field and control sides of the integrated circuit, as an example. Layer 43 is sufficient to provide low level electrical isolation on the order of 50 volts, suitable for typical integrated circuits. Accordingly, this embodiment is desirable when the fabricated MEMS stracture 58 does not require the 2000 volt isolation achieved by oxide layer 30. Furthermore, this embodiment is easier to fabricate and is stronger due to the uniformity of materials used to fabricate imier element 52. [00164] The MEMS structure 58 could therefore perform any function suitable for a MEMS application. For example, the device 58. could comprise an accelerometer whose movable MEMS element 52 is a cantilever beam that deflects in response to an external stimulus, such as an acceleration or vibration of the device 58. Accordingly, as the size of the gap between the stationary conductive elements 50 and the movable MEMS element 52 varies, so will the output capacitance, thereby providing a measurement of the amount of deflection of the movable MEMS element 52. A measurement of the strength of an external stimulus may thereby be obtained. [00165] It should be appreciated by one having ordinary skill in the art that a portion of a MEMS stracture 58 has been illusfrated, it being appreciated that inner MEMS element 52 is connected to substrate 22 at its two distal ends, as described in patent application filed on March 13, 2001 and entitled "Microelectricalmechanical System (MEMS) Electrical Isolator with Reduced Sensitivity to Internal Noise" the disclosure of which is hereby incorporated by reference. For example, the void 32 that is disposed in substrate 22 may terminate, thereby connecting element 52 to the substrate. In accordance with the preferred embodiment, an elongated section of element 52 is suspended and free from the subsfrate, thereby permitting deflection of the free portion of the movable MEMS element with respect to the subsfrate 22. An electrical trace may be connected to the movable element 52 at these connection locations. [00166] While the various layers are described as being made of silicon, silicon dioxide, and aluminum, any other suitable compositions could be used that have the desired conductive or insulating properties.

II.

[001 7] Referring to Fig. 11, a schematic illustration of a MEMS device 110 includes a stationary MEMS element 112, which comprises a pair of stationary outer conductive members 113 extending upwardly from a substrate 114. The subsfrate 114 may be either conducting or insulating, depending on the intended application, and may comprise glass, high resistivity silicon, crystalline sapphire, crystalline silicon, polycrystalline silicon, silicon carbide, or ceramic such as alumina, aluminum nitride, and the like, or gallium arsenide, hi fact, the substrate may comprise any material whatsoever that is suitable for supporting a MEMS device. An inner movable MEMS element 116 is disposed between the pair of stationary members 113, and includes a base layer 117 supporting two pairs of separated conductive elements 118 that extend upwardly from the base. It should be appreciated by those having ordinary skill in the art that movable MEMS element 116 is a beam that is supported at its distal ends by, for example, the substrate such that the middle portion of element 116 is free and movable relative to the stationary members 113. The outer two elements 113 are separated from moveable MEMS element 116 by a variable size gap 119, which could be the gap between the adjacent plates of a detection capacitor, as will become more apparent from the description below.

[00168] The MEMS device 110 could therefore perform any function suitable for a

MEMS application. For example, the device could comprise an accelerometer whose movable MEMS element 116 is a beam that deflects in response to the external stimulus, such as an acceleration or vibration of the device 110. Accordingly, as the size of the gaps 119 vary, so will the output capacitance, thereby providing a measurement of the amount of deflection of the movable MEMS element 116. A measurement of the amount of acceleration may thereby be obtained by measuring the capacitance of the device. The device 110 constracted in accordance with the present invention could further incorporate a wafer level cap and electrical traces connected to the stationary members 113, as described in "Method for Fabricating an Insolated Microelectromechanical System (MEMS) Device Incorporating a Wafer Level Cap" filed on even date herewith, the disclosure of which is hereby incorporated by reference.

[00169] If base layer 117 is formed utilizing an insulating material, as is the case in accordance with the preferred embodiment, the conductive elements 118 become electrically isolated from each other, thereby minimizing the risk that an electrical input will conduct across the device 110, which would jeopardize those elements disposed downstream of the MEMS output.

[00170] The MEMS device 110 may be fabricated in accordance with several embodiments that utilize an internal void to release the movable MEMS element 116 from the substrate 114 and stationary elements 113, as will now be described. [00171] In particular, referring now to Fig. 12, a wafer 120, which is conducting and comprises silicon in accordance with the preferred embodiment, includes a first layer 124 deposited onto the upper surface 122 thereof. The first layer 124 is insulating in accordance with the preferred embodiment, and comprises silicon oxide (SiO₂). The oxide layer 124 may be formed by thermal oxidization of the wafer 120, or by depositing a layer of silicon dioxide, for example by using chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD), as is understood by those having ordinary skill in the art. [00172] Alternatively, the combination of wafer 120 and first insulating layer 124 could be realized using a silicon-on-insulator (SOI) wafer, in which the insulating layer would comprise silicon dioxide that is deposited onto the top surface of the SOI wafer 120 as commercially available. SOI wafers are commercially available having various thicknesses, and are thus selected in anticipation of the height of the final MEMS device. A method of etching a SOI wafer is described in a patent application filed on even date herewith and entitled "Method for Fabricating a Microelectromechanical System (MEMS) Device Using a Pre-patterned Substrate" the disclosure of which is hereby incorporated by reference.

[00173] Next, a second layer 126 is deposited onto the oxide layer 124 using chemical vapor deposition, plasma enhanced chemical vapor deposition, or like method. Because the layer 126 will ultimately provide a spacer that will be used to define an internal void during fabrication, as will be described below, and will not ultimately form part of the inner movable MEMS element 116, this layer could comprise either an insulating or conductive material, so long as it is selectively etchable from the other materials forming the MEMS device 110. The second layer 126 may comprise, for example, either silicon nitride (Si₃N₄) or polycrystalline silicon in accordance with the preferred embodiment. However, if the substrate 114 (shown in Fig. 13) is conductive, it may be desirable for the second layer 126 to be insulating to achieve electrical isolation for the device 110. Because insulating layer 124 will ultimately form the base of the fabricated movable MEMS element 116, the MEMS device 110 may achieve sufficient electrical isolation, as will become more apparent from the description below. It should be appreciated, however, that layer 124 need not be constracted with an insulating material if electrical isolation is not desired.

[00174] It should further be appreciated that the embodiments described herein comprise various layers of conductive and nonconductive materials. While these materials are identified in accordance with the preferred embodiment, it should be appreciated that any alternative materials suitable for use in the intended MEMS application, and that are selectively etchable if necessary, could be substituted for the disclosed materials. For example, layer 124 could be silicon nitride and layer 126 could be silicon dioxide.

[00175] A pair of photoresist members 128 is formed by depositing photoresist on the upper surface 127 of the second layer 126 and patterning it using standard photolithographic techniques. The pair is spaced apart by a middle section having a distance D_\ which defines the width of an internal void that will facilitate the release of the fabricated inner movable MEMS element, as will become more apparent from the description below. It will become further apparent that the width W of each photoresist member 128 could correspond to the width of the fabricated stationary outer conductive members 113 and, in any event, will define the width of spacer member 129 (shown in Fig. 13) as will now be described.

[00176] The second layer 126 is selectively etched, using either phosphoric acid,

H PO₄ as a wet chemistry etch or a CF₄+4%O₂ plasma as a dry etch, to remove the portion of silicon nitride that is disposed between the photoresist members 128, while avoiding that disposed directly beneath the photoresist. Accordingly, a pair of spacers

129 is formed on the outer ends of the upper surface 125 of layer 124, defining a recess

130 therebetween whose base is further defined by upper surface 125.

[00177] Next, referring to Fig. 13, the remaining photoresist 128 is removed to expose the spacers 129, whose upper surface 127 is bonded to the upper surface 133 of the substrate 114 using a high temperature fusion bonding or any equivalent process as understood by those having ordinary skill in the art. Accordingly, an internal void is formed from the recess 130 that is fiirther defined by the upper surface 133. The height D of the spacer member 129 defines the height of the void 130, which should be sufficiently great to allow the release of the inner movable MEMS element 116 without the need to undercut a sacrificial layer that would be disposed beneath the movable MEMS element in accordance with conventional fabrication processes. [00178] Wafer 120 may next be thinned to the desired thickness of the final MEMS device. If the wafer 120 is an SOI wafer, where the top silicon layer has been preselected to have the correct thickness for the MEMS device, the back silicon portion is largely removed by a grind and polish step, with the remaining portion, up to the silicon dioxide layer, removed by a chemical etch, such as TMAH. Next the silicon dioxide layer is removed in an HF etch. The silicon that remains would then have the desired thickness of the final MEMS device. If the original wafer 120 is a solid silicon wafer, then it must be carefully thinned to the desired thickness by a combination of physical grinding and polishing steps and chemical etching steps, taking care to maintain a uniform thickness across the entirety of the wafer.

[00179] Still referring to Fig. 13, photoresist members are now formed on the exposed surface of the silicon wafer 120 by depositing the photoresist and patterning with standard photolithographic techniques. In particular, a pair of outer photoresist members 134 are formed at the outer ends of the silicon wafer 120 and aligned with the spacers 129 to ultimately form the stationary outer MEMS element, as will become more apparent from the description below. A pair of middle photoresist members 136 are formed inwardly of outer pair 134 by a distance D₂ that will ultimately define a variable size gap disposed between the fabricated inner movable MEMS element and the stationary MEMS element. An inner pair of photoresist members 138 is formed on the wafer 120, and spaced inwardly therefrom, such that the silicon disposed beneath photoresist 136 and 138 will ultimately define conductive structures on the movable MEMS element. [00180] With the photoresist 134, 136, and 138 in place, the silicon wafer 120 is anisotropically dry etched in an inductively coupled plasma (ICP), as is understood by those having ordinary skill in the art. This etching process removes all silicon not disposed directly beneath one of the photoresist members to expose that portion of silicon dioxide layer 124 that is aligned with the etched silicon. The photoresist 134, 136, and 138 is then removed to reveal the inner and outer pairs of conductive elements 118 that extend upwardly from the silicon dioxide layer 124, as shown in Fig. 14A. Because the conductive elements 118 are aligned with the internal void 130, they will form part of the fabricated inner movable MEMS element 116. A third pair of oppositely disposed conductive elements 113 are formed, and are aligned with and are connected to the remaining spacers 129. Elements 113 are thus also connected to substrate 114 and will form part of the stationary conductive members 113 of the stationary MEMS element 112, as will now be described. At this point, the portion of conductive elements 118 that is disposed sufficiently inward of the distal end is only mechanically connected to stationary conductive members 113 via the silicon dioxide layer 124, it being appreciated that the elements are connected to the subsfrate 114 at their distal ends. Such an arrangement is described, for example in a patent application filed on March 13, 2001 and entitled "Microelectricalmechanical System (MEMS) Electrical Isolator with Reduced Sensitivity to Internal Noise" the disclosure of which is hereby incorporated by reference. [00181] Referring now to Fig. 14B, photoresist 146 is deposited onto the structure and photo lithographically patterned so as to protect that portion of the silicon dioxide layer 124 that is exposed between the conductive elements 118. [00182] Accordingly, referring also to Fig. 15, only the silicon dioxide that is disposed between conductive elements 118 and 113, where it is not protected by the photoresist, is removed by applying to the exposed silicon dioxide an anisotropic etching plasma, such as trifluoro-methane (CHF₃), commercially known as fluoroform. The photoresist 146 is subsequently removed. Because the etched silicon dioxide is aligned with the internal void 130, and the layer 124 is etched into the void 130, the inner movable MEMS element 116 is released from the stationary element 112. In particular, the inner movable MEMS element 116 comprises the plurality of the conductive elements 118 that are spaced from each other, and connected via the insulating silicon dioxide base 117 to provide electrical isolation for the device 112. The outermost conductive elements 118, comprising the silicon 120, silicon dioxide 124, and silicon nitride or polycrystalline silicon 129 layers, are separated from the corresponding stationary conductive elements 113 via the variable size gap 119 so as to output an electrical signal whose strength is dependent on the size of the gap in response to movement by the inner MEMS element 116.

[00183] It should be appreciated that the primary purpose of insulating layer 124 is to form the top of the internal void 130 and, subsequently, the base 117 of the inner movable MEMS element 116. Accordingly, it need not be present on the outer sections of the wafer 120 adjacent the middle section in accordance with the preferred embodiment, but is deposited onto the entire wafer 120 for ease of deposition. In this regard, however, it should be appreciated that the outer conductive members 113 need not include the insulating layer 124.

[00184] Referring now to Fig. 16, a method of manufacturing the MEMS device

110 in accordance with an alternate embodiment begins with a wafer 148, which preferably comprises silicon, or an SOI waver, as described above. A pair of outer photoresist members 152 is formed on the upper surface 150 of the wafer 148, and the wafer is subsequently anisotropically dry etched in an inductively coupled plasma (ICP). It should be appreciated that the width of each photoresist member 152 will define the corresponding width of the spacers, and consequently the width of the fabricated stationary conductive MEMS elements 113, as will become more apparent from the description below.

[00185] The middle portion of wafer 148 is partially etched for a predetermined amount of time sufficient to produce an outer pair of spacers 155 having a recess 154 therebetween of a depth D (shown in Fig. 17). The etchant and photoresist 152 are subsequently removed once the recess 154 has achieved a sufficient depth. Depth D₄ should be sufficiently large to produce an internal void once the wafer is bonded to the substrate 114, and to enable the movable MEMS element 116 to be subsequently released from the substrate 148, as will be described in more detail below. It should be appreciated that the thickness of the final MEMS stracture is the original thickness of the SOI wafer minus D . Accordingly, D₄ is controlled to determine the final thickness of the fabricated MEMS device 110 and, accordingly, the magnitude of the resulting electrical signal.

[00186] Referring now to Fig. 17, layer 156, which is insulating in accordance with the preferred embodiment, is applied to the upper surface 150 of the wafer. The insulating properties of layer 156 will provide the electrical isolation for the fabricated MEMS device 110. The layer 156 preferably comprises silicon dioxide, but could alternatively comprise a selectively etchable material having suitable properties, such as silicon nitride, for example. The layer 156 may be formed using a standard oxidation process in which the wafer 148 is exposed to elevated temperatures in an oxygen atmosphere for a predetermined period of time. Alternatively, the layer 156 may be deposited using chemical vapor deposition or plasma enhanced chemical vapor deposition, which would be preferable if it is desirable to reduce the temperatures experienced by the wafer 148. It is appreciated that the layer 156 is continuous where in alignment with the recess, as this portion of the layer will ultimately define the base 117 of the inner movable MEMS element 116.

[00187] In accordance with the illustrated embodiment, the spacers 155 comprise the portion of the unetched silicon at the outer ends of the wafer 148. The layer 156 may not provide a useful function for the spacers 155 if the substrate 114, shown in Fig. 18, is an insulator. It should therefore be understood that the spacers 155 need not include the insulating layer 156 formed thereon to provide the recess 154 in accordance with the preferred embodiment. If the substrate is a conductor, however, then the insulating properties associated with layer 156 may be necessary to provide electrical isolation for the device 110. For the purposes of clarity and convenience, spacers 155, as used herein, will include layer 156 throughout this description, it being appreciated that layer 156 need not form part of spacers 155 as described above.

[00188] Referring to Fig. 18, the upper surfaces 158 of spacers 155 are bonded to the upper surface 160 of substrate 114 using a high temperature fusion bonding, or any equivalent process, as described above. Accordingly, the recess 154 becomes an internal void that is further defined by the upper surface 160 of the subsfrate 114. Additionally, the portion of the wafer 148 that is aligned with the portion of layer 156 that is bonded to the substrate 114 will ultimately comprise the stationary outer conductive elements 113, as will now be described. [00189] Wafer 148 is then thinned to the desired thickness of the final MEMS device 110. If the wafer 148 is an SOI wafer, where the top silicon layer is the correct thickness for the MEMS device, the back silicon portion is largely removed by a grind and polish step, with the remaining portion, up to the silicon dioxide layer, removed by a chemical etch, such as TMAH. Next the silicon dioxide layer is removed in an HF etch. The remaining silicon is now the desired thickness of the final MEMS device. If the original wafer 148 is a solid silicon wafer, then it must be carefully thinned to the desired thickness by a combination of physical grinding and polishing steps and chemical etching steps, taking care to maintain a uniform thickness across the entirety of the wafer. [00190] Next, referring to Fig. 19, photoresist is applied and patterned to the silicon wafer 148, which is then anisofropically etched down to the separating layer 156, as described above with reference to Figs. 13 and 14A. Accordingly, a pair of outer conductive elements 113 are formed along with inner conductive elements 118, which are supported by separating layer 156. As described above, conductive elements 118 and separator 156 will ultimately define the base of inner movable MEMS element 116. The outer conductive elements 118 are separated from the outer pair of inner conductive elements by a variable size gap 119. The final step in the fabrication process is to form the inner movable MEMS element 116. In particular, photoresist is applied and patterned so as to remain on that portion of layer 156 that is disposed between the conductive elements 118 and to expose only that portion of the layer that is aligned with the variable size gap 119.

[00191] Referring now to Fig. 20, the structure is processed for a sufficient amount of time to anisofropically etch all of the material comprising the exposed portion of layer 156, thereby releasing the inner movable MEMS element 116 from the stationary element 112. In particular, the inner movable MEMS element 116 comprises the plurality of the conductive elements 118 spaced apart from one another, and connected via the insulating silicon dioxide base 117 to provide electrical isolation in accordance with the preferred embodiment. The outermost conductive elements 118, comprising the silicon 148 and silicon dioxide 156, are separated from the corresponding stationary conductive elements 113 via the variable size gap 119 so as to output an electrical signal whose strength is dependent on the size of the gap in response to movement by the inner MEMS element 116.

[00192] Referring now to Fig. 21, a method of manufacturing the MEMS device

110 in accordance with an alternate embodiment is presented that avoids the difficulties associated with partially etching the silicon material. In particular, a silicon wafer 164 has deposited thereon a first layer 166, which may or may not be insulating. In accordance with the preferred embodiment, the layer comprises silicon dioxide because it is easily selectively etchable, it being appreciated that layer 166 could alternatively comprise any other selectively etchable material, such as silicon nitride. The thickness D₅ of layer 166 will define the depth of the corresponding internal void, and should be sufficiently deep so as to facilitate the release of the inner movable MEMS element from the substrate. Photoresist members 168 are formed on the outer ends of the upper surface 170 of layer 166 whose width will, as described above, correspond to the width of the fabricated spacers.

[00193] Referring now to Fig. 22, layer 166 is isotropically etched, and the photoresist 168 is removed, to reveal an outer pair of spacers 167 defining a recess 172 therebetween. Next, a second layer 174, which in the preferred embodiment comprises an insulator such as silicon dioxide, is deposited onto the wafer 164 and spacers 167. As described above, however, it should be appreciated that the spacers do not necessarily need to include the layer 174 that is disposed thereon unless layer 174 is needed to achieve electrical isolation.

[00194] It should be appreciated that while both layers 166 and 174 are formed from the same material in accordance with this embodiment, such an arrangement is feasible because the layers are not selectively etched with respect to one another. Rather, both layers 166 and 174 will be selectively etched with respect to the silicon wafer 164, as will be described in more detail below.

[00195] Referring now to Figs 23 and 24, the upper surfaces 169 of spacers 167 are bonded to the upper surface of the insulating substrate 114. Next, as described above with reference to Figs. 19 and 20, the wafer 164 is thinned, patterned, and etched to produce the outer stationary conductive elements 113 and inner movable conductive elements 118. Finally, the portion of the layer 174 that is aligned with the variable size gap 119 is etched to release the inner movable MEMS element 116 from the stationary element 112.

[00196] It is appreciated by one having ordinary skill in the art that the structure of the inner movable MEMS element 16 may differ so long as it is electrically isolated and includes a conductive member that is operable to create a capacitance that varies according to the size of the gap. πi.

[00197] Referring to Fig. 25, a schematic illustration of a MEMS device 210 includes a stationary MEMS element 212 and a movable MEMS element 214, both attached to a subsfrate 216. The substrate 216 may be either conducting or insulating, depending on the intended application, and may comprise glass, high resistivity silicon, crystalline sapphire, crystalline silicon, polycrystallme silicon, silicon carbide, or ceramic such as alumina, aluminum nitride, and the like, or gallium arsenide. In fact, the substrate may comprise any material whatsoever that is suitable for supporting a MEMS device. In the embodiment shown in Fig. 25, the stationary MEMS element 212 consists of stationary conductive members 213 which extend outwardly from the substrate. The movable MEMS element 214 includes a base layer 217 which supports separated conductive members 218 that extend outwardly from the base 217 and is disposed between the stationary members 213. It should be appreciated by those having ordinary skill in the art that movable MEMS element 214 is a beam that is supported at its distal ends by, for example, the substrate such that the middle portion of element 214 is free and movable relative to the stationary members 213.

[00198] It should be appreciated by one having ordinary skill in the art that Fig. 25 illustrates a portion of a MEMS stracture 210, and that inner MEMS element 214 is connected to subsfrate 216 at its two distal ends, as disclosed in patent application 09/805,410 filed on March 13, 2001 and entitled "Microelectricalmechanical System (MEMS) Electrical Isolator with Reduced Sensitivity to Internal Noise" the disclosure of which is hereby incorporated by reference. Accordingly, while the outer portions of movable element 214 are connected to the substrate, an elongated section of element 214 is suspended and free from the substrate, thereby permitting deflection of the free portion of the movable MEMS element with respect to the subsfrate 216. The stationary members 213 are separated from the moveable MEMS element 214 by a variable size gap 219, which could be the gap between the adjacent plates of a detection capacitor, as will become more apparent from the description below. The size of gap 219 changes as the movable element deflects in response to a stimulus.

[00199] In the MEMS device 210 illusfrated in Fig. 25, there are two different structural materials that remain after the movable element 214 is released from the substrate 216. In particular, an insulating material that forms the base layer 217 and a conducting layer that forms the other portions of the device 213 and 218. As illusfrated in Fig. 25, the conducting layer may include a metallic layer 226 if desired. As such, fabrication of devices of this type utilizes at least three unique materials, in addition to the substrate: a conducting material, an insulating material, and a sacrificial material. It should be further appreciated that an optional fourth material may be used to form a metal layer 226 disposed above the conducting layer.

[00200] If base layer 217 is formed utilizing an insulating material, as is the case in accordance with the preferred embodiment, the conductive members 218 become electrically isolated from each other, thereby minimizing the risk that an electrical input will conduct across the device 210, which would jeopardize those elements disposed downstream of the MEMS output. The insulation layer 217 thus provides sufficient electrical isolation across the movable element 214, thereby rendering the device 210 usable, for example, as a current or voltage sensor.

[00201] The MEMS device 210 could therefore perform any function suitable for a

MEMS application. For example, the device could comprise an accelerometer whose movable MEMS element 214 is a beam that deflects in response to the external stimulus, such as an acceleration or vibration of the device 210. Accordingly, as the size of the gaps 219 vary, so will the output capacitance, thereby providing a measurement of the amount of deflection of the movable MEMS element 214. A measurement of the amount of acceleration may thereby be obtained by measuring the capacitance of the device. The device 210 constracted in accordance with the present invention could furthermore incorporate a wafer level cap and electrical traces connected to the stationary members 213, as will be described in more detail below.

[00202] The MEMS device 210 schematically illustrated in Fig. 25 may be fabricated in accordance with several embodiments of the invention that utilize surface MEMS processes, as will now be described.

[00203] In particular, referring now to Fig. 26, one surface fabrication method in accordance with the preferred embodiment is illustrated having reference numerals corresponding to like elements of Fig. 25 incremented by 100 for the purposes of clarity and convenience. The fabrication process begins by providing a substrate 316 that is insulating and comprises either glass or high resistivity silicon in accordance with the preferred embodiment. Other materials, including conducting materials, could be substituted for the substrate material, depending on the intended application of the MEMS device. Several layers are subsequently deposited onto the subsfrate 316. The first layer 320 to be deposited will ultimately form a sacrificial release layer and comprises silicon nitride in the preferred embodiment. The second layer 322 to be deposited will form an insulating base layer and comprises silicon dioxide in the preferred embodiment. The third layer 324 to be deposited will form the conducting portions of the device and comprises polycrystalline silicon in the preferred embodiment. The deposition of these materials is well known, and could be achieved by chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), or similar techniques well known to those skilled in the art. The thickness of each layer is selected in anticipation of the desired height of the final MEMS device, and may be on the order of a couple microns. [00204] As discussed above, present surface fabrication techniques deposit a sacrificial release layer and a conducting layer without an insulating layer, thus preventing the fabricated MEMS device from providing isolation. [00205] Once the three layers 320, 322, and 324 have been deposited, a fourth optional layer 326 may be deposited that will form a highly conducting surface to the conducting layer and comprises a metal such as aluminum in the preferred embodiment. It should be appreciated that this highly conducting layer 326 is not a necessary part of the present invention as an operable electrically isolated MEMS device may be achieved by depositing and patterning layers 320, 322, and 324. If layer 326 is deposited, this metal layer will also form the bonding pads for wire bonding electrical connections to the MEMS device. Conductive metal layer 326 may be deposited using well-known evaporation or sputtering techniques, or suitable alternative methods. [00206] Referring now to Fig. 27, once the 320-326 layers are deposited, they are patterned by standard photolithographic techniques. In particular, photoresist is applied to the top surface of the stracture and patterned. The top metal layer 326 is selectively anisotropically etched, followed by selective anisotropic etching of the conductive layer 324, and finally the photoresist is removed which reveals structures 313 and 318, which ultimately will form the conductive members of the stationary and movable portions, respectively, of the final MEMS device. The patterning additionally creates a gap 319 between structures 13 and 318, which will ultimately define a variable size gap whose thickness changes as the inner element deflects in response to a stimulus. The amount of deflection may be used to measure the strength of the stimulus.

[00207] In order to define the size and shape of the base layer 317, photoresist is again deposited onto the stracture and patterned by standard photolithographic techniques. Layer 322 is then selectively anisofropically etched to form the base layer 317 such that the gap 319 extends through layer 322. When the photoresist is removed, the stracture depicted in Fig. 28 remains having an inner MEMS element coimected to the subsfrate 316 and outer element only via the sacrificial layer 320. As a result, the MEMS structure is completely formed at this point. It only needs to be released in order to operate. Referring now to Fig. 29, the inner MEMS element is released by isotropically etching the sacrificial layer 320 from beneath the base 317. Following this release step, the final working stracture 310 is revealed having an inner movable element 314 separated from the substrate 316 and the stationary conducting elements 312. In accordance with this embodiment, the conducting elements 312 are stationary with respect to the subsfrate via, in part, sacrificial material 320 that remains after all etching processes are completed. As a result, the sacrificial material must be carefully etched to ensure that all sacrificial material is not removed, which would release the stationary elements 312 from the substrate 316.

[00208] It should further be appreciated that the embodiments described herein comprise various layers of conductive and nonconductive materials. While these materials are identified in accordance with the preferred embodiment, it should be appreciated that any alternative materials suitable for use in the intended MEMS application, and that are selectively etchable if necessary, could be substituted for the disclosed materials. For example, if the subsfrate is high resistivity silicon, sacrificial layer 320 could be silicon dioxide and insulating layer 322 could be silicon nitride with no change in functionality. In this case, layer 320 could also be produced by high temperature thermal oxidation of the silicon surface, as is appreciated by one having ordinary skill in the art.

[00209] Also, in the final stracture 310, since the insulating layer 322 resides between the conducting layer 324 and the substrate 316, a conducting substrate can be used. Circuit level isolation of approximately 50 volts may be achieved in this configuration. Conventional MEMS devices formed from surface fabrication techniques, which did not include insulating layer 322, are unable to achieve any isolation. The present invention, therefore, produces a MEMS device 310 using surface fabrication teclmiques that is operational in a wider variety of applications compared to conventional devices.

[00210] It should be appreciated that alternate processes are possible that result in similar MEMS device structures. While several of these alternate methods are disclosed herein, one having ordinary skill in the art appreciates that this list is not exhaustive, and that any suitable alternative falls within the scope of the present invention as set forth by the appended claims.

[00211] Referring now to Fig. 30, one such alternate embodiment is illustrated having reference numerals corresponding to like elements of the previous embodiment incremented by 100 for the purposes of clarity and convenience. In particular, the substrate 416 is initially covered with the sacrificial layer 420, as described above. In accordance with this alternate embodiment, however, the sacrificial layer is patterned by standard photolithographic processes and etched prior to the deposition of other layers onto the substrate. This initial etching process will allow the stationary elements to be deposited directly onto the substrate without any remaining sacrificial material, as is described in more detail below.

[00212] The insulating, conducting, and metal layers are now deposited, by the same deposition teclmiques described above, onto the structure, as depicted in Fig. 31. Since these layers conform to the layer that they are deposited on, a step is formed in the upper layers in the region where the sacrificial layer remains, as illustrated in Fig. 31. [00213] The upper layers are photolithographically patterned and etched as described above, wherein the metal layer 426 and conducting layer 424 are defined and etched with a first pattern to form stationary and movable MEMS elements 412 and 414, respectively, separated by void 419, and the insulating layer 422 is defined and etched with a second pattern to form an insulating base 417 for the movable element 414. Finally, the entire sacrificial layer 420 is completely removed to release the movable element 414.

[00214] The final stracture, illustrated in Fig. 32, is similar to that structure produced in accordance with the previous embodiment. One significant difference, however, is that the stationary MEMS element 412 is not connected to the subsfrate via the sacrificial material. In fact, the entire sacrificial layer 420 has been removed. As a result, it is not necessary to control the amount of undercut of the sacrificial material as in the previous embodiment described above. In addition, there is one less material in the overall structure that can contribute undesirable side effects such as stress and thermal mismatch. Another difference is that the movable MEMS element 414 of the device is slightly offset from the stationary element 412 of the MEMS device. Since the insulating layer 422 still resides between the conducting layer 424 and the subsfrate 416, a conducting substrate can be used. Circuit level isolation (approximately 50 V) may be achieved in this configuration with a conducting subsfrate. With an insulating substrate, full > 2 kV isolation can be achieved.

[00215] Another alternate embodiment is illusfrated in Fig. 33, wherein like reference numerals corresponding to like elements of the previous embodiment are incremented by 100 for the purposes of clarity and convenience. In particular, the sacrificial layer 520 and insulating layer 522 are initially deposited onto subsfrate 516. Next, both layers are patterned by standard photolithographic processes and etched to allow the stationary elements to be deposited directly onto the substrate rather than via the insulating layer as in the previous embodiment described above. Next, the conducting layer 524 and the metal layer 526 are deposited onto the stracture. Because these layers form conformal coverings, there is a step in the upper layers in the region where the sacrificial and insulating layers remain.

[00216] The upper layers 524 and 526 are then photolithographically patterned and etched as in the above process, where the metal layer 526 and conducting layer 524 are defined and etched with one pattern to produce the stracture that will ultimately define the stationary and movable MEMS elements 512 and 514, respectively, separated by gap 519. Next, the insulating layer 522 is defined and etched with a different pattern to form insulating base 517 and to expose the sacrificial material that is disposed within the gap and below the base 517. Lastly, the sacrificial layer 520 is completely removed to release the movable element 514 from the subsfrate 516.

[00217] The final stracture is depicted in Fig. 34. Again, this stracture is very similar to that illustrated in Fig. 29 above. The differences include the complete lack of the sacrificial layer. Because the sacrificial layer is completely removed, it is not necessary to control the amount of undercut of the sacrificial material as in the above process flow. Furthermore, the stationary members 512 are directly attached to the substrate 516 rather than via insulating material as in the previous embodiments. Electrical isolation is still achieved between the input and output, as the base layer 517 is insulating. Accordingly, there is one less material in the overall stracture (sacrificial material) and two less materials in the stationary stracture 512 (sacrificial material and insulating material) that can contribute undesirable side effects such as stress and thermal mismatches. Another difference is that the movable MEMS element 514 of the device is slightly offset from the stationary element 512 of the MEMS device. Since no insulating layer resides between the conducting layer and the substrate, an insulating substrate 516 is used for electrical isolation, if desired. [00218] Yet another alternate embodiment for producing a related MEMS device structure is illusfrated with reference to Fig. 35 in which like reference numerals corresponding to like elements of the previous embodiment are incremented by 100 for the purposes of clarity and convenience. This method appreciates that alternative suitable conductive materials may be used that are not as not as easily etched by either standard dry or wet etching procedures as the polycrystalline silicon used in the previous embodiments. Silicon carbide, for example, is suitably conductive and has sufficient structural properties, but is not easily etchable by standard etching processes currently available. Accordingly, this embodiment produces a mold 623 made of sacrificial material having cavities that define the shape and size of the desired final stracture for the silicon carbide (or suitable alternative conductive material), as illusfrated in Fig. 36. [00219] The process begins with the deposition of the sacrificial layer 620 onto the substrate followed by the deposition of the insulating layer 622. The sacrificial layer 620 is polycrystalline silicon, and the insulating layer 622 is silicon dioxide in accordance with the preferred embodiment, though it should be appreciated that any suitable materials could be used that have the desirable properties and are selectively etchable. Next the insulating layer 622 is patterned by standard photolithographic processes to ultimately form the base 617 of the movable MEMS element 614. [00220] Additional sacrificial material 620 is now deposited onto the stracture.

The sacrificial layer 620 is patterned and anisotropically etched to produce mold 623 having cavities extending outwardly and aligned with insulating layer 622. The sacrificial layer 620 is also patterned to remove sacrificial material from the outer ends of the structure, which will ultimately enable conductive material to be deposited directly onto the substrate 616. It should be appreciated, however, that if sacrificial layer 620 is not patterned, the conductive material would be attached to the subsfrate 616 via sacrificial material as described above.

[00221] Accordingly, referring to Fig. 37, when the final conducting material, silicon carbide in accordance with the preferred embodiment, is deposited into the cavity, the movable element 614 is formed having an insulating base layer 622 and conducting members 624 as described above. Furthermore, cavities exist proximal the outer ends of the mold 463 that enable conductive material to be deposited onto the substrate to ultimately form stationary conductive elements 613. Because the mold 623 defines the size and shape of the final stracture, it is not necessary to pattern the conductive material after deposition. Once the conducting material has been deposited, the entire stracture is then planarized by first mechanically grinding and then polishing the outer surface. [00222] If desired, a metal layer 626 may then deposited onto the structure and patterned by standard photolithographic and etching techniques, as illusfrated in Fig. 38. Finally, the sacrificial material 620 is completely removed leaving the final MEMS device 610 illustrated in Fig. 38. Stracture 610 is very similar to that illustrated in Fig. 29 above. The differences include the complete lack of the sacrificial layer. Because the sacrificial layer is completely removed, it is not necessary to control the amount of undercut of the sacrificial material as in the above fabrication processes. In addition, there is one less material in the overall structure and two less materials in the stationary stracture 612 that can contribute undesirable side effects such as stress and thermal mismatches. Since no insulating layer resides between the conducting layer 624 and the substrate 616, an insulating substrate is used if any sort of isolation is desired. Alternatively, referring again to Fig. 35, the sacrificial layer 620 could be partially etched to enable the deposition of insulating material onto the substrate at the location of stationary conductive elements 613.

[00223] It should further be appreciated that the embodiments described herein comprise various layers of conductive and nonconductive materials. While these materials are identified in accordance with the preferred embodiment, it should be appreciated that any alternative materials suitable for use in the intended MEMS application, and that are selectively etchable if necessary, could be substituted for the disclosed materials. For example, insulating layer 420 could be silicon nitride rather than silicon dioxide with no change in functionality.

[00224] Yet another alternate embodiment, illustrated beginning at Fig. 39, recognizes that it may be desirable to encapsulate the above MEMS devices with a wafer- level cap to protect the mechanical device during subsequent handling and packaging. One such wafer-level cap integrated with a MEMS device is described in pending U.S. Patent Application 09/842,975 entitled "Method for Fabricating an Isolated Microelectromechanical System (MEMS) Device Incorporating a Wafer Level Cap" filed on April 26, 2001, the disclosure of which is hereby incorporated by reference as if set forth in its entirety herein. The above-described fabrication processes can be modified to incorporate wafer-level encapsulation, as will now be described beginning with Fig. 39. This illustrated embodiment has reference numerals corresponding to like elements of the previous embodiment incremented by 100 for the purpose of clarity and convenience. [00225] To accomplish encapsulation, it is first necessary to construct electrical traces which are useable to provide electrical communication between the device inside the cap and a bonding pad outside the cap. Because, as will become apparent from the description below, the traces are laid down on the substrate, the substrate is insulating to avoid shorting the traces. However, if only circuit level isolation is required (approximately 50 V), a conducting substrate may be made sufficiently insulating by depositing an insulating layer between the substrate and the frace layer, as is appreciated by one having ordinary skill in the art. In accordance with the illustrated preferred embodiment, the substrate is formed of an insulating material. [00226] Referring now to Fig. 39, the trace material layer 730 is first deposited onto the substrate 716 and patterned by standard photolithographic and etching techniques to form traces disposed at the outer ends of the substrate and having outer surfaces that are exposed to the ambient environment. The choice of trace material depends on the processes used to deposit the subsequent layers. If low temperature processes are used, then the frace could be made from a metal such as aluminum. If high temperature processes are used, then the trace is made from either a refractory metal such as tungsten, titanium, nickel, and alloys thereof in accordance with the preferred embodiment, or from highly doped polycrystalline silicon.

[00227] Next, referring to Fig. 40, the sacrificial layer 720 and the insulating layer

722 are deposited and patterned by standard photolithographic and etching processes to produce cavities 732 in the insulating and sacrificial layers that will allow for the formation of vias that extend outwardly from trace 730 to ultimately provide electrical communication between the ambient environment and the stationary MEMS elements 713.

[00228] Next, referring to Fig. 41, additional trace material is deposited onto the surface so that it fills cavities 732. In the preferred embodiment, the same material that formed the original traces is again employed, although for some device designs, a different material could be used. This deposition will occupy the voids created in the last step and create the vias 734 necessary to connect the conducting structure, that will be formed later, to the traces. Additionally, bonding pads 736 are formed during this step that enable the structure to be electrically connected with the ambient environment. Following deposition of the additional trace material, the stracture is planarized with mechanical grinding and/or CMP steps, as described above, resulting in the stracture illustrated in Fig. 41. [00229] On top of the now flat surface, the conducting layer 724 and top metal layer 726, if desired, are deposited in accordance with any of the embodiments described above. The metal layer 726 and conducting layer 724 may be patterned as above in a single photolithographic step. Another photolithographic step is employed to remove insulating material from the insulating layer 722 to form base member 717, as described above. Finally the sacrificial layer 720 disposed beneath the insulating layer 722 is etched away to release the iimer MEMS element 714, as illustrated in Fig. 42. This stracture is very similar to those described above. The principle difference is the existence of the traces 736 which connect the stationary structures 713 to the external bonding pads 736. At this point, fabrication of the MEMS device 710 is finished and a cap is now added for protection.

[00230] Referring now to Fig. 43, a cap wafer 740 is etched to produce two legs

744 and an upper wall 746 extending between the legs and defining an internal 742 cavity sized to fit over the top of the MEMS devices without mechanically interfering with the stracture. The cap material may be either insulating or conducting, unless it is designed to ultimately sit on top of the traces and not on the insulator, in which case an insulating cap 740 would be necessary.

[00231] Referring now to Fig. 44, the cap 740 is aligned over the MEMS device

710 such that the cavities in the cap wafer enclose the devices on the MEMS wafer. Legs 744 are then bonded to the MEMS wafer with glass frit, solder, anodic bonding, adhesive or other bonding methods as well known to one skilled in the art to produce the final encapsulated device stracture 745.

[00232] The individual devices can now be separated by normal IC dicing processes with no danger of harm to the MEMS stracture. Even though the device 712 is mechanically encapsulated, the bonding pads extending outside the cap 740 provide bonding pads 736 that connect to the MEMS device via the electrical trace. [00233] An alternative process flow for encapsulating the device is illusfrated beginning at Fig. 45, in which reference numerals corresponding to like elements of the previous embodiment have been incremented by 100 for the purposes of clarity and convenience. The process begins with the deposition and patterning of the trace layer 830 as described above with reference to Fig. 39. Next, the insulating layer 822 is deposited and patterned between the frace material, and additionally outward from a portion of the trace material to produce voids 832 that will ultimately be filled to serve as vias. [00234] Additional trace material is then deposited to fill the voids and produce the vias 834 and bonding pads 836 as described above. During this process, trace material is deposited onto the entire upper surface of the stracture. To remove the trace material in places where it is not wanted, and to provide a flat surface for the subsequent processes, the upper surface is planarized by mechanical grinding and polishing steps to produce a structure illustrated in Fig. 46, in which the insulating layer 822 is disposed between two outer electrical traces 830, 834, and 836.

[00235] Next, referring to Fig. 47, the insulating layer 822 in the region of the active portion of the device between the traces is completely removed. This is done by applying photoresist to the surface and then removing it in the center of the device. After the material is etched and all of the photoresist removed, a sacrificial layer 820 is deposited followed by an additional deposition of insulating layer 822, as illustrated in Fig. 48. The insulating layer 822 will ultimately form the base 817 of the movable MEMS element 814. Layers 820 and 822 are patterned so as to remain only in the region of the movable portion of the MEMS device.

[00236] Referring now to Fig. 49, The conducting layer 824 is now deposited followed by the metal layer 826, if it is needed, in accordance with any of the methods described above. Layers 824 and 826 may then be patterned using a single photolithography step to produce a MEMS stracture whose stationary conductive elements are in electrical communication with trace 834, and whose active portion is ready to be released.

[00237] In particular, referring now to Fig. 50, the insulating layer 822 is patterned to form the bridge stracture 817 in a separate photolithography step and the sacrificial layer 820 is subsequently removed to produce a finished functioning MEMS device 810. This basic structure is very similar to those described above. Again, the principle difference is the existence of the traces which connect the stationary structures 813 to the external bonding pads 836. At this point the MEMS device is finished and it is only necessary to add the cap 840, as described above and illustrated in Fig. 51. This structure 845 is similar to stracture 845 described with reference to Fig. 44. However, stracture 845 has no sacrificial material anywhere and so has one less material to contribute undesirable side effects such as stress or thermal mismatch.

[00238] It is appreciated by one having ordinary skill in the art that the stracture of the movable MEMS element 14 may differ so long as it is electrically isolated and includes a conductive member that is operable to create, for example, a capacitance that varies in accordance with the motion.

IV.

[00239] Referring to Fig. 52, a schematic illustration of a MEMS device 910 includes a stationary MEMS element 912, which comprises a pair of stationary outer conductive members 913 extending upwardly from a substrate 914. The subsfrate 914 may be either conducting or insulating, depending on the intended application, and may comprise glass, high resistivity silicon, crystalline sapphire, crystalline silicon, polycrystalline silicon, silicon carbide, or ceramic such as alumina, almninum nifride, and the like, or gallium arsenide. In fact, the substrate may comprise any material whatsoever that is suitable for supporting a MEMS device. An inner movable MEMS element 916 is disposed between the pair of stationary members 913, and includes abridge 917 supporting two pairs of separated conductive elements 918 that extend upwardly from the base.

[00240] It should be appreciated by those having ordinary skill in the art that movable MEMS element 916 is a beam that is supported at its distal ends by, for example, the substrate such that the middle portion of element 916 is free and movable relative to the stationary members 913. Such an arrangement is described, for example in a United States Patent Application number 09/805,410 filed on March 13, 2001 and entitled "Microelectricalmechanical System (MEMS) Electrical Isolator with Reduced Sensitivity to Internal Noise" the disclosure of which is hereby incorporated by reference. The outer two elements 913 are separated from moveable MEMS element 916 by a variable size gap 919, which could be the gap between the adjacent plates of a detection capacitor, as will become more apparent from the description below. [00241] The MEMS device 910 could therefore perform any function suitable for a

MEMS application. For example, the device could comprise an accelerometer whose movable MEMS element 916 is a beam that deflects in response to the external stimulus, such as an acceleration or vibration of the device 910. Accordingly, as the size of the gaps 919 vary, so will the output capacitance, thereby providing a measurement of the amount of deflection of the movable MEMS element 916. A measurement of the amount of acceleration may thereby be obtained by measuring the capacitance of the device. The device 910 constructed in accordance with the present invention could further incorporate a wafer level cap and electrical traces connected to the stationary members 913, as described in United States Patent Application number 09/842,975 and entitled "Method for Fabricating an Insolated Microelectromechanical System (MEMS) Device Incorporating a Wafer Level Cap" filed on April 26, 2001, the disclosure of which is hereby incorporated by reference as if set forth in its entirety herein. [00242] If bridge 917 is formed utilizing an insulating material, as is the case in accordance with the preferred embodiment, the conductive elements 918 become electrically isolated from each other, thereby minimizing the risk that an electrical input will conduct across the device 910, which would jeopardize those elements disposed downstream of the MEMS output.

[00243] The MEMS device 910 may be fabricated in accordance with several embodiments that utilize an internal void to release the movable MEMS element 916 from the subsfrate 914 and stationary elements 913, as will now be described. [00244] These methods provide for the release of the movable MEMS element without the need to undercut a sacrificial layer. It has recently been discovered that in certain MEMS applications, it is desirable for the device to achieve a high level of electrical isolation to prevent components downstream of the MEMS device from shorting due to excessive electrical voltage or current. Also, instrumentation systems can gain significant benefit from having electrical isolation between the sensed quantity and sensitive measurement electronics. Accordingly, an insulating layer (or bridge) has been integrated into the MEMS component that forms the base of the movable MEMS element and, as such, has conventionally been the last layer to be etched prior to release of the movable element. However, it has been found that the insulating layer tends to break, crack, or otherwise fail due to the stresses incurred at portions of the bridge that are disposed between the stationary and movable MEMS elements prior to the final etching step. As a result, mass production of such MEMS devices has been inefficient and expensive. A MEMS device is thus constracted having a pre-etched bridge, as will now be described.

[00245] In particular, referring now to Fig. 53, a wafer 920, which is conducting and comprises silicon in accordance with one embodiment, includes a first layer 924 deposited onto the upper surface 922 thereof. The first layer 924 is insulating, comprising silicon dioxide (SiO₂), and will ultimately form a bridge 917 for the movable MEMS element 916, as will be described in more detail below. The oxide layer 924 may be formed by thermal oxidation of the wafer 920, or by depositing a layer of silicon dioxide, for example by using chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD), as is understood by those having ordinary skill in the art. [00246] Alternatively, wafer 920 could comprise a silicon-on-insulator (SOI) wafer. The insulating layer 924 would comprise silicon dioxide that is deposited onto the top surface of the SOI wafer 920 as commercially available. SOI wafers are commercially available having various silicon layer thicknesses, and are thus selected in anticipation of the height of the final MEMS device. A method of etching a SOI wafer is described in United States Patent Application No. 09/843,563, filed on April 26, 2001 and entitled "Method for Fabricating a Microelectromechanical System (MEMS) Device Using a Pre-patterned Substrate" the disclosure of wliich is hereby incorporated by reference. An embodiment employing an SOI wafer is described below and illustrated beginning with Fig. 67. It should be appreciated that SOI wafers are commercially available having thicknesses for layer 1028 of between 1 and 100 microns. The thickness of layer 1026 may vary between, for example, 350 and 750 microns, and can depend on the diameter of the wafer. Such SOI wafers are commercially available, for example, from Shin-Etsu Handotai Co., Ltd., located in Japan.

[00247] Next, a second layer 926 is deposited onto the oxide layer 924 using chemical vapor deposition, plasma enhanced chemical vapor deposition, or like method. Because the layer 926 will ultimately provide a spacer that will be used to define an internal void during fabrication, as will be described below, and will not ultimately form part of the inner movable MEMS element 916, this layer could comprise either an insulating or conductive material, so long as it is selectively etchable from the other materials forming the MEMS device 910. The second layer 926 may comprise, for example, either silicon nitride (Si₃N ) or polycrystalline silicon. However, if the substrate 914 (shown in Fig. 56) is conductive, it may be desirable for the second layer 926 to be insulating to achieve electrical isolation for the device 910. Because the layer 924 that will ultimately form the bridge of the fabricated movable MEMS element 916 is insulating, the MEMS device 910 may achieve sufficient electrical isolation. It should be appreciated, however, that layer 924 need not be constracted with an insulating material if electrical isolation is not desired.

[00248] It should further be appreciated that the embodiments described herein comprise various layers of conductive and nonconductive materials. While these materials are identified in accordance with the preferred embodiment, it should be appreciated that any alternative materials suitable for use in the intended MEMS application, and that are selectively etchable if necessary, could be substituted for the disclosed materials. For example, layer 924 could be silicon nitride and layer 926 could be silicon dioxide.

[00249] A pair of photoresist members 928 is formed by depositing photoresist on the upper surface 927 of the second layer 926 and patterning it using a mask (not shown) in accordance with standard photolithographic techniques. The photoresist 928 is spaced apart by a middle section having a distance D₆ which defines the width of an internal void that will facilitate the release of the fabricated inner movable MEMS element, as will become more apparent from the description below. It will become further apparent that the width W₂ of each photoresist member 928 could correspond to the width of the fabricated stationary outer conductive members 913 and, in any event, will define the width of spacer member 929 (shown in Fig. 54) as will now be described. [00250] In particular, the second layer 926 is selectively etched, using either phosphoric acid, H₃PO₄ as a wet chemistry etch or a CF +4%O plasma as a dry etch, to remove the portion of silicon nitride that is disposed between the photoresist members 928, while avoiding etching the portion of layer 926 that is disposed directly beneath the photoresist. Accordingly, a pair of spacers 929 is formed on the outer ends of the upper surface 925 of layer 924, defining a recess 930 therebetween whose base is further defined by upper surface 925.

[00251] Next, referring to Fig. 54, the remaining photoresist 928 is removed to expose the spacers 929. Additional photoresist (not shown) is then applied to the entire upper surface of the wafer, and an opening is formed in the photoresist that is in alignment with one of the spacers 929. Each layer 929, 924, and 920 is subsequently anisotropically etched to form an alignment hole 23 extending through the stracture to a depth such that the alignment hole will be visible from both sides after the substrate is subsequently thinned, and that may be used to assist in achieving proper alignment in subsequent etching procedures, as will be described in more detail below. The anisotropic etch may be performed by a process commonly referred to as Deep Reactive Ion Etching (DRIE), which involves setting up a reactive etching environment in a suitably chosen gas by exciting with an inductively coupled plasma (ICP), as is understood by those having ordinary skill in the art. It may be impractical to etch alignment hole 923 through the entirety of layer 920 due to its large thickness. Rather, layer 920 may be etched sufficiently deep such that when this layer is subsequently thimied, the alignment hole is uncovered, as will be described below. Also, if wafer 920 is an SOI wafer, the buried oxide layer may serve as an etch stop to limit the depth of the alignment hole. This is sufficient as the hole will be revealed when the wafer is thinned, as will be described below. It should be easily appreciated by those skilled in the art, however, that many other teclmiques exist that are sufficient to align a mask on a wafer. [00252] It should be appreciated that layers 924 and 926 exist at least partially because they are selectively etchable with respect to one another. However, it is envisioned that one layer may be partially etched, and in this regard, one layer could be used to provide a bridge as well as a spacer, as would be understood to one having ordinary skill in the art.

[00253] Next, referring to Fig. 55, layer 924 is pre-etched before attaching the stracture onto subsfrate 914. In particular, photoresist 931 is applied to the entire wafer surface and patterned so as to remain in the middle portion of layer 924 that is disposed between spacers 929, it being appreciated that the silicon dioxide aligned with the photoresist 931 will ultimately define the bridge 917. In particular, remaining photoresist 931 is spaced from spacers 929 by a distance D₇ that will ultimately define a variable size gap disposed between the fabricated inner movable MEMS element and the stationary MEMS element. Next, only the portion of layer 924 that is disposed between conductive elements 918 and 913, where it is not protected by the photoresist, is removed by applying to the exposed silicon dioxide an anisotropic etching plasma, such as trifluoro- methane (CHF₃), commercially known as fluoroform, in the case where layer 924 comprises silicon dioxide. The photoresist 931 is subsequently removed. While layer 924 could be etched much later in the process, after the wafer had been attached to the substrate 914, it has been determined that the stresses incurred by the bridge 917 are reduced when the bridge is pre-etched, thereby increasing the reliability of the fabrication process.

[00254] Next, referring to Fig. 56, the wafer structure is turned upside down, such that the upper surface 927 of spacers 929 is bonded to the upper surface 933 of the substrate 914 using a high temperature fusion bonding process, an anodic bonding process, or any equivalent process as understood by those having ordinary skill in the art. Accordingly, an internal void 930 is formed that is defined by upper surface 933, spacers 929, wafer 920, and middle portion of layer 924. The height D₈ of the spacer member 929 defines the height of the void 930, which should be sufficiently great to allow the release of the inner movable MEMS element 916 without the need to undercut a sacrificial layer that would be disposed beneath the movable MEMS element in accordance with conventional fabrication processes.

[00255] Wafer 920 may next be thinned to the desired thickness of the final MEMS device. If the wafer 920 is an SOI wafer, where the top silicon layer has been preselected to have the correct thickness for the MEMS device, the back silicon portion is largely removed by a grind and polish step, with the remaining portion, up to the silicon dioxide layer, removed by a chemical etch, such as tetramethylammonium hydroxide (TMAH). Next the silicon dioxide layer is removed in an HF etch. The silicon that remains would then have the desired thiclmess of the final MEMS device. If the original wafer 920 is a solid silicon wafer, then it must be carefully thinned to the desired thiclmess by a combination of physical grinding and polishing steps and chemical etching steps, taking care to maintain a uniform thiclmess across the entirety of the wafer. In each case, the alignment hole 923 is now visible.

[00256] Still referring to Fig. 56, the final fabrication step that will release the inner MEMS element 916 is the patterning of silicon wafer 920. First, photoresist members (934, 936, and 938) are formed on the exposed surface of the silicon wafer 920 by depositing the photoresist and patterning in accordance with standard photolithographic techniques. The photolithographic mask is aligned with alignment hole 923 to ensure that wafer 920 will be etched into the void 930 to release the inner MEMS element. It should be appreciated that a plurality of MEMS devices are fabricated from a single wafer and, as such, a plurality of alignment holes 923 exist and may be aligned to ensure that the mask is properly aligned both laterally and radially. The photoresist is then developed so as to form a pair of outer photoresist members 934 that are formed at the outer ends of the silicon wafer 920 and aligned with the spacers 929 to ultimately form the stationary outer MEMS element, as will become more apparent from the description below. A pair of middle photoresist members 936 are formed inwardly of outer pair 934 by distance D₇ that will ultimately define the variable size gap described above. An inner pair of photoresist members 938 is formed on the wafer 920, and spaced inwardly therefrom, such that the silicon disposed beneath photoresist 936 and 938 will ultimately define conductive structures on the movable MEMS element. The photoresist members 934, 936, and 938 are additionally aligned with the void 930 through use of the alignment holes such that the inner MEMS element will be released after the final etching step. [00257] With the photoresist 934, 936, and 938 in place, the silicon wafer 920 is anisofropically dry etched by a process commonly referred to as Deep Reactive Ion Etching (DRLE), which involves setting up a reactive etching environment in a suitably chosen gas by exciting with an inductively coupled plasma (ICP), as is understood by those having ordinary skill in the art. This etching process removes all silicon not disposed directly beneath one of the photoresist members to expose the pre-defined bridge 917 or the void. The MEMS stracture has been released in this etch step. The photoresist 934, 936, and 938 is then removed to reveal the inner and outer pairs of conductive elements 918 that extend upwardly from the silicon dioxide layer 924, as shown in Fig. 57. Because the conductive elements 918 are aligned with the internal void 930, they will form part of the fabricated inner movable MEMS element 916, which has now been released from the substrate 914 as illustrated in Fig. 57. A third pair of oppositely disposed conductive elements 913 are formed, and are aligned with and are connected to the remaining spacers 929. Elements 913 are thus also connected to substrate 914 and will form part of the stationary conductive members 913 of the stationary MEMS element 912.

[00258] The inner movable MEMS element 916 comprises the plurality of the conductive elements 918 that are spaced from each other, and supported by the insulating silicon dioxide bridge 917 to provide electrical isolation for the device 912. The outermost conductive elements 918, comprising the silicon 920, silicon dioxide 924, and silicon nitride or polycrystalline silicon 929 layers, are separated from the corresponding stationary conductive elements 913 via the variable size gap 919 so as to output an electrical signal whose strength is dependent on the size of the gap in response to movement by the inner MEMS element 916, for example. Accordingly, the stracture and electrical isolation achieved by MEMS device 910 renders the device suitable for applications such as current and voltage sensing.

[00259] It should be appreciated that the primary purpose of insulating layer 924 is to form the top of the internal void 930 and, subsequently, the bridge 917 of the inner movable MEMS element 916. Accordingly, it need not be present on the outer sections of the wafer 920 adjacent the middle section, but is deposited onto the entire wafer 920 during the deposition step. In this regard, it should be appreciated that the middle portion of layer 924 that remains after etching is isolated, in that it is either the only material from layer 924 that remains, or is separated from the remaining portion of layer 924. It should be appreciated that the outer conductive members 913 need not include the insulating layer 924.

[00260] It should be appreciated that, if layer 924 was not pre-etched in accordance with this embodiment, it would be etched into the void after the etching of silicon wafer 920 and thereby release the movable MEMS element 916. However, the stresses experienced by that portion of layer 924 that extends between the various members 918 prior to etching would be great enough so as to possibly cause layer 924 to fail, thereby rendering the stracture unusable for its intended purpose. Regardless, it has been discovered that usable MEMS devices may be fabricated by etching layer 924 after the silicon wafer 920 to release the MEMS element 916.

[00261] Referring now to Fig. 58, a method of manufacturing the MEMS device

910 in accordance with another embodiment begins with a wafer 948, which preferably comprises silicon, or an SOI waver, as described above. A pair of outer photoresist members 952 is formed on the upper surface 950 of the wafer 948, and the wafer is subsequently anisotropically dry etched in an inductively coupled plasma (ICP). It should be appreciated that the width of each photoresist member 952 will define the corresponding width of the spacers, and consequently the width of the fabricated stationary conductive MEMS elements 913, as will become more apparent from the description below.

[00262] The middle portion of wafer 948 is partially etched for a predetermined amount of time sufficient to produce an outer pair of spacers 955 having a recess 954 therebetween of a depth D₉ (shown in Fig. 59). The etchant and then the photoresist 952 are subsequently removed once the recess 954 has achieved a sufficient depth. Depth D₉ should be sufficiently large to produce an internal void, once the wafer is bonded to the substrate 914, that will enable the movable MEMS element 916 to be subsequently released from the substrate 914 and to move freely, as will be described in more detail below. It should be appreciated that the thickness of the final MEMS stracture is the original thickness of the SOI wafer minus D₉. Accordingly, D₉ is confrolled to determine the final thickness of the fabricated MEMS device 910.

[00263] Referring now to Fig. 59, layer 956, which is insulating in accordance with this embodiment, is applied to the upper surface 950 of the wafer. The insulating properties of layer 956 will provide the electrical isolation for the fabricated MEMS device 910. The layer 956 preferably comprises silicon dioxide, but could alternatively comprise a selectively etchable material having suitable properties, such as silicon nitride, for example. The layer 956 may be formed using a standard oxidation process in which the wafer 948 is exposed to elevated temperatures in an oxygen atmosphere for a predetermined period of time. Alternatively, the layer 956 may be deposited using chemical vapor deposition or plasma enhanced chemical vapor deposition, which would be preferable if it is desirable to reduce the temperatures experienced by the wafer 948. It is appreciated that the layer 956 is continuous within the recess 954, as this portion of the layer will ultimately define the base 917 of the inner movable MEMS element 916. [00264] In accordance with the illustrated embodiment, the spacers 955 comprise the portion of the unetched silicon at both outer ends of the wafer 948. The insulating layer 956 provides enhanced electrical isolation for the MEMS device 910, for example when the substrate is a conductor. For the purposes of clarity and convenience, spacers 955, as used herein, will include layer 956 throughout this description, it being appreciated that layer 956 need not form part of spacers 955. An alignment hole 923 is additionally formed in one of the spacers 955 and extends into the bulk of the wafer for alignment purposes, as described above.

[00265] Next, referring to Fig. 60, photoresist (not shown) is applied to layer 956 and patterned, and a portion of layer 956 is anisotropically etched, hi particular, insulating material is removed to form two gaps 919 disposed on either side of a substantially centrally disposed remaining portion of insulating layer 956 and adjacent spacers 955. Gap 19 will ultimately define the variable size gap as described above. While layer 956 is patterned such that insulating material remains on spacers 955, it should easily be appreciated that this portion of the layer could be removed as well. The photoresist is subsequently removed to reveal an active portion of layer 956 that will ultimately form bridge 917 for the fabricated movable MEMS element 916. [00266] Referring to Fig. 61, the upper surfaces 958 of spacers 955 are bonded to the upper surface 960 of substrate 914 using a high temperature fusion bonding process, an anodic bonding process, or any equivalent process, as described above. Accordingly, the recess 954 becomes an internal void that is further defined by the upper surface 960 of the substrate 914. The portion of wafer 948 that is aligned with the remaining middle portion of layer 956 will ultimately define the movable MEMS element 916, while the portion of the wafer 948 that is aligned with the spacers 955 will ultimately comprise the stationary conductive elements 913, as will now be described. [00267] Wafer 948 is then thinned to the desired thiclmess of the final MEMS device 910. If the wafer 948 is an SOI wafer, where the top silicon layer is the correct thickness for the MEMS device, the back silicon portion is largely removed by a grind and polish step, with the remaining portion, up to the silicon dioxide layer, removed by a chemical etch, such as TMAH. Next the silicon dioxide layer is removed in an HF etch. The remaining silicon is now the desired thickness of the final MEMS device. If the original wafer 948 is a solid silicon wafer, then it must be carefully thinned to the desired thickness by a combination of physical grinding and polishing steps and chemical etching steps, taking care to maintain a uniform thickness across the entirety of the wafer. [00268] Next, referring to Fig. 62, photoresist is applied and patterned to the silicon wafer 948, using the alignment hole 923 to align the photoresist mask. The silicon wafer 948 is then anisotropically etched through to the gap 919. Accordingly, a pair of outer conductive elements 913 are formed along with inner conductive elements 918, which are supported by layer 956 and gap 955. Additionally, the inner MEMS element 916 is released from the substrate. The inner movable MEMS element 916 comprises the plurality of the conductive elements 918 spaced apart from one another, and connected via the insulating silicon dioxide base 917 to provide electrical isolation in accordance with the preferred embodiment. The outermost conductive elements 918, comprising the silicon 948 and silicon dioxide 956, are separated from the corresponding stationary conductive elements 913 via the variable size gap 919 so as to output an electrical signal whose strength is dependent on the size of the gap in response to movement by the inner MEMS element 916, for example.

[00269] Referring now to Fig. 63, a method of manufacturing the MEMS device

910 in accordance with another embodiment is presented that avoids the difficulties associated with partially etching the silicon material to form the recess in the wafer. In particular, a silicon wafer 964 has deposited thereon a first layer 966, which is insulating if the MEMS device 910 will be used in applications requiring electrical isolation. In accordance with the preferred embodiment, the layer comprises silicon dioxide because it is easily selectively etchable, it being appreciated that layer 966 could alternatively comprise any other selectively etchable material, such as silicon nitride. The thickness Dio of layer 966 will define the depth of the recess and corresponding internal void, and should be sufficiently deep so as to facilitate the release of the imier movable MEMS element from the substrate. Photoresist members 968 are formed on the outer ends of the upper surface 970 of layer 966 whose width will, as described above, correspond to the width of the fabricated spacers. [00270] Referring now to Fig. 64, layer 966 is etched, and the photoresist 968 is removed to reveal an outer pair of spacers 967 defining a recess 972 disposed therebetween. A second layer 974, which in the preferred embodiment comprises an insulator such as silicon dioxide, is deposited onto the wafer 964 and spacers 967. It should be appreciated that the middle portion of layer 974 will ultimately define the bridge for the movable MEMS element 916.

[00271] It should be appreciated that while both layers 966 and 974 are formed from the same material in accordance with this embodiment, such an arrangement is feasible because the layers are not selectively etched with respect to one another. Rather, both layers 966 and 974 will be selectively etched with respect to the silicon wafer 964, as will be described in more detail below.

[00272] Referring now to Fig. 65, layer 974 is etched to produce a middle portion separated from spacers 967 by gaps 919, as described above. Also the alignment hole 923 is patterned and etched into the wafer, as described above. Next, the upper surfaces 969 of spacers 967 are bonded to the upper surface of the insulating substrate 914. The wafer 964 is then thinned, patterned, and etched to produce the outer stationary conductive elements 913 and inner movable conductive elements 918. Finally, the wafer 964 is etched into the gap 919 to release the movable conductive elements 918, which are supported by bridge 917, from the substrate 914. Stationary conductive elements 913 are also produced, which are connected to the substrate 914 and separated from the movable element 916 via variable size gap 919, as depicted in Fig. 66. [00273] Another embodiment of the invention, in which a recessed substrate provides the void for subsequent release of the inner MEMS element will now be described with initial reference to Fig. 67. In particular, an SOI wafer 1020 includes a layer of silicon 1028 and a silicon wafer 1026, that are separated by a first layer of nonconductive silicon dioxide 1024. SOI wafers are commercially available having various silicon layer thicknesses, and are thus selected in anticipation of the height of the final MEMS device. It should be appreciated that SOI wafers are commercially available having thicknesses for layer 1028 of between 1 and 100 microns. The thiclmess of layer 1026 may vary between, for example, 350 and 750 microns, and can depend on the diameter of the wafer. Such SOI wafers are commercially available, for example, from Shin-Etsu Handotai Co., Ltd., located in Japan. As will become more apparent from the description below, the thickness of layer 1028 will ultimately define the thickness of the resulting MEMS structure. [00274] An insulating layer 1030 of, for example, silicon dioxide is grown or deposited on the lower surface 1029 of the silicon layer 1028, for example by using a plasma enhanced chemical vapor deposition process (PECVD) as is understood by those having ordinary skill in the art. Alternatively, layer 1030 could comprise silicon nitride. The silicon dioxide layer is added in accordance with the preferred embodiment to facilitate a mechanical connection that is electrically isolating between different portions of the final MEMS stracture.

[00275] Referring now to Fig. 68, the insulating layer 1030 is patterned and etched in the manner described above to produce a central portion set apart from two outer portions by a gap 1041. As described above, the outer portions of layer 1030 may also be etched to leave only the material that will ultimately form the bridge of the movable MEMS element remaining. However, the outer portions of layer 1030 remain in accordance with the preferred embodiment, and define the geometry of the stationary conductive elements that are to be subsequently fabricated. Additionally, the outer portions, when bonded to the substrate 1022, provide sufficient clearance between the substrate and the bridge during operation. The isolated iimer portion of layer 1030 will be aligned with an internal void to facilitate the release of the movable MEMS element, as will be described in more detail below. In addition, an alignment hole 1035 is etched through layers 1030 and 1028 as described above. Layer 1024 serves as a natural etch stop. Layers 1026 and 1024 will be removed revealing the alignment hole prior to using it.

[00276] In particular, referring to Fig. 69, a recess 1032 is formed in the upper surface 1023 of the substrate 1022 by placing photoresist on the substrate and patterning it with standard photolithographic techniques as is understood by those having ordinary skill in the art. The recess is centrally disposed in the substrate 1022 and is wider than the middle portion of layer 1030 such that the movable MEMS element will be released from the substrate when the wafer 1020 is etched into the void, as will be described in more detail below. To form the recess 1032 in the middle portion of the upper surface 1023 of the substrate 1022, the photoresist is patterned to remain on the outer portions of the upper surface, and the substrate 1022 is etched using a plasma etch or wet chemistry etch suitable for the material composition of the substrate, as is understood by those having ordinary skill in the art. It should be appreciated that, in commercial production, it is envisioned that multiple MEMS structures will be fabricated from a single wafer, and that photoresist in such embodiments is patterned in accordance with the present invention by providing gaps therebetween, wherein the gaps will ultimately define the recesses 1032 in the wafer.

[00277] The photoresist is removed to reveal the recess 1032 having beveled side walls 1033. While the recess 1032 is shown as being isotropically etched in the figures, thereby producing the beveled walls 1033, it should be appreciated that an anisotropic etching process (for example, using an anisotropic etching plasma) could alternatively be used, which would produce side walls that are substantially perpendicular to the upper surface 1023 of the substrate 1022. The recess 1032 is chosen to be sufficiently deep so as to enable the MEMS stracture to release from the substrate 1022 after fabrication, as will be described in more detail below.

[00278] Referring now to Fig. 70, the bottom surface 1031 of the silicon dioxide layer 1030 is bonded to the upper surface 1023 of the substrate 1022 such that imier portion of layer 1030 is aligned with the void 1032. In particular, the wafer 1020 is positioned above the insulating subsfrate 1022, and is bonded thereto via, for example, a high temperature fusion bonding process, an anodic bonding process, or any other suitable process as understood by those having ordinary skill in the art. Because the wafer 1020 does not need to be bonded to the substrate 1022 using a layer that will need to be undercut in a subsequent procedure, as in prior art fabrication methods, the bond will not be sensitive to temperature elevations that may occur at later stages of the fabrication process. It should be appreciated that, depending on the material chosen for the substrate 1022, it may be desirable to grow or deposit an oxide layer onto the upper surface 1023 thereof prior to the bonding step in order to provide a suitable layer to bond with the lower surface 1031 of the insulating layer 1030.

[00279] Referring also now to Fig. 71, the relatively thick silicon base layer 1026 is mostly removed by a grinding and polishing process, and is finished by subsequently etching in teframethylammonium hydroxide (TMAH) to expose silicon dioxide layer 1024. In this regard, layer 1024 provides an easily controlled etch stop when removing layer 1026 as it is not etched by TMAH. The oxide layer 1024 is then removed by ^' etching with hydrofluoric acid to reveal an upper surface 1027 of the silicon layer 1028. The layer 1028 remains having the desired uniform thickness, it being appreciated that the final height h₂ of the wafer 1020 will correspond generally to the desired height of the resulting fabricated MEMS stracture, as will become more apparent from the description below. At this point, the alignment hole is now visible. [00280] The same desired stracture can also be obtained without the use of an SOI wafer, but with a simple silicon wafer instead. As described above, wafer 1020 could comprise silicon, silicon carbide, or gallium arsenide. If the wafer 1020 is not an SOI wafer, it would be ground and polished to the desired thickness after bonding. The use of commercially available SOI wafers facilitates the attainment of the desired silicon thickness. Also, additional silicon from layer 1028 may be removed from the SOI wafer 1020, if so desired, by grinding and polishing.

[00281] Next, a conductive layer 1036, such as aluminum, may be deposited onto the upper surface 1027 either by evaporation or sputtering, or any suitable alternative process, as is well known in the art. It should be appreciated that the conductive layer could alternatively comprise copper, silver, gold and nickel. The conductive aluminum layer 1036 will eventually form the electrical contact for the MEMS stracture after the fabrication process has been completed, as will become more apparent from the description below. Alternative suitable conductors may be deposited besides aluminum, such as copper, silver, gold or nickel, or a highly doped semiconductor material such as silicon, silicon carbide, and gallium arsenide, or any other suitable conductive metal that is compatible with the fabrication processes of the present invention. It should be appreciated in this regard that layer 1036 could be used with any embodiment in accordance with the present invention to provide an electrical connection. Likewise, the wafer level cap described above could alternatively be used in accordance with the present invention.

[00282] Referring to Fig. 72, photoresist is applied and patterned by standard photolithographic techniques to provide a pattern for etching through both the aluminum and silicon layers 1036 and 1028. It should be appreciated that some photoresist and aluminum may spill into alignment hole 1035 with no adverse effects so long as the hole remains visible to properly align the photolithographic mask on the wafer. Once the desired layers are in place, they are etched so as to form the MEMS stracture in accordance with the preferred embodiment. In particular, the etching process of the wafer 1020 begins by depositing a photoresist layer and patterning by standard photolithographic techniques to leave inner and outer photoresist members 1042 and 1044, respectively, having a gap 1041 disposed therebetween that is at least partially aligned with void 1032. The photoresist mask is properly aligned using alignment hole 1035, as described above. [00283] Next, the aluminum layer 1036 is etched, for example, by using an anisotropic etching plasma that selectively etches aluminum, and that does not react to either silicon dioxide or silicon. A chlorine plasma has been found to be suitable for anisotropically dry etching the aluminum layer 1036 in accordance with the preferred embodiment. Because the plasma does not react with silicon, the resulting etched aluminum structures 1036 define the stracture for etching the silicon layer 1028, as will now be described with reference to Fig. 73.

[00284] Referring now to Fig. 73, the silicon layer 1028 is anisotropically dry etched by a process commonly referred to as Deep Reactive Ion Etching (DRIE), which involves setting up a reactive etching environment in a suitably chosen gas by exciting with an inductively coupled plasma (ICP), as is understood by those having ordinary skill in the art. The photoresist mask is removed at this time. This final etching step releases the stracture and produces a pair of stationary outer structures 1050 that define a stationary conductive MEMS element 1050, and an inner set of conductive structures 1028 supported by a bridge 1017 at their base that define a movable MEMS element 1052. Conductive and movable MEMS elements 1050 and 1052, respectively, are separated by variable size gap 1041.

[00285] It should be appreciated that a silicon dioxide layer (not shown) could alternatively be deposited onto the upper surface of the aluminum layer 1036 to provide protection for the aluminum layer 1036 and to provide a mask for future etching of the aluminum and silicon. Because this layer would only be used to provide a mask to etch the substrate 1028 and aluminum layer 1036, the layer could be subsequently removed, such that the resulting MEMS stracture 1058 has the same composition whether or not this optional layer is used.

[00286] The final MEMS stracture 1058 therefore includes stationary outer MEMS elements 1050, and an inner movable MEMS element 1052. It should be appreciated, however, that wafer 1020 could alternatively be etched in accordance with the present invention to produce any MEMS stracture having a suitable configuration that facilitates the release of a movable MEMS element. The outer and inner MEMS elements 1050 and 1052 include a silicon layer 1028 separated from each other and the substrate 1022 by a non-conductive layer of silicon dioxide 1030, thereby providing electrical isolation on the order of 50 volts, if a conductive substrate 1022 is utilized. If however a non-conductive substrate, such a glass, is utilized, electrical isolation on the order of 2000 volts may be achieved. A conductive layer of aluminum 1036 is disposed above the silicon layer. In accordance with the preferred embodiment, a wire may be connected to the aluminum layers 1036 of the stationary MEMS elements 1053 to place the stationary elements in electrical communication with the ambient environment and render the device 1058 operable.

[00287] The preferred embodiment of the invention could thus be implemented to form a MEMS stracture incorporating a wafer level cap, having electrical leads extending from the base of conductive elements 1050 to the ambient environment outside the cap, as described above.

[00288] The MEMS stracture 1058 could therefore perform any function suitable for a MEMS application. For example, the device 1058 could comprise an accelerometer whose movable MEMS element 1052 is a cantilever beam that deflects in response to an external stimulus, such as an acceleration or vibration of the device 1058. Accordingly, as the size of the gap between the stationary conductive elements 1050 and the movable

MEMS element 1052 varies, so will the output capacitance, thereby providing a measurement of the amount of deflection of the movable MEMS element 1052. A measurement of the strength of an external stimulus may thereby be obtained.

[00289] A skilled artisan will appreciate that while the various layers are described as being made of silicon, silicon dioxide, and aluminum, any other suitable compositions could be used that have the desired conductive or insulating properties.

V.

[00290] Referring to Fig. 74, a MEMS device 1110 includes a stationary MEMS element 112 and a movable MEMS element 1114, both attached to a substrate 1116. The substrate 1116 may be either conducting or insulating, depending on the intended application, and may comprise glass, high resistivity silicon, crystalline sapphire, crystalline silicon, polycrystalline silicon, silicon carbide, or ceramic such as alumina, aluminum nitride, and the like, or gallium arsenide. In fact, the substrate may comprise any material whatsoever that is suitable for supporting a MEMS device. In the embodiment shown in Fig. 74, the stationary MEMS element 1112 comprises a pair of stationary conductive members 1113 which extend outwardly from the substrate. The movable MEMS element 1114 includes a base layer 1117 which supports separated conductive members 1118 that extend outwardly from the base 1117. Movable element 1114 is disposed between the stationary members 1113. It should be appreciated by those having ordinary skill in the art that movable MEMS element 1114 is a beam that is supported at its distal ends by, for example, the subsfrate such that the middle portion of element 1114 is free and movable relative to the stationary members 1113, as illustrated. [00291] It should be appreciated by one having ordinary skill in the art that Fig. 74 illustrates a portion of a MEMS stracture 1110, and that inner MEMS element 1114 is connected to substrate 1116 at its two distal ends, as disclosed in patent application 09/805,410 filed on March 13, 2001 and entitled "Microelectricalmechanical System (MEMS) Electrical Isolator with Reduced Sensitivity to Internal Noise" the disclosure of which is hereby incorporated by reference. Accordingly, while the outer portions of movable element 1114 are connected to the substrate, an elongated section of element 1114 is suspended and free from the substrate, thereby permitting deflection of the free portion of the movable MEMS element with respect to the substrate 1116. The stationary members 1113 are separated from the moveable MEMS element 1114 by a variable size gap 19, which could be the gap between the adjacent plates of a detection capacitor, as will become more apparent from the description below. The size of gap 19 changes as the movable element deflects in response to a stimulus.

[00292] In the MEMS device 1110 illustrated in Fig. 74, there are two different structural materials that remain after the movable element 1114 is released from the subsfrate 1116. In particular, an insulating material that forms the base layer 1117 and a conducting layer that forms the other portions of the device 1113 and 1118. As such, fabrication of devices of this type utilizes at least three unique materials, in addition to the substrate: a conducting material, an insulating material, and at least one sacrificial material.

[00293] If base layer 1117 is formed utilizing an insulating material, as is the case in accordance with the preferred embodiment, the conductive members 1118 become electrically isolated from each other, thereby minimizing the risk that an electrical input will conduct across the device 1110, which would jeopardize those elements disposed downstream of the MEMS output, in a useful circuit application. The insulation layer 1117 thus provides sufficient electrical isolation across the movable element 1114, thereby rendering the device 1110 usable, for example, as a current or voltage sensor. [00294] The MEMS device 1110 could therefore perform any function suitable for a MEMS application. For example, the device could comprise an accelerometer whose movable MEMS element 1114 is a beam that deflects in response to the external stimulus, such as an acceleration or vibration of the device 1110. Accordingly, as the size of the gaps 1119 vary, so will the output capacitance, thereby providing a measurement of the amount of deflection of the movable MEMS element 14. A measurement of the amount of acceleration may thereby be obtained by measuring the capacitance of the device. The device 10 constracted in accordance with the present invention could furthermore incorporate a wafer level cap and electrical traces connected to the stationary members 13, as is described in U.S. Patent Application filed on September 26, 2001 and entitled "Method for Constructing an Isolated Microelectromechanical System (MEMS) Device Using Surface Fabrication Techniques" the disclosure of which is hereby incorporated by reference as if set forth in its entirety herein.

[00295] The MEMS device 1110 schematically illustrated in Fig. 74 may be fabricated in accordance with several embodiments of the invention that utilize plating processes, as will now be described.

[00296] In particular, referring now to Fig. 75, the fabrication process begins by providing a substrate 1116 that is insulating and comprises either glass or high resistivity silicon in accordance with the preferred embodiment. Other materials, including conducting materials, could be substituted for the substrate material, depending on the intended application of the MEMS device. Several layers are subsequently deposited onto the substrate 1116. The first layer 1120 to be deposited will ultimately form a sacrificial release layer and comprises silicon nitride in the preferred embodiment. A skilled artisan will appreciate that any alternative material that is selectively etchable could also be used. The second layer 1122 to be deposited will form an insulating base layer and comprises silicon dioxide in the preferred embodiment. The deposition of these materials is well known, and could be achieved by chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), or similar techniques well known to those skilled in the art. The thickness of each layer is selected in anticipation of the desired height of the final MEMS device, and may be on the order of 1-3 microns. [00297] Referring now to Fig. 76, once the layers 1120 and 1122 are deposited, they are patterned by standard photolithographic techniques. In particular, photoresist is applied to the top surface of the stracture and patterned. The insulating layer 1122 is selectively anisotropically etched, followed by selective anisotropic etching of the sacrificial layer 1120, and finally the photoresist is removed which reveals the insulating base 1117, lying on top of patterned sacrificial layer 1120.

[00298] In preparation for an electroplating step, the top surface of the stracture may be coated with a shorting layer that is compatible with the metal which will be electroplated. The shorting layer will later facilitate the plating process. For example, when electroplating gold, a tin/gold or a chromium/gold bilayer shorting layer is used. This electrically connects regions where metal deposition is desired. After plating, the gold shorting layer can be removed with a short KI₃ solution and the tin, for example, can be removed using a buffered HF solution.

[00299] In preparation for an electrolessplating step, the top surface of the stracture may be coated with a pre-treated catalyst to induce the electroless plating reduction reaction.

[00300] Referring to Fig. 77, the stracture is now coated with the mold material

1124, which may comprise a photoresist or other photoactivated polymer material in accordance with the preferred embodiment. Because the plating process is a relatively low temperature process, a high temperature material like that needed for the sacrificial layer is not required for the mold material. In addition, commercial photoresists exist that can be applied to thickness up to and above 10 microns. This increased thickness is beneficial as it will allow the plated conductive layer to achieve a greater thickness. A skilled artisan will appreciate that the mold material could also be an inorganic material, such as the same material employed for the sacrificial material. However, the thickness of such materials is generally limited to 1-3 microns which will limit the overall height of the final conducing layer.

[00301] The photoresist is then patterned with standard photolithographic processes to result in a mold pattern. That is, the photoresist is removed in the areas where the plating is desired, as shown in Fig. 78. Gaps are thereby formed in the mold 1124 that will provide the stracture for the fabrication of conductive members 1118. [00302] Referring now to Fig. 79, the conducting material is plated onto the insulating layer 1122 using standard plating processes. Conducting material is further plated onto the surface of subsfrate 1116 to form the stationary conductive members 1113. The conducting material could be nickel, gold, copper, or any other suitably conductive metal which can be plated. The metal fills the cavities in the mold and attaches to layers 1122 and substrate 1116. Finally the mold material 1124 is etched away and the sacrificial layer 1120 is etched away using standard techniques, thereby leaving the final released stracture depicted in Fig. 74.

[00303] It should be appreciated that the embodiments described herein comprise various layers of conductive and nonconductive materials. While these materials are identified in accordance with the preferred embodiment, it should be appreciated that any alternative materials suitable for use in the intended MEMS application, and that are selectively etchable if necessary, could be substituted for the disclosed materials. For example, sacrificial layer 1120 could be silicon dioxide and the insulating layer 1122 could be silicon nitride with no change in functionality.

[00304] It is appreciated by one having ordinary skill in the art that the stracture of the movable MEMS element 1114 may differ so long as it is electrically isolated and includes a conductive member that is operable to create, for example, a capacitance that varies in accordance with the motion.

VI.

[00305] Referring to Fig. 80, the components of a MEMS stracture constracted in accordance with the preferred embodiment include a silicon-on-insulator (SOI) wafer 1220 and a substrate 1222. SOI wafers of this nature are readily available commercially from manufacturers such as Shin-Etsu Handotai Co., Ltd., located in Japan. The wafer 1220 includes a layer of silicon dioxide 1224 that is disposed between an upper and lower layer of the silicon 1226 and 1228, respectively. However, as is apparent to those having ordinary skill in the art, the presence of the silicon dioxide layer 1224 is not necessary for this invention, although its presence facilitates the confrolled removal of layer 1226 to leave a conductive layer 1228 with a uniform and well-defined thickness, as will become more apparent from the description below.

[00306] A second layer of nonconductive silicon dioxide 1230 is deposited onto the lowermost layer of silicon 1228, and encapsulates a pair of conductive fingers 1232 having first and second electrical leads 1238 and 1236. First lead 1238 is connected via spam er member 1234 to the second lead 1236, which forms an electrical connection to a peripheral region of wafer 1220, as will become more apparent from the description below. As the silicon dioxide layer 1230 provides insulation for the conductive fingers 1232 in accordance with the preferred embodiment, it should be appreciated in this regard that layer 1230 could alternatively comprise any suitable generic layer that is nonconductive.

[00307] Referring now to Fig. 81a, the conductive fingers 1232 are formed within the silicon dioxide layer 1230 by first depositing the second layer of nonconductive silicon dioxide 1230 onto the layer of silicon 1228 using a standard process such as plasma enhanced chemical vapor deposition (PECVD). This layer 1230 is then patterned by standard photolithographic and etching procedures using either wet chemistry or plasma etching, as is appreciated by those having ordinary skill in the art, to produce voids 1231 that are disposed therein. In accordance with the preferred embodiment, the voids 1231 extend through to layer 1228, though the present invention includes voids of any size or shape that produce conductive fingers having two leads that are electrically connected and that facilitate the electrical connection of the conductive element of a MEMS structure to the peripheral region, as will become more apparent from the description below.

[00308] Referring now to Fig. 81b, voids 1231 will form vias that receive the deposition of a conductive material that will ultimately form the conductive fingers 1232. The conductive material could be highly doped poly-silicon, a refractory metal such as tungsten, titanium, nickel, and alloys thereof or any other conductive material that will withstand the subsequent processing steps. If only low temperature steps are to follow, then a lower temperature metal, such as aluminum, could be used as the conductive material. A sufficient amount of conductive material is deposited to form the first and second leads 1238 and 1236.

[00309] Referring now to Fig. 81c, after the conductive layer is pattemed, additional silicon dioxide is added to layer 1230 so as to extend beyond the upper surface of spanner members 1234 in accordance with the preferred embodiment. The surface of layer 1230 is then planarized using, for example, a standard chemical-mechanical- planarization (CMP) process. The planarization may produce an upper surface comprising silicon dioxide, or layer 1230 could be planarized to expose the conductive material. If the substrate is insulating, there will be no loss of isolation if the electrical traces 1232 are in contact with the subsfrate when layer 1230 is bonded to the substrate, as will be described in more detail below. It should be further appreciated that a layer of aluminum 1233 (shown in phantom in Fig. 83) may be patterned onto the lower surface of layer 1228 and aligned with that portion of wafer 1220 which will ultimately form the conductive and movable MEMS elements. The aluminum will thereby be in electrical contact with both the conductive element and lead 1238 of electrical trace 1232. [00310] Referring now to Fig. 82, the substrate 1222 may comprise glass or any other insulating material, including high resistivity silicon, crystalline sapphire, or ceramic such as alumina, aluminum nitrite, and the like. It should be appreciated that the substrate 1222 does not necessarily have to be insulating since as described above, a sufficient amount of silicon dioxide was added to layer 1230 so as to form an interface between the wafer 1220 and subsfrate 1222 that will prevent the electrical traces 1232 from contacting the subsfrate. However, the use of an insulating substrate 1222 would be desirable to achieve additional insulation, or if the nonconductive layer 1230 illusfrated in Fig. 81c was planarized such that spanner members 1234 were exposed. If material 1230 provides sufficient isolation by itself, a more conducting substrate such as crystalline silicon could be used.

[00311] Referring still to Fig. 82, a recess 1240 is formed in the upper surface of the substrate 1222 by placing photoresist on the substrate and patterning it so that when etched, the portion of the subsfrate having the photoresist disposed thereon will remain intact, while the exposed material will be removed. Accordingly, to form the recess 40 in the middle portion of the upper surface of the substrate 22, the photoresist is patterned so as to remain on the outer portions of the upper surface, and the substrate 22 is etched using a plasma etch or wet chemistry etch suitable for the material composition of the substrate, as is understood by those having ordinary skill in the art. The photoresist is then removed using the appropriate solvent for the photoresist material used. While the recess 40 is shown as being anisotropically etched in the figures, it should be appreciated that the invention includes an isofropic etching of the recess 40. The depth of recess 40 is chosen to be sufficiently large so as to enable a movable portion of the fabricated MEMS stracture to release from the subsfrate 22 after fabrication, as will be described in more detail below. It should be appreciated that other methods exist for releasing the movable portion from the substrate, as described in a patent application entitled "Method for Fabricating an Isolated Micro-Electromechanical System Device Using an Internal Void" filed on even date herewith, the disclosure of which is hereby incorporated by reference as if set forth in its entirety herein.

[00312] Referring now to Fig. 83, the silicon dioxide layer of the wafer 1220 is bonded to the upper surface of the subsfrate 1222. In particular, the wafer 1220 is positioned above the insulating subsfrate 1222, and is bonded thereto via a high temperature fusion bonding process, or any other suitable process, as is known to those having ordinary skill in the art. Alternatively, any other suitable bonding method may be used such as epoxy, glass frit, soldering and the like. Depending on the material composition of the subsfrate 1222, an additional layer, such as silicon dioxide or other suitable material, may need to be grown or deposited onto the upper surface thereof prior to the bonding step in order to provide a suitable layer to bond with the silicon dioxide layer 1230 disposed on the bottom of wafer 1220.

[00313] Referring now to Fig. 84, layer 1226 of wafer 1220 is removed from the top using one of many methods known by those having ordinary skill in the art. In accordance with the preferred embodiment, the substrate is ground and polished until approximately 100 μm of layer 1226 remains, and the remaining silicon is etched in tetramethylammonium hydroxide (TMAH) to expose the silicon dioxide layer 1224 which serves as an etch stop. The silicon dioxide layer 1224 is then removed by etching with hydrofluoric acid. The layer 1228 remains with just the desired uniform thickness, it being appreciated that the final height h₃ of the wafer 1220 will correspond generally to the desired height of the resulting fabricated MEMS stracture, as will be described in more detail below. If desired, additional silicon from layer 1228 may also be removed, making sure to maintain a uniform thickness of the desired height h₃ of the wafer 1220. [00314] It should be appreciated, however, that the invention anticipates that a standard silicon wafer could be provided and etched to a desired height. However, achieving a generally uniform height in a silicon wafer can be difficult to achieve, as such wafers do not have an etch stop, such as layer 1224 in the SOI wafer 1220. It may nonetheless be desirable to use such standard wafers in accordance with the present invention if large volume production were desired. Such wafers may comprise silicon, silicon carbide, gallium arsenide, a high temperature metal, or alternative conductive materials suitable to withstand the subsequent fabrication processes. [00315] An SOI wafer 1220 is provided in accordance with the preferred embodiment because commercially available SOI wafers are available that differ in thickness. As a result, it is likely that a wafer may be selected whose silicon layer 1228 has a height that corresponds to the desired height of the resulting fabricated MEMS structure.

[00316] Next, referring to Fig. 85, the silicon MEMS layer 1228 is etched by first depositing and photolithographically patterning photoresist on the upper surface thereof. In particular, a photoresist layer is deposited and patterned to leave inner and outer photoresist members 1244 and 1246, such that outer photoresist members 1246 are aligned with the corresponding first lead 1238 of the electrical trace 1232 to ultimately provide an electrical connection for the MEMS structure in accordance with the preferred embodiment. Alternatively a silicon dioxide layer 1238 may be deposited using the PECVD process, or other well-known methods, instead of photoresist to provide a mask for future etching procedures. Additionally, a gap 1245, disposed between members 1244 and 1246, is at least partially aligned with recess 1240. The recess 1240 is disposed in the substrate 1222 so as to allow the MEMS stracture to be released from the substrate 1222 upon etching. Accordingly, layer 1228 is etched into the recess, thereby releasing a movable inner MEMS element 1252 (shown in Fig. 86), as will be described in more detail below. It should be appreciated that Fig. 85 is a schematic illustration whose purpose is to illustrate the conceptual placement of the photoresist in relation to the electrical traces 1232 and recess 1240, and could assume any configuration whatsoever that would produce a suitable MEMS stracture.

[00317] Referring now to Fig. 86, the silicon layer 1228 is anisotropically dry etched using a deep reactive ion etching (DRIE) process, as is understood by those having ordinary skill in the art. The etching continues until all silicon has been anisotropically etched, thereby producing outer stationary MEMS elements 1250, which are termed "stationary" because they are attached to substrate 1222 (albeit indirectly via layer 1230). Next, the remaining photoresist is removed and a new layer of photoresist is deposited and patterned so as to define the desired stracture of the silicon dioxide layer 1230. [00318] It is therefore apparent that one reason that layer 1228 comprises silicon, and that layer 1230 comprises silicon dioxide, is because they are selectively etchable from one another, thereby facilitating the controlled patterning of both layers. It should therefore be appreciated that layers 1228 and 1230 could comprise any material whatsoever having the desired conductive (or nonconductive) characteristics and that are selectively etchable and suitable to be used in the construction of a MEMS stracture. [00319] Next, the silicon dioxide layer 1230 is anisotropically etched by reactive ion etching (RIE) using fluoroform or other etchant. Once the remaining photoresist is removed, the resulting product is a MEMS stracture 1249 having the movable inner MEMS element 1252 comprising electrically conducting and electrically insulating components 1228 and 1230, respectively, that are released from the substrate 1222 and free from the stationary outer MEMS elements 1250 with a defined variable size gap 1245 therebetween. In particular, the insulating component 1230 for element 1252 provides a base for the conducting components 1228. Alternatively, the inner MEMS element could be constracted having a silicon base, as described in a patent application entitled "Method for Fabricating a MicroElectromechanical System (MEMS) Device Using a Pre-Patterned Substrate" filed on even date herewith, the disclosure of which is hereby incorporated by reference as if set forth in its entirety herein. It should be appreciated that the base could also be formed during the formation of fingers 1232 and electrical leads 1236 and 1238. [00320] Because the electrical traces 1232 comprise a conductive material, or refractory metal in accordance with the preferred embodiment, an electrical connection is established between the stationary conductive elements 1250 and the peripheral region via first and second terminals 1238 and 1236, respectively. The MEMS structure 1249 could therefore perform any function suitable for a MEMS application. For example, the stracture 1249 could comprise an accelerometer whose movable MEMS element 1252 is a cantilever beam that deflects in response to external stimuli, such as an acceleration or vibration of the structure. Accordingly, as the size of the gap 1245 between the stationary conductive elements 1250 and the movable MEMS element 1252 varies, so will the output capacitance, thereby providing a measurement of the amount of deflection of the movable MEMS element 1252.

[00321] While the MEMS stracture 1249 constracted in accordance with the preferred embodiment is illustrated having inner movable elements 1252 and outer stationary elements 1250, it is easily appreciated that a MEMS stracture could be constructed in accordance with the present invention whose movable elements are disposed outwardly of the stationary elements, so long as a gap exists between the movable and stationary elements to allow the capacitance to be measured, which varies as a function of the size of the gap such that deflection of the movable element with respect to the stationary element may be adequately determined. It should be easily appreciated that the present invention is equally applicable to any suitable MEMS structure. [00322] As shown in Fig. 8, the MEMS stracture 1249 is exposed to the ambient environment. Accordingly, the stracture 1249 is subject to exposure to various contaminants and solvents that are used during subsequent handling such as stracture singulation or when integrating with an integrated circuit. For example, the sensitivity of the structure 1249 is such that the introduction of liquid into the immediate environment of the MEMS structure may cause the movable MEMS element 1252 to deflect, thereby skewing the electrical output. In extreme cases, the introduction of liquid will cause the movable MEMS element 1252 to bond with the stationary conductive elements 1250, thereby rendering the structure 1249 wholly inoperative. It is therefore important to protect the structure 1249 from such hazards while, at the same time, establishing an electrical connection between the stationary conductive elements 1250 and the peripheral region.

[00323] It should be appreciated by one having ordinary skill in the art that Fig. 87 illustrates a portion of a MEMS stracture 1249, it being appreciated that inner MEMS element 1252 is connected to subsfrate 1222 at its two distal ends, as disclosed in a patent application filed on March 13, 2001 and entitled "Microelectricalmechanical System (MEMS) Electrical Isolator with Reduced Sensitivity to Internal Noise" the disclosure of which is hereby incorporated by reference. For example, the void 1240 that is disposed in substrate 1222 may terminate, thereby connecting element 1252 to the substrate. In accordance with the preferred embodiment, an elongated section of element 1252 is suspended and free from the substrate, thereby permitting deflection of the free portion of the movable MEMS element with respect to the substrate 1222. An electrical frace may be connected to the movable element 1252 at these connection locations. [00324] In prior art designs, wire leads are directly attached to the stationary conductive elements 1250 of a MEMS structure to render the device operational. However, such an arrangement is incapable of allowing the entire MEMS stracture to be protected from the aforementioned hazards. For example, a protective cap could not be installed in this arrangement due to interference with the wire leads. [00325] In accordance with the preferred embodiment, a wire may be connected to terminal 1236 so as to place the stationary conductive elements 1250 in electrical communication with the peripheral region, while at the same time removing any interference and thereby allowing a protective cap 1253 to be placed on the substrate 1222 and positioned at a bonding location 61, identified by the dotted lines on Fig. 8. The bonding location is disposed between the first terminal end 1238 and the second terminal end 1236 so that the first terminal end is exposed to the peripheral region 1263 while the second end is in electrical communication with the protected stationary MEMS elements 1250. It should be appreciated that the cap may comprise any material, either conducting or nonconducting, that is capable of providing the desired protection for the MEMS stracture 1249.

[00326] In particular, referring also to Fig. 88, the cap 1253 is optically aligned with the wafer 1220, and that it is bonded thereto using a suitable glass frit process, soldering process, or other bonding process as understood by those having ordinary skill in the art. Fig. 88 therefore illustrates the final device, including a protected MEMS stracture 1260 having a cap 1253, sidewalls 1254, and a height greater than the height of the stationary conductive element 1250 and movable MEMS element 1252. A horizontal roof 1256 is attached at each end to the sidewalls 1254, and end walls (not shown) are added to completely encapsulate and protect the MEMS stracture 1249. The cap 1253 spans the entire depth of the MEMS structure 1249 to completely prevent contaminants from entering the stracture during subsequent processing, handling, or packaging. Additionally, the cap 1253 protects the MEMS structure 1249 during handling and packaging of the integrated circuit. Again, it may be observed in Fig. 88 that the stationary conductive elements 1250 maybe electrically connected to the peripheral region via leads 1238 and 1236 of the electrical trace 1232. It should be appreciated in this regard that the electrical trace 1232 may assume any configuration whatsoever so long as it is insulated and connected to the stationary conductive element 1250 at one end, and the peripheral region at another end.

[00327] Referring to Fig. 89, a wafer 1258, or blank, is illustrated having a plurality of caps 1253 disposed therein. The cap wafer may be fabricated by a patterning and etching process, or any other process appropriate to the cap material, with methods understood by those having ordinary skill in the art. Accordingly, a plurality of caps may be mounted onto a corresponding plurality of MEMS structures 1249 and subsequently separated, thereby facilitating the mass production of protected MEMS structures 1260 in a single operation in accordance with the preferred embodiment. [00328] The above has been described as a preferred embodiment of the present invention. It will occur to those that practice the art that many modifications may be made without departing from the spirit and scope of the invention. In order to apprise the public of the various embodiments that may fall within the scope of the invention, the following claims are made.

Claims

CLAIMS WE CLAIM:

1. A MEMS structure, comprising:

(a) a substrate;

(b) at least one stationary conductive element attached to the substrate and extending outwardly therefrom; and

(c) at least one movable conductive element having a portion free of the substrate and positioned so as to define a variable size gap with respect to the stationary conductive element, wherein the movable conductive element is connected to an insulating layer.

2. The MEMS structure as recited in claim 1, further comprising a protective cap attached to the substrate and encapsulating the stationary conductive element and movable conductive element.

3. The MEMS structure as recited in claim 2, wherein the stationary conductive element is connected to an insulating layer, and wherein a conductive trace extends within the insulating layer from the conductive element to a location exterior of the cap.

4. A MEMS stracture, comprising:

(a) a substrate;

(b) at least one stationary conductive element attached to the substrate and extending outwardly therefrom;

(c) at least one movable conductive element having a portion free of the substrate and positioned so as to define a variable size gap with respect to the stationary conductive element; and

(d) a protective cap attached to the substrate and encapsulating the stationary conductive element and movable conductive element.

5. A MEMS structure, comprising: (a) a substrate; (b) at least one stationary conductive element attached to the substrate and extending outwardly therefrom, wherein the stationary conductive element is attached to an insulating layer;

(d) a conductive trace extending within the insulating layer from the conductive element to the ambient environment.

I.

6. A method of fabricating a MEMS stracture, comprising the steps of:

(a) forming a recess in an upper surface of a substrate;

(b) attaching an etchable wafer to the upper surface of the substrate, including a wafer portion from which a movable stracture will be formed, the wafer portion being positioned over the recessed; and

(c) etching downward in the wafer around the periphery of the movable portion to break through in to the recess, thereby releasing at least part of the movable structure from the substrate without the need for substantial undercutting.

7. The method as recited in claim 6, further comprising depositing a conductive layer onto the wafer.

8. The method as recited in claim 7, further comprising depositing a protective layer onto an upper surface of the conductive layer.

9. The method as recited in claim 7, wherein the conductive layer is selected from the group consisting of aluminum, copper, silver, gold and nickel.

10. The method as recited in claim 8, wherein the protective layer is selected from the group consisting of silicon dioxide and silicon nitride.

11. The method as recited in claim 6, wherein the wafer is selected from the group consisting of silicon, silicon carbide and gallium arsenide.

12. The method as recited in claim 6, wherein the substrate is a non- conductive subsfrate selected from the group consisting of glass, high resistivity silicon, crystalline sapphire, and ceramic.

13. The method as recited in claim 6, wherein the substrate is a conductive substrate selected from the group consisting of silicon, silicon carbide, and gallium arsenide.

14. The method as recited in claim 6, wherein the recess has beveled edges.

15. A MEMS structure comprising: a substrate having a recess disposed in the upper surface thereof; at least one conductive element that is attached to the substrate and that extends outwardly therefrom; a movable MEMS element disposed adjacent the at least one conductive element forming a variable size gap therebetween, wherein the movable MEMS element is free from the substrate and in at least partial alignment with the recess.

16. The MEMS stracture as recited in claim 15, wherein the cavity is etched into the substrate.

17. The MEMS stracture as recited in claim 15, wherein the substrate is a non- conductive substrate selected from the group consisting of glass, high resistivity silicon, crystalline sapphire, and ceramic.

18. The MEMS structure as recited in claim 15, wherein the substrate is a conductive substrate selected from the group consisting of silicon, silicon carbide, and gallium arsenide.

19. The MEMS stracture as recited in claim 15, wherein the at least one conductive element is selected from the group consisting of silicon, silicon carbide, and gallium arsenide.

20. The MEMS structure as recited in claim 15, fiirther comprising a layer of conductor that is disposed on an upper surface of the at least one conductive element.

21. The MEMS structure as recited in claim 20, wherein the layer of conductor is selected from the group consisting of aluminum, copper, silver, gold, nickel, and highly doped semiconductor materials.

22. The MEMS structure as recited in claim 21, further comprising a protective layer that is disposed on top of the layer of aluminum.

23. The MEMS structure as recited in claim 22, wherein the protective layer is selected from the group consisting of silicon dioxide or silicon nitride.

24. The MEMS structure as recited in claim 15, further comprising an intermediate layer that is disposed between the at least one conductive element and the substrate.

25. The MEMS structure as recited in claim 24, wherein the intermediate layer is selected from the group consisting of silicon dioxide and silicon nitride.

26. The MEMS structure as recited in claim 15, wherein selectively etching the intermediate layer releases the movable MEMS element from the subsfrate.

27. The MEMS structure as recited in claim 15, wherein the movable MEMS element is selected from the group consisting of silicon, poly-crystalline silicon, amorphous silicon, silicon carbide and gallium arsenide.

28. The MEMS structure as recited in claim 15, further comprising a base layer that forms a lower surface of the movable MEMS element.

29. The MEMS structure as recited in claim 28, wherein the base layer is nonconductive.

30. The MEMS structure as recited in claim 29, wherein the base layer is selected from the group consisting of silicon dioxide or silicon nitride.

31. The MEMS structure as recited in claim 15, wherein the recess has beveled outer edges.

32. A MEMS stracture comprising: a subsfrate having a recess disposed in the upper surface thereof; at least one conductive element that is directly attached to the substrate and that extends outwardly therefrom; a movable MEMS element disposed adjacent the at least one conductive element forming a variable size gap therebetween, wherein the movable MEMS element is free from the substrate and in at least partial alignment with the recess.

33. The MEMS stracture as recited in claim 32, wherein the movable MEMS element further comprises an nonconductive layer disposed adjacent the gap.

34. The MEMS stracture as recited in claim 32, wherein the movable MEMS element is at least partially selected from the group consisting of silicon, silicon carbide and gallium arsenide.

35. The MEMS structure as recited in claim 34, wherein the movable MEMS element further comprises a conductive layer disposed thereon.

36. The MEMS stracture as recited in claim 35, wherein the conductive layer is selected from the group consisting of aluminum, copper, silver, gold and nickel.

37. A MEMS stracture comprising: a substrate having a recess disposed in the upper surface thereof; first and second conductive elements that are directly attached to the substrate and that extend outwardly therefrom; a movable MEMS element disposed adjacent the conductive elements forming a variable size gaps therebetween, wherein the movable MEMS element is free from the substrate and in at least partial alignment with the recess.

38. The MEMS stracture as recited in claim 37, wherein the movable MEMS element further comprises a nonconductive layer disposed adjacent the gaps.

39. The MEMS stracture as recited in claim 37, wherein the movable MEMS element is at least partially selected from the group consisting of silicon, silicon carbide and gallium arsenide.

40. The MEMS structure as recited in claim 38 wherein the movable MEMS element further comprises a conductive layer

41. The MEMS stracture as recited in claim 40, wherein the conductive layer is selected from the group consisting of aluminum, copper, silver, gold and nickel.

42. The MEMS stracture as recited in claim 37, wherein the first and second conductive elements are electrically isolated from each other.

43. The MEMS structure as recited in claim 37, wherein the movable MEMS element further comprises at least two conductive elements.

44. The MEMS structure as recited in claim 43, wherein the at least two conductive elements of the MEMS stracture are electrically isolated from each other.

II.

45. A method for fabricating a MEMS device onto a substrate having a movable MEMS element portion free from the subsfrate and disposed adjacent a stationary MEMS element that is in mechanical communication with the substrate, the method comprising the steps of:

(a) providing a wafer having opposed first and second surfaces; (b) forming a recess into the first surface to produce a spacer member disposed at a periphery of the recess;

(c) mechanically connecting the spacer member to the substrate to form a composite structure having a void disposed therein; and

(d) removing a portion of the wafer to expose the void and to release the movable MEMS element from the stationary MEMS element.

46. The method as recited in claim 45, wherein step (a) further comprises depositing a first layer onto the first surface of the wafer, and wherein step (b) further comprises depositing the spacer member onto the first layer.

47 The method as recited in claim 46, wherein step (b) further comprises etching a portion of the spacer member to form the recess.

48. The method as recited in claim 47, wherein step (d) further comprises etching into the second surface of the wafer to 1) produce a gap that is at least partially aligned with the void, and 2) expose a portion of the first layer that is aligned with the gap.

49. The method as recited in claim 48, wherein step (d) further comprises etching the exposed portion of the first layer into the void to release the movable MEMS element.

50. The method as recited in claim 49, wherein the gap further comprises a variable size gap that varies in response to movement by the movable MEMS element.

51. The method as recited in claim 49, wherein the wafer is conductive.

52. The method as recited in claim 51 , wherein the wafer comprises silicon.

53. The method as recited in claim 51, wherein the first layer is an insulator.

54. The method as recited in claim 53, wherein the first layer is selected from the group consisting of silicon nitride and silicon dioxide.

55. The method as recited in claim 45, wherein step (b) further comprises attaching a first layer onto the first surface of the wafer proximal the recess.

56. The method as recited in claim 55, wherein step (d) further comprises etching into the second surface of the wafer at a location aligned with the void to expose a portion of the first layer.

57. The method as recited in claim 56, wherein step (d) further comprises etching the exposed portion of the first layer into the void to release the movable MEMS element.

58. The method as recited in claim 57, wherein step (d) further comprises producing a variable size gap disposed between the movable MEMS element and the stationary MEMS element.

59. The method as recited in claim 55, further comprising depositing the first layer is deposited onto the first surface of the wafer.

60. The method as recited in claim 59, wherein the first layer is selected from the group consisting of silicon nitride and silicon dioxide.

61. The method as recited in claim 59, further comprising growing the first layer onto the first surface of the wafer.

62. The method as recited in claim 61 , wherein the first layer is an oxide.

63. The method as recited in claim 55, wherein the first layer is an insulator.

64. The method as recited in claim 45, wherein step (a) further comprises depositing the spacer member onto the first surface.

65. The method as recited in claim 64, wherein step (b) further comprises etching into the spacer member to form the recess.

66. The method as recited in claim 65, further comprising, before step (c), depositing a first layer onto the wafer proximal the recess.

67. The method as recited in claim 66, wherein the first layer is selected from the group consisting of silicon nitride and silicon dioxide.

68. The method as recited in claim 66, wherein step (d) further comprises etching into the second surface of the wafer at a location aligned with the void to expose a portion of the first layer.

69. The method as recited in claim 68, wherein step (d) further comprises etching the exposed portion of the first layer into the void to release the movable MEMS element.

70. The method as recited in claim 69, wherein step (d) further comprises producing a variable size gap disposed between the movable MEMS element and the stationary MEMS element.

71. The method as recited in claim 66, wherein the first layer is an insulator.

72. The method as recited in claim 45, further comprising etching into the wafer to produce the stationary MEMS element having first and second conductive elements that are electrically isolated from each other.

73. The method as recited in claim 45, further comprising etching into the wafer to produce the movable MEMS element having at least two conductive elements that are electrically isolated from each other.

74. The method as recited in claim 45, wherein the substrate is conductive.

75. The method as recited in claim 74, wherein the subsfrate is selected from the group consisting of silicon, silicon carbide, and gallium arsenide

76. The method as recited in claim 74, wherein the spacer member is an insulator.

77. The method as recited in claim 45, wherein the substrate is nonconductive.

78. The method as recited in claim 77, wherein the substrate is selected from the group consisting of glass, high resistivity silicon, crystalline sapphire, and ceramic.

79. A method for fabricating a MEMS device having a movable MEMS element disposed adjacent a stationary MEMS element that is in mechanical communication with a subsfrate, the method comprising the steps of:

(a) providing a wafer having first and second opposing surfaces; (b) depositing a first layer onto the first surface of the wafer;

(c) depositing a spacer member onto the first layer;

(d) removing a middle portion of the spacer member so as to define a recess disposed between remaining spacer material;

(e) attaching the remaining spacer material to a substrate to form a composite stracture having a void disposed therein;

(f) removing a portion of the wafer to expose a portion of the first layer that is at least partially aligned with the void; and

(g) removing a portion of the exposed portion of the first layer to expose the void and release the movable MEMS element.

80. The method as recited in claim 79, wherein steps (f) and (g) further comprise etching the wafer and exposed portion of the first layer, respectively.

81. The method as recited in claim 79, further comprising creating a variable size gap between the movable MEMS element and stationary MEMS element.

82. The method as recited in claim 79, wherein the first layer is an insulator.

83. The method as recited in claim 82, wherein the first layer is selected from the group consisting of silicon dioxide and silicon nitride.

84. The method as recited in claim 79, wherein the spacer is an insulator.

85. The method as recited in claim 84, wherein the spacer is selected from the group consisting of silicon nitride and silicon dioxide.

86. The method as recited in claim 79, wherein steps (f) and (g) further comprise creating the movable MEMS element having at least a pair of conductive members that are electrically isolated from each other by the first layer.

87. The method as recited in claim 79, further comprising fabricating the stationary MEMS element having a pair of conductive members that are electrically isolated from each other by at least one of the remaining spacer material and the substrate.

88. The method as recited in claim 79, wherein the wafer is conductive.

89. A method for fabricating a MEMS device onto a substrate having a movable MEMS element portion free from the substrate and disposed adjacent a stationary MEMS element that is in mechanical communication with the substrate, the method comprising the steps of: (a) providing a wafer having opposed first and second surfaces;

(b) depositing a spacer material onto the first surface of the wafer;

(c) forming a recess within a middle portion of the spacer material.

(d) attaching a first layer to an upper surface of the recess;

(e) attaching the spacer material to the substrate to form a composite stracture having a void disposed therein;

(e) removing a portion of the wafer to expose a portion of the first layer that is at least partially aligned with the void; and (f) removing the exposed portion of the first layer to release the movable MEMS element.

90. The method as recited in claim 89, wherein removing steps (e) and (f) further comprise etching the portion of the wafer and the exposed portion of the first layer, respectively.

91. The method as recited in claim 89, wherein the substrate is conductive.

92. The method as recited in claim 91, wherein the spacer material is an insulator.

93. The method as recited in claim 91, wherein the substrate is selected from the group consisting of silicon, silicon carbide, and gallium arsenide.

94. The method as recited in claim 92, wherein the spacer is selected from the group consisting of silicon nitride and silicon dioxide.

95. The method as recited in claim 89, wherein the wafer is conductive.

96. The method as recited in claim 89, wherein the first layer is an insulator.

97. The method as recited in claim 96, wherein the first layer is selected from the group consisting of silicon dioxide and silicon nifride.

98. The method as recited in claim 89, wherein the movable MEMS element includes a pair of conductive members that are electrically isolated from each other.

99. The method as recited in claim 89, wherein the stationary MEMS element includes a pair of conductive members that are electrically isolated from each other.

100. The method as recited in step 89, further comprising creating a variable size gap between the movable MEMS element and the stationary MEMS element.

101. A method for fabricating a MEMS device onto a subsfrate having a movable MEMS element portion free from the substrate and disposed adjacent a stationary MEMS element that is in mechanical communication with the substrate, the method comprising the steps of: (a) providing a wafer having opposed first and second surfaces; (b) depositing a spacer material onto the first surface of the wafer;

(c) forming a recess within a middle portion of the spacer material.

(d) attaching the spacer material to the subsfrate to form a composite stracture having a void disposed therein; and (e) removing a portion of the wafer to expose the void and release the movable

MEMS element.

III.

102. A method of constructing a MEMS device having a first stationary conductive member separated from a second movable conductive member by a variable size gap, the method using exclusively surface fabrication teclmiques and comprising:

(a) providing a substrate;

(b) depositing sacrificial material onto the subsfrate to form a sacrificial layer;

(c) depositing insulating material onto the sacrificial layer to form an insulating layer;

(d) after step (c), depositing conductive material onto the insulating layer to form a conductive layer;

(e) etching through a portion of the conductive layer to the insulating layer to foπn the first and second adjacent conductive structures separated by a variable size gap;

(f) etching through a portion of the insulating layer to provide a base for the second conductive stracture; and

(g) etching through at least a portion of the sacrificial layer to release the base and second conductive stracture from the substrate.

103. The method as recited in claim 102, further comprising: depositing a second conductive material onto the conductive layer.

104. The method as recited in claim 102, wherein step (b) further comprises depositing the sacrificial material and patterning it so that it remains on a portion of the substrate that is not in alignment with the first conductive structure.

105. The method as recited in claim 104, wherein step (c) further comprises depositing the insulating material and patterning it so that a portion of it remains directly on the substrate adjacent the sacrificial layer.

106. The method as recited in claim 104, wherein step (c) further comprises depositing insulating material and patterning it so that it remains only on the sacrificial material.

107. The method as recited in claim 106, wherein step (d) further comprises depositing a first portion of the conductive material and patterning it so that it remains on the substrate, and depositing a second portion of the conductive material and patterning it so that it remains on the insulating material, wherein the first portion forms the first conductive member.

108. The method as recited in claim 102, wherein the first conductive member is connected directly to the substrate.

109. The method as recited in claim 102, wherein the first conductive member is connected to the substrate via insulating material.

110. The method as recited in claim 109, wherein the first conductive member is connected to the substrate via sacrificial material.

111. The method as recited in claim 102, further comprising depositing sacrificial material and patterning it to produce a mold having cavities formed therein, wherein step (d) further comprises depositing conductive material so as to cover the surface and fill the cavities and planarizing the surface so as to have the conductive material remain only in the cavities.

112. The method as recited in claim 102, wherein the substrate is a conductive subsfrate selected from the group consisting of silicon, silicon carbide, and gallium arsenide.

113. The method as recited in claim 102, wherein the substrate is a nonconductive subsfrate selected from the group consisting of glass, high resistivity silicon, crystalline sapphire, and ceramic.

114. The method as recited in claim 102, wherein the insulating material comprises silicon dioxide.

115. The method as recited in claim 102, wherein the conductive material comprises polycrystalline silicon.

116. The method as recited in claim 102, wherein the sacrificial material comprises silicon nitride.

117. The method as recited in claim 103, wherein the second conductive material comprises a metal.

118. The method as recited in claim 102, further comprising attaching a protective cap to the insulating material to encapsulate the MEMS device.

119. The method as recited in claim 102, wherein the movable conductive member further comprises two conductive elements that are electrically isolated from each other.

120. A method for fabricating an encapsulated MEMS device having a first stationary conductive member separated from a second movable conductive member by a variable size gap, the method using exclusively surface fabrication techniques and comprising: (a) depositing conductive trace material and patterning it so that it remains on the outer ends of a substrate to form first and second traces;

(b) depositing sacrificial material onto the substrate and patterning it so that it remains between the traces to form a sacrificial layer;

(c) depositing insulating material onto the sacrificial material to form an insulating layer;

(d) depositing additional trace material so as to cover the surface and fill voids formed by the insulating and sacrificial layers aligned with the conductive frace material followed by planarizing the surface so as to form inner and outer trace members with insulating material therebetween; (e) forming the stationary conductive member in electrical communication with the inner trace member; (f) etching through a portion of the insulating layer; and

(g) forming the movable conductive member separated by the stationary conductive member by a variable size gap.

121. The method as recited in claim 120, further comprising bonding a cap to the wafer so as to encapsulate the stationary and movable members.

122. The method as recited in claim 121, wherein the cap is bonded to the insulating material disposed between the inner and outer trace members.

123. The method as recited in claim 120, wherein the outer trace member is connectable to the ambient environment to transfer electricity to the stationary conductive member.

124. The method as recited in claim 121, wherein the cap is conductive.

125. The method as recited in claim 121, wherein the cap is nonconductive.

126. The method as recited in claim 120, wherein the movable conductive member further comprises two conductive elements that are electrically isolated from each other.

IV.

127. A method of fabricating a MEMS structure, comprising the steps of:

(a) providing a wafer having at least a first layer and a second layer;

(b) removing a portion of the first layer to form a bridge member;

(c) after step (b), attaching the wafer to the upper surface of the substrate to form a composite stracture having an internal void formed therein, wherein the bridge member is aligned with the internal void; and

(d) etching through the upper layer wafer around the periphery of the bridge member to break through into the recess, thereby releasing the bridge from the substrate.

129. The method as recited in claim 127, further comprising depositing a conductive layer onto the wafer.

129. The method as recited in claim 128, wherein the conductive layer is selected from the group consisting of aluminum, copper, silver, gold and nickel.

130. The method as recited in claim 127, wherein the wafer is selected from the group consisting of silicon, silicon carbide and gallium arsenide.

131. The method as recited in claim 127, wherein the substrate is a non- conductive substrate selected from the group consisting of glass, high resistivity silicon, crystalline sapphire, and ceramic.

132. The method as recited in claim 127, wherein the substrate is a conductive substrate selected from the group consisting of silicon, silicon carbide, and gallium arsenide.

133. The method as recited in claim 127, wherein the void is formed by pre- patterning a recess into a surface of the wafer prior to step (c), and bonding the surface to the substrate.

134. The method as recited in claim 127, wherein the void is formed by pre- patterning a recess into a surface of the substrate prior to step (c), and bonding the surface to the wafer.

135. The method as recited in claim 127, wherein the recess has beveled edges.

136. The method as recited in claim 127, wherein the bridge member comprises an insulating material.

137. The method as recited in claim 136, wherein the bridge member comprises silicon dioxide.

138. The method as recited in claim 127, further comprising etching an alignment hole into the wafer.

139. The method as recited in claim 138, further comprising thinning the subsfrate such that the alignment hole extends entirely through the substrate.

140. The method as recited in claim 127, wherein step (d) further comprises forming a conductive member extending from the bridge and separated from a stationary member via a variable size gap.

141. The method as recited in claim 140, wherein the conductive member and stationary member are electrically isolated from one another.

142. A method of fabricating a MEMS stracture, comprising the steps of:

(a) providing a wafer having at least a first member and a second member;

(b) removing a portion of the first member to form a bridge and a pair of spacers defining a recess therebetween;

(c) attaching the spacers to a substrate to form a composite stracture having an internal void formed therein, wherein the bridge is aligned with the internal void; and

(d) etching through the second member around the periphery of the bridge to break through into the recess and release the second member from mechanical communication with the subsfrate.

143. The method as recited in claim 142, further comprising etching an alignment hole through the first, and second layers and substantially through the substrate.

144. The method as recited in claim 143, further comprising thinning the substrate such that the alignment hole extends entirely through the subsfrate.

145. The method as recited in claim 142, wherein the first member comprises a first layer and a second layer of selectively etchable materials, wherein the first layer is etched to form the spacers, and wherein the second layer is etched to foπn the bridge.

146. The method as recited in claim 145, wherein the second layer is made of an insulating material.

147. The method as recited in claim 146, wherein the second layer comprises silicon dioxide.

148. The method as recited in claim 145, wherein the first layer is selected from the group consisting of silicon nitride and polycrystalline silicon.

149. The method as recited in claim 142, wherein step (d) further comprises forming a conductive member extending from the bridge and separated from a stationary member via a variable size gap

150. The method as recited in claim 149, wherein the conductive member and stationary member are electrically isolated from one another.

151. The method as recited in claim 142, wherein the second member comprises silicon.

152. The method as recited in claim 142, further comprising depositing and patterning a conductive layer onto the first layer.

153. The method as recited in claim 152, wherein the conductive layer comprises aluminum.

154. The method as recited in claim 142, wherein the substrate is selected from the group consisting of glass, high resistivity silicon, crystalline sapphire, crystalline silicon, polycrystalline silicon, silicon carbide, or ceramic

155. A method of fabricating a MEMS stracture, comprising the steps of:

(a) providing a wafer;

(b) forming a pair of spacers at opposite ends of a surface of the wafer, wherein the spacers define a recess therebetween;

(c) depositing a layer onto the upper surface of the wafer in the recess;

(d) etching a portion of the layer to define a bridge;

(e) attaching the spacers to a substrate to define an internal void; and

(f) etching through the wafer into the void around the periphery of the bridge to release the bridge from mechanical communication with the substrate.

156. The method as recited in claim 155, wherein the layer is insulating.

157. The method as recited in claim 156, wherein the layer comprises silicon dioxide.

158. The method as recited in claim 155, wherein step (f) further comprises producing a stationary conductive MEMS element attached to the subsfrate, and a movable conductive MEMS element supported by the bridge.

159. The method as recited in claim 158, wherein the conductive member and stationary member are electrically isolated from one another.

160. The method as recited in claim 155, further comprising depositing a conductive layer onto the wafer.

161. A method of fabricating a MEMS structure, comprising the steps of:

(a) providing a wafer;

(b) partially etching into a surface of the wafer to form a recess therein disposed between a pair of spacers;

(c) depositing a layer onto the surface of the wafer in the recess so as to form a bridge;

(d) attaching the spacers to a substrate to define an internal void; and

(e) etching through the wafer into the void around the periphery of the bridge to release the bridge from mechanical communication with the substrate.

162. The method as recited in claim 161, wherein the layer is insulating.

163. The method as recited in claim 162, wherein the layer comprises silicon dioxide.

164. The method as recited in claim 161, further comprising depositing a conductive layer onto the wafer.

165. A method of fabricating a MEMS stracture, comprising the steps of:

(a) providing a wafer having at least a first and a second layer;

(b) etching into the first layer to produce a bridge;

(c) providing a substrate;

(c) etching a recess into a surface of the subsfrate;

(d) after step (b), attaching the wafer to the surface of the substrate to form an internal void such that the bridge is 1) disposed between the surface and the second layer, and 2) aligned with the void; and (e) etching through the second layer around the periphery of the bridge to release the bridge from mechanical communication with the substrate.

166. The method as recited in claim 165, further comprising depositing a conductive layer onto the wafer.

167. The method as recited in claim 166, wherein the conductive layer is selected from the group consisting of aluminum, copper, silver, gold and nickel.

168. The method as recited in claim 165, wherein the wafer is selected from the group consisting of silicon, silicon carbide and gallium arsenide.

169. The method as recited in claim 165, wherein the substrate is a non- conductive substrate selected from the group consisting of glass, high resistivity silicon, crystalline sapphire, and ceramic.

170. The method as recited in claim 165, wherein the substrate is a conductive substrate selected from the group consisting of silicon, silicon carbide, and gallium arsenide.

171. The method as recited in claim 165, wherein the recess has beveled edges.

172. The method as recited in claim 165, wherein the bridge member comprises an insulating material.

173. The method as recited in claim 172, wherein the bridge member comprises silicon dioxide.

174. The method as recited in claim 165, wherein step (e) further comprises producing a stationary conductive MEMS element attached to the subsfrate, and a movable conductive MEMS element supported by the bridge.

175. The method as recited in claim 174, wherein the conductive member and stationary member are electrically isolated from one another.

176. The method as recited in claim 165, wherein step (e) further comprises forming a conductive member extending from the bridge and separated from a stationary member via a variable size gap.

177. The method as recited in claim 165, further comprising etching an alignment hole through the first and second layers, and partially tlirough the substrate.

178. The method as recited in claim 177, further comprising thinning the subsfrate such that the alignment hole extends entirely through the substrate.

V.

179. A method for fabricating a MEMS device, comprising the steps of:

(a) providing a substrate having an upper surface;

(b) depositing a sacrificial layer onto the upper surface of the substrate, wherein the sacrificial layer has an upper surface;

(c) depositing a nonconductive layer onto the upper surface of the sacrificial layer;

(d) depositing a mold onto the subsfrate, wherein the mold has at least one void aligned with the nonconductive layer; (e) depositing conductive material into the at least one void to foπn conductive elements extending from the nonconductive layer;

(f) removing the mold; and

(g) removing the sacrificial layer to release a movable element including the nonconductive layer and conductive material from the substrate.

180. The method as recited in claim 179, wherein step (e) further comprises electroplating the conductive material.

181. The method as recited in claim 179, wherein step (e) further comprises electrolessplating the conductive material.

182. The method as recited in claim 180, wherein step (e) further comprises coating the nonconductive layer with a shorting layer prior to plating.

183. The method as recited in claim 181, wherein step (d) further comprises coating the nonconductive layer with a catalyst prior to plating.

184. The method as recited in claim 179, wherein the nonconductive layer is selected from the group consisting of silicon nitride and silicon dioxide.

185. The method as recited in claim 179, wherein the subsfrate is selected from the group consisting of glass, high resistivity silicon, crystalline sapphire, crystalline silicon, polycrystalline silicon, silicon carbide, ceramic, and gallium arsenide.

186. The method as recited in claim 179, wherein the conductive material comprises a metal.

187. The method as recited in claim 186, wherein the conductive layer is selected from the group consisting of nickel, gold, and copper.

188. The method as recited in claim 186, wherein the nonconductive layer and conductive material are aπanged in a maimer such that a first portion of the movable element is electrically isolated from a second portion of the movable element.

189. The method as recited in claim 179, further comprising the step of depositing a second conductive material onto the substrate, wherein the second conductive material is spaced from the movable element by a variable size gap

VI.

190. A MEMS stracture comprising: a substrate; at least one conductive element that is in mechanical commmiication with the subsfrate and that extends therefrom; a movable MEMS element having a portion that is free from the substrate and positioned such that a gap separates the movable MEMS element from the at least one conductive element; at least one electrical trace having a first terminal end in electrical communication with the at least one conductive element and a second terminal end in electrical communication with a peripheral region; and a cap attached to the subsfrate inside the peripheral region having upper and side walls that encapsulate the at least one conductive element and the movable MEMS element.

191. The MEMS structure as recited in claim 190, wherein the cap is non- conductive.

192. The MEMS stracture as recited in claim 191, wherein the cap is selected from the group consisting of glass, high resistivity silicon, crystalline sapphire, and ceramic.

193. The MEMS stracture as recited in claim 190, wherein the cap is conductive.

194. The MEMS stracture as recited in claim 193, wherein the cap is selected from the group consisting of silicon and metal.

195. The MEMS stracture as recited in claim 190, wherein the electrical trace is selected from the group consisting of doped polysilicon, and a metal

196. The MEMS structure as recited in claim 195, wherein the metal is selected from the group consisting of tungsten, titanium, nickel, and alloys thereof, and aluminum, copper, silver, and gold.

197. The MEMS stracture as recited in claim 190, wherein a bottom surface of at least one of the side walls of the cap is attached to the subsfrate.

198. The MEMS structure as recited in claim 190, wherein the sidewalls are comiected to the subsfrate at a location between first and second terminal ends of the at least one electrical trace.

199. The MEMS structure as recited in claim 190, wherein the at least one electrical trace is disposed within an interface between the at least one conductive MEMS element and the substrate.

200. The MEMS stracture as recited in claim 199, wherein the interface prevents any portion of the at least one electrical trace from being in electrical communication with the subsfrate.

201. The MEMS stracture as recited in claim 199 wherein the interface layer comprises an electrical insulator.

202. The MEMS structure as recited in claim 201 wherein the interface layer comprises one of silicon dioxide and silicon nitride.

203. The MEMS stracture as recited in claim 190, wherein the subsfrate comprises a nonconductive material.

204. The MEMS stracture as recited in claim 203, wherein a portion of the at least one electrical frace is in electrical communication with the subsfrate.

205. The MEMS structure as recited in claim 190, wherein the subsfrate comprises a conductive material.

206. The MEMS structure as recited in claim 190, wherein the substrate further comprises a recess formed in the upper surface thereof.

207. The MEMS stracture as recited in claim 206, wherein the movable MEMS element is disposed above and substantially aligned with the recess.

208. The MEMS stracture as recited in claim 190, wherein the movable MEMS element comprises at least one conductive member attached to a nonconductive base.

209. The MEMS stracture as recited in claim 208, wherein the nonconductive base is selectively etchable from the conductive member.

210. The MEMS stracture as recited in claim 208 wherein the nonconductive base comprises one of silicon dioxide and silicon nitride.

211. The MEMS structure as recited in claim 190, wherein the substrate is selected from the group consisting of high resistivity silicon, crystalline sapphire, glass and ceramic.

212. The MEMS stracture as recited in claim 190, wherein the substrate is selected from the group consisting of silicon, silicon carbide, gallium arsenide, and metal.

213. The MEMS stracture as recited in claim 190, wherein the at least one conductive element is selected from the group consisting of silicon, silicon carbide, and gallium arsenide.

214. A method for manufacturing a MEMS structure, comprising: connecting a wafer to a substrate via an interface; forming a channel within the interface having a first terminal end facing the wafer, and a second terminal end exposed to a peripheral region; filling the recess with a conductive material; etching the wafer so as to produce a stationary member in mechanical communication with the substrate via the interface and a movable member spaced from the stationary member via a gap; and bonding a cap to the wafer so as to encapsulate the stationary and movable members.

215. The method as recited in claim 214, further comprising etching the interface so as to release the movable member from the subsfrate.

216. The method as recited in claim 215, further comprising forming a recess in an upper surface of the substrate so as to be substantially aligned with the movable member.

217. The method as recited in claim 214, wherein the filling step further comprises forming an electrical trace having a first terminal end in electrical communication with the stationary member and a second tenninal end in electrical communication with a peripheral region.

218. The method as recited in claim 214, wherein the bonding step further comprises positioning the cap such that a portion of the cap is disposed between the first and second terminal ends.

219. The method as recited in claim 214, further comprising: providing a blank having a plurality of caps disposed therein; bonding the blank to the wafer; and dicing the combined blank and wafer in a single operation to yield encapsulated devices.

220. A MEMS structure disposed within a peripheral region comprising: a substrate; a movable MEMS element having a distal end in mechanical communication with the substrate, and a middle portion disposed its two distal ends free from the substrate; and a cap attached to the substrate having upper and side walls that encapsulate the at least one conductive element and the movable MEMS element.

221. The MEMS structure as recited in claim 220, wherein the cap separates the MEMS stracture from the peripheral region, the MEMS stracture further comprising: a stationary MEMS element in mechanical communication with the substrate and disposed adjacent the movable MEMS element; and at least one electrical trace having a first terminal end in electrical communication with the at least one stationary element and a second terminal end in electrical communication with the peripheral region.

222. The MEMS structure as recited in claim 221, further comprising: a second stationary MEMS element in mechanical communication with the substrate and disposed adjacent the movable MEMS element; and a second electrical trace having a first terminal end in electrical communication with the second stationary MEMS element and a second terminal end in electrical communication with the peripheral region.

223. The MEMS stracture as recited in claim 222, wherein the stationary MEMS elements are electrically isolated from each other.

224. The MEMS stracture as recited in claim 221, wherein the stationary MEMS element is conductive.

225. The MEMS structure as recited in claim 220, wherein the movable MEMS element further comprises at least two conductive elements.

226. The MEMS stracture as recited in claim 225, wherein the at least two conductive elements are electrically isolated from each other.

227. A MEMS stracture surrounded by a peripheral region, the MEMS stracture comprising: a substrate; at least one stationary element that is in mechanical communication with the substrate; a movable MEMS element disposed adjacent the conductive element, and having a distal end in mechanical communication with the substrate, and a middle portion disposed between its two distal ends free from the substrate; and at least one electrical frace having a first terminal end in electrical communication with the at least one stationary element and a second teraiinal end in electrical communication with the peripheral region.

228. The MEMS structure as recited in claim 227, further comprising a cap attached to the substrate inside the peripheral region having upper walls and side walls that encapsulate the at least one conductive element and the movable MEMS element.

229. The MEMS structure as recited in claim 227, wherein the second terminal extends outside the cap

230. A MEMS stracture surrounded by a peripheral region, the MEMS stracture comprising: a substrate; a first and second stationary elements in mechanical communication with the substrate; a movable MEMS element disposed adjacent the conductive element, and having a distal end in mechanical communication with the substrate, and a middle portion disposed between its two distal ends free from the substrate; and a first and second electrical frace having first terminal ends in electrical communication with the first and second stationary elements, respectively, and having second terminal ends in electrical communication with the peripheral region.

231. The MEMS stracture as recited in claim 230, further comprising a cap attached to the subsfrate inside the peripheral region having upper walls and side walls that encapsulate the at least two conductive elements and the movable MEMS element.

232. The MEMS stracture as recited in claim 231 , wherein the second terminal ends extend outside the cap.

233. The MEMS structure as recited in claim 232, wherein the second terminal ends are electrically isolated from each other.

234. The MEMS stracture as recited in claim 230, wherein the movable MEMS element further comprises at least two conductive elements.

235. The MEMS structure as recited in claim 234, wherein the at least two conductive elements are electrically isolated from each other.