WO2002075808A3 - Contact de memoire mram auto-aligne et procede de fabrication - Google Patents

Contact de memoire mram auto-aligne et procede de fabrication Download PDF

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Publication number
WO2002075808A3
WO2002075808A3 PCT/US2002/007285 US0207285W WO02075808A3 WO 2002075808 A3 WO2002075808 A3 WO 2002075808A3 US 0207285 W US0207285 W US 0207285W WO 02075808 A3 WO02075808 A3 WO 02075808A3
Authority
WO
WIPO (PCT)
Prior art keywords
self
conductive material
mram
fabrication
aligned
Prior art date
Application number
PCT/US2002/007285
Other languages
English (en)
Other versions
WO2002075808A2 (fr
Inventor
Roger Lee
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to PCT/US2002/007285 priority Critical patent/WO2002075808A2/fr
Priority to AU2002306683A priority patent/AU2002306683A1/en
Publication of WO2002075808A2 publication Critical patent/WO2002075808A2/fr
Publication of WO2002075808A3 publication Critical patent/WO2002075808A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Hall/Mr Elements (AREA)
  • Semiconductor Memories (AREA)
  • Mram Or Spin Memory Techniques (AREA)

Abstract

L'invention concerne un procédé de formation d'un contact de mémoire MRAM auto-aligné. Les paquets de mémoire MRAM munis d'une couche supérieure de matériau conducteur sont formés sur des portions de circuits intégrés. Un matériau isolant est formé sur le substrat, comportant les paquets de mémoire MRAM munis de la couche supérieure de matériau conducteur. Le matériau isolant est ensuite poli ou gravé de façon mécanico-chimique, jusqu'au niveau de la couche supérieure de matériau conducteur, afin d'exposer ce matériau utilisé en tant que contacts MRAM auto-alignés.
PCT/US2002/007285 2001-03-15 2002-03-12 Contact de memoire mram auto-aligne et procede de fabrication WO2002075808A2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/US2002/007285 WO2002075808A2 (fr) 2001-03-15 2002-03-12 Contact de memoire mram auto-aligne et procede de fabrication
AU2002306683A AU2002306683A1 (en) 2001-03-15 2002-03-12 Self-aligned mram contact and method of fabrication

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US80591501 2001-03-15
US09/805,915 2001-03-15
PCT/US2002/007285 WO2002075808A2 (fr) 2001-03-15 2002-03-12 Contact de memoire mram auto-aligne et procede de fabrication

Publications (2)

Publication Number Publication Date
WO2002075808A2 WO2002075808A2 (fr) 2002-09-26
WO2002075808A3 true WO2002075808A3 (fr) 2004-02-12

Family

ID=53015433

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/007285 WO2002075808A2 (fr) 2001-03-15 2002-03-12 Contact de memoire mram auto-aligne et procede de fabrication

Country Status (2)

Country Link
AU (1) AU2002306683A1 (fr)
WO (1) WO2002075808A2 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5841692A (en) * 1996-03-18 1998-11-24 International Business Machines Corporation Magnetic tunnel junction device with antiferromagnetically coupled pinned layer
EP1054449A2 (fr) * 1999-05-17 2000-11-22 Motorola, Inc. Mémoire à accès direct magnétique et sa méthode de fabrication
US6153443A (en) * 1998-12-21 2000-11-28 Motorola, Inc. Method of fabricating a magnetic random access memory

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5841692A (en) * 1996-03-18 1998-11-24 International Business Machines Corporation Magnetic tunnel junction device with antiferromagnetically coupled pinned layer
US6153443A (en) * 1998-12-21 2000-11-28 Motorola, Inc. Method of fabricating a magnetic random access memory
EP1054449A2 (fr) * 1999-05-17 2000-11-22 Motorola, Inc. Mémoire à accès direct magnétique et sa méthode de fabrication

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
HU Y Z ET AL: "Chemical-mechanical polishing as an enabling technology for giant magnetoresistance devices", THIN SOLID FILMS, ELSEVIER-SEQUOIA S.A. LAUSANNE, CH, vol. 308-309, no. 1-4, 31 October 1997 (1997-10-31), pages 555 - 561, XP004110335, ISSN: 0040-6090 *

Also Published As

Publication number Publication date
AU2002306683A1 (en) 2002-10-03
WO2002075808A2 (fr) 2002-09-26

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