WO2002069526A1

WO2002069526A1 - Coded optical interface and method of operation

Info

Publication number: WO2002069526A1
Application number: PCT/US2002/005261
Authority: WO
Inventors: David A. Entrekin
Original assignee: Entrekin David A
Priority date: 2001-02-26
Filing date: 2002-02-22
Publication date: 2002-09-06

Abstract

A technique for processing instruction and device data in parallel over an optical back plane (130, fig. 1). Sets of parallel data from a processor (100, fig. 1) or a device (160, fig.1) are provided to registers (110, fig. 1) which output corresponding serial data. The sets of serial instruction or device data are encoded at wavelengths with optical encoders (120, fig. 1). The encoded serial data is transmitted over an optical fiber (130, fig. 1). The optical fiber may support multiple wavelengths, and thus, may transmit multiple sets of encoded serial data provided by optical encoder in parallel. Upon exiting the optical fiber, encoded serial data is detected and received by optical decoders which detect a wavelength which was used to encode serial data. Optical decoders output decoded serial data to register inputs, and the registers output corresponding parallel data. Parallel data is then provided to a corresponding processor or device that is associated with that register, and parallel instructions are executed and/or device data processed as necessary.

Description

CODED OPTICAL INTERFACE AND METHOD OF OPERATION

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates in general to optical computer systems, and in particular, to an apparatus and method for parallel data processing utilizing multiple wavelength optical transmissions.

2. Description of Related Art Computer technologies have evolved through advances in semiconductor technology to increase the speed at which processors execute instructions. Advances in semiconductor fabrication techniques have produced microprocessors or central processing units (CPUs) with enhanced bandwidth and clock speeds. Bandwidth refers to the amount of data than can be transmitted in an amount of time. The clock speed or clock rate (i.e., cycles per second) is the speed at which instructions are executed. In order to execute an instruction, a processor requires a certain number of clock cycles. The faster the clock speed, the faster instructions that are executed.

Processor technologies have evolved from executing instructions entirely sequentially to some form of super scalar processing. With sequential processing, a first instruction was initiated and completed, then a second instruction was initiated and completed, and so on.

More modern processors perform similar sequential executions. The first step of execution is performed on the first instruction, and then when the program passes to the second instruction, the second instruction execution is started, and after the first step is executing during the second instruction, a third instruction is executed, and so on. In other words, the next instruction is started before the previous instruction has completed. This process is called pipelining. Pipelining leads to improvements in system performance, as compared to permitting processor circuitry lie idle as with sequential execution.

Other processors are "super scalar" in that multiple instructions may be executed simultaneously. For example, the Pentium family microprocessor is a super scalar processor that can execute more than one instruction per clock cycle. Even with these advances, however, processors have a number of shortcomings. Current pipelining techniques still result in "scalar" execution since they execute one instruction at a time in a sequential manner. Further, pipelining schemes can be quite complex given the sophisticated software and require more work of the processor to keep the pipeline moving such that subsequent instructions begin to execute. Super scalar techniques which relate to parallel processing are difficult to implement, particularly if separate circuit component groups are required to execute multiple instructions.

Moreover, current processing technologies can not overcome the inherent limitations resulting from slow buss speeds, particularly buss lines connecting a processor to an I/O device. Bandwidth becomes an important issue for the speed at which Input/Output (I/O) devices can run since buss lines typically run at a small fraction of a processor's speed. Typically, there are five individual busses running at a speed of 33, 66, 133, or 166 MHz, a small fraction of typical processor speeds.

Apart from the five individual buss lines which run at a slow speed, conventional systems may also require a separate receive buss, send buss, and output port for each buss attachment which will be coupled to a processor output even with the enhancements in processor technologies. For example, if five individual buss lines will run from a processor, it is necessary to have five receive busses, five send busses, and five output ports. Each receive buss and each send buss is often implemented with discrete semiconductor logic components. Moreover, in addition to these hardware requirements, data is typically transmitted over an 18 conductor buss. Consequently, many components may be required to implement conventional systems.

With these performance and physical limitations, conventional systems are limited by the space required to support large conductor busses and duplicate components when circuit board space is at a premium. Further, routing these lines becomes very difficult when the lines must be fitted within a limited space. Individual buss lines run at a slow speed and serve as a bottleneck even if internal processor speeds are improved. Thus, the speed at which a system can execute instructions relating to various functions and I/O devices is inherently limited by the number of required electrical components and conductor buss lines and the speed at which buss lines can transmit data. Some attempts to overcome some of the shortcomings described above have focused on optical components. The integration of optical components to perform processing tasks is advantageous because they provide fast data transfer, large bandwidth, and do not result in the interference problems associated with conventional transmission lines. Optical technologies do not realize the full potential of optical processing or operate far below bandwidth capabilities. Further, some optical technologies exhibit the same problems as electrical based systems in that excessive components are necessary.

There is desired in the art for a technique and system that can process instructions more efficiently with fewer components that utilize board space more efficiently and enable data to be transmitted between computer components more quickly.

SUMMARY OF THE INVENTION

To overcome the limitations in the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding the present specification, the present invention provides systems and methods for processing computer instructions utilizing a coded optical interface.

In accordance with the present invention, a processor or a device outputs parallel data to one or more sending registers. Each sending register receives parallel data and outputs corresponding serial data. Serial data is provided to optical encoders to encode the serial data into optical data at one or more wavelengths. One or more sets of encoded data are transmitted across an optical fiber with a pulse from an optical clock. Upon exiting the optical fiber, the certain wavelengths of encoded data are detected by optical decoders configured to detect certain wavelengths or ranges of wavelengths. The optical decoders dissociate sets of serial data from their respective transmission wavelengths. Receiving registers coupled to the optical decoders receive decoded serial data and output corresponding parallel data which may be processed by a device or computer processor.

BRIEF DESCRIPTION OF THE DRAWINGS

Referring now to the drawings in which like reference numbers represent corresponding parts throughout: FIG. 1 is a block diagram of a general environment incorporating the coded optical interface;

FIG. 2 is a schematic illustrating how the coded optical interface is used to encode processor instruction data at different wavelengths and to route the data from a processor to an optical fiber;

FIGS. 3A-3C are schematics illustrating in further detail the data conversions utilized by the coded optical interface in encoding data;

FIG. 4 is a schematic illustrating how multiple sets of data encoded at multiple wavelengths are driven onto an optical fiber; FIG 5 is a schematic illustrating how the coded optical interface is used to decode optical processor instruction data and to route data from an optical fiber to a device;

FIG. 6 is a schematic illustrating how multiple sets of data encoded at multiple wavelengths exit an optical fiber;

FIGS 7 A-7C are schematics illustrating in further detail the data conversions utilized by the coded optical interface in decoding data;

FIG. 8 is a flow diagram illustrating tasks performed using the coded optical interface to execute processor instructions with a corresponding device;

FIG. 9 is a schematic illustrating how the coded optical interface is used to encode device data at different wavelengths and to route the data from a device to an optical fiber; FIG. 10 is a schematic illustrating how the coded optical interface is used to decode optical processor instruction data and to route data from an optical fiber to a processor;

FIG. 11 is a flow diagram illustrating tasks performed using the coded optical interface to transfer data from a device to a processor;

FIG. 12 is a schematic of a system utilizing the coded optical interface to transmit data between a processor and a device in parallel; and

FIG. 13 is a schematic illustrating how a system using the coded optical interface transmits data at different wavelengths. DETAILED DESCRIPTION

In the following description of embodiments of the invention, reference is made to the accompanying drawings which form a part hereof, and which is shown by way of illustration specific embodiments in which the invention may be practiced. It is to be understood that other embodiments may be utilized as structural changes may be made without departing from the scope of the present invention.

Coded Optical Interface and Method of Operation

A computer processor 100, which, when called to execute an instruction, provides processor instruction data to a register 110 as shown in FIG. 1. Thus, register 110 is involved in transmitting or sending data through an optical encoder 120 to an optical fiber 130. More specifically, the output of register 110 is provided to the input of an optical encoder 120 to encode the processor instruction data at a wavelength. One or more sets of encoded processor instruction data are transmitted over an optical fiber 130. Upon exiting the optical fiber 130, encoded serial processor instruction data is received by an optical decoder 140 which detects the wavelength of encoded processor instruction data, e.g., the wavelength of an optical encoder 120. The output of an optical decoder 140 is then provided to a register 150 which processes and outputs data to an I/O device 160. Processor 100 instructions are then executed with the I/O device 160. Similarly, if the processor 100 requires device data to execute instructions, the coded optical interface maybe used to retrieve data from an I/O device 160 to a processor 100 using the same basic components previously described. Device data is passed from an I/O device 160 to a register 110. The register 110 is involved in transmitting or sending data through an optical encoder 120 to an optical fiber 130. More specifically, data from an I/O device 160 is provided to the register 110 which outputs data to an optical encoder 120. The optical encoder is used to encode the serial device data at a predetermined wavelength. The encoded device data is provided to and transmitted over an optical fiber 130.

Upon exiting the optical fiber 130, the encoded serial device data is received by an optical decoder 140 which detects light at the same wavelength as an optical encoder 120 that initially encoded I/O device 160 data. The output of the optical decoder 140 is provided to a register 150 which outputs device data to the processor 100.

In one embodiment of the present invention, all of these components are within a single computer system, e.g., within a single computer. In other words, processor instructions and device data are transmitted between a processor and, for example, memory or other internal device components. However, those skilled in the art will recognize that the coded optical interface can be implemented within various configurations or architectures.

For example, the coded optical interface may be implemented between a computer and an external device such as a remote disk, between multiple computer connections. Those skilled in the art will recognize that the coded optical interface can be utilized with various applications, including, for example, Internet applications, graphics processing, etc.

The coded optical interface enables a processor to execute parallel instructions which are transmitted through an optical fiber to a device. Various embodiments of processor to device transmissions are illustrated in FIGS. 2-8. The coded optical interface also enables device data to be transmitted from I/O devices through an optical fiber to a processor.

Various embodiments of device to processor transmissions are illustrated in FIGS. 9-11.

Those skilled in the art will readily recognize that the same components, configurations, relationships, and embodiments described with respect to FIGS. 2-8 are equally applicable to FIGS. 9-11.

1. Transmitting Instruction Data From Processor To Optical Fiber

A processor 200, as shown in FIG. 2, is coupled to one or more registers 202 and 204 which are involved in sending data through an optical encoder to an optical fiber.

Throughout this specification, registers involved in transmitting data to an optical fiber are referred to as "send" registers, e.g., send registers illustrated in FIG. 2. In contrast, the specification refers to registers involved in receiving data from an optical fiber as "receive" registers. In addition, this specification refers to multiple components as a first and second components (e.g., send register 1 202 and send register 2 204, or alternatively with letter designations A, B, C, D, etc.). The processor 200 provides parallel instruction data 1 206 and parallel instruction data 2 208 to computer output buss 210 on pulses from processor clock 211. In one embodiment of the present invention, parallel output port or computer output buss 210 is coupled to all send registers, i.e., send registers 202 and 204 as illustrated. However, computer output buss 210 can be coupled to additional send registers if necessary. Further, different computer output buss lines may be coupled to different send registers. For example, computer output buss 1 210 is coupled to send register 1 202 and computer output buss 2 (not shown) is coupled to send register 2 204. In an alternative embodiments of the present invention, processor 200 and send registers 202 and 204 are coupled with a combination of configurations described above. For example, computer output buss 1 210 is coupled to multiple send registers such as send register 1 202 and send register 2 204, and other computer output busses (not shown) are each coupled to additional individual send registers (not shown).

Transfer Of Instruction Data From Processor To Send Registers

Continuing with the illustrated example, the processor 200, using, for example, a Direct Memory Access (DMA) channel, submits a request to provide instruction data to one or more registers. In order to route a set of instruction data to one of multiple send registers, address bits identify the send register that is to receive a set of data. Registers may be identified by utilizing presently available data addressing technologies that are available (e.g.,

Northgate technologies). With these data addressing technologies, address bits are added or appended to a set of instruction data. The address bits identify the address of a register, and assuming each register has a unique address, address bits identify the register which will transmit the instruction data set. One manner in which the Northgate technique is utilized is to append each instruction data set such that an Address Enable line for the identified register is driven high or active, whereas Address Enable lines of unidentified send registers are maintained at a low or inactive state. For example, Address Enable 1 212 is driven to a high state to identify send register 1 202 or to enable send register 1 202 to receive instruction data. Similarly, Address Enable 2214 is driven to a high state to identify send register 2204 or to enable send register 2 204 to receive instruction data.

A first pulse from processor clock 211 drives parallel instruction data 2 208 onto computer output buss 210. Using Northgate technologies, parallel instruction data 2 208 is appended with address bits which drive identified send register 2, i.e., drive Address Enable

2 214 of send register 2 204 to a high state. As a result, parallel instruction data 2 208 is routed to send register 2 204 which is identified as to receive this particular instruction data set. Similarly, the next pulse from processor clock 211 may load parallel instruction data 1 206. In this case, Northgate technologies may identify send register 1 202 and drive Address Enable 1 212 to a high state to enable send data to be transferred to send register 1 202. As a result, each send register receives respective sets of instruction data based on address identification bits.

Parallel Shift Registers In one embodiment of the present invention, as illustrated in FIG. 2, send registers

200 and 202 are parallel shift registers. Parallel shift registers receive parallel input and output corresponding serial data. Parallel shift registers may receive different numbers of bits as input. For example, parallel shift registers can receive 64 bits or 128 bits, and those skilled in the art will recognize that with evolving technology, parallel shift registers with different bit or input capabilities may be used to implement the present invention. Using parallel shift registers, send register 1 202 receives parallel instruction data 1 206 and outputs serial instruction data 1 216. Similarly, send register 2 204 receives parallel instruction data 2 208 and outputs serial instruction data 2218. The data conversions utilized by send registers 202 and 204 are described in further detail with reference to FIGS. 3A-3C. Processor 300 provides parallel instruction data 302 to a send register 304 or parallel shift register over computer output buss 306. In this example, parallel instruction data 302 and send register 304 are 64 bits. Illustrated portions of parallel instruction data 302 show computer output buss lines 306, and specifically, lines 1-5, and 64. Lines 1, 2, 3 provide a "digital 1 " to send register, line 4 provides a "digital 0", line 5 provides a "digital 1 ", and line 64 provides a "digital 0". Send register 304 transforms this data into serial instruction data 308. The corresponding "digital" data is represented as parallel "digital" data set 310. The corresponding output of the send register is represented as serial output 312. The serial output 312 represents a digital pulse as input data. In other words, the serial instruction data signal is a series of high signals and low signals corresponding to the logical 0s and Is of the parallel instruction data 302. In this example, the serial data string represents 64 bits.

Optical Encoders

Referring back to FIG. 2, serial instruction data sets 216 and 218 generated by send registers or parallel shift registers 202 and 204 are provided to one or more optical encoders 220 and 222. Upon a pulse from an optical clock 224, for example, a master crystal clock, serial instruction data sets 216 and 218 are provided to optical encoders 220 and 222. Optical encoders 220 and 222 are used to encode the serial instruction data sets 216 and 218 at a wavelength or range of wavelengths. For example, as illustrated, serial instruction data 1 216 is encoded at wavelength 1 (e.g., 850 nm) by optical encoder 1 220, and serial instruction data 2 218 is encoded at wavelength 2 (e.g., 1300 nm) by optical encoder 2 222. Optical encoder 1 220 outputs encoded serial instruction data 1 224 which is "modulated" at 850nm, and optical encoder 2222 outputs encoded serial instruction data 2226 which is "modulated" at 1300 nm. However, the physical value of the serial instruction data does not change even though this data is represented or modulated at a wavelength. Optical clock 224 drives encoded serial instruction data 1 226 and encoded serial instruction data 2 228 onto and across optical fiber 230. Following is a more detailed description of the individual components and relationships of components which embody the coded optical interface illustrated in FIG. 2.

Phase Multiplexer Optical Devices (PMODs)

In one embodiment of the present invention, illustrated in FIG. 2, optical encoders 220 and 222 are Phase Multiplexer Optical Devices ("PMODs"). Throughout this specification, PMODSs involved in encoding data received from a register to an optical fiber are referred to as "send" PMODs. Send PMOD 1 220 and send PMOD 2 222 can be tuned to emit light at various frequencies or wavelengths (e.g., 850nm, 1300nm, 1550nm). In essence, send PMODS convert or modulate a train or stream of electronic data into corresponding serial, optical data. The optical data stream may have a length of 64 bits, 128 bits, or other lengths. For example, even though the illustrated examples utilize 850 nm and 1300 nm, send PMODs

220 and 222 could emit light in the infrared or visible spectrums. Thus, for example, a send PMOD may emit in the red, orange, yellow, green, violet and blue parts of the visible spectrum. More specifically, send PMODs may emit "red" light at wavelengths of 625 nm to 740 nm, "orange" light at wavelengths of 590 nm to 625 nm, "yellow" light at wavelengths of 565 nm to 590 nm, "green" light at wavelengths of 520 nm to 565 nm, "cyan" light at wavelengths of 500 nm to 520 nm, and "blue" light at wavelengths of 435 nm to 500. Thus, if there are eight send registers, each of which is associated with one of eight send PMODs, the eight PMODs may encode data at eight different wavelengths. Optical encoders or send PMODs do not alter the physical value of the serial instruction data from send registers. Rather, serial processor instruction data is modulated or represented at different wavelengths.

The serial instruction data sets are configured with a start string and an end string such that the entire data set may be identified through start and stop codes. Thus, a complete serial instruction data set from each register is encoded at a wavelength by a send PMOD.

In an alternative embodiment of the present invention, with proper encoding software and/or hardware, optical encoders 220 and 222 are Light Emitting Diodes (LEDs).

Send Register / PMOD Configuration

Send registers 202 and 204 and send PMODs 220 and 222 can be configured in various manners. For example, each send register may provide serial instruction data to a different optical encoder or send PMOD. Thus, serial instruction data 1 216 is provided to send PMOD 1 220 upon pulse from optical clock 224, and serial instruction data 2 218 is provided to send PMOD 2 222 upon pulse from optical clock 224. In this configuration, serial instruction data 1 216 is encoded at wavelength 1 (850nm), and serial instruction data 2 218 is encoded at wavelength 2 (1300 nm). Alternatively, data from a single send register may be routed to multiple send

PMODs. This configuration may be utilized if the same data is to be routed to multiple I/O devices. For example, serial instruction data 1 216 from send register 1 202 is provided to send PMOD 1 220, send PMOD 2 222, and additional send PMODs (not shown) as necessary.

In one embodiment of the present invention, as illustrated in FIG. 2, serial instruction data sets 216 and 218 are encoded at distinct, non-overlapping or exclusive wavelengths. For example, serial processor instruction data 1 216 from send register 1 200 may be encoded at

1 (λ 1 ) = 850 nm by send PMOD 1 220, and serial processor instruction data 2218 from send register 2 202 may be encoded at wavelength 2 (λ2) = 1300 nm by send PMOD 2 222.

While send PMODs 220 and 222 may operate at specific wavelengths, in an alternative embodiment, serial instruction data can be encoded at different ranges of wavelengths which may or may not overlap, depending on the sensitivity of the corresponding optical decoders or detectors. For example, send PMOD 1 220 may encode processor instruction data 1 216 as wavelengths between 850-1000 nm, and serial processor instruction data 2 218 may be encoded at 1300 nm = 1450 nm If the sensitivity of an optical decoder is sufficient, serial processor instruction data 1 216 could be encoded at overlapping wavelengths such as wavelengths between 850-950nm and 800-870 nm.

Optical Clock

As previously explained, send PMODs 220 and 222 are driven by optical clock 224, such as a crystal clock. Optical clock 224 drives optical components, including send PMODs 220 and 222 and optical fibers 230 to drive serial instruction data sets 216 and 218 through optical fiber 230.

Optical Fiber

The optical fiber 230 or "optical back plane" may be a single mode fiber which is typically approximately 8-10 micrometers in diameter. Alternatively, optical fiber 230 may be a multi-mode fiber. In a further alternative embodiment of the present invention, dark fiber manufactured by Corning, Inc. may be utilized. Dark fibers permit light to be transmitted with less "resistance" such that data is transmitted more quickly than other fibers, thus, further enhancing the capabilities of the coded optical interface. Those skilled in the art will recognize that various optical fibers and fiber systems may be utilized with the present invention. Transmitting Instruction Data From PMOD to Optical Fiber

Continuing with reference to FIGS. 2 and 4, encoded optical processor instruction data at different wavelengths is driven by optical clock 224 onto optical fiber 230 either simultaneously or with different clock pulses. In FIG. 4, for example, one pulse 400 from optical clock may drive four different sets of optical/encoded serial instruction data. More specifically, pulse 400 may simultaneously drive serial instruction data sets, 402, 404, 406, and 408, each of which are encoded at different wavelengths, onto optical fiber 410. On the same or subsequent pulse, serial instruction data sets are driven across optical fiber 410.

Those skilled in the art will recognize that although only four PMODs are illustrated, various other PMODs maybe similarly configured such that sets of serial instruction data are sent through optical fiber 410 upon pulse 400. Since each optical signal has a different wavelength, all of the signals are transmitted through the optical fiber independently of optical signals at other wavelengths. Thus, a transmission across optical fiber 410 may include red, green, orange, and yellow light, as well as various other wavelengths of light. This attribute of the coded optical interface permits data to be transmitted in parallel across a very fast optical buss medium as compared to conventional electronic wire busses which do not utilize multiple wavelength transmissions and operate at substantially slower rates.

Different arrangements provide different numbers of wavelengths or channels which are used to transmit serial instruction data over optical fiber 410. For example, some arrangements provide 10 channels to transmit data. In other words, 10 sets of serial instruction data at 10 different wavelengths can be transmitted over an optical fiber 410 with a single pulse 400 from an optical clock. The limiting factor in this regard is not the capability of the optical fiber to support more wavelengths or channels. Rather, the number of wavelengths that can be transmitted depends on how many wavelength channels can be supported utilizing optical transmissions. Thus, those skilled in the art will recognize that the art advances to enable additional optical transmission channels, the optical fiber of the coded optical interface can easily support additional channels.

Referring again to FIG. 2, in an alternative embodiment, different pulse clocks can drive different send PMODs 220 and 222 asynchronously or at different times. For example, a first pulse may drive encoded serial instruction data 1 216 from send PMOD 1 220 onto optical fiber 230. The next pulse from optical clock may then drive this data, e.g., red light, across optical fiber. Then, a third pulse may drive encoded serial instruction data 2218 from send PMOD 2 222 onto optical fiber 230. The next pulse from optical clock may then drive this data, e.g., yellow light, across optical fiber, and so on. As a result, serial instruction data sets may be transmitted across optical fiber 230 upon the same or a different subsequent optical clock 224 depending on the timing of the optical clock 224. In yet another alternative embodiment, multiple optical clocks instead of a single clock 224 may drive encoded data onto optical fiber 230 in an asynchronous or synchronous manner.

2. Transmitting Instruction Data From Optical Fiber To Device

Continuing with FIG. 5, multiple encoded serial instruction data signals exit an optical fiber. Specifically, the output of optical fiber 500 may include various numbers of encoded serial instruction data sets. As illustrated, for example, encoded serial instruction data sets 502, 504, 506, and 508 may simultaneously exit optical fiber 500 if they are driven by the same optical clock pulse. These data sets are incident upon one or more receive PMODs which are activated by a high signal or trigger. For example, triggers 510, 512, 514, and 516 activate receive PMODs at wavelength 1, wavelength 2, wavelength 3, and wavelength 4 respectively. This is further described with respect to FIG. 6. Continuing with reference to FIG.6, the output of an optical fiber 600, which includes encoded serial instruction data 1 602 and encoded serial instruction data 2 604, is coupled to inputs of one or more optical decoders 606 and 608. In one embodiment of the present invention, as illustrated, photo detectors or optical decoders are reverse-biased PMODs. Reverse-biased PMODs receive optical or encoded data from an optical fiber are referred to as "receive" PMODs. While send PMODs (illustrated in FIG. 2) encode light at a multitude of wavelengths, receive PMODs 606 and 608 detect light at a particular wavelength or range of wavelengths.

Receive PMODs 606 and 608 are activated when they detect a trigger at their respective wavelengths. For example, receive PMOD 1 606 is activated when it detects, through a tunable optical filter, a start trigger or high pulse at wavelength 1 , e.g., 850nm. In one embodiment of the present invention, as illustrated, each receive PMOD is triggered by a different wavelength of light. Further, each receive PMOD may detect light at the same wavelength of a corresponding send PMOD. Additionally, a receive PMOD may detect wavelengths exclusive of other receive PMODs. When light at wavelength 1 is incident upon receive PMOD 1 606 configured to detect wavelength 1, receive PMOD 1 606 is triggered, but receive PMOD 2 608 is not triggered since receive PMOD 2 608 may be triggered by a different wavelength, e.g., 1300nm. Thus, although both encoded serial instruction data sets 602 and 604 may be incident upon both receive PMODs 606 and 608, only encoded serial instruction data 1 602 at wavelength 1 is detected and received by receive PMOD 1 606. Similarly, PMOD 2 608 detects and receives light at wavelength 2, i.e., serial instruction data 2 604.

The output of receive PMODs is the same data that was input into the receive PMODs, but the data is no longer encoded or modulated at a wavelength. Receive PMOD 1 606 outputs decoded serial instruction data 1 610, and receive PMOD 2 608 outputs decoded serial instruction data 2 612. Decoded serial instruction data 1 610 is provided to receive register 1 614 when data is complete. Address Read 1 616 will be set high asking for a computer read cycle. Similarly, decoded serial instruction data 2612 is provided to receive register 2 618, and Address Read 2 620 will be set high asking for a computer read cycle.

Receive registers 614 and 618 maybe parallel shift registers. Thus, receive register 1 614 receives decoded serial instruction data 1 610 and outputs parallel instruction data 1

622 along device input buss 1 624 to device 1 626. Similarly, receive register 2618 receives decoded serial instruction data 2 612 and outputs parallel instruction data 2628 along device input buss 2630 to device 2632. As described and illustrated, there are separate device input buss lines 624 and 630. However, a single device input buss line may also be utilized, which could be a common buss. The processor instructions are then executed with I/O devices 626 and 632.

Data conversions performed by the shift registers are further illustrated in FIGS 7A- 7C. Encoded/optical serial instruction data 1 at wavelength 1 is output from optical fiber. With reference to FIG. 7A, receive PMOD 1 detects light at wavelength 1 and decodes the signal into decoded serial instruction data 1 700.

The corresponding digital representation of the decoded optical serial data 1 700 is illustrated in FIG. 7B. The corresponding "digital" data is represented with a "1 " for a high signal and a "0" for a low signal of decoded optical serial data 1 700. This is the same data that is eventually transferred to a device, as explained with reference to FIG. 7C.

FIG. 7C illustrates decoded serial instruction data 1 700 input into receive PMOD 1 704. Receive PMOD 1 704 outputs parallel instruction data 1 706 over device input buss 708 to device 1 710. Thus, the corresponding high and low signals of the optical serial data is provided to corresponding lines 1-3 as a "1," to line 4 as a "0," to line 5 as a "1", and to line 64 as a "0." Summarizing the data path thus far, data from the processor is provided in parallel to a send register which outputs coπesponding serial data. Serial data from the send register is provided to a send PMOD, encoded, and driven onto an optical fiber. Then, a receive PMOD receives encoded serial data into a receive register. The receive register outputs coπesponding parallel data. Parallel instruction data is then provided to a device and executed accordingly. The address bits used in route do not impact the serial data; they are only utilized to initially route data to a send register. Further, the address bits do not impact the data detected by receive PMODS or the execution of the instructions by I O devices. Thus, considering the parallel to serial to encoded serial to serial to parallel conversions, parallel instruction data 1 622 and parallel instruction data 2 628 are the same sets of respective data originally provided by the processor, except that an address will be set high to complete the transfer through the receive PMODs.

Those skilled in the art will recognize that the various embodiments described above with respect to FIG. 2 may also be similarly incorporated into transmissions from an optical fiber to an I/O device. For example, there are different device - receive register configurations and different receive register through receive PMOD configurations. Further, although FIG. 6 illustrates two receive PMODs and two receive registers, those skilled in the art will recognize that additional receive PMODs and receive registers may be similarly coupled to implement larger scale parallel processing with the coded optical interfaces. In addition, although the previous figures illustrate a single optical fiber, separate optical fibers may also be utilized.

The coded optical interface previously described can be implemented using the technique summarized in FIG. 8, a flow diagram illustrating tasks performed using the coded optical interface to transmit processor instruction data to an I/O device.

Initially, in block 800, a processor, upon a pulse from processor clock, provides parallel instruction data to send registers, e.g., parallel shift registers. For example, instruction data relating to memory may be provided to send register 1 while instruction data relating to an input key may be provided to send register 2. In block 810, parallel instruction data is converted into serial instruction data by send register which may be a parallel shift register. In other words, a send register receives parallel data input and outputs coπesponding serial data. In block 820, serial instruction data is encoded at a wavelength with an optical encoder such as a send PMOD or send LED. There may be, for example, 2, 5, or 10 different sets of serial instruction data, each of which may be directed to a different send PMOD. Each send PMOD encodes the serial instruction data at a wavelength. Thus, if there are five PMODs for five sets of data, each set of data can be encoded at one of five wavelengths.

Then, in block 830, encoded serial processor instruction data is transmitted over an optical fiber upon a pulse from optical clock. If the optical clock drives all of the send PMODs, multiple data sets may be encoded and loaded onto and transmitted over an optical fiber simultaneously. If data sets are loaded onto an optical fiber at different times or if different clock pulses drive the send PMODs, then encoded data may be transmitted at pulse rates dictated by each respective optical clock. However, parallel processing may still be utilized even when using a single optical clock since each individual pulse may drive data at multiple wavelengths. Then, in block 840, encoded serial instruction data exits the optical fiber and is incident upon reverse-biased PMODs or receive PMODs. The encoded serial instruction data is decoded in block 850. More specifically, a receive PMOD detects light at the same wavelength at which a send PMOD originally encoded the data. Thus, for example, instruction data that was encoded at 600 nm is received by a receive PMOD that detects light at 600nm. If there are five different PMODs, each PMOD receives a set of data at the wavelength at which the data was originally encoded. In block 860, the decoded serial instruction data is transfeπed from receive PMODs to input of receive registers. Then, in block 870, parallel instruction data is generated from the decoded serial instruction data. The receive registers may be parallel shift registers which receive serial instruction data and output coπesponding parallel instruction data. Continuing with block 880, the decoded parallel instruction data is provided- to an I/O device such as, for example, memory or an input key. Then, in block 890, the processor instruction is executed by the memory, input key, or other I/O device, which in turn, sends or stores the data.

3. Transmitting Device Data From I/O Device To Optical Fiber The previous sections and FIGS.2-8 describe how instruction data is transmitted from a processor to an I/O device using the coded optical interface. In addition, the coded optical interface may also be utilized to transmit device data from an I/O device to a processor. This aspect will be generally described with reference to FIGS. 9-11. Those skilled in the art will readily recognize that the various alternative embodiments, configurations, and details described with respect to FIGS. 2-8 and processor to I/O device transmissions may be similarly implemented in a coded optical interface to transmit device data from an I/O device to a processor.

Referring to FIG. 9, device 1 900 and device 2 901 are coupled to one or more registers 902 and 904, i.e., send registers which are involved in sending device data to a processor through an optical fiber. FIG. 9 illustrates device 1 900 providing parallel device data along parallel output ports or device output buss lines. Parallel device data 1 906 is provided to send register 1 902 along device output buss 1 upon a pulse from device clock 91 1a. Similarly, device 2901 provides parallel device data 2908 to send register 2904 along device output buss 2 910b upon a pulse from device clock 911b. Send register 1 902 and send register 2 904 are identified to receive respective sets of device data based on, for example, Northgate addressing techniques.

In one embodiment of the present invention, as illustrated, each device is coupled to a different send register via a dedicated device output buss line. However, device output buss lines can be coupled to additional send registers if necessary. More specifically, Northgate technologies or other addressing technologies may be utilized such that respective Address Enable 1 912 and Address Enable 2 914 are driven active to enable send registers 902 and 904 to receive parallel sets of device data 906 and 908.

In an alternative embodiment of the present invention, device output buss lines may be configured such that one or more devices are allocated dedicated device output buss lines and one or more device output buss lines provide data to multiple send registers via multiple device output buss lines.

Device 1 900 and device 2 901 using, for example, a Direct Memory Access (DMA) channel, submit requests to provide device data to, for example, a processor, through one or more registers. In order to route a set of device data to one of multiple send registers, address bits which identify which send register is to receive a set of device data. Addressing techniques are used to add or append address bits to sets of device data. By selectively activating Address Enable lines, the address bits identify the address of a register, and assuming each register has a unique address, address bits identify the register which will transmit the device data set. For example, Address Enable 1 912 is driven to a high state to identify send register 1 902 or to enable send register 1 902 to receive device data. Similarly, Address Enable 2 914 is driven to a high state to identify send register 2 904 or to enable send register 2 904 to receive device data. As an example, a first pulse from device clock 91 IB drives parallel device data 2 908 onto device output buss 910B. Using Northgate technologies, parallel device data 2 908 is appended with address bits which drive identified send register 2 904, i.e., drive Address Enable 2 914 of send register 2 904 to a high state. As a result, parallel device data 2 908 is routed to send register 2 904 which is identified to receive this particular device data set. Similarly, the next pulse from device clock 911 A may load parallel device data 1 906. In this case, Northgate technologies may identify send register 1 902 and drive Address Enable 1 912 to a high state to enable send data to be transfeπed to send register 1 902. As a result, each send register receives respective sets of device data based on address identification bits.

In one embodiment of the present invention, as illustrated in FIG. 9, send registers 902 and 904 are parallel shift registers which receive parallel input and output coπesponding serial data. Parallel shift registers may receive different numbers of bits as input. For example, parallel shift registers can receive 64 bits, 128 bits, and those skilled in the art will recognize that with evolving technology, parallel shift registers with different bit or input capabilities may be used to implement the present invention. Using parallel shift registers, send register 1 902 receives parallel device data 1 906 and outputs serial device data 1 916. Similarly, send register 2 904 receives parallel device data 2 908 and outputs serial device data 2 918.

Serial device data sets 916 and 918 generated by parallel shift registers 902 and 904 are provided to one or more optical encoders 920 and 922. Upon a pulse from an optical clock 924, for example, a master crystal clock, serial device data sets 916 and 918 are provided to optical encoders 920 and 922. Optical encoders 920 and 922 encode the serial device data sets 916 and 918 at a wavelength or range of wavelengths (e.g., 850nm, 1300nm, 1550nm, etc.). For example, as illustrated, serial device data 1 916 is encoded at wavelength

1 (850 nm) by optical encoder 1 920, and serial device data 2 918 is encoded at wavelength

2 (1300 nm) by optical encoder 2 922. Optical encoder 1 920 outputs encoded serial device data 1 926 which is "modulated" at 850nm, and optical encoder 2922 outputs encoded serial device data 2 928 which is "modulated" at 1300 nm. However, the physical value of the serial device data does not change even though this data is represented or modulated at a wavelength.

Optical clock 924 drives encoded serial device data 1 926 and encoded serial device data 2 926 onto and across optical fiber 930. Following is a more detailed description of the individual components and relationships of components which embody the coded optical interface illustrated in FIG. 9. Phase Multiplexer Optical Devices (PMODs)

In one embodiment of the present invention, as illustrated in FIG. 9, optical encoder 920 and 922 are Phase Multiplexer Optical Devices ("PMODs"). Send PMOD 1 920 and send PMOD 2 922 can be tuned to emit light at various frequencies or wavelengths. In essence, send PMODS 920 and 922 convert or modulate a train or stream of electronic data into coπesponding optical data. The optical data stream may have a length of 64 bits, 128 bits, or other lengths. Further, although the illustrated send PMODs 920 and 922 utilize 850 nm and 1300 nm, send PMODs could emit light in the infrared or visible spectrums. Thus, for example, a send PMOD may emit in the red, orange, yellow, green, violet and blue parts of the visible spectrum. More specifically, for example, send PMODs may emit "red" light at wavelengths of 625 nm to 740 nm, "orange" light at wavelengths of 590 nm to 625 nm, "yellow" light at wavelengths of 565 nm to 590 nm, "green" light at wavelengths of 520 nm to 565 nm, "cyan" light at wavelengths of 500 nm to 520 nm, and "blue" light at wavelengths of 435 nm to 500. Thus, if there are eight send registers, each of which is associated with one of eight send PMODs, the eight PMODs may encode data at eight different wavelengths.

Optical encoders or send PMODs do not alter the physical value of the serial device data from send registers. Rather, serial device data is modulated or represented at different wavelengths. The serial device data sets are configured with a start string and an end string such that the entire data set may be identified through start and stop codes. Thus, a complete serial device data set from each register is encoded at a wavelength by a send PMOD.

In an alternative embodiment of the present invention, with proper encoding software and/or hardware, optical encoders 920 and 922 are Light Emitting Diodes (LEDs).

Send Register / PMOD Configuration Send registers 902 and 904 and send PMODs 920 and 922 can be configured in different ways. For example, each send register may provide serial device data to a different optical encoder or send PMOD. Thus, serial device data 1 916 is provided to send PMOD 1 920 upon receiving a pulse from optical clock 924, and serial device data 2918 is provided to send PMOD 2 922 upon receiving a pulse from optical clock 924. In this configuration, serial device data 1 916 is encoded at wavelength 1 (e.g., 850nm), and serial device data 2

918 is encoded at wavelength 2 (e.g., 1300 nm).

Alternatively, data from a single send register may be routed to multiple send

PMODs. This configuration may be utilized if the same data is to be routed to multiple I/O devices. For example, serial device data 1 916 from send register 1 902 may be provided to send PMOD 1 920, send PMOD 2 922, and additional send PMODs (not shown) as necessary.

In one embodiment of the present invention, as illustrated in FIG.9, serial device data sets 916 and 918 are encoded at distinct, non-overlapping or exclusive wavelengths. For example, serial processor device data 1 916 from send register 1 902 may be encoded at 850 nm by send PMOD 1 920, and serial processor device data 2 918 from send register 2 904 may be encoded at 1300 nm by send PMOD 2 922.

While send PMODs 920 and 922 may operate at specific wavelengths, in an alternative embodiment, serial device data can be encoded at different ranges of wavelengths which may or may not overlap, depending on the sensitivity of the coπesponding optical decoder. For example, send PMOD 1 920 may encode processor device data 1 916 as wavelengths between 850-1000 nm, and serial processor device data 2 918 maybe encoded at 1300 nm-1450 nm. If the sensitivity of an optical decoder or detector is sufficient, serial processor device data 1 916 could be encoded at overlapping wavelengths such as wavelengths between 850-950nm and 800-870 nm.

Optical Clock

As previously explained, send PMODs 920 and 922 are driven by optical clock 924 such as a crystal clock. Optical clock 924 drives optical components, including send PMODs 920 and 922 and optical fibers 930 to drive serial device data sets 916 and 918 through optical fiber 930.

Optical Fiber

The optical fiber 930 or "optical back plane" may be a single mode fiber which is typically approximately 8-10 micrometers in diameter. Alternatively, optical fiber 930 may be a multi-mode fiber. In a further alternative embodiment of the present invention, dark fiber manufactured by Corning, Inc. may be utilized. Dark fibers permit light to be transmitted with less "resistance" such that data is transmitted more quickly than other fibers, thus, further enhancing the capabilities of the coded optical interface. Those skilled in the art will recognize that recognize that various optical fibers and fiber systems may be utilized with the present invention.

Transmitting Device Data From PMOD to Optical Fiber

With this configuration, sets of encoded optical device data at different wavelengths are driven by optical clock 924 onto optical fiber 930 either simultaneously or with different clock pulses. For example, one pulse from optical clock 924 may drive four different sets of optical/encoded serial device data. More specifically, a pulse may simultaneously drive four serial device data sets, each of which are encoded at different wavelengths, onto optical fiber 930. On the same or subsequent pulse, serial device data sets are driven across optical fiber 930. Those skilled in the art will recognize that various other send PMODs may be similarly configured such that additional or fewer sets of serial device data are transmitted through optical fiber 930. Since each optical signal has a different wavelength, all of the signals are transmitted through the optical fiber independently of optical signals at other wavelengths. Thus, a transmission across optical fiber 930 may include red, green, orange, and yellow light, as well as various other wavelengths of light. This attribute of the coded optical interface permits data to be transmitted in parallel across a very fast optical buss medium as compared to conventional electronic wire busses which do not utilize multiple wavelength transmissions and operate at substantially slower rates.

Different technologies provide different numbers of wavelengths or channels which are used to transmit serial device data over optical fiber 930. For example, some technologies provide 10 channels to transmit data. In other words, 10 sets of serial device data at 10 different wavelengths can be transmitted over an optical fiber 930 with a single pulse from an optical clock 924. The limiting factor in this regard is not the capability of the optical fiber to support more wavelengths or channels. Rather, the number of wavelengths that can be transmitted depends on the number of wavelength channels that can be supported by technologies which utilize optical transmissions. Thus, those skilled in the art will recognize that as technologies advance to enable additional optical transmission channels, the optical fiber of the coded optical interface can easily support additional channels.

In an alternative embodiment, different pulse clocks can drive different send PMODs 920 and 922 asynchronously or at different times. For example, a first pulse may drive encoded serial device data 1 926 from send PMOD 1 920 onto optical fiber 930. The next pulse from optical clock may then drive this data, e.g., red light, across optical fiber 930. Then, a third pulse may drive encoded serial device data 2 928 from send PMOD 2 922 onto optical fiber 930. The next pulse from optical clock 924 may then drive this data, e.g., yellow light, across optical fiber 930, and so on. As a result, serial device data sets may be transmitted across optical fiber 930 upon the same or a different subsequent optical clock 924 depending on the timing of the optical clock 924. In yet another alternative embodiment, multiple optical clocks instead of a single clock 224 may drive encoded data onto optical fiber 230 in an asynchronous or synchronous manner. Having described detailed aspects of the coded optical interface with respect to transmitting device data from an I/O device to an optical fiber, FIG. 10 and the related description explain how the transmission of device data to a processor is completed from the output of the optical fiber to the processor. 4. Transmitting Device Data From Optical Fiber To Processor Multiple sets of device data encoded at multiple wavelengths exit optical fiber 1000, as illustrated in FIG. 10. Specifically, encoded serial device data 1 1002 and encoded serial device data 2 1004 exit optical fiber 1000 and are incident upon respective optical decoders 1006 and 1008. In one embodiment of the present invention, as illustrated, photo detectors or optical decoders 1006 and 1008 are reverse-biased PMODs. Reverse-biased PMODs that receive optical or encoded device data from an optical fiber are refeπed to as "receive"

PMODs which detect light at particular wavelengths or ranges of wavelengths.

Receive PMODs 1006 and 1008 are activated when they detect a trigger at their respective wavelengths. For example, receive PMOD 1 1006 may be activated when it detects, through a tunable optical filter, a start trigger or high pulse at 850 nm whereas receive PMOD 2 1008 may be activated when it detects, through an optical filter, a start trigger or high pulse at 1300nm. Thus, in one embodiment of the present invention, as illustrated, each receive PMOD is triggered by a different wavelength of light. Further, each receive PMOD may detect light at the same wavelength of a coπesponding send PMOD. Additionally, a receive PMOD may detect wavelengths exclusive of other receive PMODs. When light at wavelength 1 (e.g., 850nm) is incident upon receive PMOD 1 1006 configured to detect 850nm, receive PMOD 1 1006 is triggered. However, receive PMOD 2 1008 is not triggered. Thus, although both encoded serial device data sets 1002 and 1004 may be incident upon both receive PMODs 1006 and 1008, only encoded serial device data 1 1002 at wavelength 1 is detected and received by receive PMOD 1 1006. Similarly, PMOD 2 1008 detects and receives light at wavelength 2, i.e., serial device data 2 1004.

The output of receive PMODs is the same data that was input into the receive PMODs, however, the data sets are non longer encoded or modulated at a wavelength. Specifically, receive PMOD 1 1006 outputs decoded serial device data 1 1010 , and receive PMOD 2 1008 outputs decoded serial device data 2 1012. Decoded serial device data 1 1010 is provided to receive register 1014 when data is complete. Address Read 1 1016 will be set high asking for a computer read cycle. Similarly, decoded serial device data 2 1012 is provided to receive register 2 1018, and Address Read 2 1020 will be set high asking for a computer read cycle.

Receive registers 1014 and 1018maybeparallel shiftregisters. Thus, receive register 1 1014 receives decoded serial device data 1 1010 and outputs parallel device data 1 1022 along computer input buss line 1 1024 and computer input buss line 2 1030 to processor 1026. As described and illustrated, there are separate computer input buss lines 624 and 630. However, a single computer input buss line may also be utilized, which could be a common buss. The processor 1026 then executes instructions with data retrieved from I/O devices. Summarizing the data path thus far, data from I/O devices is provided in parallel to shift registers which output coπesponding sets of serial device data. Serial device data from the shift registers is provided to send PMODs, encoded, and driven onto an optical fiber. Then, a receive PMOD receives encoded serial device data into respective receive registers. Receive registers output coπesponding sets of parallel device data. Parallel device data is provided to a processor. The address bits used in route do not impact the serial device data; they are only utilized to initially route data to a send register. Further, the address bits do not impact the data detected by receive PMODS or the execution of the instructions by a processor. Thus, considering the parallel to serial to encoded serial to serial to parallel conversions, parallel device data 1 1022 and parallel device data 2 1028 are the same sets of respective data originally provided by I/O devices, except that an address will be set high to complete the transfer through the receive PMODs.

Those skilled in the art will recognize, however, that the coded optical interface may be implemented with different device - receive register configurations and different receive register through receive PMOD configurations including, for example, those configurations described with respect to FIG. 6. Further, although FIG. 10 illustrates two receive PMODs and two receive registers, those skilled in the art will recognize that additional receive PMODs and receive registers may be similarly coupled to implement larger scale parallel processing with the coded optical interfaces. In addition, although the previous figures illustrate a single optical fiber, separate optical fibers may also be utilized. The coded optical interface previously described can be utilized in the technique summarized in FIG. 11, a flow diagram illustrating tasks performed using the coded optical interface to transmit device data from an I/O device to a processor.

Initially, in block 1100, an I/O device, upon a pulse from a device clock, provides parallel device data to send registers, e.g., parallel shift registers. For example, memory data may be provided to send register 1 while input key data may be provided to send register 2.

In block 1110, parallel device data is converted into serial device data by parallel shift register. In other words, parallel shift register receives parallel device data input and outputs coπesponding serial device data. In block 1120, serial device data is encoded at a wavelength with an optical encoder such as a send PMOD or send LED. There may be, for example, 2, 5, or 10 different sets of serial device data, each of which maybe directed to a different send PMOD. Each send PMOD encodes the serial device data at a wavelength. Thus, if there are five PMODs for five sets of data, each set of data can be encoded at one of five wavelengths.

Then, in block 1130, encoded serial device data is transmitted through an optical fiber upon a pulse from an optical clock. If the optical clock drives all of the send PMODs, encoded data may be driven onto and transmitted over an optical fiber simultaneously. If data sets are loaded onto an optical fiber at different times or if different clock pulses drive the send PMODs, then data may be transmitted at pulse rates dictated by each respective optical clock. However, parallel processing may still be utilized even when using a single optical clock since each individual pulse may drive data at multiple wavelengths. Then, in block 1140, encoded serial device data exits the optical fiber and is incident upon reverse- biased PMODs or receive PMODs.

The encoded serial device data is decoded in block 1150. More specifically, a receive PMOD detects light at the same wavelength at which a send PMOD originally encoded the data. Thus, for example, device data that was encoded at 600 nm, is received by a receive

PMOD that detects light at 600nm. If there are five different PMODs, each PMOD receives a set of data at the wavelength at which the data was originally encoded. In block 1160, the decoded serial device data is transfeπed from receive PMODs to input of receive registers. Then, in block 1170, parallel device data is generated from the decoded serial device data using receive registers. The receive registers may be parallel shift registers which receive serial device data and output coπesponding parallel device data. Continuing with block 1180, the decoded parallel device data is provided to a processor. Then, in block 1190, a processor instruction is executed utilizing the required device data which may relate to, for example, memory, an input key, or other I/O devices. The above description with respect to FIGS. 9-11 explains how device data is transmitted to a processor using the coded optical interface. Those skilled in the art will readily recognize that the coded optical interface illustrated in FIGS. 9-11 may be expanded such that additional sets of data may be parallel processed with the coded optical interface. Specifically, additional devices, send and receive PMODs, and send and receive registers may be added to further enhance the parallel processing capabilities illustrated in a small scale with sets of two send registers, send PMODs, etc. 5. Coded Optical Interface System Between Processor And I/O Device

The various embodiments of the coded optical interface illustrated in FIGS 2-11 are further illustrated as an entire system in FIG. 12. The processor 1200 provides parallel instruction data to send registers 1202, 1204, and 1206. Send register 1 1202 receives a first set of parallel instruction data, send register 2 1204 receives a second set of parallel instruction data, and send register 3 1206 receives a third set of parallel instruction data. Each send register outputs coπesponding serial instruction data to respective send PMODs. Specifically, send register 1 1202 outputs serial instruction data to send PMOD 1 1208 which encodes light at wavelength 1 (e.g., 850 nm), send register 2 1204 outputs serial instruction data to send PMOD 2 1210 which encodes light at wavelength 2 9 (e.g., 1300nm), and send register 3 1206 outputs serial instruction data to send PMOD 3 1212 which encodes light at wavelength 3 (e.g., 1550 nm). Send registers which are associated with a particular send PMOD are labeled to indicate the association. For example, data from send register 1 1202 is illustrated to be associated with wavelength 1 or 850 nm since data from this send register is encoded by send PMOD 1 at 850 nm.

Optical pulse clock 1214 drives encoded serial instruction data from send PMODs 1208, 1210, and 1212 onto optical fiber 1216A which is coupled to outputs of send PMODs 1208, 1210, and 1212 by optical junction 1218A. Sets of encoded serial instruction data at wavelengths 1-3 are transmitted across optical fiber 1216A either synchronously or asynchronously depending on pulse clock 1214.

The output of the optical fiber 1216A is coupled to another optical junction 1218B which links optical fiber 1216A to the input of receive PMOD 1 1220, receive PMOD 2 1222, and receive PMOD 3 1224. The receive PMOD that is configured to detect the wavelength which originally encoded data is the receive PMOD that receives a particular set of serial instruction data. Thus, receive PMOD 1 1220 detects light at wavelength 1 (e.g.,

850nm) which is encoded data from send register 1 1202, receive PMOD 2 1222 detects light at wavelength 2 (e.g., 1300nm) which is encoded data from send register 2 1204, and receive PMOD 3 1224 detects light at wavelength 3 (e.g., 1550nm) which is encoded data from send register 3 1206. Decoded serial data from receive PMOD 1 1220 is provided to receive register 1

1226, decoded serial data from receive PMOD 2 1222 is provided to receive register 2 1228, and decoded serial data from receive PMOD 3 1224 is provided to receive register 3 1230.

Again, receive registers 1226, 1228, and 1230 are illustrated as associated with a wavelength detected by respective receive PMODs 1220, 1222, and 1224.

Receive registers 1226, 1228, and 1230 output coπesponding parallel instruction data to I O devices. Examples of I/O devices include, but are not limited to, smart video 1232, memory 1234, direct storage 1236, input key/voice 1238, and special devices 1240. Indeed, those skilled in the art will recognize that various other I/O devices may be utilized such as, for example, various disc devices, Direct Access Storage Devices (DASD) such as CDs, CD-

ROM readers, DVD readers, etc., various forms of memory devices, graphics processors such as home televisions, Cathode Ray Tubes (CRTs), high speed pixel tubes, etc., keyboard/mouse synchronizers, voice recognition systems, tape drives, external modules such as process control, and other special devices such as industrial processors, analog output, and digital output. Instructions from processor 1200 are then executed using the selected device.

Similarly, devices can provide parallel instruction data to processor 1200 using the coded optical interface. For example, send register 4 1242 receives parallel device data from smart video 1232, send register 5 1244 receives a parallel device data from memory 1234, and send register 6 1246 receives parallel device data from direct storage device 1236. Each send register outputs coπesponding serial device data to respective send PMODs.

Specifically, send register 4 1242 outputs serial device data to send PMOD 4 1248 which transmits light at wavelength 4, send register 5 1244 outputs serial device data to send PMOD 5 1250 which transmits light at wavelength 5, and send register 6 1246 outputs serial device data to send PMOD 6 1252 which transmits light at wavelength 6. Send registers are illustrated as associated with a particular wavelength based on the associated send PMOD which encodes send register / device data.

Optical clock 1214 drives encoded serial device data from send PMODs 1248, 1250, and 1252 onto optical fiber 1216B. The optical fiber 1216B may be a single optical fiber, or different optical fibers may be utilized to transmit data. Optical fiber 1216B is coupled to outputs of send PMODs 1248, 1250, and 1252 by optical junction 1218C. Encoded serial device data at the different wavelengths is transmitted across optical fiber 1216B synchronously or asynchronously.

The output of the optical fiber 1216B is coupled to an optical junction 1218D which links the optical fiber 1216B output to the input of receive PMOD 4 1254, receive PMOD 5 1256, and receive PMOD 6 1258. The receive PMOD that is configured to detect the wavelength at which a set of device data was originally encoded receives the set of serial device data. Thus, receive PMOD 4 1254 detects and receives light at wavelength 4 (i.e., encoded smart video 1232 data from send register 4 1242). Similarly, receive PMOD 5 1256 detects and receives light at wavelength 5 which is encoded memory 1234 data from send register 5 1244, and receive PMOD 6 1258 detects and receives light at wavelength 6 which is encoded direct storage 1236 data from send register 6 1246.

Receive PMODs 1254, 1256, and 1258 output decoded serial device data and provide this data to respective receive registers, receive register 4 1260, receive register 5 1262, and receive register 6 1264. Receive registers 1260, 1262, and 1264 output coπesponding parallel instruction data to processor 1200. For example, receive register 4 1260 outputs parallel smart video 1232 data to processor 1200, receive register 5 1262 outputs parallel data from memory 1234 to processor 1200, and receive register 6 1264 outputs direct storage 1236 data from direct storage 1236 to processor 1200. Of course, data from other devices may be routed to processor 1200 via the coded optical interface. Processor 1200 then executes instructions using the device data.

Thus, with the coded optical interface, instruction or device data can be transmitted between a processor and a device through designated send registers, send PMODs, receive PMODs, and receive registers. Applied on a larger scale, the benefits and capabilities of the coded optical interface are even more apparent. For example, a 20 channel system may be implemented such that there are 10 channels for processor outputs and 10 channels for processor inputs. These inputs and outputs may be coupled through an optical fiber to respective inputs and outputs of devices. With each of these channels running at a different wavelength and processed in parallel, large scale parallel processing of instructions and data between a processor and device is possible as illustrated in FIG. 13. A clock pulse may drive, for example, a set of instruction data from a processor and at the same time, drive a set of device data from an I/O device. Pulses 1300, 1310, 1320, and

1330 transmit encoded data at different numbers of wavelengths. Initially, before these pulses drive data, the processing of data between a processor/device and send registers and send PMODs are performed. Then, the pulses can drive the data across an optical back plane.

Pulse 1 1300 may drive encoded serial instruction data set 1 1302 from a processor over an optical fiber at three different wavelengths (1, 3, and 6). At this time, it may not be necessary to transmit device data.

Pulse 2 1310 may drive a second set of encoded serial instruction data 1312 over an optical fiber at three other wavelengths (2, 6, and 8). In addition, pulse 2 1310 may drive a first set of encoded serial device data 1314 over an optical fiber at five different wavelengths (3, 4, 6, 7, and 9).

Pulse 3 1320 drives a third set of encoded serial instruction data 1322 over an optical fiber at six different wavelengths (1, 2, 3, 7, 8, and 9). Additionally, pulse 3 1320 drives a second set of encoded serial device data 1324 at two wavelengths (8, 10).

Pulse 4 1330 drives a fourth set of encoded serial instruction data 1332 at one wavelength (4) while pulse 4 1330 drives a third set of encoded serial device data 1334 at 10 different wavelengths (1-10), and so on for additional pulses.

After each of these pulses, the optical data is received by corresponding receive PMODs, processed by receive registers, and provided to a processor/device as necessary.

Thus, the coded optical interface enables data to be processed from a processor to a device as well as from a device to a processor, and these can be performed simultaneously using optical components. As a result, the coded optical interface enables processing at higher speeds compared to conventional systems. Further, this simultaneous processing is further enhanced due to the parallel processing capabilities which are provided by the send and receive registers and send and receive PMODs. As a result, processor instructions and device data can be processed more quickly and more efficiently compared to conventional systems by implementing parallel processing in conjunction with optical buss lines. Additionally, considering the coded optical interface utilizes one or two optical fibers or optical back planes as a buss as compared to conventional systems which use significantly more optical fibers or are based on electrical conductor busses, the coded optical interface requires less circuit board space as well as providing performance enhancements. The space efficiency is further improved considering the coded optical interface does not complicate components as some conventional systems do. Thus, coded optical interface results in significant performance and space advantages.

Conclusion

The foregoing description of one embodiment of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.

Claims

I CLAIM:

1. A computer processing system comprising: a processor having parallel output data ports; one or more registers coupled to the processor, so that each register receives parallel instruction data and outputs coπesponding serial instruction data; one or more optical encoders coupled to the registers to encode the serial instruction data at one or more wavelengths; and an optical fiber coupled to the optical encoders, whereby sets of encoded serial instruction data are transmitted across the optical fiber.

2. The system of claim 1 , wherein the register comprises a parallel shift register.

3. The system of claim 1, wherein parallel instruction data from the optical encoder is transmitted from the processor to a register identified by register address bits.

4. The system of claim 1, wherein sets of serial instruction data are encoded at different wavelengths.

5. The system of claim 1, wherein a set of serial instruction data is encoded at multiple wavelengths.

6. The system of claim 1 , wherein the optical encoder comprises a Phase Multiplexer Optical Device (PMOD).

7. The system of claim 1, wherein the optical encoder comprises a Light Emitting Diode (LED).

8. The system of claim 1, further comprising an optical clock, wherein the optical clock provides a clock pulse that drives encoded serial instruction data through the optical encoders and the optical fiber.

9. The system of claim 8, wherein multiple sets of encoded serial instruction data at different wavelengths are simultaneously transmitted over the optical fiber.

10. A computer processing system comprising: an optical fiber whereby encoded serial instruction data is transmitted through the optical fiber; one or more optical decoders coupled to the optical fiber, so that the optical decoders detect a wavelength of encoded serial instruction data; and one or more registers coupled to the optical decoders, so that each receiving register receives serial instruction data and outputs coπesponding parallel instruction data.

11. The system of claim 10, wherein the optical decoder comprises a reverse- biased optical encoder.

12. The system of claim 10, wherein the optical decoders detect exclusive wavelengths.

13. The system of claim 10, wherein the optical decoders detect wavelengths within overlapping ranges of wavelengths.

14. A computer processing system comprising: a device having parallel output data ports; one or more registers coupled to the device, so that each register receives parallel device data and outputs coπesponding serial device data; one or more optical encoders coupled to the registers to encode the serial device data at one or more wavelengths; and an optical fiber coupled to the optical encoders, whereby sets of encoded serial device data are transmitted across the optical fiber.

15. The system of claim 14, wherein the register comprises a parallel shift register.

16. The system of claim 14, wherein parallel device data from the optical encoder is transmitted from the device to a register identified by register address bits.

17. The system of claim 14, wherein sets of serial device data are encoded at different wavelengths.

18. The system of claim 14, wherein a set of serial device data is encoded at multiple wavelengths.

19. The system of claim 14 wherein the optical encoder comprises a Phase Multiplexer Optical Device (PMOD).

20. The system of claim 14, wherein the optical encoder comprises a Light Emitting Diode (LED).

21. The system of claim 14, further comprising an optical clock, wherein the optical clock provides a clock pulse that drives encoded serial device data through the optical encoders and the optical fiber.

22. The system of claim 21 , wherein multiple sets of encoded serial device data at different wavelengths are simultaneously transmitted over the optical fiber.

23. A computer processing system comprising: an optical fiber whereby encoded serial device data is transmitted through the optical fiber; one or more optical decoders coupled to the optical fiber, so that the optical decoders detect a wavelength of encoded serial device data; and one or more registers coupled to the optical decoders, so that each receiving register receives serial device data and outputs coπesponding parallel device data.

24. The system of claim 23, wherein the optical decoder comprises a reverse- biased optical encoder.

25. The system of claim 23, wherein the optical decoders detect exclusive wavelengths.

26. The system of claim 23, wherein the optical decoders detect wavelengths within overlapping ranges of wavelengths.

27. The system of claim 16, wherein the device comprises a memory device.

28. The system of claim 16, wherein the device comprises a disc device.

29. The system of claim 16, wherein the device comprises a Direct Access Storage

Device (DASD).

30. The system of claim 16, wherein the device comprises a graphics processing device.

31. The system of claim 16, wherein the device comprises an external module.

32. A computer processing system, comprising: a processor having parallel output data ports; one or more send registers coupled to the processor, so that each send register receives parallel instruction data and outputs coπesponding serial instruction data; one or more optical encoders coupled to the send registers to encode the serial instruction data at one or more wavelengths; an optical fiber coupled to the optical encoders, whereby sets of encoded serial instruction data are transmitted across the optical fiber; an optical clock, wherein the optical clock provides a clock pulse that drives encoded serial instruction data through the optical encoders and the optical fiber; one or more optical decoders coupled to the optical fiber, so that the optical decoders detect a wavelength of encoded serial instruction data; and one or more receiving registers coupled to the optical decoders, so that each receiving register receives serial instruction data and outputs coπesponding parallel instruction data.

33. A computer processing system, comprising: a device having parallel output data ports; one or more send registers coupled to the device, so that each send register receives parallel device data and outputs coπesponding serial device data; one or more optical encoders coupled to the send registers to encode the serial device data at one or more wavelengths; an optical fiber coupled to the optical encoders, whereby sets of encoded serial device data are transmitted across the optical fiber; an optical clock, wherein the optical clock provides a clock pulse that drives encoded serial device data through the optical encoders and the optical fiber; one or more optical decoders coupled to the optical fiber, so that the optical decoders detect a wavelength of encoded serial device data; and one or more receiving registers coupled to the optical decoders, so that each receiving register receives serial device data and outputs coπesponding parallel device data.

34. A method of executing processor instructions, comprising: providing parallel instruction data from a processor to one or more registers; with the registers, converting sets of parallel instruction data to coπesponding sets of serial instruction data; encoding the sets of serial instruction data at one or more wavelengths with one or more optical encoders coupled to the output of the registers; and transmitting the encoded sets of serial instruction data over an optical fiber coupled to the output of the optical encoders.

35. The method of claim 34, wherein the sets of serial instruction data are encoded at different wavelengths.

36. The method of claim 34, wherein a Phase Multiplexer Optical Device (PMOD) encodes parallel instruction data.

37. The method of claim 34, wherein a Light Emitting Diode (LED) encodes serial instruction data.

38. The method of claim 34, wherein sets serial instruction data are encoded at different wavelengths.

39. The method of claim 34, wherein the sets of serial instruction data are transmitted across the optical fiber simultaneously.

40. The method of claim 34, further comprising transmitting the sets of encoded serial instruction data from the optical fiber to one or more optical decoders that detect a wavelength of encoded serial instruction data.

41. The method of claim 40 further comprising decoding the sets of serial instruction data so that the sets of serial instruction data are dissociated from their transmission wavelengths.

42. The method of claim 41, further comprising providing decoded serial instruction data to one or more receiving registers.

43. The method of claim 42, further comprising converting sets of decoded serial instruction data into coπesponding sets of parallel instruction data with the receiving registers.

44. The method of claim 43, wherein the sets of parallel instruction data are the same as the sets of parallel instruction data provided by the processor.

45. The method of claim 44, further comprising providing the sets of parallel instruction data to a device coupled to the receiving registers.

46. The method of claim 45, wherein the device comprises a memory device.

47. The method of claim 45, wherein the device comprises a disc device.

48. The method of claim 45, wherein the device comprises a Direct Access Storage Device (DASD).

49. The method of claim 45, wherein the device comprises a graphics processing device.

50. The method of claim 45, wherein the device comprises an external module.

51. A method of processing device data, comprising: providing parallel device data from a processor to one or more registers; with the registers, converting sets of parallel device data to coπesponding sets of serial device data; encoding the sets of serial device data at one or more wavelengths with one or more optical encoders coupled to the output of the registers; and transmitting the encoded sets of serial device data over an optical fiber coupled to the output of the optical encoders.

52. The method of claim 51 , wherein the sets of serial device data are encoded at different wavelengths.

53. The method of claim 51, wherein a Phase Multiplexer Optical Device (PMOD) encodes parallel device data.

54. The method of claim 51, wherein a Light Emitting Diode (LED) encodes serial device data.

55. The method of claim 51, wherein sets serial device data are encoded at different wavelengths.

56. The method of claim 51 , wherein the sets of serial device data are transmitted across the optical fiber simultaneously.

57. The method of claim 51, further comprising transmitting the sets of encoded serial device data from the optical fiber to one or more optical decoders that detect a wavelength of encoded serial device data.

58. The method of claim 57 further comprising decoding the sets of serial device data so that the sets of serial device data are dissociated from their transmission wavelengths.

59. The method of claim 58 , further comprising providing decoded serial device data to one or more receiving registers.

60. The method of claim 59, further comprising converting sets of decoded serial device data into coπesponding sets of parallel device data with the receiving registers.

61. The method of claim 60, wherein the sets of parallel device data are the same as the sets of parallel device data provided by the processor.

62. The method of claim 61, further comprising providing the sets of parallel device data to a device coupled to the receiving registers.

63. The method of claim 62, wherein the device comprises a memory device.

64. The method of claim 62, wherein the device comprises a disc device.

65. The method of claim 62, wherein the device comprises a Direct Access Storage Device (DASD).

66. The method of claim 62, wherein the device comprises a graphics processing device.

67. The method of claim 62, wherein the device comprises an external module.