WO2002068714A1 - Electrostatic chuck - Google Patents

Electrostatic chuck Download PDF

Info

Publication number
WO2002068714A1
WO2002068714A1 PCT/GB2002/000223 GB0200223W WO02068714A1 WO 2002068714 A1 WO2002068714 A1 WO 2002068714A1 GB 0200223 W GB0200223 W GB 0200223W WO 02068714 A1 WO02068714 A1 WO 02068714A1
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
electrode
ring
chuck
location
Prior art date
Application number
PCT/GB2002/000223
Other languages
French (fr)
Inventor
David Andrew Tossell
Matthew Peter Martin
Original Assignee
Trikon Holdings Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Trikon Holdings Limited filed Critical Trikon Holdings Limited
Priority to DE10221614A priority Critical patent/DE10221614A1/en
Publication of WO2002068714A1 publication Critical patent/WO2002068714A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833Details of electrostatic chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks

Definitions

  • This invention relates to electrostatic chucks.
  • US-A-5507874 describes an electrostatic chuck in which the electrode may be smaller than the wafer and in which the encapsulating dielectric falls away from the edge of the wafer. When the wafer is being etched this introduces the likelihood of backside etching of the part of the wafer that is exposed at its periphery and also the dielectric may be relatively easily etched through to the electrode.
  • the present invention consists in an electrostatic chuck forming a wafer location including an F electrode having a diameter less than that of the location, the electrode being encased in a dielectric body having a flat upper surface for receiving the wafer characterised in that the chuck further includes a sacrificial ring of dielectric material surrounding the body to extend, the flat upper surface beyond the wafer location.
  • the provision of the sacrificial ring which may be integral with the body, means that before either the backside of the wafer or the . electrode can be attacked by the etching process, a substantial portion of the ring itself has to be eaten away.
  • the ring is separable from the body to allow replacement of the ring, without the need to replace the body or the electrode.
  • the boundary, at the upper face, between the ring and the body lies within the wafer location. In this way, in use, the boundary will be shielded by the wafer and not act as a point of weakness at which preferential etching might occur.
  • the ring and body are stepped for mutual engagement. This means that the thickness of dielectric on the ring which needs to extend into the wafer location can be reduced, hence reducing the cost of the replacement ring. It also allows positive location of the ring.
  • Figure 1 is a schematic vertical section through one edge of an electrostatic chuck; and Figure 2 is a corresponding view through an alternative embodiment.
  • an electrostatic chuck is generally indicated at 10 and comprises a top ceramic layer 11, an intermediate ceramic layer 12 and a platen 13, the top layer 11 and intermediate layer 12 being bonded by a layer of adhesive 14 in which an electrode 15 is also located.
  • a wafer 16 is shown lying on the flat upper surface of the ceramic layer 11 and is located in a wafer location 17, which is bounded, at the edge shown in Figure 1, by the vertical dotted line 18. It will be noted that the electrode 15 has a radius of 2mm less than that of the wafer location 17. As wafers are processed the hatched area slowly becomes etched away, but because the electrode 15 is well spaced from this area, no damage is done to the electrode 15 and the life of the chuck can be extended.
  • the oversizing of the layer 11, in combination with the reduced electrode 15 therefore protects the electrode 15 and reduces the likelihood of backside etching of the wafers 16. It also provides good wafer edge cooling and more uniform RF and DC electric fields upon the wafer. This improved uniformity of temperature and electrical fields provides for a more uniform process across the wafer. This directly improves process results upon a wafer and indirectly it widens the "process window" improving equipment functionality and process reliability. Even with this improved configuration shown in Figure
  • Figure 2 shows a way to significantly increase the life of the chuck again.
  • the top electrode 11 stops ' short of the edge of the wafer location 17 and is stepped downwardly.
  • the edges of the adhesive layer 14 and the intermediate ceramic layer 12 align almost exactly with the edge of the location 17.
  • a dielectric ceramic ring 19 is then located around the main chuck portion 20 (which comprises layers 11, 12, 14 and the electrode 15) .
  • the ring 19 has an inward flange 21 that sits on the step formed by the ceramic layer 11. It will be readily understood that in this case, when the ring 19 becomes etched sufficiently to expose the main body 20, it can readily be replaced preventing any damage to the main body 20.
  • the stepped arrangement ensures that the boundary 22 between the ring 19 and the ceramic layer 11 lies within the wafer location 17 and is hence shielded, during etching, by the wafer 16. It will be appreciated that other engagement configurations between the ring 19 and the ceramic layer 11 could be formed and it will be particularly noted that the ceramic ring 19 forms a continuous flat surface with the ceramic layer 11 and indeed forms part of the wafer location 17.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Jigs For Machine Tools (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

This invention relates to an electrostatic chuck 10 which comprises a top ceramic layer 11, an intermediate ceramic layer 12 and a pattern 13, the top layer 11 and intermediate layer 12 being bonded by a layer of adhesive 14 in which an electrode 15 is also located. The electrode is significantly smaller than the wafer location, with the result that the portion 11 is effectively oversized protecting the electrode from etching around the edge of the wafer. The arrangement also reduces backside etching of the wafer, good edge cooling of the wafer and improved uniformity and processing.

Description

ELECTROSTATIC CHUCK
This invention relates to electrostatic chucks. US-A-5507874 describes an electrostatic chuck in which the electrode may be smaller than the wafer and in which the encapsulating dielectric falls away from the edge of the wafer. When the wafer is being etched this introduces the likelihood of backside etching of the part of the wafer that is exposed at its periphery and also the dielectric may be relatively easily etched through to the electrode.
From one aspect the present invention consists in an electrostatic chuck forming a wafer location including an F electrode having a diameter less than that of the location, the electrode being encased in a dielectric body having a flat upper surface for receiving the wafer characterised in that the chuck further includes a sacrificial ring of dielectric material surrounding the body to extend, the flat upper surface beyond the wafer location. The provision of the sacrificial ring, which may be integral with the body, means that before either the backside of the wafer or the . electrode can be attacked by the etching process, a substantial portion of the ring itself has to be eaten away. It is particularly preferred that the ring is separable from the body to allow replacement of the ring, without the need to replace the body or the electrode. In that case it is preferred that the boundary, at the upper face, between the ring and the body lies within the wafer location. In this way, in use, the boundary will be shielded by the wafer and not act as a point of weakness at which preferential etching might occur. Particularly conveniently the ring and body are stepped for mutual engagement. This means that the thickness of dielectric on the ring which needs to extend into the wafer location can be reduced, hence reducing the cost of the replacement ring. It also allows positive location of the ring.
Although the invention has been defined above it is to be understood that it includes any .inventive combination of the feature set out above or in the following description. The invention may be performed in various ways and specific embodiments are now described, by way of example, with reference to the accompanying drawings, in which:
Figure 1 is a schematic vertical section through one edge of an electrostatic chuck; and Figure 2 is a corresponding view through an alternative embodiment.
In Figure 1 an electrostatic chuck is generally indicated at 10 and comprises a top ceramic layer 11, an intermediate ceramic layer 12 and a platen 13, the top layer 11 and intermediate layer 12 being bonded by a layer of adhesive 14 in which an electrode 15 is also located. A wafer 16 is shown lying on the flat upper surface of the ceramic layer 11 and is located in a wafer location 17, which is bounded, at the edge shown in Figure 1, by the vertical dotted line 18. It will be noted that the electrode 15 has a radius of 2mm less than that of the wafer location 17. As wafers are processed the hatched area slowly becomes etched away, but because the electrode 15 is well spaced from this area, no damage is done to the electrode 15 and the life of the chuck can be extended. The oversizing of the layer 11, in combination with the reduced electrode 15 therefore protects the electrode 15 and reduces the likelihood of backside etching of the wafers 16. It also provides good wafer edge cooling and more uniform RF and DC electric fields upon the wafer. This improved uniformity of temperature and electrical fields provides for a more uniform process across the wafer. This directly improves process results upon a wafer and indirectly it widens the "process window" improving equipment functionality and process reliability. Even with this improved configuration shown in Figure
1, the chuck will eventually fail, when high powered etching is occurring and .Figure 2 shows a way to significantly increase the life of the chuck again. In this arrangement, the top electrode 11 stops ' short of the edge of the wafer location 17 and is stepped downwardly. The edges of the adhesive layer 14 and the intermediate ceramic layer 12 align almost exactly with the edge of the location 17. A dielectric ceramic ring 19 is then located around the main chuck portion 20 (which comprises layers 11, 12, 14 and the electrode 15) . The ring 19 has an inward flange 21 that sits on the step formed by the ceramic layer 11. It will be readily understood that in this case, when the ring 19 becomes etched sufficiently to expose the main body 20, it can readily be replaced preventing any damage to the main body 20. The stepped arrangement ensures that the boundary 22 between the ring 19 and the ceramic layer 11 lies within the wafer location 17 and is hence shielded, during etching, by the wafer 16. It will be appreciated that other engagement configurations between the ring 19 and the ceramic layer 11 could be formed and it will be particularly noted that the ceramic ring 19 forms a continuous flat surface with the ceramic layer 11 and indeed forms part of the wafer location 17.

Claims

1. An electrostatic chuck forming a wafer location of known diameter including an RF electrode having a diameter less than that of the location the electrode being encased in a dielectric body having a flat upper surface for receiving the wafer characterised in that the chuck further includes a sacrificial ring of dielectric material surrounding the body to extend the flat upper surface beyond the wafer location.
2. A chuck as claimed in Claim 1 wherein the ring is integral with the body.
3. A chuck as claimed in Claim 1 wherein in the ring is separable from the body to allow replacement .
4. A chuck as claimed in Claim 3 wherein the boundary, at the upper face, between the ring and the body lies within the wafer location.
5. A chuck as claimed in Claim 3 or Claim 4 wherein in the ring and body are stepped for mutual engagement.
PCT/GB2002/000223 2001-02-22 2002-01-18 Electrostatic chuck WO2002068714A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE10221614A DE10221614A1 (en) 2002-01-18 2002-05-15 Surgical instrument, for milling the socket of a hip joint, has a variable angle between the axis of the instrument shaft and rotary axis of the instrument head

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0104341A GB0104341D0 (en) 2001-02-22 2001-02-22 Electronic chuck
GB0104341.3 2001-02-22

Publications (1)

Publication Number Publication Date
WO2002068714A1 true WO2002068714A1 (en) 2002-09-06

Family

ID=9909251

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB2002/000223 WO2002068714A1 (en) 2001-02-22 2002-01-18 Electrostatic chuck

Country Status (2)

Country Link
GB (1) GB0104341D0 (en)
WO (1) WO2002068714A1 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4554611A (en) * 1984-02-10 1985-11-19 U.S. Philips Corporation Electrostatic chuck loading
JPH10303286A (en) * 1997-02-25 1998-11-13 Applied Materials Inc Electrostatic chuck and semiconductor manufacturing equipment
US5997962A (en) * 1995-06-30 1999-12-07 Tokyo Electron Limited Plasma process utilizing an electrostatic chuck
JP2000049143A (en) * 1998-07-28 2000-02-18 Foi:Kk Plasma treatment apparatus
US6074488A (en) * 1997-09-16 2000-06-13 Applied Materials, Inc Plasma chamber support having an electrically coupled collar ring
US6104596A (en) * 1998-04-21 2000-08-15 Applied Materials, Inc. Apparatus for retaining a subtrate in a semiconductor wafer processing system and a method of fabricating same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4554611A (en) * 1984-02-10 1985-11-19 U.S. Philips Corporation Electrostatic chuck loading
US5997962A (en) * 1995-06-30 1999-12-07 Tokyo Electron Limited Plasma process utilizing an electrostatic chuck
JPH10303286A (en) * 1997-02-25 1998-11-13 Applied Materials Inc Electrostatic chuck and semiconductor manufacturing equipment
US6074488A (en) * 1997-09-16 2000-06-13 Applied Materials, Inc Plasma chamber support having an electrically coupled collar ring
US6104596A (en) * 1998-04-21 2000-08-15 Applied Materials, Inc. Apparatus for retaining a subtrate in a semiconductor wafer processing system and a method of fabricating same
JP2000049143A (en) * 1998-07-28 2000-02-18 Foi:Kk Plasma treatment apparatus

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 02 26 February 1999 (1999-02-26) *
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 05 14 September 2000 (2000-09-14) *

Also Published As

Publication number Publication date
GB0104341D0 (en) 2001-04-11

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