WO2002067323A1 - Semiconductor device and its cooling surface forming method - Google Patents

Semiconductor device and its cooling surface forming method Download PDF

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Publication number
WO2002067323A1
WO2002067323A1 PCT/JP2002/001607 JP0201607W WO02067323A1 WO 2002067323 A1 WO2002067323 A1 WO 2002067323A1 JP 0201607 W JP0201607 W JP 0201607W WO 02067323 A1 WO02067323 A1 WO 02067323A1
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semiconductor device
cooling
heat transfer
thin film
forming
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PCT/JP2002/001607
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French (fr)
Japanese (ja)
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Hiroshi Honda
Hiroshi Takamatsu
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Japan Science And Technology Corporation
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Priority to JP2002566548A priority Critical patent/JPWO2002067323A1/en
Publication of WO2002067323A1 publication Critical patent/WO2002067323A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a semiconductor device and a method for forming a cooling surface thereof, and more particularly to a semiconductor device having a cooling surface structure with good heat transfer efficiency and a method for forming a cooling surface thereof.
  • the present invention relates to a semiconductor device having a large amount of generated heat and having a high heat transfer coefficient between a cooling surface and a cooling liquid to improve heat transfer characteristics and a method of forming the cooling surface.
  • the cooling of semiconductor devices includes air cooling, electronic cooling using the Peltier effect, and liquid cooling using a cooling liquid.
  • air cooling In three-dimensional packaging, which has attracted attention in recent high integration technologies, it is necessary to reduce the space between semiconductor devices. For this reason, an immersion boiling cooling method is effective in which a semiconductor device is immersed in a cooling liquid to boil the cooling liquid, and the heat is efficiently cooled by the heat of vaporization and convection.
  • An object of the present invention is to provide a semiconductor device which has better heat transfer characteristics than the conventional one, can lower the heat transfer surface temperature in a high heat load region, and is applicable to high-density three-dimensional mounting.
  • an object of the present invention is to provide a method for forming a cooling surface of a semiconductor device which has excellent heat transfer characteristics as compared with conventional ones, can lower the heat transfer surface temperature in a high heat load region, and can be applied to high-density three-dimensional mounting. Is to provide. Disclosure of the invention
  • the semiconductor device of the present invention has a surface provided with a large number of fine columnar or flat projections.
  • the semiconductor device according to the present invention further includes an electrically insulating thin film covering the entire surface.
  • the electrically insulating thin film is a SiO 2 thin film.
  • the fine columnar or plate-like projections have a cross-sectional length and width of 10 to 500 / m and a height of 10 to 500 / m. zm.
  • the method for forming a cooling surface of a semiconductor device according to the present invention comprises forming a large number of fine columnar or flat protrusions on the surface of the semiconductor device, and further forming an electrically insulating surface on the entire surface having the formed fine protrusions. Form a thin film.
  • the fine columnar or flat protrusions are formed by dry etching.
  • the fine columnar or plate-like projections each have a cross-sectional length and width of 10 to 500 ⁇ and a height of 1 to 500. It is formed so as to be 0 to 500 m.
  • the electrical insulating thin film, sputtering, formed by ion plating or by the CVD method connexion S i 0 the electrical insulating thin film, sputtering, formed by ion plating or by the CVD method connexion S i 0 2.
  • high boiling cooling performance can be obtained by subjecting the surface of the semiconductor element to fine processing.
  • the temperature of the heat transfer surface at the maximum heat flux point can be kept considerably lower than the allowable limit temperature of the semiconductor device, and the value of the maximum heat flux can be easily adjusted by increasing the degree of supercooling of the liquid. Since it is possible to achieve the same level as the highest level of the conventional example, it is possible to easily meet the demand for three-dimensional mounting that requires a small space between semiconductor devices.
  • FIG. 1 is a principle explanatory view exemplifying the structure of a semiconductor device according to the present invention.
  • FIG. 1 (A) shows the appearance of a silicon chip subjected to cooling surface processing
  • FIG. 1 (B) shows Fig. 1 (C) shows the top side of the silicon chip.
  • FIG. 4 is a process diagram schematically illustrating a surface forming process.
  • FIG. 3 is a graph showing the measurement results of boiling heat transfer characteristics of a semiconductor device having a cooling surface according to the present invention and a conventional sample.
  • Fig. 4 is a graph comparing the measurement results of sample ST20 with those of samples (f), (c) and (b) of the conventional example.
  • FIG. 5 is a graph showing a measurement result of a change in a maximum heat flux of a semiconductor device having a cooling surface according to the present invention with a fin height.
  • the present invention achieves high boiling cooling performance by performing fine processing on the surface of a semiconductor device.
  • the present invention forms an infinite number of columnar or flat projections on the surface of the semiconductor device. sputtering on the entire surface of the semiconductor device including the projection, by forming an electrical insulating thin film such as S I_ ⁇ 2 by ion plating or CVD, Ru der which improve the heat transfer characteristics of the surface .
  • an electrically insulating thin film such as S i 0 2 on the entire surface, the amount of the cooling liquid being left at the bottom of the vapor bubbles to grow on the surface of the semiconductor device during the ebullient cooling
  • the reason for this is to improve the cooling performance in a high heat load region by increasing the device surface compared to a smooth device surface that has not been subjected to surface treatment.
  • FIG. 1 is an explanatory view exemplarily showing the principle structure of a semiconductor device according to the present invention.
  • FIG. 1 (A) shows the appearance of a silicon chip 1 which has been subjected to the cooling surface processing according to the present invention, and is an example of a photographic image in which a part of the surface is enlarged.
  • FIG. 1 (B) is a top view of the silicon chip 1
  • FIG. 1 (C) is a side view.
  • fine prisms 5 are formed on the surface of the silicon chip 1 by, for example, etching into a lattice by dry etching.
  • the vertical and horizontal dimensions of the cross section are 50 ⁇ 50 jam and the height is 60 m.
  • the space between the adjacent fine prisms 5 is, for example, in a range of 50 fim (a value equal to the vertical and horizontal dimensions) to 60 zm (a value equal to the height).
  • the entire surface of the silicon chip 1 including the fine prisms 5 is covered with an electrically insulating thin film 6 such as SiO 2 by sputtering or the like.
  • the size of the fine prism 5 is, for example, 10 ⁇ 10 / m 2 to 500 In x 5 0 0 ⁇ M 2, may if 1 0 m ⁇ 5 0 0 ⁇ M height.
  • FIG. 2 schematically shows the cooling surface forming process.
  • FIG. 2 (A) shows the appearance of the silicon chip 1 before the surface treatment of the present invention is performed.
  • the dimensions of the area of the silicon chip 1 were 10 ⁇ 10 mm 2 , and the thickness was 0.5 mm.
  • the internal structure of the silicon chip 1 is omitted for convenience.
  • FIG. 2 (B) is a cross-sectional view showing a step of printing a pattern mask 2 of a photocurable resin film on the surface of the silicon chip 1.
  • the pattern mask 2 is formed by applying a photocurable resin film over the entire surface of the silicon chip 1 and then exposing and curing only a large number of rectangular islands 3 arranged vertically and horizontally. It is formed by removing the grid pattern portion 4 of the curable resin film.
  • the size of the area of each rectangular island portion 3 corresponds to the cross-sectional area of the fine columnar projection to be formed, and a size of about 10 ⁇ 10 to 500 ⁇ 500 ⁇ 2 is appropriate.
  • FIG. 2 (C) shows the dry etching process.
  • the surface of the silicon chip 1 is etched in a lattice shape at a depth of about 60 m by dry etching from above the pattern mask 2, and then the photocurable resin film of the pattern mask 2 is removed.
  • FIG. 2 (D) shows the surface of the silicon chip 1 on which a number of fine prisms 5 having a height of 60 // m after removal of the pattern mask 2 are formed.
  • FIG. 2 (E) shows a final process in which a SiO 2 thin film 6 having a thickness of about 3 m was formed on the entire surface of the silicon chip 1 by sputtering.
  • Figure 3 shows a comparative example of the boiling heat transfer characteristics of five types of chips.
  • the vertical axis q is the heat transfer surface heat flow
  • the horizontal axis AT sat indicates the superheat degree of the heat transfer surface (heat transfer surface temperature-cooling liquid saturation temperature).
  • AT sub indicates the degree of supercooling of the cooling liquid (saturation temperature-liquid temperature).
  • the vertical dashed line indicates the allowable limit operating temperature (85 ° C) of the semiconductor device.
  • the symbol S mooth of the sample is a smooth chip without micromachining.
  • the symbol SM indicates a chip as it is on a dry-etched surface
  • the symbol ST indicates a chip that has been subjected to sputtering after dry-etching.
  • the symbol SM numerals 2 0, 5 0, which is added to the ST, the dimensions of the prismatic cross section indicating 2 0 X 2 0 ⁇ ⁇ or 5 0 x 5 0 z. Due to the microfabrication of the chip surface, the maximum heat transfer surface heat flux (q CHF ) of the chip has increased about twice that of a smooth chip within the allowable limit of ⁇ Tsat. It can also be seen that the maximum heat transfer surface heat flux is increased by performing sputtering.
  • Figure 4 compares the measurement results of sample ST20 with those of conventional samples (f), (c), and (b).
  • Sample ( ⁇ ) has a surface with a porous layer of diamond particles, sample (c) is a dendrite surface, and sample (b) is a chip with a laser-treated surface.
  • the heat transfer element is the one with the chip mounted on the substrate, there is considerable heat radiation from other than the chip surface, and q shows a larger value than the actual value ( Actually, it has low performance.
  • the sample ST20 according to the present invention shows that it can transfer a high maximum heat transfer surface heat flux with a smaller AT sat than the others.
  • the vertical axis q CHP indicates the maximum heat transfer surface heat flux in the boiling heat transfer characteristics in Fig. 3, and the horizontal axis At / A is the surface area expansion ratio (the ratio of the total surface area At of the finned surface to the projected area A).
  • the maximum heat flux q CH F is, the fin height in the range of 0 to 2 0 0 ⁇ M shows that increasing with increasing fin height. This tendency also becomes more pronounced as the supercooling degree AT SU3 ⁇ 4 of the coolant increases. Therefore, it is understood that the higher the fin height, the better the heat transfer performance.
  • the fin height is preferably up to 500 m.
  • the thickness of a silicon chip is usually about 500 m, there is no problem in mounting fins having almost the same height.
  • the vertical and horizontal full fin exceeds approximately 5 0 0 m, is to reduce the surface area magnification ratio A t / A, the heat transfer performance decreases. Therefore, the height and width of the fins are preferably up to 500 ⁇ m.
  • a fine prism is formed on the chip surface.
  • a cylinder or other similar shaped protrusion can also perform the same function.
  • the arrangement of the projections does not necessarily have to be at equal intervals.
  • the present invention obtains high boiling cooling performance by performing micromachining on the surface of a semiconductor element.It is possible to keep the heat transfer surface temperature at the maximum heat flux point considerably lower than the allowable limit temperature of the semiconductor device. Also, the value of the maximum heat flux can easily be made equal to the highest level of the conventional example by increasing the degree of subcooling of the liquid, so that the space between the semiconductor devices needs to be reduced. It can easily meet the requirements of the original implementation.
  • a processing technique required for the present invention a standard fine processing technique for semiconductor devices can be used, so that application to an actual manufacturing process is easy.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

Countless columnar or planar protrusions are made on the surface of a semiconductor device and an electrically insulating thin film of SiO2, or the like, is formed on the entire surface including these protrusions by sputtering, ion plating or CVD, thus improving heat transfer characteristics of the surface.

Description

明細書 半導体装置とその冷却表面形成方法 技術分野  Description Semiconductor device and method for forming cooling surface thereof
本発明は、 半導体装置とその冷却表面形成方法に関し、 特に、 伝熱効率のよい 冷却表面構造を持つ半導体装置とその冷却表面を形成する方法であつて、 冷却液 中に浸潰して沸騰冷却する必要のあるような大きな発熱量を持ち、 その冷却表面 と冷却液との間の熱伝達率を向上させて伝熱特性を改善する半導体装置とその冷 却表面を形成する方法に関する。 背景技術  The present invention relates to a semiconductor device and a method for forming a cooling surface thereof, and more particularly to a semiconductor device having a cooling surface structure with good heat transfer efficiency and a method for forming a cooling surface thereof. The present invention relates to a semiconductor device having a large amount of generated heat and having a high heat transfer coefficient between a cooling surface and a cooling liquid to improve heat transfer characteristics and a method of forming the cooling surface. Background art
近年における半導体装置の高集積化と高速化の進展にはめざましいものがあり In recent years, the progress of high integration and high speed of semiconductor devices has been remarkable.
、 それにともない半導体デバイスの発熱量も増大して、 その冷却能力を強化する ことが、 回路動作の安定化とひいては信頼性の向上のために、 ますます重要な問 題になってきている。 半導体デバイスの冷却には、 空冷、 ペルチェ効果を用いた 電子冷却、 あるいは冷却液を用いる液冷などがある。 最近の高集積化技術におい て注目されている三次元実装では、 半導体デバイス間の空間を小さくすることが 要求される。 このため、 半導体デバイスを冷却液に漬けて冷却液を沸騰させ、 そ の気化熱と対流により効率的に冷却する浸漬沸騰冷却方法が有効である。 As a result, the amount of heat generated by semiconductor devices also increases, and enhancing their cooling capacity has become an increasingly important issue for stabilizing circuit operation and consequently improving reliability. The cooling of semiconductor devices includes air cooling, electronic cooling using the Peltier effect, and liquid cooling using a cooling liquid. In three-dimensional packaging, which has attracted attention in recent high integration technologies, it is necessary to reduce the space between semiconductor devices. For this reason, an immersion boiling cooling method is effective in which a semiconductor device is immersed in a cooling liquid to boil the cooling liquid, and the heat is efficiently cooled by the heat of vaporization and convection.
浸漬沸騰冷却では、 沸騰状態が安定に持続するように泡を発生しゃすくするな ど、 冷却面を処理して伝熱促進を図る方法がとられる。 次に従来技術の例 （a ) 〜 （ f ) を示す。  In immersion boiling cooling, a method is used in which the cooling surface is treated to promote heat transfer by, for example, generating bubbles so that the boiling state is stably maintained. Next, examples (a) to (f) of the prior art will be described.
( a ) アルミニウム粒子で表面のサンドブラストを行い、 冷却面に表面粗さを形 成した後、 同時に生じている格子欠陥および結晶損傷を K 0 H溶液によるエッチ ングによって改善する方法 （参考文献 1 ：特開昭 5 4 - 9 6 9 6 5号公報） 。 (a) A method of sandblasting the surface with aluminum particles to form a surface roughness on the cooling surface, and then improving lattice defects and crystal damage that occur simultaneously by etching with a K 0 H solution (Reference 1: Japanese Patent Application Laid-Open No. 54-96965).
( b ) レーザ一照射によって半導体チップやウェハーの表面に微細な孔を多数形 成し、 気泡を発生しやすく して伝熱特性を高める方法 （参考文献 2 ··米国特許第 4 , 0 5 0 , 5 0 7号公報） 。 ( C ) ウェハーの表面に磁性鉄粉を積層し、 磁化してヒモ状に立ち上げたあとメ ツキすることによりブラシ状の構造 （デンドライト） を形成し、 伝熱特性を高め る方法 （参考文献 3 ：米国特許第 3， 7 0 6 , 1 2 7号公報） 。 (b) A method of forming a large number of fine holes on the surface of a semiconductor chip or wafer by irradiating a laser to enhance the heat transfer characteristics by easily generating bubbles (Ref. 2, US Patent No. 4,050) , 507 Publication). (C) A method of laminating magnetic iron powder on the surface of a wafer, magnetizing it, setting it up in a string, and then making a brush to form a brush-like structure (dendrites) to improve the heat transfer characteristics (Ref. 3: U.S. Pat. No. 3,706,127).
( d ) 銅などの放熱体の表面に微小量の塗料を放熱面に島状に塗布したあとメッ キを行い、 ついで塗料を除去することによって表面に微細孔を形成し、 沸騰伝熱 特性を向上させる方法 （参考文献 4 ：特開昭 5 6 - 1 6 6 9 3号公報） 。  (d) A small amount of paint is applied to the surface of the radiator such as copper in the form of an island on the radiating surface, followed by plating. Method for improving (Reference 4: JP-A-56-16693).
( e ) 伝熱面に金属粒子を積み上げた後に金属被膜を形成して多孔質層を形成す ることにより沸騰伝熱特性を向上させる方法 （参考文献 5 ：特開昭 5 5 - 6 3 3 9 7号公報） 。  (e) A method of improving the boiling heat transfer characteristics by forming a metal layer and then forming a porous layer by stacking metal particles on the heat transfer surface (Reference 5: Japanese Patent Application Laid-Open No. 55-633) 97 publication).
( f ) 微粒子や銀箔を接着剤の溶液に混ぜたものを塗布し、 乾燥させる事によつ て多孔質層を形成する方法 （参考文献 6 ： ASME Journal of Heat Transfer, Vol. 117， pp. 387-393, 1995 ) 。  (f) A method of forming a porous layer by applying a mixture of fine particles and silver foil in an adhesive solution and drying the mixture (Reference 6: ASME Journal of Heat Transfer, Vol. 117, pp. 387-393, 1995).
従来例 （a ) 〜 （ f ) に示されるような技術は、 半導体デバイスの冷却に適用 する場合、 それぞれ伝熱性能が不十分であったり、 高熱負荷域で伝熱面温度が高 くなるなどの欠点を持ち、 また構造的に半導体デバイスの三次元実装には不向き で、 今後さらに進むであろう三次元実装のためにデバイス間の空間を小さくする 要求を満たすことは難しいなどの問題があつた。  When the technologies shown in the conventional examples (a) to (f) are applied to the cooling of semiconductor devices, the heat transfer performance is insufficient, and the heat transfer surface temperature increases in the high heat load area. However, it is structurally unsuitable for three-dimensional mounting of semiconductor devices, and it is difficult to meet the demand to reduce the space between devices for three-dimensional mounting, which will be further advanced in the future. Was.
本発明の目的は、 従来よりも優れた伝熱特性を持つとともに高熱負荷域での伝 熱面温度を低くでき、 高密度の三次元実装にも適応できる半導体装置を提供する ことにある。  An object of the present invention is to provide a semiconductor device which has better heat transfer characteristics than the conventional one, can lower the heat transfer surface temperature in a high heat load region, and is applicable to high-density three-dimensional mounting.
また、 本発明の目的は、 従来よりも優れた伝熱特性を持つとともに高熱負荷域 での伝熱面温度を低くでき、 高密度の三次元実装にも適応できる半導体装置の冷 却表面形成方法を提供することにある。 発明の開示  Further, an object of the present invention is to provide a method for forming a cooling surface of a semiconductor device which has excellent heat transfer characteristics as compared with conventional ones, can lower the heat transfer surface temperature in a high heat load region, and can be applied to high-density three-dimensional mounting. Is to provide. Disclosure of the invention
本発明の半導体装置は、 多数の微細な柱状または平板状突起を設けられた表面 を有する。  The semiconductor device of the present invention has a surface provided with a large number of fine columnar or flat projections.
また、 好ましくは、 本発明の半導体装置において、 前記表面全体を覆う電気絶 縁性の薄膜を有する。 . また、 好ましくは、 本発明の半導体装置において、 前記電気絶縁性の薄膜は S i 0 2 の薄膜である。 Preferably, the semiconductor device according to the present invention further includes an electrically insulating thin film covering the entire surface. . Preferably, in the semiconductor device of the present invention, the electrically insulating thin film is a SiO 2 thin film.
また、 好ましくは、 本発明の半導体装置において、 前記微細な柱状または平板 状突起は、 その断面の縦横の寸法がともに 1 0〜5 0 0 / mであり、 高さが 1 0 〜5 0 0 z mである。  Preferably, in the semiconductor device of the present invention, the fine columnar or plate-like projections have a cross-sectional length and width of 10 to 500 / m and a height of 10 to 500 / m. zm.
本発明の半導体装置の冷却表面形成方法は、 半導体装置の表面に多数の微細な 柱状または平板状突起を形成し、 さらに該形成された微細な突起を有する表面全 体の上に電気絶縁性の薄膜を形成する。  The method for forming a cooling surface of a semiconductor device according to the present invention comprises forming a large number of fine columnar or flat protrusions on the surface of the semiconductor device, and further forming an electrically insulating surface on the entire surface having the formed fine protrusions. Form a thin film.
また、 好ましくは、 本発明の半導体装置の冷却表面形成方法において、 前記微 細な柱状または平板状突起をドライエッチングによつて形成する。  Preferably, in the method for forming a cooling surface of a semiconductor device according to the present invention, the fine columnar or flat protrusions are formed by dry etching.
また、 好ましくは、 本発明の半導体装置の冷却表面形成方法において、 前記微 細な柱状または平板状突起は、 その断面の縦横の寸法がともに 1 0〜5 0 0 πι であり、 高さが 1 0〜5 0 0〃mであるように形成する。  Preferably, in the method for forming a cooling surface of a semiconductor device according to the present invention, the fine columnar or plate-like projections each have a cross-sectional length and width of 10 to 500 πι and a height of 1 to 500. It is formed so as to be 0 to 500 m.
また、 好ましくは、 本発明の半導体装置の冷却表面形成方法において、 前記電 気絶縁性の薄膜を、 スパッタリング、 イオンプレーティングまたは C V D法によ つて S i 0 2 で形成する。 Preferably, in the cooling surface forming method of a semiconductor device of the present invention, the electrical insulating thin film, sputtering, formed by ion plating or by the CVD method connexion S i 0 2.
本発明の半導体装置およびその冷却表面形成方法によれば、 半導体素子の表面 に微細加工を施すことによって高い沸騰冷却性能を得ることができる。 即ち、 最 大熱流束点の伝熱面温度を半導体デバイスの許容限界温度よりかなり低く保つこ とが可能であり、 また最大熱流束の値も、 液の過冷度を大きくとることによって 容易に従来例の最高レベルと同程度にすることが可能であるので、 半導体デバイ ス間の空間を小さくする必要のある三次元実装の要求にも容易に応えることがで きる。 図面の簡単な説明  According to the semiconductor device of the present invention and the method for forming a cooling surface thereof, high boiling cooling performance can be obtained by subjecting the surface of the semiconductor element to fine processing. In other words, the temperature of the heat transfer surface at the maximum heat flux point can be kept considerably lower than the allowable limit temperature of the semiconductor device, and the value of the maximum heat flux can be easily adjusted by increasing the degree of supercooling of the liquid. Since it is possible to achieve the same level as the highest level of the conventional example, it is possible to easily meet the demand for three-dimensional mounting that requires a small space between semiconductor devices. BRIEF DESCRIPTION OF THE FIGURES
第 1図は本発明による半導体装置の構造を例示的に示す原理説明図であり、 第 1図 （A) は、 冷却表面加工を施したシリコンチップの外観を示し、 第 1図 （B ) はシリコンチップの上面を示し、 第 1図 （C ) は側面を示す。  FIG. 1 is a principle explanatory view exemplifying the structure of a semiconductor device according to the present invention. FIG. 1 (A) shows the appearance of a silicon chip subjected to cooling surface processing, and FIG. 1 (B) shows Fig. 1 (C) shows the top side of the silicon chip.
第 2図 （A) ないし （E ) は本発明の一実施の形態による半導体装置の冷却表 面形成処理を模式的に示す工程図である。 2 (A) to 2 (E) are cooling tables of a semiconductor device according to an embodiment of the present invention. FIG. 4 is a process diagram schematically illustrating a surface forming process.
第 3図は本発明による冷却表面を持つ半導体デバイスと従来例の試料の沸騰伝 熱特性測定結果を示すグラフである。  FIG. 3 is a graph showing the measurement results of boiling heat transfer characteristics of a semiconductor device having a cooling surface according to the present invention and a conventional sample.
第 4図は試料 S T 2 0の測定結果と従来例の試料 （f ) ， （c ) , ( b ) の測 定結果とを比較したグラフである。  Fig. 4 is a graph comparing the measurement results of sample ST20 with those of samples (f), (c) and (b) of the conventional example.
第 5図は本発明による冷却表面を持つ半導体デバイスの最大熱流束のフィン高 さによる変化の測定結果を示すグラフである。 発明を実施するための最良の形態  FIG. 5 is a graph showing a measurement result of a change in a maximum heat flux of a semiconductor device having a cooling surface according to the present invention with a fin height. BEST MODE FOR CARRYING OUT THE INVENTION
本発明は、 半導体デバイスの表面に微細加工を施す事によって高い沸騰冷却性 能を実現するものであり、 具体的には、 半導体デバイスの表面に無数の柱状また は平板状突起をつくり、 さらにこれらの突起を含めた半導体デバイスの表面全体 にスパッタリング、 イオンプレーティングまたは C V Dによって S i〇2 等の電 気絶縁性の薄膜を形成することにより、 表面からの伝熱特性を改善するものであ る。 ここで S i 0 2 等の電気絶縁性の薄膜を全面に形成するのは、 沸騰冷却の際 に半導体デバイスの表面上で成長する蒸気泡の下部に取り残される冷却液の量をThe present invention achieves high boiling cooling performance by performing fine processing on the surface of a semiconductor device. Specifically, the present invention forms an infinite number of columnar or flat projections on the surface of the semiconductor device. sputtering on the entire surface of the semiconductor device including the projection, by forming an electrical insulating thin film such as S I_〇 2 by ion plating or CVD, Ru der which improve the heat transfer characteristics of the surface . Here form an electrically insulating thin film such as S i 0 2 on the entire surface, the amount of the cooling liquid being left at the bottom of the vapor bubbles to grow on the surface of the semiconductor device during the ebullient cooling
、 表面処理を施していない平滑なデバイス表面に比べて増大させることにより、 高熱負荷域の冷却性能を改善するためである。 The reason for this is to improve the cooling performance in a high heat load region by increasing the device surface compared to a smooth device surface that has not been subjected to surface treatment.
第 1図は、 本発明による半導体装置の原理的構造を例示的に示す説明図である 。 第 1図 （A ) は、 本発明による冷却表面加工を施したシリコンチップ 1の外観 を示し、 その表面の一部を拡大して示した写真画像の例である。 また第 1図 （B ) はシリコンチップ 1の上面図、 第 1図 （C ) は側面図である。  FIG. 1 is an explanatory view exemplarily showing the principle structure of a semiconductor device according to the present invention. FIG. 1 (A) shows the appearance of a silicon chip 1 which has been subjected to the cooling surface processing according to the present invention, and is an example of a photographic image in which a part of the surface is enlarged. FIG. 1 (B) is a top view of the silicon chip 1, and FIG. 1 (C) is a side view.
シリコンチップ 1の表面には、 ドライエッチングで格子状に食刻されるなどの 方法で、 多数の微細角柱 5が形成される。 微細角柱 5の大きさは、 たとえば断面 の縦横寸法が 5 0 X 5 0 ja m で、 高さが 6 0 mとされる。 隣接する微細角柱 5の間は、 たとえば 5 0 fi m (縦横寸法に等しい値） 〜6 0 z m (高さに等しい 値） の範囲とされる。 そのあと、 スパッタリングなどにより微細角柱 5を含むシ リコンチップ 1の全表面を S i 0 2 などの電気絶縁性の薄膜 6で被覆する。 なお 、 微細角柱 5の大きさは、 たとえば断面の縦横寸法が 1 0 X 1 0 / m 2 〜5 0 0 x 5 0 0〃m2 で、 高さが 1 0 m〜5 0 0〃mであればよい。 Many fine prisms 5 are formed on the surface of the silicon chip 1 by, for example, etching into a lattice by dry etching. As for the size of the fine prism 5, for example, the vertical and horizontal dimensions of the cross section are 50 × 50 jam and the height is 60 m. The space between the adjacent fine prisms 5 is, for example, in a range of 50 fim (a value equal to the vertical and horizontal dimensions) to 60 zm (a value equal to the height). Thereafter, the entire surface of the silicon chip 1 including the fine prisms 5 is covered with an electrically insulating thin film 6 such as SiO 2 by sputtering or the like. It should be noted that the size of the fine prism 5 is, for example, 10 × 10 / m 2 to 500 In x 5 0 0〃M 2, may if 1 0 m~5 0 0〃M height.
次に、 本発明による半導体装置の冷却表面形成の好適な実施の形態について説 明する。 第 2図は、 その冷却表面形成処理工程を模式的に示す。  Next, a preferred embodiment of forming a cooling surface of a semiconductor device according to the present invention will be described. FIG. 2 schematically shows the cooling surface forming process.
第 2図 （A) は、 本発明の表面処理を施す前のシリコンチップ 1の外観を示す 。 シリコンチップ 1の面積の寸法は 1 0 X 1 Omm2 、 厚さは 0. 5 mmであつ た。 なお、 便宜上、 シリコンチップ 1の内部構造は省略して示される。 FIG. 2 (A) shows the appearance of the silicon chip 1 before the surface treatment of the present invention is performed. The dimensions of the area of the silicon chip 1 were 10 × 10 mm 2 , and the thickness was 0.5 mm. The internal structure of the silicon chip 1 is omitted for convenience.
第 2図 （B) は、 シリ コンチップ 1の表面に光硬化性樹脂膜によるパターンマ スク 2を焼き付けた工程を断面で示す。 パターンマスク 2は、 シリコンチップ 1 の表面全面に光硬化性樹脂膜を塗布形成したのち、 縦横に配列された多数の方形 島部 3の部分だけ露光して硬化させ、 露光されずに残った光硬化性樹脂膜の格子 状パターン部分 4を除去して形成される。 各方形島部 3の面積の寸法は、 形成す る微細な柱状突起の断面積に対応し、 1 0 X 1 0〜 5 0 0 X 5 0 0 βπι2 位の大 きさが適当である。 FIG. 2 (B) is a cross-sectional view showing a step of printing a pattern mask 2 of a photocurable resin film on the surface of the silicon chip 1. The pattern mask 2 is formed by applying a photocurable resin film over the entire surface of the silicon chip 1 and then exposing and curing only a large number of rectangular islands 3 arranged vertically and horizontally. It is formed by removing the grid pattern portion 4 of the curable resin film. The size of the area of each rectangular island portion 3 corresponds to the cross-sectional area of the fine columnar projection to be formed, and a size of about 10 × 10 to 500 × 500 βπι 2 is appropriate.
第 2図 （C) は、 ドライエッチングの工程を示す。 シリコンチップ 1の表面を 、 パターンマスク 2の上からドライエッチングにより 6 0 m程度の深さで格子 状に食刻し、 そのあとパターンマスク 2の光硬化性樹脂膜を除去する。  FIG. 2 (C) shows the dry etching process. The surface of the silicon chip 1 is etched in a lattice shape at a depth of about 60 m by dry etching from above the pattern mask 2, and then the photocurable resin film of the pattern mask 2 is removed.
第 2図 （D) は、 パターンマスク 2除去後の高さ 6 0 //mの微細角柱 5を多数 形成されたシリコンチップ 1の表面を示す。  FIG. 2 (D) shows the surface of the silicon chip 1 on which a number of fine prisms 5 having a height of 60 // m after removal of the pattern mask 2 are formed.
第 2図 （E) は、 最終工程で、 シリコンチップ 1の表面全体に、 スパッタリン グによって厚さ約 3 mの S i 02 薄膜 6を形成した。 FIG. 2 (E) shows a final process in which a SiO 2 thin film 6 having a thickness of about 3 m was formed on the entire surface of the silicon chip 1 by sputtering.
次に、 本発明による冷却表面を持つ半導体デバイスの沸騰伝熱特性測定結果に ついて述べる。 試料として表面積 1 0 X 1 0 mm2 、 厚さ 0. 5 mmのシリコン チップ表面に縦横寸法 1 0 X 1 0〜 5 0 0 X 5 0 0〃m2 、 高さ 6 0 zmの微細 角柱をドライエッチングで形成し、 その一部についてはスパッ夕リングによって 厚さ約 3 mの S i 02 の薄膜を形成した。 これら S i 02 の薄膜を形成された ものと形成されないものとの 2種類の処理を施したシリコンチップを不伝導性液 体 F C 7 2中に浸漬し、 シリコンチップに直流による通電加熱を行って沸騰伝熱 特性を測定した。 Next, the measurement results of the boiling heat transfer characteristics of the semiconductor device having the cooling surface according to the present invention will be described. Surface area 1 0 X 1 0 mm 2 as a sample, the thickness of 0. 5 mm silicon chip length and width on the surface 1 of 0 X 1 0~ 5 0 0 X 5 0 0〃M 2, fine prism height 6 0 zm The film was formed by dry etching, and a part of the film was formed by sputtering to form a SiO 2 thin film having a thickness of about 3 m. These S i 0 a silicon chip which has been subjected to two types of processes and the second thin film shall not be formed to have been formed was immersed in a nonconductive liquid body FC 7 2, under an electricity application heating by direct silicon chip The boiling heat transfer characteristics were measured.
第 3図は 5種類のチップの沸騰伝熱特性の比較例を示す。 縦軸 qは伝熱面熱流 束を示し、 横軸 ATsat は伝熱面過熱度 （伝熱面温度 -冷却液の飽和温度） を示 す。 また、 ATsub は冷却液の過冷度 （飽和温度 -液温度） を示す。 さらに、 縦 の破線は、 半導体デバイスの許容限界作動温度 （8 5°C) を示す。 試料の記号 S mo o t hは微細加工を施していない平滑なチップである。 さらに記号 SMはド ライエツチング加工面のままのチップ、 記号 S Tはドライエツチング後にスパッ 夕リングを行ったチップを示す。 また、 記号 SM、 STに付加された数字 2 0、 5 0は、 角柱断面の寸法が 2 0 X 2 0 πιζ か 5 0 x 5 0 z かを示す。 チッ プ表面を微細加工したことによって、 チップの最大伝熱面熱流束 （qCHF ) は△ Tsat の許容限界内で平滑チップの 2倍程度増加している。 また、 スパッタリン グを施すことによつて最大伝熱面熱流束が増大していることが分かる。 Figure 3 shows a comparative example of the boiling heat transfer characteristics of five types of chips. The vertical axis q is the heat transfer surface heat flow The horizontal axis AT sat indicates the superheat degree of the heat transfer surface (heat transfer surface temperature-cooling liquid saturation temperature). AT sub indicates the degree of supercooling of the cooling liquid (saturation temperature-liquid temperature). In addition, the vertical dashed line indicates the allowable limit operating temperature (85 ° C) of the semiconductor device. The symbol S mooth of the sample is a smooth chip without micromachining. Further, the symbol SM indicates a chip as it is on a dry-etched surface, and the symbol ST indicates a chip that has been subjected to sputtering after dry-etching. Further, the symbol SM, numerals 2 0, 5 0, which is added to the ST, the dimensions of the prismatic cross section indicating 2 0 X 2 0 πι ζ or 5 0 x 5 0 z. Due to the microfabrication of the chip surface, the maximum heat transfer surface heat flux (q CHF ) of the chip has increased about twice that of a smooth chip within the allowable limit of △ Tsat. It can also be seen that the maximum heat transfer surface heat flux is increased by performing sputtering.
第 4図は、 試料 ST 2 0の測定結果と従来の試料 （f )， （c)， （b) の測 定結果とを比較したものである。 試料 （ί) はダイアモンド微粒子よりなる多孔 質層を持つ面、 試料 （c) はデンドライト面、 試料 （b) はレーザ処理面を持つ チップである。 なお、 （c)， (b) の試料では、 チップを基板に取り付けたも のを伝熱体としているので、 チップ表面以外からの放熱がかなりあり、 qは実際 より大きい値を示している （実際にはもつと低い性能になる） 。 本発明による試 料 ST 2 0は、 他に比べて小さい ATsat で高い最大伝熱面熱流束を伝達できる ことを示している。 Figure 4 compares the measurement results of sample ST20 with those of conventional samples (f), (c), and (b). Sample (ί) has a surface with a porous layer of diamond particles, sample (c) is a dendrite surface, and sample (b) is a chip with a laser-treated surface. In the samples of (c) and (b), since the heat transfer element is the one with the chip mounted on the substrate, there is considerable heat radiation from other than the chip surface, and q shows a larger value than the actual value ( Actually, it has low performance.) The sample ST20 according to the present invention shows that it can transfer a high maximum heat transfer surface heat flux with a smaller AT sat than the others.
第 5図は本発明による冷却表面を持つ半導体デバイスの最大伝熱面熱流束 q CH F のフィン高さによる変化の測定結果を示すグラフ （フィン厚さ = 3 0 /zm) で ある。 縦軸 qCHP は第 3図の沸騰伝熱特性における最大伝熱面熱流束を示し、 横 軸 At /Aは表面積拡大率 （フィン付き面の全表面積 At と投影面積 Aの比） で ある。 本発明による冷却表面を持つ半導体デバイスにおいては、 その最大熱流束 qCHF が、 フィン高さが 0〜2 0 0〃mの範囲では、 フィン高さの増大につれて 増大することを示している。 また、 この傾向は、 冷却液の過冷度 ATSU¾ が大き いほど顕著になることを示している。 従って、 フィン高さが高いほど伝熱性能が 向上することが判る。 FIG. 5 is a graph (fin thickness = 30 / zm) showing the measurement result of the change of the maximum heat transfer surface heat flux q CH F of the semiconductor device having the cooling surface according to the present invention with the fin height. The vertical axis q CHP indicates the maximum heat transfer surface heat flux in the boiling heat transfer characteristics in Fig. 3, and the horizontal axis At / A is the surface area expansion ratio (the ratio of the total surface area At of the finned surface to the projected area A). In the semiconductor device having a cooling surface according to the invention, the maximum heat flux q CH F is, the fin height in the range of 0 to 2 0 0〃M shows that increasing with increasing fin height. This tendency also becomes more pronounced as the supercooling degree AT SU¾ of the coolant increases. Therefore, it is understood that the higher the fin height, the better the heat transfer performance.
一方、 フィン高さがおよそ 5 0 0 mを超えると、 当該フィンを通しての熱伝 導抵抗が増大する結果最大熱流束 qCHF の増加傾向が飽和し、 ついには減少に転 じると考えられる。 従って、 フィン高さは 5 0 0 mまでが好ましい。 一方、 通 常、 シリコンチップの厚さが 5 0 0 m程度であることを考えると、 これにほぼ 等しい高さのフィンを実装することに問題はない。 また、 この場合において、 フ ィンの縦横がおよそ 5 0 0 mを超えると、 表面積拡大率 A t /Aが減少するの で、 伝熱性能も低下してしまう。 従って、 フィンの縦横は 5 0 0〃mまでが好ま しい。 On the other hand, when the fin height exceeds approximately 500 m, the heat transfer resistance through the fin increases, and as a result, the increasing trend of the maximum heat flux q CHF saturates, and finally decreases. It is thought that it will be. Therefore, the fin height is preferably up to 500 m. On the other hand, considering that the thickness of a silicon chip is usually about 500 m, there is no problem in mounting fins having almost the same height. Further, in this case, the vertical and horizontal full fin exceeds approximately 5 0 0 m, is to reduce the surface area magnification ratio A t / A, the heat transfer performance decreases. Therefore, the height and width of the fins are preferably up to 500〃m.
なお、 上述した本発明の説明では、 チップ表面に微細な角柱を形成するものと していたが、 円柱その他の類似の形状の突起であっても同様な働きをすることが できる。 また突起の配列は、 必ずしも等間隔である必要はない。 産業上の利用可能性  In the above description of the present invention, a fine prism is formed on the chip surface. However, a cylinder or other similar shaped protrusion can also perform the same function. The arrangement of the projections does not necessarily have to be at equal intervals. Industrial applicability
本発明は、 半導体素子の表面に微細加工を施すことによって高い沸騰冷却性能 を得るものであり、 最大熱流束点の伝熱面温度が半導体デバイスの許容限界温度 よりかなり低く保つことが可能であり、 また最大熱流束の値も、 液の過冷度を大 きくとることによって容易に従来例の最高レベルと同程度にすることができるの で、 半導体デバイス間の空間を小さくする必要のある三次元実装の要求にも容易 に応えることができる。  The present invention obtains high boiling cooling performance by performing micromachining on the surface of a semiconductor element.It is possible to keep the heat transfer surface temperature at the maximum heat flux point considerably lower than the allowable limit temperature of the semiconductor device. Also, the value of the maximum heat flux can easily be made equal to the highest level of the conventional example by increasing the degree of subcooling of the liquid, so that the space between the semiconductor devices needs to be reduced. It can easily meet the requirements of the original implementation.
さらに本発明に必要な加工技術としては、 半導体デバイスの標準的な微細加工 技術を用いることができるので、 実際の製造プロセスへの応用は容易である。  Further, as a processing technique required for the present invention, a standard fine processing technique for semiconductor devices can be used, so that application to an actual manufacturing process is easy.

Claims

請求の範囲 The scope of the claims
1 . 多数の微細な柱状または平板状突起を設けられた表面を有する 1. Has a surface provided with numerous fine columnar or flat projections
ことを特徴とする半導体装置。  A semiconductor device characterized by the above-mentioned.
2 . 更に、 前記表面全体を覆う電気絶縁性の薄膜を有する  2. Further, it has an electrically insulating thin film covering the entire surface.
ことを特徴とする請求項 1に記載の半導体装置。  2. The semiconductor device according to claim 1, wherein:
3 . 前記電気絶縁性の薄膜は S i 0 2 の薄膜である 3. The electrically insulating thin film is a SiO 2 thin film
ことを特徴とする請求項 2に記載の半導体装置。  3. The semiconductor device according to claim 2, wherein:
4 . 前記微細な柱状または平板状突起は、 その断面の縦横の寸法がともに 1 0〜 5 0 0 mであり、 高さが 1 0〜5 0 0 / mである  4. The fine columnar or flat projection has a cross-sectional length and width of 10 to 500 m and a height of 10 to 500 / m.
ことを特徴とする請求項 1ないし請求項 3に記載の半導体装置。 ' 4. The semiconductor device according to claim 1, wherein: '
5 . 半導体装置の表面に多数の微細な柱状または平板状突起を形成し、 5. Many fine columnar or flat protrusions are formed on the surface of the semiconductor device,
さらに該形成された微細な突起を有する表面全体の上に電気絶縁性の薄膜を形 成する  Further, an electrically insulating thin film is formed on the entire surface having the formed fine protrusions.
ことを特徴とする半導体装置の冷却表面形成方法。  A method for forming a cooling surface of a semiconductor device, comprising:
6 . 前記微細な柱状または平板状突起をドライエッチングによつて形成する ことを特徴とする請求項 5に記載の半導体装置の冷却表面形成方法。  6. The method for forming a cooling surface of a semiconductor device according to claim 5, wherein the fine columnar or flat protrusions are formed by dry etching.
7 . 前記微細な柱状または平板状突起は、 その断面の縦横の寸法がともに 1 0〜 5 0 0 mであり、 高さが 1 0〜5 0 0〃 mであるように形成する  7. The fine columnar or flat projections are formed such that the vertical and horizontal dimensions of the cross-section are both 10 to 500 m and the height is 10 to 500 m.
ことを特徴とする請求項 5または請求項 6に記載の半導体装置の冷却表面形成 方法。  7. The method for forming a cooling surface of a semiconductor device according to claim 5, wherein:
8 . 前記電気絶縁性の薄膜を、 スパッタリング、 イオンプレ一ティングまたは C V D法によって S i 0 2 で形成する 8. The electrically insulating thin film, sputtering, formed by S i 0 2 by ion plating one coating or CVD
ことを特徴とする請求項 5ないし請求項 7に記載の半導体装置の冷却表面形成 方法。  8. The method for forming a cooling surface of a semiconductor device according to claim 5, wherein:
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